VirtualBox

source: vbox/trunk/include/iprt/nt/hyperv.h@ 73108

Last change on this file since 73108 was 72683, checked in by vboxsync, 6 years ago

iprt/nt/hyperv.h: intercept header correction. bugref:9044

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1/** @file
2 * Hyper-V related types and definitions.
3 */
4
5/*
6 * Copyright (C) 2018 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26
27#ifndef ___iprt_nt_hyperv_h
28#define ___iprt_nt_hyperv_h
29
30
31#ifndef IN_IDA_PRO
32# include <iprt/types.h>
33# include <iprt/assertcompile.h>
34#else
35# define RT_FLEXIBLE_ARRAY
36# define AssertCompile(expr)
37# define AssertCompileSize(type, size)
38# define AssertCompileMemberOffset(type, member, off)
39#endif
40
41
42/** Hyper-V partition ID. */
43typedef uint64_t HV_PARTITION_ID;
44/** Invalid Hyper-V partition ID. */
45#define HV_PARTITION_ID_INVALID UINT64_C(0)
46/** Hyper-V virtual processor index (== VMCPUID). */
47typedef uint32_t HV_VP_INDEX;
48/** Guest physical address (== RTGCPHYS). */
49typedef uint64_t HV_GPA;
50/** Guest physical page number. */
51typedef uint64_t HV_GPA_PAGE_NUMBER;
52/** System(/parent) physical page number. */
53typedef uint64_t HV_SPA_PAGE_NUMBER;
54/** Hyper-V unsigned 128-bit integer type. */
55typedef struct { uint64_t Low64, High64; } HV_UINT128;
56/** Hyper-V port ID. */
57typedef union
58{
59 uint32_t AsUINT32;
60 struct
61 {
62 uint32_t Id : 24;
63 uint32_t Reserved : 8;
64 };
65} HV_PORT_ID;
66/** Pointer to a Hyper-V port ID. */
67typedef HV_PORT_ID *PHV_PORT_ID;
68
69
70/**
71 * Hypercall IDs.
72 */
73typedef enum
74{
75 HvCallReserved0000 = 0,
76
77 HvCallSwitchVirtualAddressSpace,
78 HvCallFlushVirtualAddressSpace,
79 HvCallFlushVirtualAddressList,
80 HvCallGetLogicalProcessorRunTime,
81 /* 5, 6 & 7 are deprecated / reserved. */
82 HvCallNotifyLongSpinWait = 8,
83 HvCallParkLogicalProcessors, /**< @since v2 */
84 HvCallInvokeHypervisorDebugger, /**< @since v2 - not mentioned in TLFS v5.0b */
85 HvCallSendSyntheticClusterIpi, /**< @since v? */
86 HvCallModifyVtlProtectionMask, /**< @since v? */
87 HvCallEnablePartitionVtl, /**< @since v? */
88 HvCallDisablePartitionVtl, /**< @since v? */
89 HvCallEnableVpVtl, /**< @since v? */
90 HvCallDisableVpVtl, /**< @since v? */
91 HvCallVtlCall, /**< @since v? */
92 HvCallVtlReturn, /**< @since v? */
93 HvCallFlushVirtualAddressSpaceEx, /**< @since v? */
94 HvCallFlushVirtualAddressListEx, /**< @since v? */
95 HvCallSendSyntheticClusterIpiEx, /**< @since v? */
96 /* Reserved: 0x16..0x3f */
97
98 HvCallCreatePartition = 0x40,
99 HvCallInitializePartition,
100 HvCallFinalizePartition,
101 HvCallDeletePartition,
102 HvCallGetPartitionProperty,
103 HvCallSetPartitionProperty,
104 HvCallGetPartitionId,
105 HvCallGetNextChildPartition,
106 HvCallDepositMemory, /**< 0x48 - Repeat call. */
107 HvCallWithdrawMemory, /**< 0x49 - Repeat call. */
108 HvCallGetMemoryBalance,
109 HvCallMapGpaPages, /**< 0X4b - Repeat call. */
110 HvCallUnmapGpaPages, /**< 0X4c - Repeat call. */
111 HvCallInstallIntercept,
112 HvCallCreateVp,
113 HvCallDeleteVp, /**< 0x4f - Fast call. */
114 HvCallGetVpRegisters, /**< 0x50 - Repeat call. */
115 HvCallSetVpRegisters, /**< 0x51 - Repeat call. */
116 HvCallTranslateVirtualAddress,
117 HvCallReadGpa,
118 HvCallWriteGpa,
119 HvCallAssertVirtualInterruptV1,
120 HvCallClearVirtualInterrupt, /**< 0x56 - Fast call. */
121 HvCallCreatePortV1,
122 HvCallDeletePort, /**< 0x58 - Fast call. */
123 HvCallConnectPortV1,
124 HvCallGetPortProperty,
125 HvCallDisconnectPort,
126 HvCallPostMessage,
127 HvCallSignalEvent,
128 HvCallSavePartitionState,
129 HvCallRestorePartitionState,
130 HvCallInitializeEventLogBufferGroup,
131 HvCallFinalizeEventLogBufferGroup,
132 HvCallCreateEventLogBuffer,
133 HvCallDeleteEventLogBuffer,
134 HvCallMapEventLogBuffer,
135 HvCallUnmapEventLogBuffer,
136 HvCallSetEventLogGroupSources,
137 HvCallReleaseEventLogBuffer,
138 HvCallFlushEventLogBuffer,
139 HvCallPostDebugData,
140 HvCallRetrieveDebugData,
141 HvCallResetDebugSession,
142 HvCallMapStatsPage,
143 HvCallUnmapStatsPage,
144 HvCallMapSparseGpaPages, /**< @since v2 */
145 HvCallSetSystemProperty, /**< @since v2 */
146 HvCallSetPortProperty, /**< @since v2 */
147 /* 0x71..0x75 reserved/deprecated (was v2 test IDs). */
148 HvCallAddLogicalProcessor = 0x76,
149 HvCallRemoveLogicalProcessor,
150 HvCallQueryNumaDistance,
151 HvCallSetLogicalProcessorProperty,
152 HvCallGetLogicalProcessorProperty,
153 HvCallGetSystemProperty,
154 HvCallMapDeviceInterrupt,
155 HvCallUnmapDeviceInterrupt,
156 HvCallRetargetDeviceInterrupt,
157 /* 0x7f is reserved. */
158 HvCallMapDevicePages = 0x80,
159 HvCallUnmapDevicePages,
160 HvCallAttachDevice,
161 HvCallDetachDevice,
162 HvCallNotifyStandbyTransition,
163 HvCallPrepareForSleep,
164 HvCallPrepareForHibernate,
165 HvCallNotifyPartitionEvent,
166 HvCallGetLogicalProcessorRegisters,
167 HvCallSetLogicalProcessorRegisters,
168 HvCallQueryAssociatedLpsforMca,
169 HvCallNotifyRingEmpty,
170 HvCallInjectSyntheticMachineCheck,
171 HvCallScrubPartition,
172 HvCallCollectLivedump,
173 HvCallDisableHypervisor,
174 HvCallModifySparseGpaPages,
175 HvCallRegisterInterceptResult,
176 HvCallUnregisterInterceptResult,
177 /* 0x93 is reserved/undocumented. */
178 HvCallAssertVirtualInterrupt = 0x94,
179 HvCallCreatePort,
180 HvCallConnectPort,
181 HvCallGetSpaPageList,
182 /* 0x98 is reserved. */
183 HvCallStartVirtualProcessor = 0x99,
184 HvCallGetVpIndexFromApicId,
185 /* 0x9b..0xae are reserved/undocumented.
186 0xad: New version of HvCallGetVpRegisters? Perhaps on logical CPU or smth. */
187 HvCallFlushGuestPhysicalAddressSpace = 0xaf,
188 HvCallFlushGuestPhysicalAddressList,
189 /* 0xb1..0xb4 are unknown */
190 HvCallCreateCpuGroup = 0xb5,
191 HvCallDeleteCpuGroup,
192 HvCallGetCpuGroupProperty,
193 HvCallSetCpuGroupProperty,
194 HvCallGetCpuGroupAffinit,
195 HvCallGetNextCpuGroup = 0xba,
196 HvCallGetNextCpuGroupPartition,
197 HvCallPrecommitGpaPages = 0xbe,
198 HvCallUncommitGpaPages, /**< Happens when VidDestroyGpaRangeCheckSecure/WHvUnmapGpaRange is called. */
199 /* 0xc0..0xcb are unknown */
200 HvCallVpRunloopRelated = 0xc2, /**< Fast */
201 HvCallQueryVtlProtectionMaskRange = 0xcc,
202 HvCallModifyVtlProtectionMaskRange,
203 /* 0xce..0xd1 are unknown */
204 HvCallAcquireSparseGpaPageHostAccess = 0xd2,
205 HvCallReleaseSparseGpaPageHostAccess,
206 HvCallCheckSparseGpaPageVtlAccess,
207 HvCallAcquireSparseSpaPageHostAccess = 0xd7,
208 HvCallReleaseSparseSpaPageHostAccess,
209 HvCallAcceptGpaPages, /**< 0x18 byte input, zero rep, no output. */
210
211 /** Number of defined hypercalls (varies with version). */
212 HvCallCount
213} HV_CALL_CODE;
214AssertCompile(HvCallSendSyntheticClusterIpiEx == 0x15);
215AssertCompile(HvCallMapGpaPages == 0x4b);
216AssertCompile(HvCallSetPortProperty == 0x70);
217AssertCompile(HvCallRetargetDeviceInterrupt == 0x7e);
218AssertCompile(HvCallUnregisterInterceptResult == 0x92);
219AssertCompile(HvCallGetSpaPageList == 0x97);
220AssertCompile(HvCallFlushGuestPhysicalAddressList == 0xb0);
221AssertCompile(HvCallUncommitGpaPages == 0xbf);
222AssertCompile(HvCallCount == 0xda);
223
224/** Makes the first parameter to a hypercall (rcx). */
225#define HV_MAKE_CALL_INFO(a_enmCallCode, a_cReps) ( (uint64_t)(a_enmCallCode) | ((uint64_t)(a_cReps) << 32) )
226/** Makes the return value (success) for a rep hypercall. */
227#define HV_MAKE_CALL_REP_RET(a_cReps) ((uint64_t)(a_cReps) << 32)
228
229/** Hypercall status code. */
230typedef uint16_t HV_STATUS;
231
232/** @name Hyper-V Hypercall status codes
233 * @{ */
234#define HV_STATUS_SUCCESS (0x0000)
235#define HV_STATUS_RESERVED_1 (0x0001)
236#define HV_STATUS_INVALID_HYPERCALL_CODE (0x0002)
237#define HV_STATUS_INVALID_HYPERCALL_INPUT (0x0003)
238#define HV_STATUS_INVALID_ALIGNMENT (0x0004)
239#define HV_STATUS_INVALID_PARAMETER (0x0005)
240#define HV_STATUS_ACCESS_DENIED (0x0006)
241#define HV_STATUS_INVALID_PARTITION_STATE (0x0007)
242#define HV_STATUS_OPERATION_DENIED (0x0008)
243#define HV_STATUS_UNKNOWN_PROPERTY (0x0009)
244#define HV_STATUS_PROPERTY_VALUE_OUT_OF_RANGE (0x000a)
245#define HV_STATUS_INSUFFICIENT_MEMORY (0x000b)
246#define HV_STATUS_PARTITION_TOO_DEEP (0x000c)
247#define HV_STATUS_INVALID_PARTITION_ID (0x000d)
248#define HV_STATUS_INVALID_VP_INDEX (0x000e)
249#define HV_STATUS_RESERVED_F (0x000f)
250#define HV_STATUS_NOT_FOUND (0x0010)
251#define HV_STATUS_INVALID_PORT_ID (0x0011)
252#define HV_STATUS_INVALID_CONNECTION_ID (0x0012)
253#define HV_STATUS_INSUFFICIENT_BUFFERS (0x0013)
254#define HV_STATUS_NOT_ACKNOWLEDGED (0x0014)
255#define HV_STATUS_INVALID_VP_STATE (0x0015)
256#define HV_STATUS_ACKNOWLEDGED (0x0016)
257#define HV_STATUS_INVALID_SAVE_RESTORE_STATE (0x0017)
258#define HV_STATUS_INVALID_SYNIC_STATE (0x0018)
259#define HV_STATUS_OBJECT_IN_USE (0x0019)
260#define HV_STATUS_INVALID_PROXIMITY_DOMAIN_INFO (0x001a)
261#define HV_STATUS_NO_DATA (0x001b)
262#define HV_STATUS_INACTIVE (0x001c)
263#define HV_STATUS_NO_RESOURCES (0x001d)
264#define HV_STATUS_FEATURE_UNAVAILABLE (0x001e)
265#define HV_STATUS_PARTIAL_PACKET (0x001f)
266#define HV_STATUS_PROCESSOR_FEATURE_SSE3_NOT_SUPPORTED (0x0020)
267#define HV_STATUS_PROCESSOR_FEATURE_LAHFSAHF_NOT_SUPPORTED (0x0021)
268#define HV_STATUS_PROCESSOR_FEATURE_SSSE3_NOT_SUPPORTED (0x0022)
269#define HV_STATUS_PROCESSOR_FEATURE_SSE4_1_NOT_SUPPORTED (0x0023)
270#define HV_STATUS_PROCESSOR_FEATURE_SSE4_2_NOT_SUPPORTED (0x0024)
271#define HV_STATUS_PROCESSOR_FEATURE_SSE4A_NOT_SUPPORTED (0x0025)
272#define HV_STATUS_PROCESSOR_FEATURE_XOP_NOT_SUPPORTED (0x0026)
273#define HV_STATUS_PROCESSOR_FEATURE_POPCNT_NOT_SUPPORTED (0x0027)
274#define HV_STATUS_PROCESSOR_FEATURE_CMPXCHG16B_NOT_SUPPORTED (0x0028)
275#define HV_STATUS_PROCESSOR_FEATURE_ALTMOVCR8_NOT_SUPPORTED (0x0029)
276#define HV_STATUS_PROCESSOR_FEATURE_LZCNT_NOT_SUPPORTED (0x002a)
277#define HV_STATUS_PROCESSOR_FEATURE_MISALIGNED_SSE_NOT_SUPPORTED (0x002b)
278#define HV_STATUS_PROCESSOR_FEATURE_MMX_EXT_NOT_SUPPORTED (0x002c)
279#define HV_STATUS_PROCESSOR_FEATURE_3DNOW_NOT_SUPPORTED (0x002d)
280#define HV_STATUS_PROCESSOR_FEATURE_EXTENDED_3DNOW_NOT_SUPPORTED (0x002e)
281#define HV_STATUS_PROCESSOR_FEATURE_PAGE_1GB_NOT_SUPPORTED (0x002f)
282#define HV_STATUS_PROCESSOR_CACHE_LINE_FLUSH_SIZE_INCOMPATIBLE (0x0030)
283#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_NOT_SUPPORTED (0x0031)
284#define HV_STATUS_PROCESSOR_FEATURE_XSAVEOPT_NOT_SUPPORTED (0x0032)
285#define HV_STATUS_INSUFFICIENT_BUFFER (0x0033)
286#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX_NOT_SUPPORTED (0x0034)
287#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_ FEATURE_NOT_SUPPORTED (0x0035)
288#define HV_STATUS_PROCESSOR_XSAVE_SAVE_AREA_INCOMPATIBLE (0x0036)
289#define HV_STATUS_INCOMPATIBLE_PROCESSOR (0x0037)
290#define HV_STATUS_INSUFFICIENT_DEVICE_DOMAINS (0x0038)
291#define HV_STATUS_PROCESSOR_FEATURE_AES_NOT_SUPPORTED (0x0039)
292#define HV_STATUS_PROCESSOR_FEATURE_PCLMULQDQ_NOT_SUPPORTED (0x003a)
293#define HV_STATUS_PROCESSOR_FEATURE_INCOMPATIBLE_XSAVE_FEATURES (0x003b)
294#define HV_STATUS_CPUID_FEATURE_VALIDATION_ERROR (0x003c)
295#define HV_STATUS_CPUID_XSAVE_FEATURE_VALIDATION_ERROR (0x003d)
296#define HV_STATUS_PROCESSOR_STARTUP_TIMEOUT (0x003e)
297#define HV_STATUS_SMX_ENABLED (0x003f)
298#define HV_STATUS_PROCESSOR_FEATURE_PCID_NOT_SUPPORTED (0x0040)
299#define HV_STATUS_INVALID_LP_INDEX (0x0041)
300#define HV_STATUS_FEATURE_FMA4_NOT_SUPPORTED (0x0042)
301#define HV_STATUS_FEATURE_F16C_NOT_SUPPORTED (0x0043)
302#define HV_STATUS_PROCESSOR_FEATURE_RDRAND_NOT_SUPPORTED (0x0044)
303#define HV_STATUS_PROCESSOR_FEATURE_RDWRFSGS_NOT_SUPPORTED (0x0045)
304#define HV_STATUS_PROCESSOR_FEATURE_SMEP_NOT_SUPPORTED (0x0046)
305#define HV_STATUS_PROCESSOR_FEATURE_ENHANCED_FAST_STRING_NOT_SUPPORTED (0x0047)
306#define HV_STATUS_PROCESSOR_FEATURE_MOVBE_NOT_SUPPORTED (0x0048)
307#define HV_STATUS_PROCESSOR_FEATURE_BMI1_NOT_SUPPORTED (0x0049)
308#define HV_STATUS_PROCESSOR_FEATURE_BMI2_NOT_SUPPORTED (0x004a)
309#define HV_STATUS_PROCESSOR_FEATURE_HLE_NOT_SUPPORTED (0x004b)
310#define HV_STATUS_PROCESSOR_FEATURE_RTM_NOT_SUPPORTED (0x004c)
311#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_FMA_NOT_SUPPORTED (0x004d)
312#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX2_NOT_SUPPORTED (0x004e)
313#define HV_STATUS_PROCESSOR_FEATURE_NPIEP1_NOT_SUPPORTED (0x004f)
314#define HV_STATUS_INVALID_REGISTER_VALUE (0x0050)
315#define HV_STATUS_PROCESSOR_FEATURE_RDSEED_NOT_SUPPORTED (0x0052)
316#define HV_STATUS_PROCESSOR_FEATURE_ADX_NOT_SUPPORTED (0x0053)
317#define HV_STATUS_PROCESSOR_FEATURE_SMAP_NOT_SUPPORTED (0x0054)
318#define HV_STATUS_NX_NOT_DETECTED (0x0055)
319#define HV_STATUS_PROCESSOR_FEATURE_INTEL_PREFETCH_NOT_SUPPORTED (0x0056)
320#define HV_STATUS_INVALID_DEVICE_ID (0x0057)
321#define HV_STATUS_INVALID_DEVICE_STATE (0x0058)
322#define HV_STATUS_PENDING_PAGE_REQUESTS (0x0059)
323#define HV_STATUS_PAGE_REQUEST_INVALID (0x0060)
324#define HV_STATUS_OPERATION_FAILED (0x0071)
325#define HV_STATUS_NOT_ALLOWED_WITH_NESTED_VIRT_ACTIVE (0x0072)
326/** @} */
327
328
329/** Hyper-V partition property value. */
330typedef uint64_t HV_PARTITION_PROPERTY;
331/** Pointer to a partition property value. */
332typedef HV_PARTITION_PROPERTY *PHV_PARTITION_PROPERTY;
333/**
334 * Hyper-V partition property code.
335 * This is documented in TLFS, except version 5.x.
336 */
337typedef enum
338{
339 HvPartitionPropertyPrivilegeFlags = 0x00010000,
340
341 HvPartitionPropertyCpuReserve = 0x00020001,
342 HvPartitionPropertyCpuCap,
343 HvPartitionPropertyCpuWeight,
344 HvPartitionPropertyUnknown20004, /**< On exo partition (build 17134), initial value zero. */
345
346 HvPartitionPropertyEmulatedTimerPeriod = 0x00030000, /**< @note Fails on exo partition (build 17134). */
347 HvPartitionPropertyEmulatedTimerControl, /**< @note Fails on exo partition (build 17134). */
348 HvPartitionPropertyPmTimerAssist, /**< @note Fails on exo partition (build 17134). */
349
350 HvPartitionPropertyDebugChannelId = 0x00040000, /**< @note Hangs system on exo partition hangs (build 17134). */
351
352 HvPartitionPropertyVirtualTlbPageCount = 0x00050000,
353 HvPartitionPropertyUnknown50001, /**< On exo partition (build 17134), initial value zero. */
354 HvPartitionPropertyUnknown50002, /**< On exo partition (build 17134), initial value zero. */
355 HvPartitionPropertyUnknown50003, /**< On exo partition (build 17134), initial value zero. */
356 HvPartitionPropertyUnknown50004, /**< On exo partition (build 17134), initial value zero. */
357 HvPartitionPropertyUnknown50005, /**< On exo partition (build 17134), initial value one. */
358 HvPartitionPropertyUnknown50006, /**< On exo partition (build 17134), initial value zero. */
359
360 HvPartitionPropertyProcessorVendor = 0x00060000,
361 HvPartitionPropertyProcessorFeatures, /**< On exo/17134/threadripper: 0x6cb26f39fbf */
362 HvPartitionPropertyProcessorXsaveFeatures,
363 HvPartitionPropertyProcessorCLFlushSize, /**< On exo/17134/threadripper: 8 */
364 HvPartitionPropertyUnknown60004, /**< On exo partition (build 17134), initial value zero. */
365 HvPartitionPropertyUnknown60005, /**< On exo partition (build 17134), initial value 0x603. */
366 HvPartitionPropertyUnknown60006, /**< On exo partition (build 17134), initial value 0x2c. */
367
368 HvPartitionPropertyGuestOsId = 0x00070000, /**< @since v4 */
369
370 HvPartitionPropertyUnknown800000 = 0x00080000 /**< On exo partition (build 17134), initial value zero. */
371} HV_PARTITION_PROPERTY_CODE;
372AssertCompileSize(HV_PARTITION_PROPERTY_CODE, 4);
373/** Pointer to a partition property code. */
374typedef HV_PARTITION_PROPERTY_CODE *PHV_PARTITION_PROPERTY_CODE;
375
376
377/** Input for HvCallGetPartitionProperty. */
378typedef struct
379{
380 HV_PARTITION_ID PartitionId;
381 HV_PARTITION_PROPERTY_CODE PropertyCode;
382 uint32_t uPadding;
383} HV_INPUT_GET_PARTITION_PROPERTY;
384AssertCompileSize(HV_INPUT_GET_PARTITION_PROPERTY, 16);
385/** Pointer to input for HvCallGetPartitionProperty. */
386typedef HV_INPUT_GET_PARTITION_PROPERTY *PHV_INPUT_GET_PARTITION_PROPERTY;
387
388/** Output for HvCallGetPartitionProperty. */
389typedef struct
390{
391 HV_PARTITION_PROPERTY PropertyValue;
392} HV_OUTPUT_GET_PARTITION_PROPERTY;
393/** Pointer to output for HvCallGetPartitionProperty. */
394typedef HV_OUTPUT_GET_PARTITION_PROPERTY *PHV_OUTPUT_GET_PARTITION_PROPERTY;
395
396
397/** Input for HvCallSetPartitionProperty. */
398typedef struct
399{
400 HV_PARTITION_ID PartitionId;
401 HV_PARTITION_PROPERTY_CODE PropertyCode;
402 uint32_t uPadding;
403 HV_PARTITION_PROPERTY PropertyValue;
404} HV_INPUT_SET_PARTITION_PROPERTY;
405AssertCompileSize(HV_INPUT_SET_PARTITION_PROPERTY, 24);
406/** Pointer to input for HvCallSetPartitionProperty. */
407typedef HV_INPUT_SET_PARTITION_PROPERTY *PHV_INPUT_SET_PARTITION_PROPERTY;
408
409
410/** Hyper-V NUMA node ID.
411 * On systems without NUMA, i.e. a single node, it uses 0 as identifier. */
412typedef uint32_t HV_PROXIMITY_DOMAIN_ID;
413/** Pointer to NUMA node ID. */
414typedef HV_PROXIMITY_DOMAIN_ID *PHV_PROXIMITY_DOMAIN_ID;
415
416/** Hyper-V NUMA flags. */
417typedef struct
418{
419 uint32_t ProximityPreferred : 1; /**< When set, allocations may come from other NUMA nodes. */
420 uint32_t Reserved : 30; /**< Reserved for future (as of circa v2). */
421 uint32_t ProxyimityInfoValid : 1; /**< Set if the NUMA information is valid. */
422} HV_PROXIMITY_DOMAIN_FLAGS;
423/** Pointer to Hyper-V NUMA flags. */
424typedef HV_PROXIMITY_DOMAIN_FLAGS *PHV_PROXIMITY_DOMAIN_FLAGS;
425
426/** Hyper-V NUMA information. */
427typedef struct
428{
429 HV_PROXIMITY_DOMAIN_ID Id; /**< NUMA node identifier. */
430 HV_PROXIMITY_DOMAIN_FLAGS Flags; /**< NUMA flags. */
431} HV_PROXIMITY_DOMAIN_INFO;
432/** Pointer to Hyper-V NUMA information. */
433typedef HV_PROXIMITY_DOMAIN_INFO *PHV_PROXIMITY_DOMAIN_INFO;
434
435/** Input for HvCallGetMemoryBalance. */
436typedef struct
437{
438 HV_PARTITION_ID TargetPartitionId;
439 HV_PROXIMITY_DOMAIN_INFO ProximityDomainInfo;
440} HV_INPUT_GET_MEMORY_BALANCE;
441AssertCompileSize(HV_INPUT_GET_MEMORY_BALANCE, 16);
442/** Pointer to the input for HvCallGetMemoryBalance. */
443typedef HV_INPUT_GET_MEMORY_BALANCE *PHV_INPUT_GET_MEMORY_BALANCE;
444
445/** Output for HvCallGetMemoryBalance. */
446typedef struct
447{
448 uint64_t PagesAvailable;
449 uint64_t PagesInUse;
450} HV_OUTPUT_GET_MEMORY_BALANCE;
451/** Pointer to the output for HvCallGetMemoryBalance. */
452typedef HV_OUTPUT_GET_MEMORY_BALANCE *PHV_OUTPUT_GET_MEMORY_BALANCE;
453
454
455/** @name Flags used with HvCallMapGpaPages and HvCallMapSparseGpaPages.
456 * @note There seems to be a more flags defined after v2.
457 * @{ */
458typedef uint32_t HV_MAP_GPA_FLAGS;
459#define HV_MAP_GPA_READABLE UINT32_C(0x0001)
460#define HV_MAP_GPA_WRITABLE UINT32_C(0x0002)
461#define HV_MAP_GPA_EXECUTABLE UINT32_C(0x0004)
462/** Seems this have to be set when HV_MAP_GPA_EXECUTABLE is (17101). */
463#define HV_MAP_GPA_EXECUTABLE_AGAIN UINT32_C(0x0008)
464/** Dunno what this is yet, but it requires HV_MAP_GPA_DUNNO_1000.
465 * The readable bit gets put here when both HV_MAP_GPA_DUNNO_1000 and
466 * HV_MAP_GPA_DUNNO_MASK_0700 are clear. */
467#define HV_MAP_GPA_DUNNO_ACCESS UINT32_C(0x0010)
468/** Guess work. */
469#define HV_MAP_GPA_MAYBE_ACCESS_MASK UINT32_C(0x001f)
470/** Some kind of mask. */
471#define HV_MAP_GPA_DUNNO_MASK_0700 UINT32_C(0x0700)
472/** Dunno what this is, but required for HV_MAP_GPA_DUNNO_ACCESS. */
473#define HV_MAP_GPA_DUNNO_1000 UINT32_C(0x1000)
474/** Working with large 2MB pages. */
475#define HV_MAP_GPA_LARGE UINT32_C(0x2000)
476/** Valid mask as per build 17101. */
477#define HV_MAP_GPA_VALID_MASK UINT32_C(0x7f1f)
478/** @} */
479
480/** Input for HvCallMapGpaPages. */
481typedef struct
482{
483 HV_PARTITION_ID TargetPartitionId;
484 HV_GPA_PAGE_NUMBER TargetGpaBase;
485 HV_MAP_GPA_FLAGS MapFlags;
486 uint32_t u32ExplicitPadding;
487 /* The repeating part: */
488 HV_SPA_PAGE_NUMBER PageList[RT_FLEXIBLE_ARRAY];
489} HV_INPUT_MAP_GPA_PAGES;
490AssertCompileMemberOffset(HV_INPUT_MAP_GPA_PAGES, PageList, 24);
491/** Pointer to the input for HvCallMapGpaPages. */
492typedef HV_INPUT_MAP_GPA_PAGES *PHV_INPUT_MAP_GPA_PAGES;
493
494
495/** A parent to guest mapping pair for HvCallMapSparseGpaPages. */
496typedef struct
497{
498 HV_GPA_PAGE_NUMBER TargetGpaPageNumber;
499 HV_SPA_PAGE_NUMBER SourceSpaPageNumber;
500} HV_GPA_MAPPING;
501/** Pointer to a parent->guest mapping pair for HvCallMapSparseGpaPages. */
502typedef HV_GPA_MAPPING *PHV_GPA_MAPPING;
503
504/** Input for HvCallMapSparseGpaPages. */
505typedef struct
506{
507 HV_PARTITION_ID TargetPartitionId;
508 HV_MAP_GPA_FLAGS MapFlags;
509 uint32_t u32ExplicitPadding;
510 /* The repeating part: */
511 HV_GPA_MAPPING PageList[RT_FLEXIBLE_ARRAY];
512} HV_INPUT_MAP_SPARSE_GPA_PAGES;
513AssertCompileMemberOffset(HV_INPUT_MAP_SPARSE_GPA_PAGES, PageList, 16);
514/** Pointer to the input for HvCallMapSparseGpaPages. */
515typedef HV_INPUT_MAP_SPARSE_GPA_PAGES *PHV_INPUT_MAP_SPARSE_GPA_PAGES;
516
517
518/** Input for HvCallUnmapGpaPages. */
519typedef struct
520{
521 HV_PARTITION_ID TargetPartitionId;
522 HV_GPA_PAGE_NUMBER TargetGpaBase;
523 /** This field is either an omission in the 7600 WDK or a later additions.
524 * Anyway, not quite sure what it does. Bit 2 seems to indicate 2MB pages. */
525 uint64_t fFlags;
526} HV_INPUT_UNMAP_GPA_PAGES;
527AssertCompileSize(HV_INPUT_UNMAP_GPA_PAGES, 24);
528/** Pointer to the input for HvCallUnmapGpaPages. */
529typedef HV_INPUT_UNMAP_GPA_PAGES *PHV_INPUT_UNMAP_GPA_PAGES;
530
531
532
533/** Cache types used by HvCallReadGpa and HvCallWriteGpa. */
534typedef enum
535{
536 HvCacheTypeX64Uncached = 0,
537 HvCacheTypeX64WriteCombining,
538 /* 2 & 3 are undefined. */
539 HvCacheTypeX64WriteThrough = 4,
540 HvCacheTypeX64WriteProtected,
541 HvCacheTypeX64WriteBack
542} HV_CACHE_TYPE;
543
544/** Control flags for HvCallReadGpa and HvCallWriteGpa. */
545typedef union
546{
547 uint64_t AsUINT64;
548 struct
549 {
550 uint64_t CacheType : 8; /**< HV_CACHE_TYPE */
551 uint64_t Reserved : 56;
552 };
553} HV_ACCESS_GPA_CONTROL_FLAGS;
554
555/** Results codes for HvCallReadGpa and HvCallWriteGpa. */
556typedef enum
557{
558 HvAccessGpaSuccess = 0,
559 HvAccessGpaUnmapped,
560 HvAccessGpaReadIntercept,
561 HvAccessGpaWriteIntercept,
562 HvAccessGpaIllegalOverlayAccess
563} HV_ACCESS_GPA_RESULT_CODE;
564
565/** The result of HvCallReadGpa and HvCallWriteGpa. */
566typedef union
567{
568 uint64_t AsUINT64;
569 struct
570 {
571 HV_ACCESS_GPA_RESULT_CODE ResultCode;
572 uint32_t Reserved;
573 };
574} HV_ACCESS_GPA_RESULT;
575
576
577/** Input for HvCallReadGpa. */
578typedef struct
579{
580 HV_PARTITION_ID PartitionId;
581 HV_VP_INDEX VpIndex;
582 uint32_t ByteCount;
583 HV_GPA BaseGpa;
584 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
585} HV_INPUT_READ_GPA;
586AssertCompileSize(HV_INPUT_READ_GPA, 32);
587/** Pointer to the input for HvCallReadGpa. */
588typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
589
590/** Output for HvCallReadGpa. */
591typedef struct
592{
593 HV_ACCESS_GPA_RESULT AccessResult;
594 uint8_t Data[16];
595} HV_OUTPUT_READ_GPA;
596AssertCompileSize(HV_OUTPUT_READ_GPA, 24);
597/** Pointer to the output for HvCallReadGpa. */
598typedef HV_OUTPUT_READ_GPA *PHV_OUTPUT_READ_GPA;
599
600
601/** Input for HvCallWriteGpa. */
602typedef struct
603{
604 HV_PARTITION_ID PartitionId;
605 HV_VP_INDEX VpIndex;
606 uint32_t ByteCount;
607 HV_GPA BaseGpa;
608 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
609 uint8_t Data[16];
610} HV_INPUT_WRITE_GPA;
611AssertCompileSize(HV_INPUT_READ_GPA, 32);
612/** Pointer to the input for HvCallWriteGpa. */
613typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
614
615/** Output for HvCallWriteGpa. */
616typedef struct
617{
618 HV_ACCESS_GPA_RESULT AccessResult;
619} HV_OUTPUT_WRITE_GPA;
620AssertCompileSize(HV_OUTPUT_WRITE_GPA, 8);
621/** Pointer to the output for HvCallWriteGpa. */
622typedef HV_OUTPUT_WRITE_GPA *PHV_OUTPUT_WRITE_GPA;
623
624
625/**
626 * Register names used by HvCallGetVpRegisters and HvCallSetVpRegisters.
627 */
628typedef enum _HV_REGISTER_NAME
629{
630 HvRegisterExplicitSuspend = 0x00000000,
631 HvRegisterInterceptSuspend,
632 HvRegisterUnknown02, /**< Reads as 0 initially on exo part. */
633 HvRegisterUnknown03, /**< Reads as 0 initially on exo part. */
634
635 HvRegisterHypervisorVersion = 0x00000100, /**< @since v5 @note Not readable on exo part. */
636
637 HvRegisterPrivilegesAndFeaturesInfo = 0x00000200, /**< @since v5 @note Not readable on exo part. */
638 HvRegisterFeaturesInfo, /**< @since v5 @note Not readable on exo part. */
639 HvRegisterImplementationLimitsInfo, /**< @since v5 @note Not readable on exo part. */
640 HvRegisterHardwareFeaturesInfo, /**< @since v5 @note Not readable on exo part. */
641
642 HvRegisterGuestCrashP0 = 0x00000210, /**< @since v5 @note Not readable on exo part. */
643 HvRegisterGuestCrashP1, /**< @since v5 @note Not readable on exo part. */
644 HvRegisterGuestCrashP2, /**< @since v5 @note Not readable on exo part. */
645 HvRegisterGuestCrashP3, /**< @since v5 @note Not readable on exo part. */
646 HvRegisterGuestCrashP4, /**< @since v5 @note Not readable on exo part. */
647 HvRegisterGuestCrashCtl, /**< @since v5 @note Not readable on exo part. */
648
649 HvRegisterPowerStateConfigC1 = 0x00000220, /**< @since v5 @note Not readable on exo part. */
650 HvRegisterPowerStateTriggerC1, /**< @since v5 @note Not readable on exo part. */
651 HvRegisterPowerStateConfigC2, /**< @since v5 @note Not readable on exo part. */
652 HvRegisterPowerStateTriggerC2, /**< @since v5 @note Not readable on exo part. */
653 HvRegisterPowerStateConfigC3, /**< @since v5 @note Not readable on exo part. */
654 HvRegisterPowerStateTriggerC3, /**< @since v5 @note Not readable on exo part. */
655
656 HvRegisterSystemReset = 0x00000230, /**< @since v5 @note Not readable on exo part. */
657
658 HvRegisterProcessorClockFrequency = 0x00000240, /**< @since v5 @note Not readable on exo part. */
659 HvRegisterInterruptClockFrequency, /**< @since v5 @note Not readable on exo part. */
660
661 HvRegisterGuestIdle = 0x00000250, /**< @since v5 @note Not readable on exo part. */
662
663 HvRegisterDebugDeviceOptions = 0x00000260, /**< @since v5 @note Not readable on exo part. */
664
665 HvRegisterPendingInterruption = 0x00010002,
666 HvRegisterInterruptState,
667 HvRegisterPendingEvent0, /**< @since v5 */
668 HvRegisterPendingEvent1, /**< @since v5 */
669 HvX64RegisterDeliverabilityNotifications, /**< @since v5c? Late 2017? */
670
671 HvX64RegisterRax = 0x00020000,
672 HvX64RegisterRcx,
673 HvX64RegisterRdx,
674 HvX64RegisterRbx,
675 HvX64RegisterRsp,
676 HvX64RegisterRbp,
677 HvX64RegisterRsi,
678 HvX64RegisterRdi,
679 HvX64RegisterR8,
680 HvX64RegisterR9,
681 HvX64RegisterR10,
682 HvX64RegisterR11,
683 HvX64RegisterR12,
684 HvX64RegisterR13,
685 HvX64RegisterR14,
686 HvX64RegisterR15,
687 HvX64RegisterRip,
688 HvX64RegisterRflags,
689
690 HvX64RegisterXmm0 = 0x00030000,
691 HvX64RegisterXmm1,
692 HvX64RegisterXmm2,
693 HvX64RegisterXmm3,
694 HvX64RegisterXmm4,
695 HvX64RegisterXmm5,
696 HvX64RegisterXmm6,
697 HvX64RegisterXmm7,
698 HvX64RegisterXmm8,
699 HvX64RegisterXmm9,
700 HvX64RegisterXmm10,
701 HvX64RegisterXmm11,
702 HvX64RegisterXmm12,
703 HvX64RegisterXmm13,
704 HvX64RegisterXmm14,
705 HvX64RegisterXmm15,
706 HvX64RegisterFpMmx0,
707 HvX64RegisterFpMmx1,
708 HvX64RegisterFpMmx2,
709 HvX64RegisterFpMmx3,
710 HvX64RegisterFpMmx4,
711 HvX64RegisterFpMmx5,
712 HvX64RegisterFpMmx6,
713 HvX64RegisterFpMmx7,
714 HvX64RegisterFpControlStatus,
715 HvX64RegisterXmmControlStatus,
716
717 HvX64RegisterCr0 = 0x00040000,
718 HvX64RegisterCr2,
719 HvX64RegisterCr3,
720 HvX64RegisterCr4,
721 HvX64RegisterCr8,
722 HvX64RegisterXfem,
723
724 HvX64RegisterIntermediateCr0 = 0x00041000, /**< @since v5 */
725 HvX64RegisterIntermediateCr4 = 0x00041003, /**< @since v5 */
726 HvX64RegisterIntermediateCr8, /**< @since v5 */
727
728 HvX64RegisterDr0 = 0x00050000,
729 HvX64RegisterDr1,
730 HvX64RegisterDr2,
731 HvX64RegisterDr3,
732 HvX64RegisterDr6,
733 HvX64RegisterDr7,
734
735 HvX64RegisterEs = 0x00060000,
736 HvX64RegisterCs,
737 HvX64RegisterSs,
738 HvX64RegisterDs,
739 HvX64RegisterFs,
740 HvX64RegisterGs,
741 HvX64RegisterLdtr,
742 HvX64RegisterTr,
743
744 HvX64RegisterIdtr = 0x00070000,
745 HvX64RegisterGdtr,
746
747 HvX64RegisterTsc = 0x00080000,
748 HvX64RegisterEfer,
749 HvX64RegisterKernelGsBase,
750 HvX64RegisterApicBase,
751 HvX64RegisterPat,
752 HvX64RegisterSysenterCs,
753 HvX64RegisterSysenterEip,
754 HvX64RegisterSysenterEsp,
755 HvX64RegisterStar,
756 HvX64RegisterLstar,
757 HvX64RegisterCstar,
758 HvX64RegisterSfmask,
759 HvX64RegisterInitialApicId,
760
761 HvX64RegisterMtrrCap, /**< Not readable in exo partitions? */
762 HvX64RegisterMtrrDefType,
763
764 HvX64RegisterMtrrPhysBase0 = 0x00080010,
765 HvX64RegisterMtrrPhysBase1,
766 HvX64RegisterMtrrPhysBase2,
767 HvX64RegisterMtrrPhysBase3,
768 HvX64RegisterMtrrPhysBase4,
769 HvX64RegisterMtrrPhysBase5,
770 HvX64RegisterMtrrPhysBase6,
771 HvX64RegisterMtrrPhysBase7,
772 HvX64RegisterMtrrPhysBase8, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
773 HvX64RegisterMtrrPhysBase9, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
774 HvX64RegisterMtrrPhysBaseA, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
775 HvX64RegisterMtrrPhysBaseB, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
776 HvX64RegisterMtrrPhysBaseC, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
777 HvX64RegisterMtrrPhysBaseD, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
778 HvX64RegisterMtrrPhysBaseE, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
779 HvX64RegisterMtrrPhysBaseF, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
780
781 HvX64RegisterMtrrPhysMask0 = 0x00080040,
782 HvX64RegisterMtrrPhysMask1,
783 HvX64RegisterMtrrPhysMask2,
784 HvX64RegisterMtrrPhysMask3,
785 HvX64RegisterMtrrPhysMask4,
786 HvX64RegisterMtrrPhysMask5,
787 HvX64RegisterMtrrPhysMask6,
788 HvX64RegisterMtrrPhysMask7,
789 HvX64RegisterMtrrPhysMask8, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
790 HvX64RegisterMtrrPhysMask9, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
791 HvX64RegisterMtrrPhysMaskA, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
792 HvX64RegisterMtrrPhysMaskB, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
793 HvX64RegisterMtrrPhysMaskC, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
794 HvX64RegisterMtrrPhysMaskD, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
795 HvX64RegisterMtrrPhysMaskE, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
796 HvX64RegisterMtrrPhysMaskF, /**< @since v4 @note Appears not to be readable on exo partition (Threadripper). */
797
798 HvX64RegisterMtrrFix64k00000 = 0x00080070,
799 HvX64RegisterMtrrFix16k80000,
800 HvX64RegisterMtrrFix16kA0000,
801 HvX64RegisterMtrrFix4kC0000,
802 HvX64RegisterMtrrFix4kC8000,
803 HvX64RegisterMtrrFix4kD0000,
804 HvX64RegisterMtrrFix4kD8000,
805 HvX64RegisterMtrrFix4kE0000,
806 HvX64RegisterMtrrFix4kE8000,
807 HvX64RegisterMtrrFix4kF0000,
808 HvX64RegisterMtrrFix4kF8000,
809 HvX64RegisterTscAux, /**< @since v5c? late 2017? */
810
811 HvX64RegisterUnknown8007d = 0x0008007d, /**< Readable on exo partition (17134), initial value is zero. */
812
813 HvX64RegisterIa32MiscEnable = 0x000800a0, /**< @since v5 @note Appears not to be readable on exo partition (Threadripper). */
814 HvX64RegisterIa32FeatureControl, /**< @since v5 @note Appears not to be readable on exo partition (Threadripper). */
815
816 /** Uptime counter or some such thing. Unit is different than HvRegisterTimeRefCount or the accounting is different. */
817 HvX64RegisterVpRuntime = 0x00090000,
818 HvX64RegisterHypercall,
819 HvRegisterGuestOsId,
820 HvRegisterVpIndex,
821 HvRegisterTimeRefCount, /**< Time counter since partition creation, 100ns units. */
822
823 HvRegisterCpuManagementVersion = 0x00090007, /**< @since v5 @note Appears not to be readable on exo partition. */
824
825 HvX64RegisterEoi = 0x00090010, /**< @note Appears not to be readable on exo partition. */
826 HvX64RegisterIcr, /**< @note Appears not to be readable on exo partition. */
827 HvX64RegisterTpr, /**< @note Appears not to be readable on exo partition. */
828 HvRegisterVpAssistPage,
829 /** Readable on exo partition (17134). Some kind of counter. */
830 HvRegisterUnknown90014,
831
832 HvRegisterStatsPartitionRetail = 0x00090020,
833 HvRegisterStatsPartitionInternal,
834 HvRegisterStatsVpRetail,
835 HvRegisterStatsVpInternal,
836
837 HvRegisterSint0 = 0x000a0000,
838 HvRegisterSint1,
839 HvRegisterSint2,
840 HvRegisterSint3,
841 HvRegisterSint4,
842 HvRegisterSint5,
843 HvRegisterSint6,
844 HvRegisterSint7,
845 HvRegisterSint8,
846 HvRegisterSint9,
847 HvRegisterSint10,
848 HvRegisterSint11,
849 HvRegisterSint12,
850 HvRegisterSint13,
851 HvRegisterSint14,
852 HvRegisterSint15,
853 HvRegisterScontrol,
854 HvRegisterSversion,
855 HvRegisterSifp,
856 HvRegisterSipp,
857 HvRegisterEom,
858 HvRegisterSirbp, /**< @since v4 */
859
860 HvRegisterStimer0Config = 0x000b0000,
861 HvRegisterStimer0Count,
862 HvRegisterStimer1Config,
863 HvRegisterStimer1Count,
864 HvRegisterStimer2Config,
865 HvRegisterStimer2Count,
866 HvRegisterStimer3Config,
867 HvRegisterStimer3Count,
868
869 HvRegisterUnknown0b0100 = 0x000b0100, /**< Readable on exo partition (17134), initial value is zero. */
870 HvRegisterUnknown0b0101, /**< Readable on exo partition (17134), initial value is zero. */
871
872 HvX64RegisterYmm0Low = 0x000c0000, /**< @note Not readable on exo partition. Need something enabled? */
873 HvX64RegisterYmm1Low,
874 HvX64RegisterYmm2Low,
875 HvX64RegisterYmm3Low,
876 HvX64RegisterYmm4Low,
877 HvX64RegisterYmm5Low,
878 HvX64RegisterYmm6Low,
879 HvX64RegisterYmm7Low,
880 HvX64RegisterYmm8Low,
881 HvX64RegisterYmm9Low,
882 HvX64RegisterYmm10Low,
883 HvX64RegisterYmm11Low,
884 HvX64RegisterYmm12Low,
885 HvX64RegisterYmm13Low,
886 HvX64RegisterYmm14Low,
887 HvX64RegisterYmm15Low,
888 HvX64RegisterYmm0High,
889 HvX64RegisterYmm1High,
890 HvX64RegisterYmm2High,
891 HvX64RegisterYmm3High,
892 HvX64RegisterYmm4High,
893 HvX64RegisterYmm5High,
894 HvX64RegisterYmm6High,
895 HvX64RegisterYmm7High,
896 HvX64RegisterYmm8High,
897 HvX64RegisterYmm9High,
898 HvX64RegisterYmm10High,
899 HvX64RegisterYmm11High,
900 HvX64RegisterYmm12High,
901 HvX64RegisterYmm13High,
902 HvX64RegisterYmm14High,
903 HvX64RegisterYmm15High,
904
905 HvRegisterVsmVpVtlControl = 0x000d0000, /**< @note Not readable on exo partition. */
906
907 HvRegisterVsmCodePageOffsets = 0x000d0002,
908 HvRegisterVsmVpStatus,
909 HvRegisterVsmPartitionStatus,
910 HvRegisterVsmVina, /**< @note Not readable on exo partition. */
911 HvRegisterVsmCapabilities,
912 HvRegisterVsmPartitionConfig, /**< @note Not readable on exo partition. */
913
914 HvRegisterVsmVpSecureConfigVtl0 = 0x000d0010, /**< @since v5 */
915 HvRegisterVsmVpSecureConfigVtl1, /**< @since v5 */
916 HvRegisterVsmVpSecureConfigVtl2, /**< @since v5 */
917 HvRegisterVsmVpSecureConfigVtl3, /**< @since v5 */
918 HvRegisterVsmVpSecureConfigVtl4, /**< @since v5 */
919 HvRegisterVsmVpSecureConfigVtl5, /**< @since v5 */
920 HvRegisterVsmVpSecureConfigVtl6, /**< @since v5 */
921 HvRegisterVsmVpSecureConfigVtl7, /**< @since v5 */
922 HvRegisterVsmVpSecureConfigVtl8, /**< @since v5 */
923 HvRegisterVsmVpSecureConfigVtl9, /**< @since v5 */
924 HvRegisterVsmVpSecureConfigVtl10, /**< @since v5 */
925 HvRegisterVsmVpSecureConfigVtl11, /**< @since v5 */
926 HvRegisterVsmVpSecureConfigVtl12, /**< @since v5 */
927 HvRegisterVsmVpSecureConfigVtl13, /**< @since v5 */
928 HvRegisterVsmVpSecureConfigVtl14, /**< @since v5 */
929
930 HvRegisterUnknown0e0000 = 0x000e0000, /**< Readable on exo partition (17134), initial value zero. */
931 HvRegisterUnknown0e0001, /**< Readable on exo partition (17134), initial value zero. */
932 HvRegisterUnknown0e0002, /**< Readable on exo partition (17134), initial value zero. */
933 HvRegisterUnknown0e0003 /**< Readable on exo partition (17134), initial value zero. */
934} HV_REGISTER_NAME;
935AssertCompile(HvRegisterInterceptSuspend == 0x00000001);
936AssertCompile(HvRegisterPendingEvent1 == 0x00010005);
937AssertCompile(HvX64RegisterDeliverabilityNotifications == 0x00010006);
938AssertCompile(HvX64RegisterRflags == 0x00020011);
939AssertCompile(HvX64RegisterXmmControlStatus == 0x00030019);
940AssertCompile(HvX64RegisterXfem == 0x00040005);
941AssertCompile(HvX64RegisterIntermediateCr0 == 0x00041000);
942AssertCompile(HvX64RegisterIntermediateCr4 == 0x00041003);
943AssertCompile(HvX64RegisterDr7 == 0x00050005);
944AssertCompile(HvX64RegisterTr == 0x00060007);
945AssertCompile(HvX64RegisterGdtr == 0x00070001);
946AssertCompile(HvX64RegisterInitialApicId == 0x0008000c);
947AssertCompile(HvX64RegisterMtrrCap == 0x0008000d);
948AssertCompile(HvX64RegisterMtrrDefType == 0x0008000e);
949AssertCompile(HvX64RegisterMtrrPhysBaseF == 0x0008001f);
950AssertCompile(HvX64RegisterMtrrPhysMaskF == 0x0008004f);
951AssertCompile(HvX64RegisterMtrrFix4kF8000 == 0x0008007a);
952AssertCompile(HvRegisterTimeRefCount == 0x00090004);
953AssertCompile(HvRegisterCpuManagementVersion == 0x00090007);
954AssertCompile(HvRegisterVpAssistPage == 0x00090013);
955AssertCompile(HvRegisterStatsVpInternal == 0x00090023);
956AssertCompile(HvRegisterSirbp == 0x000a0015);
957AssertCompile(HvRegisterStimer3Count == 0x000b0007);
958AssertCompile(HvX64RegisterYmm15High == 0x000c001f);
959AssertCompile(HvRegisterVsmVpSecureConfigVtl14 == 0x000d001e);
960AssertCompileSize(HV_REGISTER_NAME, 4);
961
962
963/** Value format for HvRegisterExplicitSuspend. */
964typedef union
965{
966 uint64_t AsUINT64;
967 struct
968 {
969 uint64_t Suspended : 1;
970 uint64_t Reserved : 63;
971 };
972} HV_EXPLICIT_SUSPEND_REGISTER;
973/** Pointer to a value of HvRegisterExplicitSuspend. */
974typedef HV_EXPLICIT_SUSPEND_REGISTER *PHV_EXPLICIT_SUSPEND_REGISTER;
975
976/** Value format for HvRegisterInterceptSuspend. */
977typedef union
978{
979 uint64_t AsUINT64;
980 struct
981 {
982 uint64_t Suspended : 1;
983 uint64_t TlbLocked : 1;
984 uint64_t Reserved : 62;
985 };
986} HV_INTERCEPT_SUSPEND_REGISTER;
987/** Pointer to a value of HvRegisterInterceptSuspend. */
988typedef HV_INTERCEPT_SUSPEND_REGISTER *PHV_INTERCEPT_SUSPEND_REGISTER;
989
990/** Value format for HvRegisterInterruptState.
991 * @sa WHV_X64_INTERRUPT_STATE_REGISTER */
992typedef union
993{
994 uint64_t AsUINT64;
995 struct
996 {
997 uint64_t InterruptShadow : 1;
998 uint64_t NmiMasked : 1;
999 uint64_t Reserved : 62;
1000 };
1001} HV_X64_INTERRUPT_STATE_REGISTER;
1002/** Pointer to a value of HvRegisterInterruptState. */
1003typedef HV_X64_INTERRUPT_STATE_REGISTER *PHV_X64_INTERRUPT_STATE_REGISTER;
1004
1005/** Pending exception type for HvRegisterPendingInterruption.
1006 * @sa WHV_X64_PENDING_INTERRUPTION_TYPE */
1007typedef enum
1008{
1009 HvX64PendingInterrupt = 0,
1010 /* what is/was 1? */
1011 HvX64PendingNmi = 2,
1012 HvX64PendingException
1013 /* any more? */
1014} HV_X64_PENDING_INTERRUPTION_TYPE;
1015
1016/** Value format for HvRegisterPendingInterruption.
1017 * @sa WHV_X64_PENDING_INTERRUPTION_REGISTER */
1018typedef union
1019{
1020 uint64_t AsUINT64;
1021 struct
1022 {
1023 uint32_t InterruptionPending : 1;
1024 uint32_t InterruptionType : 3; /**< HV_X64_PENDING_INTERRUPTION_TYPE */
1025 uint32_t DeliverErrorCode : 1;
1026 uint32_t InstructionLength : 4; /**< @since v5? Wasn't in 7600 WDK */
1027 uint32_t NestedEvent : 1; /**< @since v5? Wasn't in 7600 WDK */
1028 uint32_t Reserved : 6;
1029 uint32_t InterruptionVector : 16;
1030 uint32_t ErrorCode;
1031 };
1032} HV_X64_PENDING_INTERRUPTION_REGISTER;
1033/** Pointer to a value of HvRegisterPendingInterruption. */
1034typedef HV_X64_PENDING_INTERRUPTION_REGISTER *PHV_X64_PENDING_INTERRUPTION_REGISTER;
1035
1036/** Value format for HvX64RegisterDeliverabilityNotifications.
1037 * Value format for HvRegisterPendingEvent0/1.
1038 * @sa WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER */
1039typedef union
1040{
1041 uint64_t AsUINT64;
1042 struct
1043 {
1044 uint64_t NmiNotification : 1;
1045 uint64_t InterruptNotification : 1;
1046 uint64_t InterruptPriority : 4;
1047 uint64_t Reserved : 58;
1048 };
1049} HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
1050/** Pointer to a value of HvRegisterPendingEvent0/1. */
1051typedef HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER *PHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
1052
1053
1054/** Value format for HvX64RegisterEs..Tr.
1055 * @sa WHV_X64_SEGMENT_REGISTER */
1056typedef struct _HV_X64_SEGMENT_REGISTER
1057{
1058 uint64_t Base;
1059 uint32_t Limit;
1060 uint16_t Selector;
1061 union
1062 {
1063 struct
1064 {
1065 uint16_t SegmentType : 4;
1066 uint16_t NonSystemSegment : 1;
1067 uint16_t DescriptorPrivilegeLevel : 2;
1068 uint16_t Present : 1;
1069 uint16_t Reserved : 4;
1070 uint16_t Available : 1;
1071 uint16_t Long : 1;
1072 uint16_t Default : 1;
1073 uint16_t Granularity : 1;
1074 };
1075 uint16_t Attributes;
1076 };
1077} HV_X64_SEGMENT_REGISTER;
1078AssertCompileSize(HV_X64_SEGMENT_REGISTER, 16);
1079/** Pointer to a value of HvX64RegisterEs..Tr. */
1080typedef HV_X64_SEGMENT_REGISTER *PHV_X64_SEGMENT_REGISTER;
1081
1082/** Value format for HvX64RegisterIdtr/Gdtr.
1083 * @sa WHV_X64_TABLE_REGISTER */
1084typedef struct
1085{
1086 uint16_t Pad[3];
1087 uint16_t Limit;
1088 uint64_t Base;
1089} HV_X64_TABLE_REGISTER;
1090AssertCompileSize(HV_X64_TABLE_REGISTER, 16);
1091/** Pointer to a value of HvX64RegisterIdtr/Gdtrr. */
1092typedef HV_X64_TABLE_REGISTER *PHV_X64_TABLE_REGISTER;
1093
1094/** Value format for HvX64RegisterFpMmx0..7 in floating pointer mode.
1095 * @sa WHV_X64_FP_REGISTER, RTFLOAT80U2 */
1096typedef union
1097{
1098 HV_UINT128 AsUINT128;
1099 struct
1100 {
1101 uint64_t Mantissa;
1102 uint64_t BiasedExponent : 15;
1103 uint64_t Sign : 1;
1104 uint64_t Reserved : 48;
1105 };
1106} HV_X64_FP_REGISTER;
1107/** Pointer to a value of HvX64RegisterFpMmx0..7 in floating point mode. */
1108typedef HV_X64_FP_REGISTER *PHV_X64_FP_REGISTER;
1109
1110/** Value union for HvX64RegisterFpMmx0..7. */
1111typedef union
1112{
1113 HV_UINT128 AsUINT128;
1114 HV_X64_FP_REGISTER Fp;
1115 uint64_t Mmx;
1116} HV_X64_FP_MMX_REGISTER;
1117/** Pointer to a value of HvX64RegisterFpMmx0..7. */
1118typedef HV_X64_FP_MMX_REGISTER *PHV_X64_FP_MMX_REGISTER;
1119
1120/** Value format for HvX64RegisterFpControlStatus.
1121 * @sa WHV_X64_FP_CONTROL_STATUS_REGISTER */
1122typedef union
1123{
1124 HV_UINT128 AsUINT128;
1125 struct
1126 {
1127 uint16_t FpControl;
1128 uint16_t FpStatus;
1129 uint8_t FpTag;
1130 uint8_t IgnNe : 1;
1131 uint8_t Reserved : 7;
1132 uint16_t LastFpOp;
1133 union
1134 {
1135 uint64_t LastFpRip;
1136 struct
1137 {
1138 uint32_t LastFpEip;
1139 uint16_t LastFpCs;
1140 };
1141 };
1142 };
1143} HV_X64_FP_CONTROL_STATUS_REGISTER;
1144/** Pointer to a value of HvX64RegisterFpControlStatus. */
1145typedef HV_X64_FP_CONTROL_STATUS_REGISTER *PHV_X64_FP_CONTROL_STATUS_REGISTER;
1146
1147/** Value format for HvX64RegisterXmmControlStatus.
1148 * @sa WHV_X64_XMM_CONTROL_STATUS_REGISTER */
1149typedef union
1150{
1151 HV_UINT128 AsUINT128;
1152 struct
1153 {
1154 union
1155 {
1156 uint64_t LastFpRdp;
1157 struct
1158 {
1159 uint32_t LastFpDp;
1160 uint16_t LastFpDs;
1161 };
1162 };
1163 uint32_t XmmStatusControl;
1164 uint32_t XmmStatusControlMask;
1165 };
1166} HV_X64_XMM_CONTROL_STATUS_REGISTER;
1167/** Pointer to a value of HvX64RegisterXmmControlStatus. */
1168typedef HV_X64_XMM_CONTROL_STATUS_REGISTER *PHV_X64_XMM_CONTROL_STATUS_REGISTER;
1169
1170/** Register value union.
1171 * @sa WHV_REGISTER_VALUE */
1172typedef union
1173{
1174 HV_UINT128 Reg128;
1175 uint64_t Reg64;
1176 uint32_t Reg32;
1177 uint16_t Reg16;
1178 uint8_t Reg8;
1179 HV_EXPLICIT_SUSPEND_REGISTER ExplicitSuspend;
1180 HV_INTERCEPT_SUSPEND_REGISTER InterceptSuspend;
1181 HV_X64_INTERRUPT_STATE_REGISTER InterruptState;
1182 HV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption;
1183 HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications;
1184 HV_X64_TABLE_REGISTER Table;
1185 HV_X64_SEGMENT_REGISTER Segment;
1186 HV_X64_FP_REGISTER Fp;
1187 HV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus;
1188 HV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus;
1189} HV_REGISTER_VALUE;
1190AssertCompileSize(HV_REGISTER_VALUE, 16);
1191/** Pointer to a Hyper-V register value union. */
1192typedef HV_REGISTER_VALUE *PHV_REGISTER_VALUE;
1193/** Pointer to a const Hyper-V register value union. */
1194typedef HV_REGISTER_VALUE const *PCHV_REGISTER_VALUE;
1195
1196
1197/** Input for HvCallGetVpRegisters. */
1198typedef struct
1199{
1200 HV_PARTITION_ID PartitionId;
1201 HV_VP_INDEX VpIndex;
1202 /** Was this introduced after v2? Dunno what it it really is. */
1203 uint32_t fFlags;
1204 /* The repeating part: */
1205 HV_REGISTER_NAME Names[RT_FLEXIBLE_ARRAY];
1206} HV_INPUT_GET_VP_REGISTERS;
1207AssertCompileMemberOffset(HV_INPUT_GET_VP_REGISTERS, Names, 16);
1208/** Pointer to input for HvCallGetVpRegisters. */
1209typedef HV_INPUT_GET_VP_REGISTERS *PHV_INPUT_GET_VP_REGISTERS;
1210/* Output for HvCallGetVpRegisters is an array of HV_REGISTER_VALUE parallel to HV_INPUT_GET_VP_REGISTERS::Names. */
1211
1212
1213/** Register and value pair for HvCallSetVpRegisters. */
1214typedef struct
1215{
1216 HV_REGISTER_NAME Name;
1217 uint32_t Pad0;
1218 uint64_t Pad1;
1219 HV_REGISTER_VALUE Value;
1220} HV_REGISTER_ASSOC;
1221AssertCompileSize(HV_REGISTER_ASSOC, 32);
1222AssertCompileMemberOffset(HV_REGISTER_ASSOC, Value, 16);
1223/** Pointer to a register and value pair for HvCallSetVpRegisters. */
1224typedef HV_REGISTER_ASSOC *PHV_REGISTER_ASSOC;
1225/** Helper for clearing the alignment padding members. */
1226#define HV_REGISTER_ASSOC_ZERO_PADDING(a_pRegAssoc) do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; } while (0)
1227/** Helper for clearing the alignment padding members and the high 64-bit
1228 * part of the value. */
1229#define HV_REGISTER_ASSOC_ZERO_PADDING_AND_HI64(a_pRegAssoc) \
1230 do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; (a_pRegAssoc)->Value.Reg128.High64 = 0; } while (0)
1231
1232/** Input for HvCallSetVpRegisters. */
1233typedef struct
1234{
1235 HV_PARTITION_ID PartitionId;
1236 HV_VP_INDEX VpIndex;
1237 uint32_t RsvdZ;
1238 /* The repeating part: */
1239 HV_REGISTER_ASSOC Elements[RT_FLEXIBLE_ARRAY];
1240} HV_INPUT_SET_VP_REGISTERS;
1241AssertCompileMemberOffset(HV_INPUT_SET_VP_REGISTERS, Elements, 16);
1242/** Pointer to input for HvCallSetVpRegisters. */
1243typedef HV_INPUT_SET_VP_REGISTERS *PHV_INPUT_SET_VP_REGISTERS;
1244
1245
1246
1247/**
1248 * Hyper-V SyncIC message types.
1249 */
1250typedef enum
1251{
1252 HvMessageTypeNone = 0x00000000,
1253
1254 HvMessageTypeUnmappedGpa = 0x80000000,
1255 HvMessageTypeGpaIntercept,
1256
1257 HvMessageTimerExpired = 0x80000010,
1258
1259 HvMessageTypeInvalidVpRegisterValue = 0x80000020,
1260 HvMessageTypeUnrecoverableException,
1261 HvMessageTypeUnsupportedFeature,
1262 HvMessageTypeTlbPageSizeMismatch, /**< @since v5 */
1263
1264 /** @note Same as HvMessageTypeX64ApicEoi? Gone in 5.0. Missing from 7600 WDK
1265 * headers even if it's in the 2.0 docs. */
1266 HvMessageTypeApicEoi = 0x80000030,
1267 /** @note Same as HvMessageTypeX64LegacyFpError? Gone in 5.0, whereas 4.0b
1268 * calls it HvMessageTypeX64LegacyFpError. Missing from 7600 WDK
1269 * headers even if it's in the 2.0 docs. */
1270 HvMessageTypeFerrAsserted,
1271
1272 HvMessageTypeEventLogBufferComplete = 0x80000040,
1273
1274 HvMessageTypeX64IoPortIntercept = 0x80010000,
1275 HvMessageTypeX64MsrIntercept,
1276 HvMessageTypeX64CpuidIntercept,
1277 HvMessageTypeX64ExceptionIntercept,
1278 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1279 HvMessageTypeX64ApicEoi,
1280 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1281 HvMessageTypeX64LegacyFpError,
1282 /** @since v5 */
1283 HvMessageTypeX64RegisterIntercept,
1284 /** @since WinHvPlatform? */
1285 HvMessageTypeX64Halt,
1286 /** @since WinHvPlatform? */
1287 HvMessageTypeX64InterruptWindow
1288
1289} HV_MESSAGE_TYPE;
1290AssertCompileSize(HV_MESSAGE_TYPE, 4);
1291AssertCompile(HvMessageTypeX64RegisterIntercept == 0x80010006);
1292AssertCompile(HvMessageTypeX64Halt == 0x80010007);
1293AssertCompile(HvMessageTypeX64InterruptWindow == 0x80010008);
1294/** Pointer to a Hyper-V SyncIC message type. */
1295typedef HV_MESSAGE_TYPE *PHV_MESSAGE_TYPE;
1296
1297/** Flag set for hypervisor messages, guest cannot send messages with this
1298 * flag set. */
1299#define HV_MESSAGE_TYPE_HYPERVISOR_MASK UINT32_C(0x80000000)
1300
1301/** Hyper-V SynIC message size (they are fixed sized). */
1302#define HV_MESSAGE_SIZE 256
1303/** Maximum Hyper-V SynIC message payload size in bytes. */
1304#define HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT (HV_MESSAGE_SIZE - 16)
1305/** Maximum Hyper-V SynIC message payload size in QWORDs (uint64_t). */
1306#define HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT (HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT / 8)
1307
1308/** SynIC message flags. */
1309typedef union
1310{
1311 uint8_t AsUINT8;
1312 struct
1313 {
1314 /** Messages are pending in the queue. */
1315 uint8_t MessagePending : 1;
1316 uint8_t Reserved : 7;
1317 };
1318} HV_MESSAGE_FLAGS;
1319AssertCompileSize(HV_MESSAGE_FLAGS, 1);
1320
1321/** SynIC message header. */
1322typedef struct
1323{
1324 HV_MESSAGE_TYPE MessageType;
1325 /** The 2.0-5.0b docs all have this incorrectly switched with 'Reserved', WDK 7600 got it right. */
1326 uint8_t PayloadSize;
1327 HV_MESSAGE_FLAGS MessageFlags;
1328 uint16_t Reserved;
1329 union
1330 {
1331 uint64_t OriginationId;
1332 HV_PARTITION_ID Sender;
1333 HV_PORT_ID Port;
1334 };
1335} HV_MESSAGE_HEADER;
1336AssertCompileSize(HV_MESSAGE_HEADER, 16);
1337/** Pointer to a Hyper-V message header. */
1338typedef HV_MESSAGE_HEADER *PHV_MESSAGE_HEADER;
1339/** Pointer to a const Hyper-V message header. */
1340typedef HV_MESSAGE_HEADER const *PCHV_MESSAGE_HEADER;
1341
1342
1343
1344/** @name Intercept access type.
1345 * @{ */
1346typedef uint8_t HV_INTERCEPT_ACCESS_TYPE;
1347#define HV_INTERCEPT_ACCESS_READ 0
1348#define HV_INTERCEPT_ACCESS_WRITE 1
1349#define HV_INTERCEPT_ACCESS_EXECUTE 2
1350/** @} */
1351
1352/** @name Intercept access type mask.
1353 * @{ */
1354typedef uint32_t HV_INTERCEPT_ACCESS_TYPE_MASK;
1355#define HV_INTERCEPT_ACCESS_MASK_NONE 0
1356#define HV_INTERCEPT_ACCESS_MASK_READ 1
1357#define HV_INTERCEPT_ACCESS_MASK_WRITE 2
1358#define HV_INTERCEPT_ACCESS_MASK_EXECUTE 4
1359/** @} */
1360
1361/** X64 intercept execution state.
1362 * @sa WHV_X64_VP_EXECUTION_STATE */
1363typedef union
1364{
1365 uint16_t AsUINT16;
1366 struct
1367 {
1368 uint16_t Cpl : 2;
1369 uint16_t Cr0Pe : 1;
1370 uint16_t Cr0Am : 1;
1371 uint16_t EferLma : 1;
1372 uint16_t DebugActive : 1;
1373 uint16_t InterruptionPending : 1;
1374 uint16_t Reserved0 : 5;
1375 uint16_t InterruptShadow : 1;
1376 uint16_t Reserved1 : 3;
1377 };
1378} HV_X64_VP_EXECUTION_STATE;
1379AssertCompileSize(HV_X64_VP_EXECUTION_STATE, 2);
1380/** Pointer to X86 intercept execution state. */
1381typedef HV_X64_VP_EXECUTION_STATE *PHV_X64_VP_EXECUTION_STATE;
1382/** Pointer to const X86 intercept execution state. */
1383typedef HV_X64_VP_EXECUTION_STATE const *PCHV_X64_VP_EXECUTION_STATE;
1384
1385/** X64 intercept message header. */
1386typedef struct
1387{
1388 HV_VP_INDEX VpIndex; /**< 0x00 */
1389 uint8_t InstructionLength : 4; /**< 0x04[3:0]: Zero if not available, instruction fetch exit, ... */
1390 uint8_t Cr8 : 4; /**< 0x04[7:4]: Not sure since when, but after v2. */
1391 HV_INTERCEPT_ACCESS_TYPE InterceptAccessType; /**< 0x05 */
1392 HV_X64_VP_EXECUTION_STATE ExecutionState; /**< 0x06 */
1393 HV_X64_SEGMENT_REGISTER CsSegment; /**< 0x08 */
1394 uint64_t Rip; /**< 0x18 */
1395 uint64_t Rflags; /**< 0x20 */
1396} HV_X64_INTERCEPT_MESSAGE_HEADER;
1397AssertCompileSize(HV_X64_INTERCEPT_MESSAGE_HEADER, 40);
1398/** Pointer to a x86 intercept message header. */
1399typedef HV_X64_INTERCEPT_MESSAGE_HEADER *PHV_X64_INTERCEPT_MESSAGE_HEADER;
1400
1401
1402/** X64 memory access flags (HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa).
1403 * @sa WHV_MEMORY_ACCESS_INFO */
1404typedef union
1405{
1406 uint8_t AsUINT8;
1407 struct
1408 {
1409 uint8_t GvaValid : 1;
1410 uint8_t Reserved : 7;
1411 };
1412} HV_X64_MEMORY_ACCESS_INFO;
1413AssertCompileSize(HV_X64_MEMORY_ACCESS_INFO, 1);
1414
1415/** The payload format for HvMessageTypeGpaIntercept and HvMessageTypeUnmappedGpa.
1416 * @sa WHV_MEMORY_ACCESS_CONTEXT
1417 * @note max message size. */
1418typedef struct
1419{
1420 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1421 HV_CACHE_TYPE CacheType; /**< 0x28 */
1422 uint8_t InstructionByteCount; /**< 0x2c */
1423 HV_X64_MEMORY_ACCESS_INFO MemoryAccessInfo; /**< 0x2d */
1424 uint16_t Reserved1; /**< 0x2e */
1425 uint64_t GuestVirtualAddress; /**< 0x30 */
1426 uint64_t GuestPhysicalAddress; /**< 0x38 */
1427 uint8_t InstructionBytes[16]; /**< 0x40 */
1428 /* We don't the following (v5 / WinHvPlatform): */
1429 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1430 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1431 uint64_t Rax; /**< 0x70 */
1432 uint64_t Rcx; /**< 0x78 */
1433 uint64_t Rdx; /**< 0x80 */
1434 uint64_t Rbx; /**< 0x88 */
1435 uint64_t Rsp; /**< 0x90 */
1436 uint64_t Rbp; /**< 0x98 */
1437 uint64_t Rsi; /**< 0xa0 */
1438 uint64_t Rdi; /**< 0xa8 */
1439 uint64_t R8; /**< 0xb0 */
1440 uint64_t R9; /**< 0xb8 */
1441 uint64_t R10; /**< 0xc0 */
1442 uint64_t R11; /**< 0xc8 */
1443 uint64_t R12; /**< 0xd0 */
1444 uint64_t R13; /**< 0xd8 */
1445 uint64_t R14; /**< 0xe0 */
1446 uint64_t R15; /**< 0xe8 */
1447} HV_X64_MEMORY_INTERCEPT_MESSAGE;
1448AssertCompileSize(HV_X64_MEMORY_INTERCEPT_MESSAGE, 0xf0);
1449AssertCompileMemberOffset(HV_X64_MEMORY_INTERCEPT_MESSAGE, DsSegment, 0x50);
1450/** Pointer to a HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1451typedef HV_X64_MEMORY_INTERCEPT_MESSAGE *PHV_X64_MEMORY_INTERCEPT_MESSAGE;
1452/** Pointer to a const HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1453typedef HV_X64_MEMORY_INTERCEPT_MESSAGE const *PCHV_X64_MEMORY_INTERCEPT_MESSAGE;
1454
1455
1456/** The payload format for HvMessageTypeX64MsrIntercept. */
1457typedef struct _HV_X64_MSR_INTERCEPT_MESSAGE
1458{
1459 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1460 uint32_t MsrNumber; /**< 0x28 (ecx) */
1461 uint32_t Reserved; /**< 0x2c */
1462 uint64_t Rdx; /**< 0x30 */
1463 uint64_t Rax; /**< 0x38 */
1464} HV_X64_MSR_INTERCEPT_MESSAGE;
1465AssertCompileSize(HV_X64_MSR_INTERCEPT_MESSAGE, 0x40);
1466/** Pointer to a HvMessageTypeX64MsrIntercept payload. */
1467typedef HV_X64_MSR_INTERCEPT_MESSAGE *PHV_X64_MSR_INTERCEPT_MESSAGE;
1468/** Pointer to a const HvMessageTypeX64MsrIntercept payload. */
1469typedef HV_X64_MSR_INTERCEPT_MESSAGE const *PCHV_X64_MSR_INTERCEPT_MESSAGE;
1470
1471/** Full MSR message. */
1472typedef struct
1473{
1474 HV_MESSAGE_HEADER MsgHdr;
1475 HV_X64_MSR_INTERCEPT_MESSAGE Payload;
1476} HV_X64_MSR_INTERCEPT_MESSAGE_FULL;
1477
1478
1479/** X64 I/O port access information (HvMessageTypeX64IoPortIntercept). */
1480typedef union HV_X64_IO_PORT_ACCESS_INFO
1481{
1482 uint8_t AsUINT8;
1483 struct
1484 {
1485 uint8_t AccessSize : 3;
1486 uint8_t StringOp : 1;
1487 uint8_t RepPrefix : 1;
1488 uint8_t Reserved : 3;
1489 };
1490} HV_X64_IO_PORT_ACCESS_INFO;
1491AssertCompileSize(HV_X64_IO_PORT_ACCESS_INFO, 1);
1492
1493/** The payload format for HvMessageTypeX64IoPortIntercept. */
1494typedef struct _HV_X64_IO_PORT_INTERCEPT_MESSAGE
1495{
1496 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1497 uint16_t PortNumber; /**< 0x28 */
1498 HV_X64_IO_PORT_ACCESS_INFO AccessInfo; /**< 0x2a */
1499 uint8_t InstructionByteCount; /**< 0x2b */
1500 uint32_t Reserved; /**< 0x2c */
1501 uint64_t Rax; /**< 0x30 */
1502 uint8_t InstructionBytes[16]; /**< 0x38 */
1503 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x48 */
1504 HV_X64_SEGMENT_REGISTER EsSegment; /**< 0x58 */
1505 uint64_t Rcx; /**< 0x68 */
1506 uint64_t Rsi; /**< 0x70 */
1507 uint64_t Rdi; /**< 0x78 */
1508} HV_X64_IO_PORT_INTERCEPT_MESSAGE;
1509AssertCompileSize(HV_X64_IO_PORT_INTERCEPT_MESSAGE, 128);
1510/** Pointer to a HvMessageTypeX64IoPortIntercept payload. */
1511typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE *PHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1512/** Pointer to a const HvMessageTypeX64IoPortIntercept payload. */
1513typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE const *PCHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1514
1515/** Full I/O port message. */
1516typedef struct
1517{
1518 HV_MESSAGE_HEADER MsgHdr;
1519 HV_X64_IO_PORT_INTERCEPT_MESSAGE Payload;
1520} HV_X64_IO_PORT_INTERCEPT_MESSAGE_FULL;
1521
1522
1523/**
1524 * The payload format for HvMessageTypeX64CpuidIntercept,
1525 *
1526 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1527 */
1528typedef struct
1529{
1530 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00: The usual intercept header. */
1531 uint64_t Rax; /**< 0x28: Input RAX. */
1532 uint64_t Rcx; /**< 0x30: Input RCX. */
1533 uint64_t Rdx; /**< 0x38: Input RDX. */
1534 uint64_t Rbx; /**< 0x40: Input RBX. */
1535 uint64_t DefaultResultRax; /**< 0x48: Default result RAX. */
1536 uint64_t DefaultResultRcx; /**< 0x50: Default result RCX. */
1537 uint64_t DefaultResultRdx; /**< 0x58: Default result RDX. */
1538 uint64_t DefaultResultRbx; /**< 0x60: Default result RBX. */
1539} HV_X64_CPUID_INTERCEPT_MESSAGE;
1540AssertCompileSize(HV_X64_CPUID_INTERCEPT_MESSAGE, 0x68);
1541/** Pointer to a HvMessageTypeX64CpuidIntercept payload. */
1542typedef HV_X64_CPUID_INTERCEPT_MESSAGE *PHV_X64_CPUID_INTERCEPT_MESSAGE;
1543/** Pointer to a const HvMessageTypeX64CpuidIntercept payload. */
1544typedef HV_X64_CPUID_INTERCEPT_MESSAGE const *PCHV_X64_CPUID_INTERCEPT_MESSAGE;
1545
1546/** Full HvMessageTypeX64CpuidIntercept message. */
1547typedef struct
1548{
1549 HV_MESSAGE_HEADER MsgHdr;
1550 HV_X64_CPUID_INTERCEPT_MESSAGE Payload;
1551} HV_X64_CPUID_INTERCEPT_MESSAGE_FULL;
1552
1553
1554/** X64 exception information (HvMessageTypeX64ExceptionIntercept).
1555 * @sa WHV_VP_EXCEPTION_INFO */
1556typedef union
1557{
1558 uint8_t AsUINT8;
1559 struct
1560 {
1561 uint8_t ErrorCodeValid : 1;
1562 /** @todo WHV_VP_EXCEPTION_INFO::SoftwareException */
1563 uint8_t Reserved : 7;
1564 };
1565} HV_X64_EXCEPTION_INFO;
1566AssertCompileSize(HV_X64_EXCEPTION_INFO, 1);
1567
1568/** The payload format for HvMessageTypeX64ExceptionIntercept.
1569 * @sa WHV_VP_EXCEPTION_CONTEXT
1570 * @note max message size. */
1571typedef struct
1572{
1573 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1574 uint16_t ExceptionVector; /**< 0x28 */
1575 HV_X64_EXCEPTION_INFO ExceptionInfo; /**< 0x2a */
1576 uint8_t InstructionByteCount; /**< 0x2b */
1577 uint32_t ErrorCode; /**< 0x2c */
1578 uint64_t ExceptionParameter; /**< 0x30 */
1579 uint64_t Reserved; /**< 0x38 */
1580 uint8_t InstructionBytes[16]; /**< 0x40 */
1581 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1582 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1583 uint64_t Rax; /**< 0x70 */
1584 uint64_t Rcx; /**< 0x78 */
1585 uint64_t Rdx; /**< 0x80 */
1586 uint64_t Rbx; /**< 0x88 */
1587 uint64_t Rsp; /**< 0x90 */
1588 uint64_t Rbp; /**< 0x98 */
1589 uint64_t Rsi; /**< 0xa0 */
1590 uint64_t Rdi; /**< 0xa8 */
1591 uint64_t R8; /**< 0xb0 */
1592 uint64_t R9; /**< 0xb8 */
1593 uint64_t R10; /**< 0xc0 */
1594 uint64_t R11; /**< 0xc8 */
1595 uint64_t R12; /**< 0xd0 */
1596 uint64_t R13; /**< 0xd8 */
1597 uint64_t R14; /**< 0xe0 */
1598 uint64_t R15; /**< 0xe8 */
1599} HV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1600AssertCompileSize(HV_X64_EXCEPTION_INTERCEPT_MESSAGE, 0xf0);
1601/** Pointer to a HvMessageTypeX64ExceptionIntercept payload. */
1602typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE *PHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1603/** Pointer to a ocnst HvMessageTypeX64ExceptionIntercept payload. */
1604typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *PCHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1605
1606
1607/**
1608 * The payload format for HvMessageTypeX64Halt,
1609 *
1610 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1611 */
1612typedef struct
1613{
1614 /** Seems to be a zero 64-bit field here. */
1615 uint64_t u64Reserved;
1616} HV_X64_HALT_MESSAGE;
1617/** Pointer to a HvMessageTypeX64Halt payload. */
1618typedef HV_X64_HALT_MESSAGE *PHV_X64_HALT_MESSAGE;
1619/** Pointer to a const HvMessageTypeX64Halt payload. */
1620typedef HV_X64_HALT_MESSAGE const *PCHV_X64_HALT_MESSAGE;
1621
1622/** Full HvMessageTypeX64Halt message. */
1623typedef struct
1624{
1625 HV_MESSAGE_HEADER MsgHdr;
1626 HV_X64_HALT_MESSAGE Payload;
1627} HV_X64_HALT_MESSAGE_FULL;
1628
1629
1630/**
1631 * The payload format for HvMessageTypeX64InterruptWindow,
1632 *
1633 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1634 */
1635typedef struct
1636{
1637 /** 0x00: The usual intercept header. */
1638 HV_X64_INTERCEPT_MESSAGE_HEADER Header;
1639 /** 0x28: What's pending. */
1640 HV_X64_PENDING_INTERRUPTION_TYPE Type;
1641 /** 0x2c: Explicit structure alignment padding. */
1642 uint32_t u32ExplicitPadding;
1643} HV_X64_INTERRUPT_WINDOW_MESSAGE;
1644AssertCompileSize(HV_X64_INTERRUPT_WINDOW_MESSAGE, 0x30);
1645/** Pointer to a HvMessageTypeX64InterruptWindow payload. */
1646typedef HV_X64_INTERRUPT_WINDOW_MESSAGE *PHV_X64_INTERRUPT_WINDOW_MESSAGE;
1647/** Pointer to a const HvMessageTypeX64InterruptWindow payload. */
1648typedef HV_X64_INTERRUPT_WINDOW_MESSAGE const *PCHV_X64_INTERRUPT_WINDOW_MESSAGE;
1649
1650/** Full HvMessageTypeX64InterruptWindow message. */
1651typedef struct
1652{
1653 /** Payload size is 0x30. */
1654 HV_MESSAGE_HEADER MsgHdr;
1655 HV_X64_INTERRUPT_WINDOW_MESSAGE Payload;
1656} HV_X64_INTERRUPT_WINDOW_MESSAGE_FULL;
1657
1658
1659
1660/** Hyper-V SynIC message. */
1661typedef struct
1662{
1663 HV_MESSAGE_HEADER Header;
1664 /** 0x10 */
1665 union
1666 {
1667 uint64_t Payload[HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT];
1668
1669 /** Common header for X64 intercept messages.
1670 * The HvMessageTypeUnrecoverableException message only has this. */
1671 HV_X64_INTERCEPT_MESSAGE_HEADER X64InterceptHeader;
1672 /** HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa. */
1673 HV_X64_MEMORY_INTERCEPT_MESSAGE X64MemoryIntercept;
1674 /** HvMessageTypeX64IoPortIntercept */
1675 HV_X64_IO_PORT_INTERCEPT_MESSAGE X64IoPortIntercept;
1676 /** HvMessageTypeX64MsrIntercept */
1677 HV_X64_MSR_INTERCEPT_MESSAGE X64MsrIntercept;
1678 /** HvMessageTypeX64CpuidIntercept */
1679 HV_X64_CPUID_INTERCEPT_MESSAGE X64CpuIdIntercept;
1680 /** HvMessageTypeX64ExceptionIntercept */
1681 HV_X64_EXCEPTION_INTERCEPT_MESSAGE X64ExceptionIntercept;
1682 /** HvMessageTypeX64Halt.
1683 * @note No intercept header? */
1684 HV_X64_HALT_MESSAGE X64Halt;
1685 /** HvMessageTypeX64InterruptWindow. */
1686 HV_X64_INTERRUPT_WINDOW_MESSAGE X64InterruptWindow;
1687 };
1688} HV_MESSAGE;
1689AssertCompileSize(HV_MESSAGE, HV_MESSAGE_SIZE);
1690/** Pointer to a Hyper-V SynIC message. */
1691typedef HV_MESSAGE *PHV_MESSAGE;
1692/** Pointer to const a Hyper-V SynIC message. */
1693typedef HV_MESSAGE const *PCHV_MESSAGE;
1694
1695#endif
1696
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