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source: vbox/trunk/include/iprt/nocrt/x86/fenv-x86-amd64.h

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1/** @file
2 * IPRT / No-CRT - x86 & AMD64 fenv.h.
3 */
4
5/*
6 * Copyright (C) 2022-2024 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef IPRT_INCLUDED_nocrt_x86_fenv_x86_amd64_h
37#define IPRT_INCLUDED_nocrt_x86_fenv_x86_amd64_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <iprt/types.h>
43
44typedef struct RTNOCRTFENV
45{
46 /** The FPU environment. */
47 union
48 {
49 uint32_t au32[28/4];
50#ifdef IPRT_INCLUDED_x86_h
51 X86FSTENV32P Env;
52#endif
53 } fpu;
54 /** The SSE control & status register. */
55 uint32_t fMxCsr;
56} RTNOCRTFENV;
57
58/** Exception flags/mask. */
59typedef uint16_t RTNOCRTFEXCEPT;
60
61#ifndef IPRT_NOCRT_WITHOUT_CONFLICTING_TYPES
62typedef RTNOCRTFENV fenv_t;
63typedef RTNOCRTFEXCEPT fexcept_t;
64#endif
65
66/** @name Exception flags (same as X86_FCW_xM, X86_FSW_xE, X86_MXCSR_xE)
67 * @note The X86_FSW_SF is not covered here as it is more of a sub-type of
68 * invalid operand exception, and it is not part of MXCSR.
69 * @{ */
70#define RT_NOCRT_FE_INVALID 0x0001
71#define RT_NOCRT_FE_DENORMAL 0x0002
72#define RT_NOCRT_FE_DIVBYZERO 0x0004
73#define RT_NOCRT_FE_OVERFLOW 0x0008
74#define RT_NOCRT_FE_UNDERFLOW 0x0010
75#define RT_NOCRT_FE_INEXACT 0x0020
76#define RT_NOCRT_FE_ALL_EXCEPT 0x003f
77#ifndef IPRT_NOCRT_WITHOUT_MATH_CONSTANTS
78# define FE_INVALID RT_NOCRT_FE_INVALID
79# define FE_DENORMAL RT_NOCRT_FE_DENORMAL
80# define FE_DIVBYZERO RT_NOCRT_FE_DIVBYZERO
81# define FE_OVERFLOW RT_NOCRT_FE_OVERFLOW
82# define FE_UNDERFLOW RT_NOCRT_FE_UNDERFLOW
83# define FE_INEXACT RT_NOCRT_FE_INEXACT
84# define FE_ALL_EXCEPT RT_NOCRT_FE_ALL_EXCEPT
85#endif
86/** @} */
87
88/** @name Rounding Modes (same X86_FCW_RC_XXX)
89 * @{ */
90#define RT_NOCRT_FE_TONEAREST 0x0000
91#define RT_NOCRT_FE_DOWNWARD 0x0400
92#define RT_NOCRT_FE_UPWARD 0x0800
93#define RT_NOCRT_FE_TOWARDZERO 0x0c00
94#define RT_NOCRT_FE_ROUND_MASK 0x0c00
95#ifndef IPRT_NOCRT_WITHOUT_MATH_CONSTANTS
96# define FE_TONEAREST RT_NOCRT_FE_TONEAREST
97# define FE_DOWNWARD RT_NOCRT_FE_DOWNWARD
98# define FE_UPWARD RT_NOCRT_FE_UPWARD
99# define FE_TOWARDZERO RT_NOCRT_FE_TOWARDZERO
100#endif
101/** @} */
102
103
104/** @name x87 Precision (same X86_FCW_PC_XXX)
105 * @{ */
106#define RT_NOCRT_PC_FLOAT 0x0000
107#define RT_NOCRT_PC_RSVD 0x0100
108#define RT_NOCRT_PC_DOUBLE 0x0200
109#define RT_NOCRT_PC_EXTENDED 0x0300
110#define RT_NOCRT_PC_MASK 0x0300
111/** @} */
112
113
114/** @name Special environment pointer values.
115 * @note Only valid with fesetenv and feupdateenv.
116 * @note Defined as constants in fesetenv.asm.
117 * @{ */
118/** The default FPU+SSE environment set, all exceptions disabled (masked). */
119#define RT_NOCRT_FE_DFL_ENV ((RTNOCRTFENV const *)(intptr_t)1)
120/** The default FPU+SSE environment set, but all exceptions enabled (unmasked)
121 * except for RT_NOCRT_FE_DENORMAL. */
122#define RT_NOCRT_FE_NOMASK_ENV ((RTNOCRTFENV const *)(intptr_t)2)
123/** The default FPU+SSE environment set, all exceptions disabled (masked),
124 * double precision (53 bit mantissa). */
125#define RT_NOCRT_FE_PC53_ENV ((RTNOCRTFENV const *)(intptr_t)3)
126/** The default FPU+SSE environment set, all exceptions disabled (masked),
127 * extended double precision (64 bit mantissa). */
128#define RT_NOCRT_FE_PC64_ENV ((RTNOCRTFENV const *)(intptr_t)4)
129#ifndef IPRT_NOCRT_WITHOUT_MATH_CONSTANTS
130# define FE_DFL_ENV RT_NOCRT_FE_DFL_ENV
131# define FE_NOMASK_ENV RT_NOCRT_FE_NOMASK_ENV
132# define FE_PC53_ENV RT_NOCRT_FE_PC53_ENV
133# define FE_PC64_ENV RT_NOCRT_FE_PC64_ENV
134#endif
135/** @} */
136
137RT_C_DECLS_BEGIN
138
139int RT_NOCRT(fegetenv)(RTNOCRTFENV *);
140int RT_NOCRT(fesetenv)(RTNOCRTFENV const *);
141int RT_NOCRT(feholdexcept)(RTNOCRTFENV *);
142int RT_NOCRT(feupdateenv)(RTNOCRTFENV const *);
143
144int RT_NOCRT(fegetround)(void);
145int RT_NOCRT(fesetround)(int);
146
147int RT_NOCRT(fegetexcept)(void);
148int RT_NOCRT(feenableexcept)(int);
149int RT_NOCRT(fedisableexcept)(int);
150
151int RT_NOCRT(feclearexcept)(int);
152int RT_NOCRT(fetestexcept)(int);
153int RT_NOCRT(fegetexceptflag)(RTNOCRTFEXCEPT *, int);
154int RT_NOCRT(fesetexceptflag)(RTNOCRTFEXCEPT const *, int);
155
156int RT_NOCRT(feraiseexcept)(int);
157
158/* IPRT addition: */
159int RT_NOCRT(fegetx87precision)(void);
160int RT_NOCRT(fesetx87precision)(int);
161
162/* Underscored variants: */
163int RT_NOCRT(_fegetenv)(RTNOCRTFENV *);
164int RT_NOCRT(_fesetenv)(RTNOCRTFENV const *);
165int RT_NOCRT(_feholdexcept)(RTNOCRTFENV *);
166int RT_NOCRT(_feupdateenv)(RTNOCRTFENV const *);
167
168int RT_NOCRT(_fegetround)(void);
169int RT_NOCRT(_fesetround)(int);
170
171int RT_NOCRT(_fegetexcept)(void);
172int RT_NOCRT(_feenableexcept)(int);
173int RT_NOCRT(_fedisableexcept)(int);
174
175int RT_NOCRT(_feclearexcept)(int);
176int RT_NOCRT(_fetestexcept)(int);
177int RT_NOCRT(_fegetexceptflag)(RTNOCRTFEXCEPT *, int);
178int RT_NOCRT(_fesetexceptflag)(RTNOCRTFEXCEPT const *, int);
179
180int RT_NOCRT(_feraiseexcept)(int);
181
182/* Aliases: */
183#if !defined(RT_WITHOUT_NOCRT_WRAPPERS) && !defined(RT_WITHOUT_NOCRT_WRAPPER_ALIASES)
184# define fegetenv RT_NOCRT(fegetenv)
185# define fesetenv RT_NOCRT(fesetenv)
186# define feholdexcept RT_NOCRT(feholdexcept)
187# define feupdateenv RT_NOCRT(feupdateenv)
188# define fegetround RT_NOCRT(fegetround)
189# define fesetround RT_NOCRT(fesetround)
190# define fegetexcept RT_NOCRT(fegetexcept)
191# define feenableexcept RT_NOCRT(feenableexcept)
192# define fedisableexcept RT_NOCRT(fedisableexcept)
193# define feclearexcept RT_NOCRT(feclearexcept)
194# define fetestexcept RT_NOCRT(fetestexcept)
195# define fegetexceptflag RT_NOCRT(fegetexceptflag)
196# define fesetexceptflag RT_NOCRT(fesetexceptflag)
197# define feraiseexcept RT_NOCRT(feraiseexcept)
198
199/* Underscored variants: */
200# define _fegetenv RT_NOCRT(fegetenv)
201# define _fesetenv RT_NOCRT(fesetenv)
202# define _feholdexcept RT_NOCRT(feholdexcept)
203# define _feupdateenv RT_NOCRT(feupdateenv)
204# define _fegetround RT_NOCRT(fegetround)
205# define _fesetround RT_NOCRT(fesetround)
206# define _fegetexcept RT_NOCRT(fegetexcept)
207# define _feenableexcept RT_NOCRT(feenableexcept)
208# define _fedisableexcept RT_NOCRT(fedisableexcept)
209# define _feclearexcept RT_NOCRT(feclearexcept)
210# define _fetestexcept RT_NOCRT(fetestexcept)
211# define _fegetexceptflag RT_NOCRT(fegetexceptflag)
212# define _fesetexceptflag RT_NOCRT(fesetexceptflag)
213# define _feraiseexcept RT_NOCRT(feraiseexcept)
214#endif
215
216RT_C_DECLS_END
217
218#endif /* !IPRT_INCLUDED_nocrt_x86_fenv_x86_amd64_h */
219
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