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source: vbox/trunk/include/iprt/asm-math.h@ 104664

Last change on this file since 104664 was 104664, checked in by vboxsync, 4 months ago

include/iprt/asm-math.h: Build fix for win.arm64 where the emul and emulu intrinsics do not exist, bugref:10392
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1/** @file
2 * IPRT - Assembly Routines for Optimizing some Integers Math Operations.
3 */
4
5/*
6 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef IPRT_INCLUDED_asm_math_h
37#define IPRT_INCLUDED_asm_math_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <iprt/types.h>
43
44#if defined(_MSC_VER) && RT_INLINE_ASM_USES_INTRIN
45/* Emit the intrinsics at all optimization levels. */
46# include <iprt/sanitized/intrin.h>
47# if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
48# pragma intrinsic(__emul)
49# pragma intrinsic(__emulu)
50# ifdef RT_ARCH_AMD64
51# pragma intrinsic(_mul128)
52# pragma intrinsic(_umul128)
53# endif
54# endif
55#endif
56
57
58/*
59 * Undefine all symbols we have Watcom C/C++ #pragma aux'es for.
60 */
61#if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
62/*# include "asm-math-watcom-x86-16.h"*/
63#elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
64# include "asm-math-watcom-x86-32.h"
65#endif
66
67
68/** @defgroup grp_rt_asm_math Interger Math Optimizations
69 * @ingroup grp_rt_asm
70 * @{ */
71
72/**
73 * Multiplies two unsigned 32-bit values returning an unsigned 64-bit result.
74 *
75 * @returns u32F1 * u32F2.
76 */
77
78#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
79RT_ASM_DECL_PRAGMA_WATCOM(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2);
80#else
81DECLINLINE(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2)
82{
83# ifdef RT_ARCH_X86
84 uint64_t u64;
85# if RT_INLINE_ASM_GNU_STYLE
86 __asm__ __volatile__("mull %%edx"
87 : "=A" (u64)
88 : "a" (u32F2), "d" (u32F1));
89# elif RT_INLINE_ASM_USES_INTRIN
90 u64 = __emulu(u32F1, u32F2);
91# else
92 __asm
93 {
94 mov edx, [u32F1]
95 mov eax, [u32F2]
96 mul edx
97 mov dword ptr [u64], eax
98 mov dword ptr [u64 + 4], edx
99 }
100# endif
101 return u64;
102# else /* generic: */
103 return (uint64_t)u32F1 * u32F2;
104# endif
105}
106#endif
107
108
109/**
110 * Multiplies two signed 32-bit values returning a signed 64-bit result.
111 *
112 * @returns u32F1 * u32F2.
113 */
114#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
115RT_ASM_DECL_PRAGMA_WATCOM(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2);
116#else
117DECLINLINE(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2)
118{
119# ifdef RT_ARCH_X86
120 int64_t i64;
121# if RT_INLINE_ASM_GNU_STYLE
122 __asm__ __volatile__("imull %%edx"
123 : "=A" (i64)
124 : "a" (i32F2), "d" (i32F1));
125# elif RT_INLINE_ASM_USES_INTRIN
126 i64 = __emul(i32F1, i32F2);
127# else
128 __asm
129 {
130 mov edx, [i32F1]
131 mov eax, [i32F2]
132 imul edx
133 mov dword ptr [i64], eax
134 mov dword ptr [i64 + 4], edx
135 }
136# endif
137 return i64;
138# else /* generic: */
139 return (int64_t)i32F1 * i32F2;
140# endif
141}
142#endif
143
144
145DECLINLINE(uint64_t) ASMMult2xU64Ret2xU64(uint64_t u64F1, uint64_t u64F2, uint64_t *pu64ProdHi)
146{
147#if defined(RT_ARCH_AMD64) && (RT_INLINE_ASM_GNU_STYLE || RT_INLINE_ASM_USES_INTRIN)
148# if RT_INLINE_ASM_GNU_STYLE
149 uint64_t u64Low, u64High;
150 __asm__ __volatile__("mulq %%rdx"
151 : "=a" (u64Low), "=d" (u64High)
152 : "0" (u64F1), "1" (u64F2));
153 *pu64ProdHi = u64High;
154 return u64Low;
155# elif RT_INLINE_ASM_USES_INTRIN
156 return _umul128(u64F1, u64F2, pu64ProdHi);
157# else
158# error "hmm"
159# endif
160#else /* generic: */
161 /*
162 * F1 * F2 = Prod
163 * -- --
164 * ab * cd = b*d + a*d*10 + b*c*10 + a*c*100
165 *
166 * Where a, b, c and d are 'digits', and 10 is max digit + 1.
167 *
168 * Our digits are 32-bit wide, so instead of 10 we multiply by 4G.
169 * Prod = F1.s.Lo*F2.s.Lo + F1.s.Hi*F2.s.Lo*4G
170 * + F1.s.Lo*F2.s.Hi*4G + F1.s.Hi*F2.s.Hi*4G*4G
171 */
172 RTUINT128U Prod;
173 RTUINT64U Tmp1;
174 uint64_t u64Tmp;
175 RTUINT64U F1, F2;
176 F1.u = u64F1;
177 F2.u = u64F2;
178
179 Prod.s.Lo = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Lo);
180
181 Tmp1.u = ASMMult2xU32RetU64(F1.s.Hi, F2.s.Lo);
182 u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
183 Prod.DWords.dw1 = (uint32_t)u64Tmp;
184 Prod.s.Hi = Tmp1.s.Hi;
185 Prod.s.Hi += u64Tmp >> 32; /* carry */
186
187 Tmp1.u = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Hi);
188 u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
189 Prod.DWords.dw1 = (uint32_t)u64Tmp;
190 u64Tmp >>= 32; /* carry */
191 u64Tmp += Prod.DWords.dw2;
192 u64Tmp += Tmp1.s.Hi;
193 Prod.DWords.dw2 = (uint32_t)u64Tmp;
194 Prod.DWords.dw3 += u64Tmp >> 32; /* carry */
195
196 Prod.s.Hi += ASMMult2xU32RetU64(F1.s.Hi, F2.s.Hi);
197 *pu64ProdHi = Prod.s.Hi;
198 return Prod.s.Lo;
199#endif
200}
201
202
203
204/**
205 * Divides a 64-bit unsigned by a 32-bit unsigned returning an unsigned 32-bit result.
206 *
207 * @returns u64 / u32.
208 */
209#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
210RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32);
211#else
212DECLINLINE(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32)
213{
214# ifdef RT_ARCH_X86
215# if RT_INLINE_ASM_GNU_STYLE
216 RTCCUINTREG uDummy;
217 __asm__ __volatile__("divl %3"
218 : "=a" (u32), "=d"(uDummy)
219 : "A" (u64), "r" (u32));
220# else
221 __asm
222 {
223 mov eax, dword ptr [u64]
224 mov edx, dword ptr [u64 + 4]
225 mov ecx, [u32]
226 div ecx
227 mov [u32], eax
228 }
229# endif
230 return u32;
231# else /* generic: */
232 return (uint32_t)(u64 / u32);
233# endif
234}
235#endif
236
237
238/**
239 * Divides a 64-bit signed by a 32-bit signed returning a signed 32-bit result.
240 *
241 * @returns u64 / u32.
242 */
243#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
244RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32);
245#else
246DECLINLINE(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32)
247{
248# ifdef RT_ARCH_X86
249# if RT_INLINE_ASM_GNU_STYLE
250 RTCCUINTREG iDummy;
251 __asm__ __volatile__("idivl %3"
252 : "=a" (i32), "=d"(iDummy)
253 : "A" (i64), "r" (i32));
254# else
255 __asm
256 {
257 mov eax, dword ptr [i64]
258 mov edx, dword ptr [i64 + 4]
259 mov ecx, [i32]
260 idiv ecx
261 mov [i32], eax
262 }
263# endif
264 return i32;
265# else /* generic: */
266 return (int32_t)(i64 / i32);
267# endif
268}
269#endif
270
271
272/**
273 * Performs 64-bit unsigned by a 32-bit unsigned division with a 32-bit unsigned result,
274 * returning the rest.
275 *
276 * @returns u64 % u32.
277 *
278 * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
279 */
280#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
281RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32);
282#else
283DECLINLINE(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32)
284{
285# ifdef RT_ARCH_X86
286# if RT_INLINE_ASM_GNU_STYLE
287 RTCCUINTREG uDummy;
288 __asm__ __volatile__("divl %3"
289 : "=a" (uDummy), "=d"(u32)
290 : "A" (u64), "r" (u32));
291# else
292 __asm
293 {
294 mov eax, dword ptr [u64]
295 mov edx, dword ptr [u64 + 4]
296 mov ecx, [u32]
297 div ecx
298 mov [u32], edx
299 }
300# endif
301 return u32;
302# else /* generic: */
303 return (uint32_t)(u64 % u32);
304# endif
305}
306#endif
307
308
309/**
310 * Performs 64-bit signed by a 32-bit signed division with a 32-bit signed result,
311 * returning the rest.
312 *
313 * @returns u64 % u32.
314 *
315 * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
316 */
317#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
318RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32);
319#else
320DECLINLINE(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32)
321{
322# ifdef RT_ARCH_X86
323# if RT_INLINE_ASM_GNU_STYLE
324 RTCCUINTREG iDummy;
325 __asm__ __volatile__("idivl %3"
326 : "=a" (iDummy), "=d"(i32)
327 : "A" (i64), "r" (i32));
328# else
329 __asm
330 {
331 mov eax, dword ptr [i64]
332 mov edx, dword ptr [i64 + 4]
333 mov ecx, [i32]
334 idiv ecx
335 mov [i32], edx
336 }
337# endif
338 return i32;
339# else /* generic: */
340 return (int32_t)(i64 % i32);
341# endif
342}
343#endif
344
345
346/**
347 * Multiple a 32-bit by a 32-bit integer and divide the result by a 32-bit integer
348 * using a 64 bit intermediate result.
349 *
350 * @returns (u32A * u32B) / u32C.
351 * @param u32A The 32-bit value (A).
352 * @param u32B The 32-bit value to multiple by A.
353 * @param u32C The 32-bit value to divide A*B by.
354 *
355 * @remarks Architecture specific.
356 * @remarks Make sure the result won't ever exceed 32-bit, because hardware
357 * exception may be raised if it does.
358 * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
359 * arithmetics functions.
360 */
361#if RT_INLINE_ASM_EXTERNAL && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
362RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C);
363#else
364DECLINLINE(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C)
365{
366# if RT_INLINE_ASM_GNU_STYLE && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
367 uint32_t u32Result, u32Spill;
368 __asm__ __volatile__("mull %2\n\t"
369 "divl %3\n\t"
370 : "=&a" (u32Result),
371 "=&d" (u32Spill)
372 : "r" (u32B),
373 "r" (u32C),
374 "0" (u32A));
375 return u32Result;
376# else
377 return (uint32_t)(((uint64_t)u32A * u32B) / u32C);
378# endif
379}
380#endif
381
382
383/**
384 * Multiple a 64-bit by a 32-bit integer and divide the result by a 32-bit integer
385 * using a 96 bit intermediate result.
386 *
387 * @returns (u64A * u32B) / u32C.
388 * @param u64A The 64-bit value.
389 * @param u32B The 32-bit value to multiple by A.
390 * @param u32C The 32-bit value to divide A*B by.
391 *
392 * @remarks Architecture specific.
393 * @remarks Make sure the result won't ever exceed 64-bit, because hardware
394 * exception may be raised if it does.
395 * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
396 * arithmetics function.
397 */
398#if RT_INLINE_ASM_EXTERNAL || !defined(__GNUC__) || (!defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86))
399DECLASM(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C);
400#else
401DECLINLINE(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C)
402{
403# if RT_INLINE_ASM_GNU_STYLE
404# ifdef RT_ARCH_AMD64
405 uint64_t u64Result, u64Spill;
406 __asm__ __volatile__("mulq %2\n\t"
407 "divq %3\n\t"
408 : "=&a" (u64Result),
409 "=&d" (u64Spill)
410 : "r" ((uint64_t)u32B),
411 "r" ((uint64_t)u32C),
412 "0" (u64A));
413 return u64Result;
414# else
415 uint32_t u32Dummy;
416 uint64_t u64Result;
417 __asm__ __volatile__("mull %%ecx \n\t" /* eax = u64Lo.lo = (u64A.lo * u32B).lo
418 edx = u64Lo.hi = (u64A.lo * u32B).hi */
419 "xchg %%eax,%%esi \n\t" /* esi = u64Lo.lo
420 eax = u64A.hi */
421 "xchg %%edx,%%edi \n\t" /* edi = u64Low.hi
422 edx = u32C */
423 "xchg %%edx,%%ecx \n\t" /* ecx = u32C
424 edx = u32B */
425 "mull %%edx \n\t" /* eax = u64Hi.lo = (u64A.hi * u32B).lo
426 edx = u64Hi.hi = (u64A.hi * u32B).hi */
427 "addl %%edi,%%eax \n\t" /* u64Hi.lo += u64Lo.hi */
428 "adcl $0,%%edx \n\t" /* u64Hi.hi += carry */
429 "divl %%ecx \n\t" /* eax = u64Hi / u32C
430 edx = u64Hi % u32C */
431 "movl %%eax,%%edi \n\t" /* edi = u64Result.hi = u64Hi / u32C */
432 "movl %%esi,%%eax \n\t" /* eax = u64Lo.lo */
433 "divl %%ecx \n\t" /* u64Result.lo */
434 "movl %%edi,%%edx \n\t" /* u64Result.hi */
435 : "=A"(u64Result), "=c"(u32Dummy),
436 "=S"(u32Dummy), "=D"(u32Dummy)
437 : "a"((uint32_t)u64A),
438 "S"((uint32_t)(u64A >> 32)),
439 "c"(u32B),
440 "D"(u32C));
441 return u64Result;
442# endif
443# else
444 RTUINT64U u;
445 uint64_t u64Lo = (uint64_t)(u64A & 0xffffffff) * u32B;
446 uint64_t u64Hi = (uint64_t)(u64A >> 32) * u32B;
447 u64Hi += (u64Lo >> 32);
448 u.s.Hi = (uint32_t)(u64Hi / u32C);
449 u.s.Lo = (uint32_t)((((u64Hi % u32C) << 32) + (u64Lo & 0xffffffff)) / u32C);
450 return u.u;
451# endif
452}
453#endif
454
455/** @} */
456
457/*
458 * Include #pragma aux definitions for Watcom C/C++.
459 */
460#if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
461# define IPRT_ASM_WATCOM_X86_16_WITH_PRAGMAS
462# undef IPRT_INCLUDED_asm_math_watcom_x86_16_h
463/*# include "asm-math-watcom-x86-16.h"*/
464#elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
465# define IPRT_ASM_WATCOM_X86_32_WITH_PRAGMAS
466# undef IPRT_INCLUDED_asm_math_watcom_x86_32_h
467# include "asm-math-watcom-x86-32.h"
468#endif
469
470#endif /* !IPRT_INCLUDED_asm_math_h */
471
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