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source: vbox/trunk/include/iprt/asm-math.h@ 104212

Last change on this file since 104212 was 103887, checked in by vboxsync, 8 months ago

iprt/asm-math.h,ValKit/bs3-cpu-instr-3: 32-bit watcom implementation of asm-math.h so bs3CpuInstr3_SimpleRand can make use of it. bugref:10370
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1/** @file
2 * IPRT - Assembly Routines for Optimizing some Integers Math Operations.
3 */
4
5/*
6 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef IPRT_INCLUDED_asm_math_h
37#define IPRT_INCLUDED_asm_math_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <iprt/types.h>
43
44#if defined(_MSC_VER) && RT_INLINE_ASM_USES_INTRIN
45/* Emit the intrinsics at all optimization levels. */
46# include <iprt/sanitized/intrin.h>
47# pragma intrinsic(__emul)
48# pragma intrinsic(__emulu)
49# ifdef RT_ARCH_AMD64
50# pragma intrinsic(_mul128)
51# pragma intrinsic(_umul128)
52# endif
53#endif
54
55
56/*
57 * Undefine all symbols we have Watcom C/C++ #pragma aux'es for.
58 */
59#if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
60/*# include "asm-math-watcom-x86-16.h"*/
61#elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
62# include "asm-math-watcom-x86-32.h"
63#endif
64
65
66/** @defgroup grp_rt_asm_math Interger Math Optimizations
67 * @ingroup grp_rt_asm
68 * @{ */
69
70/**
71 * Multiplies two unsigned 32-bit values returning an unsigned 64-bit result.
72 *
73 * @returns u32F1 * u32F2.
74 */
75
76#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
77RT_ASM_DECL_PRAGMA_WATCOM(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2);
78#else
79DECLINLINE(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2)
80{
81# ifdef RT_ARCH_X86
82 uint64_t u64;
83# if RT_INLINE_ASM_GNU_STYLE
84 __asm__ __volatile__("mull %%edx"
85 : "=A" (u64)
86 : "a" (u32F2), "d" (u32F1));
87# elif RT_INLINE_ASM_USES_INTRIN
88 u64 = __emulu(u32F1, u32F2);
89# else
90 __asm
91 {
92 mov edx, [u32F1]
93 mov eax, [u32F2]
94 mul edx
95 mov dword ptr [u64], eax
96 mov dword ptr [u64 + 4], edx
97 }
98# endif
99 return u64;
100# else /* generic: */
101 return (uint64_t)u32F1 * u32F2;
102# endif
103}
104#endif
105
106
107/**
108 * Multiplies two signed 32-bit values returning a signed 64-bit result.
109 *
110 * @returns u32F1 * u32F2.
111 */
112#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
113RT_ASM_DECL_PRAGMA_WATCOM(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2);
114#else
115DECLINLINE(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2)
116{
117# ifdef RT_ARCH_X86
118 int64_t i64;
119# if RT_INLINE_ASM_GNU_STYLE
120 __asm__ __volatile__("imull %%edx"
121 : "=A" (i64)
122 : "a" (i32F2), "d" (i32F1));
123# elif RT_INLINE_ASM_USES_INTRIN
124 i64 = __emul(i32F1, i32F2);
125# else
126 __asm
127 {
128 mov edx, [i32F1]
129 mov eax, [i32F2]
130 imul edx
131 mov dword ptr [i64], eax
132 mov dword ptr [i64 + 4], edx
133 }
134# endif
135 return i64;
136# else /* generic: */
137 return (int64_t)i32F1 * i32F2;
138# endif
139}
140#endif
141
142
143DECLINLINE(uint64_t) ASMMult2xU64Ret2xU64(uint64_t u64F1, uint64_t u64F2, uint64_t *pu64ProdHi)
144{
145#if defined(RT_ARCH_AMD64) && (RT_INLINE_ASM_GNU_STYLE || RT_INLINE_ASM_USES_INTRIN)
146# if RT_INLINE_ASM_GNU_STYLE
147 uint64_t u64Low, u64High;
148 __asm__ __volatile__("mulq %%rdx"
149 : "=a" (u64Low), "=d" (u64High)
150 : "0" (u64F1), "1" (u64F2));
151 *pu64ProdHi = u64High;
152 return u64Low;
153# elif RT_INLINE_ASM_USES_INTRIN
154 return _umul128(u64F1, u64F2, pu64ProdHi);
155# else
156# error "hmm"
157# endif
158#else /* generic: */
159 /*
160 * F1 * F2 = Prod
161 * -- --
162 * ab * cd = b*d + a*d*10 + b*c*10 + a*c*100
163 *
164 * Where a, b, c and d are 'digits', and 10 is max digit + 1.
165 *
166 * Our digits are 32-bit wide, so instead of 10 we multiply by 4G.
167 * Prod = F1.s.Lo*F2.s.Lo + F1.s.Hi*F2.s.Lo*4G
168 * + F1.s.Lo*F2.s.Hi*4G + F1.s.Hi*F2.s.Hi*4G*4G
169 */
170 RTUINT128U Prod;
171 RTUINT64U Tmp1;
172 uint64_t u64Tmp;
173 RTUINT64U F1, F2;
174 F1.u = u64F1;
175 F2.u = u64F2;
176
177 Prod.s.Lo = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Lo);
178
179 Tmp1.u = ASMMult2xU32RetU64(F1.s.Hi, F2.s.Lo);
180 u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
181 Prod.DWords.dw1 = (uint32_t)u64Tmp;
182 Prod.s.Hi = Tmp1.s.Hi;
183 Prod.s.Hi += u64Tmp >> 32; /* carry */
184
185 Tmp1.u = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Hi);
186 u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
187 Prod.DWords.dw1 = (uint32_t)u64Tmp;
188 u64Tmp >>= 32; /* carry */
189 u64Tmp += Prod.DWords.dw2;
190 u64Tmp += Tmp1.s.Hi;
191 Prod.DWords.dw2 = (uint32_t)u64Tmp;
192 Prod.DWords.dw3 += u64Tmp >> 32; /* carry */
193
194 Prod.s.Hi += ASMMult2xU32RetU64(F1.s.Hi, F2.s.Hi);
195 *pu64ProdHi = Prod.s.Hi;
196 return Prod.s.Lo;
197#endif
198}
199
200
201
202/**
203 * Divides a 64-bit unsigned by a 32-bit unsigned returning an unsigned 32-bit result.
204 *
205 * @returns u64 / u32.
206 */
207#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
208RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32);
209#else
210DECLINLINE(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32)
211{
212# ifdef RT_ARCH_X86
213# if RT_INLINE_ASM_GNU_STYLE
214 RTCCUINTREG uDummy;
215 __asm__ __volatile__("divl %3"
216 : "=a" (u32), "=d"(uDummy)
217 : "A" (u64), "r" (u32));
218# else
219 __asm
220 {
221 mov eax, dword ptr [u64]
222 mov edx, dword ptr [u64 + 4]
223 mov ecx, [u32]
224 div ecx
225 mov [u32], eax
226 }
227# endif
228 return u32;
229# else /* generic: */
230 return (uint32_t)(u64 / u32);
231# endif
232}
233#endif
234
235
236/**
237 * Divides a 64-bit signed by a 32-bit signed returning a signed 32-bit result.
238 *
239 * @returns u64 / u32.
240 */
241#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
242RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32);
243#else
244DECLINLINE(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32)
245{
246# ifdef RT_ARCH_X86
247# if RT_INLINE_ASM_GNU_STYLE
248 RTCCUINTREG iDummy;
249 __asm__ __volatile__("idivl %3"
250 : "=a" (i32), "=d"(iDummy)
251 : "A" (i64), "r" (i32));
252# else
253 __asm
254 {
255 mov eax, dword ptr [i64]
256 mov edx, dword ptr [i64 + 4]
257 mov ecx, [i32]
258 idiv ecx
259 mov [i32], eax
260 }
261# endif
262 return i32;
263# else /* generic: */
264 return (int32_t)(i64 / i32);
265# endif
266}
267#endif
268
269
270/**
271 * Performs 64-bit unsigned by a 32-bit unsigned division with a 32-bit unsigned result,
272 * returning the rest.
273 *
274 * @returns u64 % u32.
275 *
276 * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
277 */
278#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
279RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32);
280#else
281DECLINLINE(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32)
282{
283# ifdef RT_ARCH_X86
284# if RT_INLINE_ASM_GNU_STYLE
285 RTCCUINTREG uDummy;
286 __asm__ __volatile__("divl %3"
287 : "=a" (uDummy), "=d"(u32)
288 : "A" (u64), "r" (u32));
289# else
290 __asm
291 {
292 mov eax, dword ptr [u64]
293 mov edx, dword ptr [u64 + 4]
294 mov ecx, [u32]
295 div ecx
296 mov [u32], edx
297 }
298# endif
299 return u32;
300# else /* generic: */
301 return (uint32_t)(u64 % u32);
302# endif
303}
304#endif
305
306
307/**
308 * Performs 64-bit signed by a 32-bit signed division with a 32-bit signed result,
309 * returning the rest.
310 *
311 * @returns u64 % u32.
312 *
313 * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
314 */
315#if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
316RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32);
317#else
318DECLINLINE(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32)
319{
320# ifdef RT_ARCH_X86
321# if RT_INLINE_ASM_GNU_STYLE
322 RTCCUINTREG iDummy;
323 __asm__ __volatile__("idivl %3"
324 : "=a" (iDummy), "=d"(i32)
325 : "A" (i64), "r" (i32));
326# else
327 __asm
328 {
329 mov eax, dword ptr [i64]
330 mov edx, dword ptr [i64 + 4]
331 mov ecx, [i32]
332 idiv ecx
333 mov [i32], edx
334 }
335# endif
336 return i32;
337# else /* generic: */
338 return (int32_t)(i64 % i32);
339# endif
340}
341#endif
342
343
344/**
345 * Multiple a 32-bit by a 32-bit integer and divide the result by a 32-bit integer
346 * using a 64 bit intermediate result.
347 *
348 * @returns (u32A * u32B) / u32C.
349 * @param u32A The 32-bit value (A).
350 * @param u32B The 32-bit value to multiple by A.
351 * @param u32C The 32-bit value to divide A*B by.
352 *
353 * @remarks Architecture specific.
354 * @remarks Make sure the result won't ever exceed 32-bit, because hardware
355 * exception may be raised if it does.
356 * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
357 * arithmetics functions.
358 */
359#if RT_INLINE_ASM_EXTERNAL && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
360RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C);
361#else
362DECLINLINE(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C)
363{
364# if RT_INLINE_ASM_GNU_STYLE && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
365 uint32_t u32Result, u32Spill;
366 __asm__ __volatile__("mull %2\n\t"
367 "divl %3\n\t"
368 : "=&a" (u32Result),
369 "=&d" (u32Spill)
370 : "r" (u32B),
371 "r" (u32C),
372 "0" (u32A));
373 return u32Result;
374# else
375 return (uint32_t)(((uint64_t)u32A * u32B) / u32C);
376# endif
377}
378#endif
379
380
381/**
382 * Multiple a 64-bit by a 32-bit integer and divide the result by a 32-bit integer
383 * using a 96 bit intermediate result.
384 *
385 * @returns (u64A * u32B) / u32C.
386 * @param u64A The 64-bit value.
387 * @param u32B The 32-bit value to multiple by A.
388 * @param u32C The 32-bit value to divide A*B by.
389 *
390 * @remarks Architecture specific.
391 * @remarks Make sure the result won't ever exceed 64-bit, because hardware
392 * exception may be raised if it does.
393 * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
394 * arithmetics function.
395 */
396#if RT_INLINE_ASM_EXTERNAL || !defined(__GNUC__) || (!defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86))
397DECLASM(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C);
398#else
399DECLINLINE(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C)
400{
401# if RT_INLINE_ASM_GNU_STYLE
402# ifdef RT_ARCH_AMD64
403 uint64_t u64Result, u64Spill;
404 __asm__ __volatile__("mulq %2\n\t"
405 "divq %3\n\t"
406 : "=&a" (u64Result),
407 "=&d" (u64Spill)
408 : "r" ((uint64_t)u32B),
409 "r" ((uint64_t)u32C),
410 "0" (u64A));
411 return u64Result;
412# else
413 uint32_t u32Dummy;
414 uint64_t u64Result;
415 __asm__ __volatile__("mull %%ecx \n\t" /* eax = u64Lo.lo = (u64A.lo * u32B).lo
416 edx = u64Lo.hi = (u64A.lo * u32B).hi */
417 "xchg %%eax,%%esi \n\t" /* esi = u64Lo.lo
418 eax = u64A.hi */
419 "xchg %%edx,%%edi \n\t" /* edi = u64Low.hi
420 edx = u32C */
421 "xchg %%edx,%%ecx \n\t" /* ecx = u32C
422 edx = u32B */
423 "mull %%edx \n\t" /* eax = u64Hi.lo = (u64A.hi * u32B).lo
424 edx = u64Hi.hi = (u64A.hi * u32B).hi */
425 "addl %%edi,%%eax \n\t" /* u64Hi.lo += u64Lo.hi */
426 "adcl $0,%%edx \n\t" /* u64Hi.hi += carry */
427 "divl %%ecx \n\t" /* eax = u64Hi / u32C
428 edx = u64Hi % u32C */
429 "movl %%eax,%%edi \n\t" /* edi = u64Result.hi = u64Hi / u32C */
430 "movl %%esi,%%eax \n\t" /* eax = u64Lo.lo */
431 "divl %%ecx \n\t" /* u64Result.lo */
432 "movl %%edi,%%edx \n\t" /* u64Result.hi */
433 : "=A"(u64Result), "=c"(u32Dummy),
434 "=S"(u32Dummy), "=D"(u32Dummy)
435 : "a"((uint32_t)u64A),
436 "S"((uint32_t)(u64A >> 32)),
437 "c"(u32B),
438 "D"(u32C));
439 return u64Result;
440# endif
441# else
442 RTUINT64U u;
443 uint64_t u64Lo = (uint64_t)(u64A & 0xffffffff) * u32B;
444 uint64_t u64Hi = (uint64_t)(u64A >> 32) * u32B;
445 u64Hi += (u64Lo >> 32);
446 u.s.Hi = (uint32_t)(u64Hi / u32C);
447 u.s.Lo = (uint32_t)((((u64Hi % u32C) << 32) + (u64Lo & 0xffffffff)) / u32C);
448 return u.u;
449# endif
450}
451#endif
452
453/** @} */
454
455/*
456 * Include #pragma aux definitions for Watcom C/C++.
457 */
458#if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
459# define IPRT_ASM_WATCOM_X86_16_WITH_PRAGMAS
460# undef IPRT_INCLUDED_asm_math_watcom_x86_16_h
461/*# include "asm-math-watcom-x86-16.h"*/
462#elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
463# define IPRT_ASM_WATCOM_X86_32_WITH_PRAGMAS
464# undef IPRT_INCLUDED_asm_math_watcom_x86_32_h
465# include "asm-math-watcom-x86-32.h"
466#endif
467
468#endif /* !IPRT_INCLUDED_asm_math_h */
469
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