vm.h@ 99385

Last change on this file since 99385 was 99385, checked in by vboxsync, 18 months ago
VMM/ArmV8: Skeleton of the GICv3 interrupt controller emulation, bugref:10404
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
7	*
8	* This file is part of VirtualBox base platform packages, as
9	* available from https://www.virtualbox.org.
10	*
11	* This program is free software; you can redistribute it and/or
12	* modify it under the terms of the GNU General Public License
13	* as published by the Free Software Foundation, in version 3 of the
14	* License.
15	*
16	* This program is distributed in the hope that it will be useful, but
17	* WITHOUT ANY WARRANTY; without even the implied warranty of
18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19	* General Public License for more details.
20	*
21	* You should have received a copy of the GNU General Public License
22	* along with this program; if not, see <https://www.gnu.org/licenses>.
23	*
24	* The contents of this file may alternatively be used under the terms
25	* of the Common Development and Distribution License Version 1.0
26	* (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27	* in the VirtualBox distribution, in which case the provisions of the
28	* CDDL are applicable instead of those of the GPL.
29	*
30	* You may elect to license modified versions of this file under the
31	* terms and conditions of either the GPL or the CDDL or both.
32	*
33	* SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34	*/
35
36	#ifndef VBOX_INCLUDED_vmm_vm_h
37	#define VBOX_INCLUDED_vmm_vm_h
38	#ifndef RT_WITHOUT_PRAGMA_ONCE
39	# pragma once
40	#endif
41
42	#ifndef VBOX_FOR_DTRACE_LIB
43	# ifndef USING_VMM_COMMON_DEFS
44	# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
45	# endif
46	# include <iprt/param.h>
47	# include <VBox/param.h>
48	# include <VBox/types.h>
49	# include <VBox/vmm/cpum.h>
50	# include <VBox/vmm/stam.h>
51	# include <VBox/vmm/vmapi.h>
52	# include <VBox/vmm/vmm.h>
53	# include <VBox/sup.h>
54	#else
55	# pragma D depends_on library vbox-types.d
56	# pragma D depends_on library CPUMInternal.d
57	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
58	#endif
59
60
61
62	/** @defgroup grp_vm The Virtual Machine
63	* @ingroup grp_vmm
64	* @{
65	*/
66
67	/**
68	* The state of a Virtual CPU.
69	*
70	* The basic state indicated here is whether the CPU has been started or not. In
71	* addition, there are sub-states when started for assisting scheduling (GVMM
72	* mostly).
73	*
74	* The transition out of the STOPPED state is done by a vmR3PowerOn.
75	* The transition back to the STOPPED state is done by vmR3PowerOff.
76	*
77	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
78	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
79	*/
80	typedef enum VMCPUSTATE
81	{
82	/** The customary invalid zero. */
83	VMCPUSTATE_INVALID = 0,
84
85	/** Virtual CPU has not yet been started. */
86	VMCPUSTATE_STOPPED,
87
88	/** CPU started. */
89	VMCPUSTATE_STARTED,
90	/** CPU started in HM context. */
91	VMCPUSTATE_STARTED_HM,
92	/** Executing guest code and can be poked (RC or STI bits of HM). */
93	VMCPUSTATE_STARTED_EXEC,
94	/** Executing guest code using NEM. */
95	VMCPUSTATE_STARTED_EXEC_NEM,
96	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
97	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
98	/** Halted. */
99	VMCPUSTATE_STARTED_HALTED,
100
101	/** The end of valid virtual CPU states. */
102	VMCPUSTATE_END,
103
104	/** Ensure 32-bit type. */
105	VMCPUSTATE_32BIT_HACK = 0x7fffffff
106	} VMCPUSTATE;
107
108	/** Enables 64-bit FFs. */
109	#define VMCPU_WITH_64_BIT_FFS
110
111
112	/**
113	* The cross context virtual CPU structure.
114	*
115	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
116	*/
117	typedef struct VMCPU
118	{
119	/** @name Volatile per-cpu data.
120	* @{ */
121	/** Per CPU forced action.
122	* See the VMCPU_FF_* \#defines. Updated atomically. */
123	#ifdef VMCPU_WITH_64_BIT_FFS
124	uint64_t volatile fLocalForcedActions;
125	#else
126	uint32_t volatile fLocalForcedActions;
127	uint32_t fForLocalForcedActionsExpansion;
128	#endif
129	/** The CPU state. */
130	VMCPUSTATE volatile enmState;
131
132	/** Padding up to 64 bytes. */
133	uint8_t abAlignment0[64 - 12];
134	/** @} */
135
136	/** IEM part.
137	* @remarks This comes first as it allows the use of 8-bit immediates for the
138	* first 64 bytes of the structure, reducing code size a wee bit. */
139	#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h) /* For PDB hacking. */
140	union VMCPUUNIONIEMFULL
141	#else
142	union VMCPUUNIONIEMSTUB
143	#endif
144	{
145	#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h)
146	struct IEMCPU s;
147	#endif
148	uint8_t padding[32832]; /* multiple of 64 */
149	} iem;
150
151	/** @name Static per-cpu data.
152	* (Putting this after IEM, hoping that it's less frequently used than it.)
153	* @{ */
154	/** Ring-3 Host Context VM Pointer. */
155	PVMR3 pVMR3;
156	/** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
157	RTR0PTR pVCpuR0ForVtg;
158	/** Raw-mode Context VM Pointer. */
159	uint32_t pVMRC;
160	/** Padding for new raw-mode (long mode). */
161	uint32_t pVMRCPadding;
162	/** Pointer to the ring-3 UVMCPU structure. */
163	PUVMCPU pUVCpu;
164	/** The native thread handle. */
165	RTNATIVETHREAD hNativeThread;
166	/** The native R0 thread handle. (different from the R3 handle!) */
167	RTNATIVETHREAD hNativeThreadR0;
168	/** The IPRT thread handle (for VMMDevTesting). */
169	RTTHREAD hThread;
170	/** The CPU ID.
171	* This is the index into the VM::aCpu array. */
172	#ifdef IN_RING0
173	VMCPUID idCpuUnsafe;
174	#else
175	VMCPUID idCpu;
176	#endif
177
178	/** Align the structures below bit on a 64-byte boundary and make sure it starts
179	* at the same offset in both 64-bit and 32-bit builds.
180	*
181	* @remarks The alignments of the members that are larger than 48 bytes should be
182	* 64-byte for cache line reasons. structs containing small amounts of
183	* data could be lumped together at the end with a < 64 byte padding
184	* following it (to grow into and align the struct size).
185	*/
186	uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
187	/** @} */
188
189	/** HM part. */
190	union VMCPUUNIONHM
191	{
192	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
193	struct HMCPU s;
194	#endif
195	uint8_t padding[9984]; /* multiple of 64 */
196	} hm;
197
198	/** NEM part. */
199	union VMCPUUNIONNEM
200	{
201	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
202	struct NEMCPU s;
203	#endif
204	uint8_t padding[4608]; /* multiple of 64 */
205	} nem;
206
207	/** TRPM part. */
208	union VMCPUUNIONTRPM
209	{
210	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
211	struct TRPMCPU s;
212	#endif
213	uint8_t padding[128]; /* multiple of 64 */
214	} trpm;
215
216	/** TM part. */
217	union VMCPUUNIONTM
218	{
219	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
220	struct TMCPU s;
221	#endif
222	uint8_t padding[5760]; /* multiple of 64 */
223	} tm;
224
225	/** VMM part. */
226	union VMCPUUNIONVMM
227	{
228	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
229	struct VMMCPU s;
230	#endif
231	uint8_t padding[9536]; /* multiple of 64 */
232	} vmm;
233
234	/** PDM part. */
235	union VMCPUUNIONPDM
236	{
237	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
238	struct PDMCPU s;
239	#endif
240	uint8_t padding[256]; /* multiple of 64 */
241	} pdm;
242
243	/** IOM part. */
244	union VMCPUUNIONIOM
245	{
246	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
247	struct IOMCPU s;
248	#endif
249	uint8_t padding[512]; /* multiple of 64 */
250	} iom;
251
252	/** DBGF part.
253	* @todo Combine this with other tiny structures. */
254	union VMCPUUNIONDBGF
255	{
256	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
257	struct DBGFCPU s;
258	#endif
259	uint8_t padding[512]; /* multiple of 64 */
260	} dbgf;
261
262	/** GIM part. */
263	union VMCPUUNIONGIM
264	{
265	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
266	struct GIMCPU s;
267	#endif
268	uint8_t padding[512]; /* multiple of 64 */
269	} gim;
270
271	#if defined(VBOX_VMM_TARGET_ARMV8)
272	/** GIC part. */
273	union VMCPUUNIONGIC
274	{
275	# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
276	struct GICCPU s;
277	# endif
278	uint8_t padding[3840]; /* multiple of 64 */
279	} gic;
280	#else
281	/** APIC part. */
282	union VMCPUUNIONAPIC
283	{
284	# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
285	struct APICCPU s;
286	# endif
287	uint8_t padding[3840]; /* multiple of 64 */
288	} apic;
289	#endif
290
291	/*
292	* Some less frequently used global members that doesn't need to take up
293	* precious space at the head of the structure.
294	*/
295
296	/** Trace groups enable flags. */
297	uint32_t fTraceGroups; /* 64 / 44 */
298	/** Number of collisions hashing the ring-0 EMT handle. */
299	uint8_t cEmtHashCollisions;
300	uint8_t abAdHoc[3];
301	/** Profiling samples for use by ad hoc profiling. */
302	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
303
304	/** Align the following members on page boundary. */
305	uint8_t abAlignment2[696];
306
307	/** PGM part. */
308	union VMCPUUNIONPGM
309	{
310	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
311	struct PGMCPU s;
312	#endif
313	uint8_t padding[4096 + 28672]; /* multiple of 4096 */
314	} pgm;
315
316	/** CPUM part. */
317	union VMCPUUNIONCPUM
318	{
319	#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
320	struct CPUMCPU s;
321	#endif
322	#ifdef VMCPU_INCL_CPUM_GST_CTX
323	/** The guest CPUM context for direct use by execution engines.
324	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
325	* others. The rest will use the function based CPUM API. */
326	CPUMCTX GstCtx;
327	#endif
328	uint8_t padding[102400]; /* multiple of 4096 */
329	} cpum;
330
331	/** EM part. */
332	union VMCPUUNIONEM
333	{
334	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
335	struct EMCPU s;
336	#endif
337	uint8_t padding[40960]; /* multiple of 4096 */
338	} em;
339
340	} VMCPU;
341
342
343	#ifndef VBOX_FOR_DTRACE_LIB
344	/* Make sure the structure size is aligned on a 16384 boundary for arm64 purposes. */
345	AssertCompileSizeAlignment(VMCPU, 16384);
346
347	/** @name Operations on VMCPU::enmState
348	* @{ */
349	/** Gets the VMCPU state. */
350	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
351	/** Sets the VMCPU state. */
352	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
353	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
354	/** Cmpares and sets the VMCPU state. */
355	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
356	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
357	/** Checks the VMCPU state. */
358	#ifdef VBOX_STRICT
359	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
360	do { \
361	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
362	AssertMsg(enmState == (enmExpectedState), \
363	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
364	enmState, enmExpectedState, (pVCpu)->idCpu)); \
365	} while (0)
366
367	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
368	do { \
369	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
370	AssertMsg( enmState == (enmExpectedState) \
371	\|\| enmState == (a_enmExpectedState2), \
372	("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
373	enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
374	} while (0)
375	#else
376	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
377	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
378	#endif
379	/** Tests if the state means that the CPU is started. */
380	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
381	/** Tests if the state means that the CPU is stopped. */
382	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
383	/** @} */
384
385
386	/** The name of the raw-mode context VMM Core module. */
387	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
388	/** The name of the ring-0 context VMM Core module. */
389	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
390
391
392	/** VM Forced Action Flags.
393	*
394	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
395	* action mask of a VM.
396	*
397	* Available VM bits:
398	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
399	*
400	*
401	* Available VMCPU bits:
402	* 14, 15, 36 to 63
403	*
404	* @todo If we run low on VMCPU, we may consider merging the SELM bits
405	*
406	* @{
407	*/
408	/** The virtual sync clock has been stopped, go to TM until it has been
409	* restarted... */
410	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
411	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
412	/** PDM Queues are pending. */
413	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
414	/** The bit number for VM_FF_PDM_QUEUES. */
415	#define VM_FF_PDM_QUEUES_BIT 3
416	/** PDM DMA transfers are pending. */
417	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
418	/** The bit number for VM_FF_PDM_DMA. */
419	#define VM_FF_PDM_DMA_BIT 4
420	/** This action forces the VM to call DBGF so DBGF can service debugger
421	* requests in the emulation thread.
422	* This action flag stays asserted till DBGF clears it.*/
423	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
424	/** The bit number for VM_FF_DBGF. */
425	#define VM_FF_DBGF_BIT 8
426	/** This action forces the VM to service pending requests from other
427	* thread or requests which must be executed in another context. */
428	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
429	#define VM_FF_REQUEST_BIT 9
430	/** Check for VM state changes and take appropriate action. */
431	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
432	/** The bit number for VM_FF_CHECK_VM_STATE. */
433	#define VM_FF_CHECK_VM_STATE_BIT 10
434	/** Reset the VM. (postponed) */
435	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
436	/** The bit number for VM_FF_RESET. */
437	#define VM_FF_RESET_BIT 11
438	/** EMT rendezvous in VMM. */
439	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
440	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
441	#define VM_FF_EMT_RENDEZVOUS_BIT 12
442
443	/** PGM needs to allocate handy pages. */
444	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
445	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
446	/** PGM is out of memory.
447	* Abandon all loops and code paths which can be resumed and get up to the EM
448	* loops. */
449	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
450	#define VM_FF_PGM_NO_MEMORY_BIT 19
451	/** PGM is about to perform a lightweight pool flush
452	* Guest SMP: all EMT threads should return to ring 3
453	*/
454	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
455	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
456	/** Suspend the VM - debug only. */
457	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
458	#define VM_FF_DEBUG_SUSPEND_BIT 31
459
460
461	/** This action forces the VM to check any pending interrupts on the APIC. */
462	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
463	#define VMCPU_FF_INTERRUPT_APIC_BIT 0
464	/** This action forces the VM to check any pending interrups on the PIC. */
465	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
466	#define VMCPU_FF_INTERRUPT_PIC_BIT 1
467	/** This action forces the VM to schedule and run pending timer (TM).
468	* @remarks Don't move - PATM compatibility. */
469	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
470	#define VMCPU_FF_TIMER_BIT 2
471	/** This action forces the VM to check any pending NMIs. */
472	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
473	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
474	/** This action forces the VM to check any pending SMIs. */
475	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
476	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
477	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
478	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
479	#define VMCPU_FF_PDM_CRITSECT_BIT 5
480	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
481	* the virtual CPU out of the next (/current) halted state. It is not processed
482	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
483	* is cleared the next time EM leaves the HALTED state. */
484	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
485	#define VMCPU_FF_UNHALT_BIT 6
486	/** Pending IEM action (mask). */
487	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
488	/** Pending IEM action (bit number). */
489	#define VMCPU_FF_IEM_BIT 7
490	/** Pending APIC action (bit number). */
491	#define VMCPU_FF_UPDATE_APIC_BIT 8
492	/** This action forces the VM to update APIC's asynchronously arrived
493	* interrupts as pending interrupts. */
494	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
495	/** This action forces the VM to service pending requests from other
496	* thread or requests which must be executed in another context. */
497	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
498	#define VMCPU_FF_REQUEST_BIT 9
499	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
500	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
501	/** The bit number for VMCPU_FF_DBGF. */
502	#define VMCPU_FF_DBGF_BIT 10
503	/** Hardware virtualized nested-guest interrupt pending. */
504	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
505	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
506	/** This action forces PGM to update changes to CR3 when the guest was in HM mode
507	* (when using nested paging). */
508	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
509	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
510	/* Bit 13 used to be VMCPU_FF_HM_UPDATE_PAE_PDPES. */
511	/** This action forces the VM to resync the page tables before going
512	* back to execute guest code. (GLOBAL FLUSH) */
513	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
514	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
515	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
516	* (NON-GLOBAL FLUSH) */
517	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
518	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
519	/** Check for pending TLB shootdown actions (deprecated)
520	* Reserved for future HM re-use if necessary / safe.
521	* Consumer: HM */
522	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
523	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
524	/** Check for pending TLB flush action.
525	* Consumer: HM
526	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
527	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
528	/** The bit number for VMCPU_FF_TLB_FLUSH. */
529	#define VMCPU_FF_TLB_FLUSH_BIT 19
530	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
531	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
532	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
533	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
534	/* 24 used to be VMCPU_FF_INHIBIT_INTERRUPTS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
535	/* 25 used to be VMCPU_FF_BLOCK_NMIS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
536	/** Force return to Ring-3. */
537	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
538	#define VMCPU_FF_TO_R3_BIT 28
539	/** Force return to ring-3 to service pending I/O or MMIO write.
540	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
541	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
542	* status codes to be propagated at the same time without loss. */
543	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
544	#define VMCPU_FF_IOM_BIT 29
545	/* 30 used to be VMCPU_FF_CPUM */
546	/** VMX-preemption timer expired. */
547	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
548	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
549	/** Pending MTF (Monitor Trap Flag) event. */
550	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
551	#define VMCPU_FF_VMX_MTF_BIT 32
552	/** VMX APIC-write emulation pending.
553	* @todo possible candidate for internal EFLAGS, or maybe just a summary bit
554	* (see also VMCPU_FF_VMX_INT_WINDOW). */
555	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
556	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
557	/** VMX interrupt-window event pending.
558	*
559	* "Pending" is misleading here, it would be better to say that the event need
560	* to be generated at the next opportunity and that this flag causes it to be
561	* polled for on every instruction boundrary and such.
562	*
563	* @todo Change the IEM side of this to not poll but to track down the places
564	* where it can be generated and set an internal EFLAGS bit that causes it
565	* to be checked out when finishing the current instruction. */
566	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
567	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
568	/** VMX NMI-window event pending.
569	* Same "pending" comment and todo in VMCPU_FF_VMX_INT_WINDOW. */
570	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
571	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
572
573
574	/** Externally VM forced actions. Used to quit the idle/wait loop. */
575	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
576	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
577	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
578
579	/** Externally forced VM actions. Used to quit the idle/wait loop. */
580	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
581	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
582	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
583	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
584	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
585	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
586	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
587
588	/** High priority VM pre-execution actions. */
589	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
590	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
591	\| VM_FF_EMT_RENDEZVOUS )
592	/** High priority VMCPU pre-execution actions. */
593	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
594	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_DBGF \
595	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
596	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
597	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
598
599	/** High priority VM pre raw-mode execution mask. */
600	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
601	/** High priority VMCPU pre raw-mode execution mask. */
602	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL )
603
604	/** High priority post-execution actions. */
605	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
606	/** High priority post-execution actions. */
607	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM )
608
609	/** Normal priority VM post-execution actions. */
610	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
611	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
612	/** Normal priority VMCPU post-execution actions. */
613	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
614
615	/** Normal priority VM actions. */
616	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
617	/** Normal priority VMCPU actions. */
618	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
619
620	/** Flags to clear before resuming guest execution. */
621	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
622
623
624	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
625	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
626	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
627	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
628	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
629	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
630	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
631	#ifdef IN_RING3
632	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \
633	\| VMCPU_FF_VMX_MTF )
634	#else
635	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
636	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF )
637	#endif
638	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
639	* enabled. */
640	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
641	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
642	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
643	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
644	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
645	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
646	* disabled. */
647	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
648	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
649	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
650
651	/** VM Flags that cause the HM loops to go back to ring-3. */
652	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
653	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
654	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
655	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
656	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
657
658	/** High priority ring-0 VM pre HM-mode execution mask. */
659	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
660	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
661	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
662	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
663	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
664	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
665	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
666	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
667	\| VM_FF_PDM_DMA) )
668	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
669	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
670	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
671
672	/** All the VMX nested-guest flags. */
673	#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
674	\| VMCPU_FF_VMX_INT_WINDOW \| VMCPU_FF_VMX_NMI_WINDOW )
675
676	/** All the forced VM flags. */
677	#define VM_FF_ALL_MASK (UINT32_MAX)
678	/** All the forced VMCPU flags. */
679	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
680
681	/** All the forced VM flags except those related to raw-mode and hardware
682	* assisted execution. */
683	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
684	/** All the forced VMCPU flags except those related to raw-mode and hardware
685	* assisted execution. */
686	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
687	/** @} */
688
689	/** @def VM_FF_SET
690	* Sets a single force action flag.
691	*
692	* @param pVM The cross context VM structure.
693	* @param fFlag The flag to set.
694	*/
695	#define VM_FF_SET(pVM, fFlag) do { \
696	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
697	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
698	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
699	} while (0)
700
701	/** @def VMCPU_FF_SET
702	* Sets a single force action flag for the given VCPU.
703	*
704	* @param pVCpu The cross context virtual CPU structure.
705	* @param fFlag The flag to set.
706	* @sa VMCPU_FF_SET_MASK
707	*/
708	#ifdef VMCPU_WITH_64_BIT_FFS
709	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
710	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
711	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
712	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
713	} while (0)
714	#else
715	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
716	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
717	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
718	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
719	} while (0)
720	#endif
721
722	/** @def VMCPU_FF_SET_MASK
723	* Sets a two or more force action flag for the given VCPU.
724	*
725	* @param pVCpu The cross context virtual CPU structure.
726	* @param fFlags The flags to set.
727	* @sa VMCPU_FF_SET
728	*/
729	#ifdef VMCPU_WITH_64_BIT_FFS
730	# if ARCH_BITS > 32
731	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
732	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
733	# else
734	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
735	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
736	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
737	} while (0)
738	# endif
739	#else
740	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
741	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
742	#endif
743
744	/** @def VM_FF_CLEAR
745	* Clears a single force action flag.
746	*
747	* @param pVM The cross context VM structure.
748	* @param fFlag The flag to clear.
749	*/
750	#define VM_FF_CLEAR(pVM, fFlag) do { \
751	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
752	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
753	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
754	} while (0)
755
756	/** @def VMCPU_FF_CLEAR
757	* Clears a single force action flag for the given VCPU.
758	*
759	* @param pVCpu The cross context virtual CPU structure.
760	* @param fFlag The flag to clear.
761	*/
762	#ifdef VMCPU_WITH_64_BIT_FFS
763	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
764	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
765	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
766	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
767	} while (0)
768	#else
769	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
770	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
771	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
772	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
773	} while (0)
774	#endif
775
776	/** @def VMCPU_FF_CLEAR_MASK
777	* Clears two or more force action flags for the given VCPU.
778	*
779	* @param pVCpu The cross context virtual CPU structure.
780	* @param fFlags The flags to clear.
781	*/
782	#ifdef VMCPU_WITH_64_BIT_FFS
783	# if ARCH_BITS > 32
784	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
785	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
786	# else
787	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
788	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
789	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
790	} while (0)
791	# endif
792	#else
793	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
794	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
795	#endif
796
797	/** @def VM_FF_IS_SET
798	* Checks if single a force action flag is set.
799	*
800	* @param pVM The cross context VM structure.
801	* @param fFlag The flag to check.
802	* @sa VM_FF_IS_ANY_SET
803	*/
804	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
805	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
806	#else
807	# define VM_FF_IS_SET(pVM, fFlag) \
808	([](PVM a_pVM) -> bool \
809	{ \
810	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
811	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
812	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
813	}(pVM))
814	#endif
815
816	/** @def VMCPU_FF_IS_SET
817	* Checks if a single force action flag is set for the given VCPU.
818	*
819	* @param pVCpu The cross context virtual CPU structure.
820	* @param fFlag The flag to check.
821	* @sa VMCPU_FF_IS_ANY_SET
822	*/
823	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
824	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
825	#else
826	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
827	([](PCVMCPU a_pVCpu) -> bool \
828	{ \
829	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
830	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
831	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
832	}(pVCpu))
833	#endif
834
835	/** @def VM_FF_IS_ANY_SET
836	* Checks if one or more force action in the specified set is pending.
837	*
838	* @param pVM The cross context VM structure.
839	* @param fFlags The flags to check for.
840	* @sa VM_FF_IS_SET
841	*/
842	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
843
844	/** @def VMCPU_FF_IS_ANY_SET
845	* Checks if two or more force action flags in the specified set is set for the given VCPU.
846	*
847	* @param pVCpu The cross context virtual CPU structure.
848	* @param fFlags The flags to check for.
849	* @sa VMCPU_FF_IS_SET
850	*/
851	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
852
853	/** @def VM_FF_TEST_AND_CLEAR
854	* Checks if one (!) force action in the specified set is pending and clears it atomically
855	*
856	* @returns true if the bit was set.
857	* @returns false if the bit was clear.
858	* @param pVM The cross context VM structure.
859	* @param fFlag Flag constant to check and clear (_BIT is appended).
860	*/
861	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
862
863	/** @def VMCPU_FF_TEST_AND_CLEAR
864	* Checks if one (!) force action in the specified set is pending and clears it atomically
865	*
866	* @returns true if the bit was set.
867	* @returns false if the bit was clear.
868	* @param pVCpu The cross context virtual CPU structure.
869	* @param fFlag Flag constant to check and clear (_BIT is appended).
870	*/
871	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
872
873	/** @def VM_FF_IS_PENDING_EXCEPT
874	* Checks if one or more force action in the specified set is pending while one
875	* or more other ones are not.
876	*
877	* @param pVM The cross context VM structure.
878	* @param fFlags The flags to check for.
879	* @param fExcpt The flags that should not be set.
880	*/
881	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
882	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
883
884	/** @def VM_IS_EMT
885	* Checks if the current thread is the emulation thread (EMT).
886	*
887	* @remark The ring-0 variation will need attention if we expand the ring-0
888	* code to let threads other than EMT mess around with the VM.
889	*/
890	#ifdef IN_RC
891	# define VM_IS_EMT(pVM) true
892	#else
893	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
894	#endif
895
896	/** @def VMCPU_IS_EMT
897	* Checks if the current thread is the emulation thread (EMT) for the specified
898	* virtual CPU.
899	*/
900	#ifdef IN_RC
901	# define VMCPU_IS_EMT(pVCpu) true
902	#else
903	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
904	#endif
905
906	/** @def VM_ASSERT_EMT
907	* Asserts that the current thread IS the emulation thread (EMT).
908	*/
909	#ifdef IN_RC
910	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
911	#elif defined(IN_RING0)
912	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
913	#else
914	# define VM_ASSERT_EMT(pVM) \
915	AssertMsg(VM_IS_EMT(pVM), \
916	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
917	#endif
918
919	/** @def VMCPU_ASSERT_EMT
920	* Asserts that the current thread IS the emulation thread (EMT) of the
921	* specified virtual CPU.
922	*/
923	#ifdef IN_RC
924	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
925	#elif defined(IN_RING0)
926	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
927	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
928	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
929	(pVCpu) ? (pVCpu)->idCpu : 0))
930	#else
931	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
932	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
933	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
934	#endif
935
936	/** @def VM_ASSERT_EMT_RETURN
937	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
938	*/
939	#ifdef IN_RC
940	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
941	#elif defined(IN_RING0)
942	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
943	#else
944	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
945	AssertMsgReturn(VM_IS_EMT(pVM), \
946	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
947	(rc))
948	#endif
949
950	/** @def VMCPU_ASSERT_EMT_RETURN
951	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
952	*/
953	#ifdef IN_RC
954	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
955	#elif defined(IN_RING0)
956	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
957	#else
958	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
959	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
960	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
961	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
962	(rc))
963	#endif
964
965	/** @def VMCPU_ASSERT_EMT_OR_GURU
966	* Asserts that the current thread IS the emulation thread (EMT) of the
967	* specified virtual CPU.
968	*/
969	#if defined(IN_RC) \|\| defined(IN_RING0)
970	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
971	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
972	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
973	#else
974	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
975	AssertMsg( VMCPU_IS_EMT(pVCpu) \
976	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
977	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
978	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
979	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
980	#endif
981
982	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
983	* Asserts that the current thread IS the emulation thread (EMT) of the
984	* specified virtual CPU or the VM is not running.
985	*/
986	#if defined(IN_RC) \|\| defined(IN_RING0)
987	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
988	Assert( VMCPU_IS_EMT(pVCpu) \
989	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
990	#else
991	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
992	AssertMsg( VMCPU_IS_EMT(pVCpu) \
993	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
994	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
995	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
996	#endif
997
998	/** @def VMSTATE_IS_RUNNING
999	* Checks if the given state indicates a running VM.
1000	*/
1001	#define VMSTATE_IS_RUNNING(a_enmVMState) \
1002	( (a_enmVMState) == VMSTATE_RUNNING \
1003	\|\| (a_enmVMState) == VMSTATE_RUNNING_LS )
1004
1005	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
1006	* Checks if the VM is running.
1007	* @note This is only for pure debug assertions. No AssertReturn or similar!
1008	* @sa VMSTATE_IS_RUNNING
1009	*/
1010	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
1011	( (pVM)->enmVMState == VMSTATE_RUNNING \
1012	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
1013
1014
1015	/** @def VMSTATE_IS_POWERED_ON
1016	* Checks if the given state indicates the VM is powered on.
1017	*
1018	* @note Excludes all error states, so a powered on VM that hit a fatal error,
1019	* guru meditation, state load failure or similar will not be considered
1020	* powered on by this test.
1021	*/
1022	#define VMSTATE_IS_POWERED_ON(a_enmVMState) \
1023	( (a_enmVMState) >= VMSTATE_RESUMING && (a_enmVMState) < VMSTATE_POWERING_OFF )
1024
1025	/** @def VM_ASSERT_IS_NOT_RUNNING
1026	* Asserts that the VM is not running.
1027	*/
1028	#if defined(IN_RC) \|\| defined(IN_RING0)
1029	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
1030	#else
1031	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
1032	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
1033	#endif
1034
1035	/** @def VM_ASSERT_EMT0
1036	* Asserts that the current thread IS emulation thread \#0 (EMT0).
1037	*/
1038	#ifdef IN_RING3
1039	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1040	#else
1041	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1042	#endif
1043
1044	/** @def VM_ASSERT_EMT0_RETURN
1045	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1046	* it isn't.
1047	*/
1048	#ifdef IN_RING3
1049	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1050	#else
1051	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1052	#endif
1053
1054
1055	/**
1056	* Asserts that the current thread is NOT the emulation thread.
1057	*/
1058	#define VM_ASSERT_OTHER_THREAD(pVM) \
1059	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1060
1061
1062	/** @def VM_ASSERT_STATE
1063	* Asserts a certain VM state.
1064	*/
1065	#define VM_ASSERT_STATE(pVM, _enmState) \
1066	AssertMsg((pVM)->enmVMState == (_enmState), \
1067	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1068
1069	/** @def VM_ASSERT_STATE_RETURN
1070	* Asserts a certain VM state and returns if it doesn't match.
1071	*/
1072	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1073	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1074	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1075	(rc))
1076
1077	/** @def VM_IS_VALID_EXT
1078	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1079	* or terminated. */
1080	#define VM_IS_VALID_EXT(pVM) \
1081	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1082	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1083	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1084	&& VM_IS_EMT(pVM))) )
1085
1086	/** @def VM_ASSERT_VALID_EXT_RETURN
1087	* Asserts a the VM handle is valid for external access, i.e. not being
1088	* destroy or terminated.
1089	*/
1090	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1091	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1092	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1093	? VMGetStateName(pVM->enmVMState) : ""), \
1094	(rc))
1095
1096	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1097	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1098	* destroy or terminated.
1099	*/
1100	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1101	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1102	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1103	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1104	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1105	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1106	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1107	(rc))
1108
1109	#endif /* !VBOX_FOR_DTRACE_LIB */
1110
1111
1112	/**
1113	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1114	*
1115	* ONLY HM and NEM MAY USE THIS!
1116	*
1117	* @param a_pVM The cross context VM structure.
1118	* @param a_bValue The new value.
1119	* @internal
1120	*/
1121	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1122	do { \
1123	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1124	ASMCompilerBarrier(); /* just to be on the safe side */ \
1125	} while (0)
1126
1127	/**
1128	* Checks whether iem-executes-all-mode is used.
1129	*
1130	* @retval true if IEM is used.
1131	* @retval false if not.
1132	*
1133	* @param a_pVM The cross context VM structure.
1134	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1135	* @internal
1136	*/
1137	#define VM_IS_EXEC_ENGINE_IEM(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_IEM)
1138
1139	/**
1140	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1141	*
1142	* @retval true if either is used.
1143	* @retval false if software virtualization (raw-mode) is used.
1144	*
1145	* @param a_pVM The cross context VM structure.
1146	* @sa VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1147	* @internal
1148	*/
1149	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_IEM)
1150
1151	/**
1152	* Checks whether HM is being used by this VM.
1153	*
1154	* @retval true if HM (VT-x/AMD-v) is used.
1155	* @retval false if not.
1156	*
1157	* @param a_pVM The cross context VM structure.
1158	* @sa VM_IS_NEM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
1159	* @internal
1160	*/
1161	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1162
1163	/**
1164	* Checks whether NEM is being used by this VM.
1165	*
1166	* @retval true if a native hypervisor API is used.
1167	* @retval false if not.
1168	*
1169	* @param a_pVM The cross context VM structure.
1170	* @sa VM_IS_HM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
1171	* @internal
1172	*/
1173	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1174
1175
1176	/**
1177	* The cross context VM structure.
1178	*
1179	* It contains all the VM data which have to be available in all contexts.
1180	* Even if it contains all the data the idea is to use APIs not to modify all
1181	* the members all around the place. Therefore we make use of unions to hide
1182	* everything which isn't local to the current source module. This means we'll
1183	* have to pay a little bit of attention when adding new members to structures
1184	* in the unions and make sure to keep the padding sizes up to date.
1185	*
1186	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1187	*/
1188	typedef struct VM
1189	{
1190	/** The state of the VM.
1191	* This field is read only to everyone except the VM and EM. */
1192	VMSTATE volatile enmVMState;
1193	/** Forced action flags.
1194	* See the VM_FF_* \#defines. Updated atomically.
1195	*/
1196	volatile uint32_t fGlobalForcedActions;
1197	/** Pointer to the array of page descriptors for the VM structure allocation. */
1198	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1199	/** Session handle. For use when calling SUPR0 APIs. */
1200	#ifdef IN_RING0
1201	PSUPDRVSESSION pSessionUnsafe;
1202	#else
1203	PSUPDRVSESSION pSession;
1204	#endif
1205	/** Pointer to the ring-3 VM structure. */
1206	PUVM pUVM;
1207	/** Ring-3 Host Context VM Pointer. */
1208	#ifdef IN_RING0
1209	R3PTRTYPE(struct VM *) pVMR3Unsafe;
1210	#else
1211	R3PTRTYPE(struct VM *) pVMR3;
1212	#endif
1213	/** Ring-0 Host Context VM pointer for making ring-0 calls. */
1214	R0PTRTYPE(struct VM *) pVMR0ForCall;
1215	/** Raw-mode Context VM Pointer. */
1216	uint32_t pVMRC;
1217	/** Padding for new raw-mode (long mode). */
1218	uint32_t pVMRCPadding;
1219
1220	/** The GVM VM handle. Only the GVM should modify this field. */
1221	#ifdef IN_RING0
1222	uint32_t hSelfUnsafe;
1223	#else
1224	uint32_t hSelf;
1225	#endif
1226	/** Number of virtual CPUs. */
1227	#ifdef IN_RING0
1228	uint32_t cCpusUnsafe;
1229	#else
1230	uint32_t cCpus;
1231	#endif
1232	/** CPU excution cap (1-100) */
1233	uint32_t uCpuExecutionCap;
1234
1235	/** Size of the VM structure. */
1236	uint32_t cbSelf;
1237	/** Size of the VMCPU structure. */
1238	uint32_t cbVCpu;
1239	/** Structure version number (TBD). */
1240	uint32_t uStructVersion;
1241
1242	/** @name Various items that are frequently accessed.
1243	* @{ */
1244	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1245	* This is set early during vmR3InitRing3 by HM or NEM. */
1246	uint8_t const bMainExecutionEngine;
1247
1248	/** Hardware VM support is available and enabled.
1249	* Determined very early during init.
1250	* This is placed here for performance reasons.
1251	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1252	bool fHMEnabled;
1253	/** @} */
1254
1255	/** Alignment padding. */
1256	uint8_t uPadding1[6];
1257
1258	/** @name Debugging
1259	* @{ */
1260	/** Ring-3 Host Context VM Pointer. */
1261	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1262	/** Ring-0 Host Context VM Pointer. */
1263	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1264	/** @} */
1265
1266	/** Max EMT hash lookup collisions (in GVMM). */
1267	uint8_t cMaxEmtHashCollisions;
1268
1269	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1270	uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
1271
1272	/** CPUM part. */
1273	union
1274	{
1275	#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
1276	struct CPUM s;
1277	#endif
1278	#ifdef VBOX_INCLUDED_vmm_cpum_h
1279	/** Read only info exposed about the host and guest CPUs. */
1280	struct
1281	{
1282	/** Padding for hidden fields. */
1283	uint8_t abHidden0[64 + 48];
1284	/** Guest CPU feature information. */
1285	CPUMFEATURES GuestFeatures;
1286	} const ro;
1287	#endif
1288	/** @todo this is rather bloated because of static MSR range allocation.
1289	* Probably a good idea to move it to a separate R0 allocation... */
1290	uint8_t padding[8832 + 1288192 + 0x1d00]; / multiple of 64 */
1291	} cpum;
1292
1293	/** PGM part.
1294	* @note 16384 aligned for zero and mmio page storage. */
1295	union
1296	{
1297	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1298	struct PGM s;
1299	#endif
1300	uint8_t padding[53888]; /* multiple of 64 */
1301	} pgm;
1302
1303	/** VMM part. */
1304	union
1305	{
1306	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1307	struct VMM s;
1308	#endif
1309	uint8_t padding[1600]; /* multiple of 64 */
1310	} vmm;
1311
1312	/** HM part. */
1313	union
1314	{
1315	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1316	struct HM s;
1317	#endif
1318	uint8_t padding[5504]; /* multiple of 64 */
1319	} hm;
1320
1321	/** TRPM part. */
1322	union
1323	{
1324	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1325	struct TRPM s;
1326	#endif
1327	uint8_t padding[2048]; /* multiple of 64 */
1328	} trpm;
1329
1330	/** SELM part. */
1331	union
1332	{
1333	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1334	struct SELM s;
1335	#endif
1336	uint8_t padding[768]; /* multiple of 64 */
1337	} selm;
1338
1339	/** MM part. */
1340	union
1341	{
1342	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1343	struct MM s;
1344	#endif
1345	uint8_t padding[192]; /* multiple of 64 */
1346	} mm;
1347
1348	/** PDM part. */
1349	union
1350	{
1351	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1352	struct PDM s;
1353	#endif
1354	uint8_t padding[22400]; /* multiple of 64 */
1355	} pdm;
1356
1357	/** IOM part. */
1358	union
1359	{
1360	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1361	struct IOM s;
1362	#endif
1363	uint8_t padding[1152]; /* multiple of 64 */
1364	} iom;
1365
1366	/** EM part. */
1367	union
1368	{
1369	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1370	struct EM s;
1371	#endif
1372	uint8_t padding[256]; /* multiple of 64 */
1373	} em;
1374
1375	/** NEM part. */
1376	union
1377	{
1378	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1379	struct NEM s;
1380	#endif
1381	uint8_t padding[4608]; /* multiple of 64 */
1382	} nem;
1383
1384	/** TM part. */
1385	union
1386	{
1387	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1388	struct TM s;
1389	#endif
1390	uint8_t padding[10112]; /* multiple of 64 */
1391	} tm;
1392
1393	/** DBGF part. */
1394	union
1395	{
1396	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1397	struct DBGF s;
1398	#endif
1399	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1400	/** Read only info exposed about interrupt breakpoints and selected events. */
1401	struct
1402	{
1403	/** Bitmap of enabled hardware interrupt breakpoints. */
1404	uint32_t bmHardIntBreakpoints[256 / 32];
1405	/** Bitmap of enabled software interrupt breakpoints. */
1406	uint32_t bmSoftIntBreakpoints[256 / 32];
1407	/** Bitmap of selected events.
1408	* This includes non-selectable events too for simplicity, we maintain the
1409	* state for some of these, as it may come in handy. */
1410	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1411	/** Enabled hardware interrupt breakpoints. */
1412	uint32_t cHardIntBreakpoints;
1413	/** Enabled software interrupt breakpoints. */
1414	uint32_t cSoftIntBreakpoints;
1415	/** The number of selected events. */
1416	uint32_t cSelectedEvents;
1417	/** The number of enabled hardware breakpoints. */
1418	uint8_t cEnabledHwBreakpoints;
1419	/** The number of enabled hardware I/O breakpoints. */
1420	uint8_t cEnabledHwIoBreakpoints;
1421	uint8_t au8Alignment1[2]; /*< Alignment padding. /
1422	/** The number of enabled INT3 breakpoints. */
1423	uint32_t volatile cEnabledInt3Breakpoints;
1424	} const ro;
1425	#endif
1426	uint8_t padding[2432]; /* multiple of 64 */
1427	} dbgf;
1428
1429	/** SSM part. */
1430	union
1431	{
1432	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1433	struct SSM s;
1434	#endif
1435	uint8_t padding[128]; /* multiple of 64 */
1436	} ssm;
1437
1438	union
1439	{
1440	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1441	struct GIM s;
1442	#endif
1443	uint8_t padding[448]; /* multiple of 64 */
1444	} gim;
1445
1446	#if defined(VBOX_VMM_TARGET_ARMV8)
1447	union
1448	{
1449	# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
1450	struct GIC s;
1451	# endif
1452	uint8_t padding[128]; /* multiple of 8 */
1453	} gic;
1454	#else
1455	union
1456	{
1457	# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1458	struct APIC s;
1459	# endif
1460	uint8_t padding[128]; /* multiple of 8 */
1461	} apic;
1462	#endif
1463
1464	/* ---- begin small stuff ---- */
1465
1466	/** VM part. */
1467	union
1468	{
1469	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1470	struct VMINT s;
1471	#endif
1472	uint8_t padding[32]; /* multiple of 8 */
1473	} vm;
1474
1475	/** CFGM part. */
1476	union
1477	{
1478	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1479	struct CFGM s;
1480	#endif
1481	uint8_t padding[8]; /* multiple of 8 */
1482	} cfgm;
1483
1484	/** IEM part. */
1485	union
1486	{
1487	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
1488	struct IEM s;
1489	#endif
1490	uint8_t padding[16]; /* multiple of 8 */
1491	} iem;
1492
1493	/** Statistics for ring-0 only components. */
1494	struct
1495	{
1496	/** GMMR0 stats. */
1497	struct
1498	{
1499	/** Chunk TLB hits. */
1500	uint64_t cChunkTlbHits;
1501	/** Chunk TLB misses. */
1502	uint64_t cChunkTlbMisses;
1503	} gmm;
1504	uint64_t au64Padding[6]; /* probably more comming here... */
1505	} R0Stats;
1506
1507	union
1508	{
1509	#ifdef VMM_INCLUDED_SRC_include_GCMInternal_h
1510	struct GCM s;
1511	#endif
1512	uint8_t padding[32]; /* multiple of 8 */
1513	} gcm;
1514
1515	/** Padding for aligning the structure size on a page boundrary. */
1516	uint8_t abAlignment2[8872 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1517
1518	/* ---- end small stuff ---- */
1519
1520	/** Array of VMCPU ring-3 pointers. */
1521	PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1522
1523	/* This point is aligned on a 16384 boundrary (for arm64 purposes). */
1524	} VM;
1525	#ifndef VBOX_FOR_DTRACE_LIB
1526	//AssertCompileSizeAlignment(VM, 16384);
1527	#endif
1528
1529
1530	#ifdef IN_RC
1531	RT_C_DECLS_BEGIN
1532
1533	/** The VM structure.
1534	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1535	* globals which we should avoid using.
1536	*/
1537	extern DECLIMPORT(VM) g_VM;
1538
1539	/** The VMCPU structure for virtual CPU \#0.
1540	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1541	* globals which we should avoid using.
1542	*/
1543	extern DECLIMPORT(VMCPU) g_VCpu0;
1544
1545	RT_C_DECLS_END
1546	#endif
1547
1548	/** @} */
1549
1550	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1551

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source: vbox/trunk/include/VBox/vmm/vm.h@ 99385

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