1 | /** @file
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2 | * VM - The Virtual Machine, data.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2022 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef VBOX_INCLUDED_vmm_vm_h
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27 | #define VBOX_INCLUDED_vmm_vm_h
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28 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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29 | # pragma once
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30 | #endif
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31 |
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32 | #ifndef VBOX_FOR_DTRACE_LIB
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33 | # ifndef USING_VMM_COMMON_DEFS
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34 | # error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
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35 | # endif
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36 | # include <iprt/param.h>
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37 | # include <VBox/param.h>
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38 | # include <VBox/types.h>
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39 | # include <VBox/vmm/cpum.h>
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40 | # include <VBox/vmm/stam.h>
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41 | # include <VBox/vmm/vmapi.h>
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42 | # include <VBox/vmm/vmm.h>
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43 | # include <VBox/sup.h>
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44 | #else
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45 | # pragma D depends_on library vbox-types.d
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46 | # pragma D depends_on library CPUMInternal.d
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47 | # define VMM_INCLUDED_SRC_include_CPUMInternal_h
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48 | #endif
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49 |
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50 |
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51 |
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52 | /** @defgroup grp_vm The Virtual Machine
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53 | * @ingroup grp_vmm
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54 | * @{
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55 | */
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56 |
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57 | /**
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58 | * The state of a Virtual CPU.
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59 | *
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60 | * The basic state indicated here is whether the CPU has been started or not. In
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61 | * addition, there are sub-states when started for assisting scheduling (GVMM
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62 | * mostly).
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63 | *
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64 | * The transition out of the STOPPED state is done by a vmR3PowerOn.
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65 | * The transition back to the STOPPED state is done by vmR3PowerOff.
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66 | *
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67 | * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
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68 | * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
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69 | */
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70 | typedef enum VMCPUSTATE
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71 | {
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72 | /** The customary invalid zero. */
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73 | VMCPUSTATE_INVALID = 0,
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74 |
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75 | /** Virtual CPU has not yet been started. */
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76 | VMCPUSTATE_STOPPED,
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77 |
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78 | /** CPU started. */
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79 | VMCPUSTATE_STARTED,
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80 | /** CPU started in HM context. */
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81 | VMCPUSTATE_STARTED_HM,
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82 | /** Executing guest code and can be poked (RC or STI bits of HM). */
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83 | VMCPUSTATE_STARTED_EXEC,
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84 | /** Executing guest code using NEM. */
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85 | VMCPUSTATE_STARTED_EXEC_NEM,
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86 | VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
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87 | VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
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88 | /** Halted. */
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89 | VMCPUSTATE_STARTED_HALTED,
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90 |
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91 | /** The end of valid virtual CPU states. */
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92 | VMCPUSTATE_END,
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93 |
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94 | /** Ensure 32-bit type. */
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95 | VMCPUSTATE_32BIT_HACK = 0x7fffffff
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96 | } VMCPUSTATE;
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97 |
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98 | /** Enables 64-bit FFs. */
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99 | #define VMCPU_WITH_64_BIT_FFS
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100 |
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101 |
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102 | /**
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103 | * The cross context virtual CPU structure.
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104 | *
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105 | * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
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106 | */
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107 | typedef struct VMCPU
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108 | {
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109 | /** @name Volatile per-cpu data.
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110 | * @{ */
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111 | /** Per CPU forced action.
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112 | * See the VMCPU_FF_* \#defines. Updated atomically. */
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113 | #ifdef VMCPU_WITH_64_BIT_FFS
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114 | uint64_t volatile fLocalForcedActions;
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115 | #else
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116 | uint32_t volatile fLocalForcedActions;
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117 | uint32_t fForLocalForcedActionsExpansion;
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118 | #endif
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119 | /** The CPU state. */
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120 | VMCPUSTATE volatile enmState;
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121 |
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122 | /** Padding up to 64 bytes. */
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123 | uint8_t abAlignment0[64 - 12];
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124 | /** @} */
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125 |
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126 | /** IEM part.
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127 | * @remarks This comes first as it allows the use of 8-bit immediates for the
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128 | * first 64 bytes of the structure, reducing code size a wee bit. */
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129 | #ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
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130 | union VMCPUUNIONIEMFULL
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131 | #else
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132 | union VMCPUUNIONIEMSTUB
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133 | #endif
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134 | {
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135 | #ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
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136 | struct IEMCPU s;
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137 | #endif
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138 | uint8_t padding[26688]; /* multiple of 64 */
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139 | } iem;
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140 |
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141 | /** @name Static per-cpu data.
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142 | * (Putting this after IEM, hoping that it's less frequently used than it.)
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143 | * @{ */
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144 | /** Ring-3 Host Context VM Pointer. */
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145 | PVMR3 pVMR3;
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146 | /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
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147 | RTR0PTR pVCpuR0ForVtg;
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148 | /** Raw-mode Context VM Pointer. */
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149 | uint32_t pVMRC;
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150 | /** Padding for new raw-mode (long mode). */
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151 | uint32_t pVMRCPadding;
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152 | /** Pointer to the ring-3 UVMCPU structure. */
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153 | PUVMCPU pUVCpu;
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154 | /** The native thread handle. */
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155 | RTNATIVETHREAD hNativeThread;
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156 | /** The native R0 thread handle. (different from the R3 handle!) */
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157 | RTNATIVETHREAD hNativeThreadR0;
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158 | /** The IPRT thread handle (for VMMDevTesting). */
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159 | RTTHREAD hThread;
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160 | /** The CPU ID.
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161 | * This is the index into the VM::aCpu array. */
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162 | #ifdef IN_RING0
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163 | VMCPUID idCpuUnsafe;
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164 | #else
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165 | VMCPUID idCpu;
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166 | #endif
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167 |
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168 | /** Align the structures below bit on a 64-byte boundary and make sure it starts
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169 | * at the same offset in both 64-bit and 32-bit builds.
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170 | *
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171 | * @remarks The alignments of the members that are larger than 48 bytes should be
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172 | * 64-byte for cache line reasons. structs containing small amounts of
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173 | * data could be lumped together at the end with a < 64 byte padding
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174 | * following it (to grow into and align the struct size).
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175 | */
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176 | uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
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177 | /** @} */
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178 |
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179 | /** HM part. */
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180 | union VMCPUUNIONHM
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181 | {
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182 | #ifdef VMM_INCLUDED_SRC_include_HMInternal_h
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183 | struct HMCPU s;
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184 | #endif
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185 | uint8_t padding[9984]; /* multiple of 64 */
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186 | } hm;
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187 |
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188 | /** NEM part. */
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189 | union VMCPUUNIONNEM
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190 | {
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191 | #ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
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192 | struct NEMCPU s;
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193 | #endif
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194 | uint8_t padding[4608]; /* multiple of 64 */
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195 | } nem;
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196 |
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197 | /** TRPM part. */
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198 | union VMCPUUNIONTRPM
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199 | {
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200 | #ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
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201 | struct TRPMCPU s;
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202 | #endif
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203 | uint8_t padding[128]; /* multiple of 64 */
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204 | } trpm;
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205 |
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206 | /** TM part. */
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207 | union VMCPUUNIONTM
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208 | {
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209 | #ifdef VMM_INCLUDED_SRC_include_TMInternal_h
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210 | struct TMCPU s;
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211 | #endif
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212 | uint8_t padding[5760]; /* multiple of 64 */
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213 | } tm;
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214 |
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215 | /** VMM part. */
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216 | union VMCPUUNIONVMM
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217 | {
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218 | #ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
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219 | struct VMMCPU s;
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220 | #endif
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221 | uint8_t padding[9536]; /* multiple of 64 */
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222 | } vmm;
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223 |
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224 | /** PDM part. */
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225 | union VMCPUUNIONPDM
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226 | {
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227 | #ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
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228 | struct PDMCPU s;
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229 | #endif
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230 | uint8_t padding[256]; /* multiple of 64 */
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231 | } pdm;
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232 |
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233 | /** IOM part. */
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234 | union VMCPUUNIONIOM
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235 | {
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236 | #ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
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237 | struct IOMCPU s;
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238 | #endif
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239 | uint8_t padding[512]; /* multiple of 64 */
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240 | } iom;
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241 |
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242 | /** DBGF part.
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243 | * @todo Combine this with other tiny structures. */
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244 | union VMCPUUNIONDBGF
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245 | {
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246 | #ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
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247 | struct DBGFCPU s;
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248 | #endif
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249 | uint8_t padding[512]; /* multiple of 64 */
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250 | } dbgf;
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251 |
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252 | /** GIM part. */
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253 | union VMCPUUNIONGIM
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254 | {
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255 | #ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
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256 | struct GIMCPU s;
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257 | #endif
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258 | uint8_t padding[512]; /* multiple of 64 */
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259 | } gim;
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260 |
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261 | /** APIC part. */
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262 | union VMCPUUNIONAPIC
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263 | {
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264 | #ifdef VMM_INCLUDED_SRC_include_APICInternal_h
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265 | struct APICCPU s;
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266 | #endif
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267 | uint8_t padding[3840]; /* multiple of 64 */
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268 | } apic;
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269 |
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270 | /*
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271 | * Some less frequently used global members that doesn't need to take up
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272 | * precious space at the head of the structure.
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273 | */
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274 |
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275 | /** Trace groups enable flags. */
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276 | uint32_t fTraceGroups; /* 64 / 44 */
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277 | /** Number of collisions hashing the ring-0 EMT handle. */
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278 | uint8_t cEmtHashCollisions;
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279 | uint8_t abAdHoc[3];
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280 | /** Profiling samples for use by ad hoc profiling. */
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281 | STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
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282 |
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283 | /** Align the following members on page boundary. */
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284 | uint8_t abAlignment2[2744];
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285 |
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286 | /** PGM part. */
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287 | union VMCPUUNIONPGM
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288 | {
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289 | #ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
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290 | struct PGMCPU s;
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291 | #endif
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292 | uint8_t padding[4096 + 28672]; /* multiple of 4096 */
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293 | } pgm;
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294 |
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295 | /** CPUM part. */
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296 | union VMCPUUNIONCPUM
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297 | {
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298 | #ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
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299 | struct CPUMCPU s;
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300 | #endif
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301 | #ifdef VMCPU_INCL_CPUM_GST_CTX
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302 | /** The guest CPUM context for direct use by execution engines.
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303 | * This is not for general consumption, but for HM, REM, IEM, and maybe a few
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304 | * others. The rest will use the function based CPUM API. */
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305 | CPUMCTX GstCtx;
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306 | #endif
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307 | uint8_t padding[102400]; /* multiple of 4096 */
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308 | } cpum;
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309 |
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310 | /** EM part. */
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311 | union VMCPUUNIONEM
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312 | {
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313 | #ifdef VMM_INCLUDED_SRC_include_EMInternal_h
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314 | struct EMCPU s;
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315 | #endif
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316 | uint8_t padding[40960]; /* multiple of 4096 */
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317 | } em;
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318 |
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319 | /** Align the structure size on 16384 boundrary for arm64 purposes. */
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320 | uint8_t abStructPadding[4096];
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321 | } VMCPU;
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322 |
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323 |
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324 | #ifndef VBOX_FOR_DTRACE_LIB
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325 | AssertCompileSizeAlignment(VMCPU, 16384);
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326 |
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327 | /** @name Operations on VMCPU::enmState
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328 | * @{ */
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329 | /** Gets the VMCPU state. */
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330 | #define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
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331 | /** Sets the VMCPU state. */
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332 | #define VMCPU_SET_STATE(pVCpu, enmNewState) \
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333 | ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
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334 | /** Cmpares and sets the VMCPU state. */
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335 | #define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
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336 | ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
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337 | /** Checks the VMCPU state. */
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338 | #ifdef VBOX_STRICT
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339 | # define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
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340 | do { \
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341 | VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
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342 | AssertMsg(enmState == (enmExpectedState), \
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343 | ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
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344 | enmState, enmExpectedState, (pVCpu)->idCpu)); \
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345 | } while (0)
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346 |
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347 | # define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
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348 | do { \
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349 | VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
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350 | AssertMsg( enmState == (enmExpectedState) \
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351 | || enmState == (a_enmExpectedState2), \
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352 | ("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
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353 | enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
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354 | } while (0)
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355 | #else
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356 | # define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
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357 | # define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
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358 | #endif
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359 | /** Tests if the state means that the CPU is started. */
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360 | #define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
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361 | /** Tests if the state means that the CPU is stopped. */
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362 | #define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
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363 | /** @} */
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364 |
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365 |
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366 | /** The name of the raw-mode context VMM Core module. */
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367 | #define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
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368 | /** The name of the ring-0 context VMM Core module. */
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369 | #define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
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370 |
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371 |
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372 | /** VM Forced Action Flags.
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373 | *
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374 | * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
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375 | * action mask of a VM.
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376 | *
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377 | * Available VM bits:
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378 | * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
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379 | *
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380 | *
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381 | * Available VMCPU bits:
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382 | * 14, 15, 36 to 63
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383 | *
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384 | * @todo If we run low on VMCPU, we may consider merging the SELM bits
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385 | *
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386 | * @{
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387 | */
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388 | /** The virtual sync clock has been stopped, go to TM until it has been
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389 | * restarted... */
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390 | #define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
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391 | #define VM_FF_TM_VIRTUAL_SYNC_BIT 2
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392 | /** PDM Queues are pending. */
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393 | #define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
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394 | /** The bit number for VM_FF_PDM_QUEUES. */
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395 | #define VM_FF_PDM_QUEUES_BIT 3
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396 | /** PDM DMA transfers are pending. */
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397 | #define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
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398 | /** The bit number for VM_FF_PDM_DMA. */
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399 | #define VM_FF_PDM_DMA_BIT 4
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400 | /** This action forces the VM to call DBGF so DBGF can service debugger
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401 | * requests in the emulation thread.
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402 | * This action flag stays asserted till DBGF clears it.*/
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403 | #define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
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404 | /** The bit number for VM_FF_DBGF. */
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405 | #define VM_FF_DBGF_BIT 8
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406 | /** This action forces the VM to service pending requests from other
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407 | * thread or requests which must be executed in another context. */
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408 | #define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
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409 | #define VM_FF_REQUEST_BIT 9
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410 | /** Check for VM state changes and take appropriate action. */
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411 | #define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
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412 | /** The bit number for VM_FF_CHECK_VM_STATE. */
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413 | #define VM_FF_CHECK_VM_STATE_BIT 10
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414 | /** Reset the VM. (postponed) */
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415 | #define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
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416 | /** The bit number for VM_FF_RESET. */
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417 | #define VM_FF_RESET_BIT 11
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418 | /** EMT rendezvous in VMM. */
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419 | #define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
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420 | /** The bit number for VM_FF_EMT_RENDEZVOUS. */
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421 | #define VM_FF_EMT_RENDEZVOUS_BIT 12
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422 |
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423 | /** PGM needs to allocate handy pages. */
|
---|
424 | #define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
|
---|
425 | #define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
|
---|
426 | /** PGM is out of memory.
|
---|
427 | * Abandon all loops and code paths which can be resumed and get up to the EM
|
---|
428 | * loops. */
|
---|
429 | #define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
|
---|
430 | #define VM_FF_PGM_NO_MEMORY_BIT 19
|
---|
431 | /** PGM is about to perform a lightweight pool flush
|
---|
432 | * Guest SMP: all EMT threads should return to ring 3
|
---|
433 | */
|
---|
434 | #define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
|
---|
435 | #define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
|
---|
436 | /** Suspend the VM - debug only. */
|
---|
437 | #define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
|
---|
438 | #define VM_FF_DEBUG_SUSPEND_BIT 31
|
---|
439 |
|
---|
440 |
|
---|
441 | /** This action forces the VM to check any pending interrupts on the APIC. */
|
---|
442 | #define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
|
---|
443 | #define VMCPU_FF_INTERRUPT_APIC_BIT 0
|
---|
444 | /** This action forces the VM to check any pending interrups on the PIC. */
|
---|
445 | #define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
|
---|
446 | #define VMCPU_FF_INTERRUPT_PIC_BIT 1
|
---|
447 | /** This action forces the VM to schedule and run pending timer (TM).
|
---|
448 | * @remarks Don't move - PATM compatibility. */
|
---|
449 | #define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
|
---|
450 | #define VMCPU_FF_TIMER_BIT 2
|
---|
451 | /** This action forces the VM to check any pending NMIs. */
|
---|
452 | #define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
|
---|
453 | #define VMCPU_FF_INTERRUPT_NMI_BIT 3
|
---|
454 | /** This action forces the VM to check any pending SMIs. */
|
---|
455 | #define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
|
---|
456 | #define VMCPU_FF_INTERRUPT_SMI_BIT 4
|
---|
457 | /** PDM critical section unlocking is pending, process promptly upon return to R3. */
|
---|
458 | #define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
|
---|
459 | #define VMCPU_FF_PDM_CRITSECT_BIT 5
|
---|
460 | /** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
|
---|
461 | * the virtual CPU out of the next (/current) halted state. It is not processed
|
---|
462 | * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
|
---|
463 | * is cleared the next time EM leaves the HALTED state. */
|
---|
464 | #define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
|
---|
465 | #define VMCPU_FF_UNHALT_BIT 6
|
---|
466 | /** Pending IEM action (mask). */
|
---|
467 | #define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
|
---|
468 | /** Pending IEM action (bit number). */
|
---|
469 | #define VMCPU_FF_IEM_BIT 7
|
---|
470 | /** Pending APIC action (bit number). */
|
---|
471 | #define VMCPU_FF_UPDATE_APIC_BIT 8
|
---|
472 | /** This action forces the VM to update APIC's asynchronously arrived
|
---|
473 | * interrupts as pending interrupts. */
|
---|
474 | #define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
|
---|
475 | /** This action forces the VM to service pending requests from other
|
---|
476 | * thread or requests which must be executed in another context. */
|
---|
477 | #define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
|
---|
478 | #define VMCPU_FF_REQUEST_BIT 9
|
---|
479 | /** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
|
---|
480 | #define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
|
---|
481 | /** The bit number for VMCPU_FF_DBGF. */
|
---|
482 | #define VMCPU_FF_DBGF_BIT 10
|
---|
483 | /** This action forces the VM to service any pending updates to CR3 (used only
|
---|
484 | * by HM). */
|
---|
485 | /** Hardware virtualized nested-guest interrupt pending. */
|
---|
486 | #define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
|
---|
487 | #define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
|
---|
488 | /** This action forces PGM to update changes to CR3 when the guest was in HM mode
|
---|
489 | * (when using nested paging). */
|
---|
490 | #define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
|
---|
491 | #define VMCPU_FF_HM_UPDATE_CR3_BIT 12
|
---|
492 | /* Bit 13 used to be VMCPU_FF_HM_UPDATE_PAE_PDPES. */
|
---|
493 | /** This action forces the VM to resync the page tables before going
|
---|
494 | * back to execute guest code. (GLOBAL FLUSH) */
|
---|
495 | #define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
|
---|
496 | #define VMCPU_FF_PGM_SYNC_CR3_BIT 16
|
---|
497 | /** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
|
---|
498 | * (NON-GLOBAL FLUSH) */
|
---|
499 | #define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
|
---|
500 | #define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
|
---|
501 | /** Check for pending TLB shootdown actions (deprecated)
|
---|
502 | * Reserved for furture HM re-use if necessary / safe.
|
---|
503 | * Consumer: HM */
|
---|
504 | #define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
|
---|
505 | #define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
|
---|
506 | /** Check for pending TLB flush action.
|
---|
507 | * Consumer: HM
|
---|
508 | * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
|
---|
509 | #define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
|
---|
510 | /** The bit number for VMCPU_FF_TLB_FLUSH. */
|
---|
511 | #define VMCPU_FF_TLB_FLUSH_BIT 19
|
---|
512 | /* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
|
---|
513 | /* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
|
---|
514 | /* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
|
---|
515 | /* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
|
---|
516 | /** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
|
---|
517 | #define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
|
---|
518 | #define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
|
---|
519 | /** Block injection of non-maskable interrupts to the guest. */
|
---|
520 | #define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
|
---|
521 | #define VMCPU_FF_BLOCK_NMIS_BIT 25
|
---|
522 | /** Force return to Ring-3. */
|
---|
523 | #define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
|
---|
524 | #define VMCPU_FF_TO_R3_BIT 28
|
---|
525 | /** Force return to ring-3 to service pending I/O or MMIO write.
|
---|
526 | * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
|
---|
527 | * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
|
---|
528 | * status codes to be propagated at the same time without loss. */
|
---|
529 | #define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
|
---|
530 | #define VMCPU_FF_IOM_BIT 29
|
---|
531 | /* 30 used to be VMCPU_FF_CPUM */
|
---|
532 | /** VMX-preemption timer expired. */
|
---|
533 | #define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
|
---|
534 | #define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
|
---|
535 | /** Pending MTF (Monitor Trap Flag) event. */
|
---|
536 | #define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
|
---|
537 | #define VMCPU_FF_VMX_MTF_BIT 32
|
---|
538 | /** VMX APIC-write emulation pending. */
|
---|
539 | #define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
|
---|
540 | #define VMCPU_FF_VMX_APIC_WRITE_BIT 33
|
---|
541 | /** VMX interrupt-window event pending. */
|
---|
542 | #define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
|
---|
543 | #define VMCPU_FF_VMX_INT_WINDOW_BIT 34
|
---|
544 | /** VMX NMI-window event pending. */
|
---|
545 | #define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
|
---|
546 | #define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
|
---|
547 |
|
---|
548 |
|
---|
549 | /** Externally VM forced actions. Used to quit the idle/wait loop. */
|
---|
550 | #define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
|
---|
551 | /** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
|
---|
552 | #define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
|
---|
553 |
|
---|
554 | /** Externally forced VM actions. Used to quit the idle/wait loop. */
|
---|
555 | #define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
|
---|
556 | | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
|
---|
557 | /** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
|
---|
558 | #define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
|
---|
559 | | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
|
---|
560 | | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
|
---|
561 | | VMCPU_FF_INTERRUPT_NESTED_GUEST)
|
---|
562 |
|
---|
563 | /** High priority VM pre-execution actions. */
|
---|
564 | #define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
|
---|
565 | | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
|
---|
566 | | VM_FF_EMT_RENDEZVOUS )
|
---|
567 | /** High priority VMCPU pre-execution actions. */
|
---|
568 | #define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
|
---|
569 | | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
|
---|
570 | | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
|
---|
571 | | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
|
---|
572 | | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
|
---|
573 |
|
---|
574 | /** High priority VM pre raw-mode execution mask. */
|
---|
575 | #define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
|
---|
576 | /** High priority VMCPU pre raw-mode execution mask. */
|
---|
577 | #define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
|
---|
578 | | VMCPU_FF_INHIBIT_INTERRUPTS )
|
---|
579 |
|
---|
580 | /** High priority post-execution actions. */
|
---|
581 | #define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
|
---|
582 | /** High priority post-execution actions. */
|
---|
583 | #define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_IEM | VMCPU_FF_IOM )
|
---|
584 |
|
---|
585 | /** Normal priority VM post-execution actions. */
|
---|
586 | #define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
|
---|
587 | | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
|
---|
588 | /** Normal priority VMCPU post-execution actions. */
|
---|
589 | #define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
|
---|
590 |
|
---|
591 | /** Normal priority VM actions. */
|
---|
592 | #define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
|
---|
593 | /** Normal priority VMCPU actions. */
|
---|
594 | #define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
|
---|
595 |
|
---|
596 | /** Flags to clear before resuming guest execution. */
|
---|
597 | #define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
|
---|
598 |
|
---|
599 |
|
---|
600 | /** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
|
---|
601 | #define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
|
---|
602 | | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
|
---|
603 | /** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
|
---|
604 | #define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
|
---|
605 | | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
|
---|
606 | /** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
|
---|
607 | #ifdef IN_RING3
|
---|
608 | # define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
|
---|
609 | | VMCPU_FF_VMX_MTF )
|
---|
610 | #else
|
---|
611 | # define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
|
---|
612 | | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
|
---|
613 | #endif
|
---|
614 | /** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
|
---|
615 | * enabled. */
|
---|
616 | #define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
|
---|
617 | | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
|
---|
618 | | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
|
---|
619 | | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
|
---|
620 | | VMCPU_FF_INTERRUPT_NESTED_GUEST )
|
---|
621 | /** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
|
---|
622 | * disabled. */
|
---|
623 | #define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
|
---|
624 | & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
|
---|
625 | | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
|
---|
626 |
|
---|
627 | /** VM Flags that cause the HM loops to go back to ring-3. */
|
---|
628 | #define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
|
---|
629 | | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
|
---|
630 | /** VMCPU Flags that cause the HM loops to go back to ring-3. */
|
---|
631 | #define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
|
---|
632 | | VMCPU_FF_IEM | VMCPU_FF_IOM)
|
---|
633 |
|
---|
634 | /** High priority ring-0 VM pre HM-mode execution mask. */
|
---|
635 | #define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
|
---|
636 | /** High priority ring-0 VMCPU pre HM-mode execution mask. */
|
---|
637 | #define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
|
---|
638 | | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
|
---|
639 | | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
|
---|
640 | /** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
|
---|
641 | #define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
|
---|
642 | | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
|
---|
643 | | VM_FF_PDM_DMA) )
|
---|
644 | /** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
|
---|
645 | #define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
|
---|
646 | | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
|
---|
647 |
|
---|
648 | /** All the VMX nested-guest flags. */
|
---|
649 | #define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
|
---|
650 | | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW )
|
---|
651 |
|
---|
652 | /** All the forced VM flags. */
|
---|
653 | #define VM_FF_ALL_MASK (UINT32_MAX)
|
---|
654 | /** All the forced VMCPU flags. */
|
---|
655 | #define VMCPU_FF_ALL_MASK (UINT32_MAX)
|
---|
656 |
|
---|
657 | /** All the forced VM flags except those related to raw-mode and hardware
|
---|
658 | * assisted execution. */
|
---|
659 | #define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
|
---|
660 | /** All the forced VMCPU flags except those related to raw-mode and hardware
|
---|
661 | * assisted execution. */
|
---|
662 | #define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
|
---|
663 | /** @} */
|
---|
664 |
|
---|
665 | /** @def VM_FF_SET
|
---|
666 | * Sets a single force action flag.
|
---|
667 | *
|
---|
668 | * @param pVM The cross context VM structure.
|
---|
669 | * @param fFlag The flag to set.
|
---|
670 | */
|
---|
671 | #define VM_FF_SET(pVM, fFlag) do { \
|
---|
672 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
673 | AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
|
---|
674 | ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
|
---|
675 | } while (0)
|
---|
676 |
|
---|
677 | /** @def VMCPU_FF_SET
|
---|
678 | * Sets a single force action flag for the given VCPU.
|
---|
679 | *
|
---|
680 | * @param pVCpu The cross context virtual CPU structure.
|
---|
681 | * @param fFlag The flag to set.
|
---|
682 | * @sa VMCPU_FF_SET_MASK
|
---|
683 | */
|
---|
684 | #ifdef VMCPU_WITH_64_BIT_FFS
|
---|
685 | # define VMCPU_FF_SET(pVCpu, fFlag) do { \
|
---|
686 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
687 | AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
|
---|
688 | ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
|
---|
689 | } while (0)
|
---|
690 | #else
|
---|
691 | # define VMCPU_FF_SET(pVCpu, fFlag) do { \
|
---|
692 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
693 | AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
|
---|
694 | ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
|
---|
695 | } while (0)
|
---|
696 | #endif
|
---|
697 |
|
---|
698 | /** @def VMCPU_FF_SET_MASK
|
---|
699 | * Sets a two or more force action flag for the given VCPU.
|
---|
700 | *
|
---|
701 | * @param pVCpu The cross context virtual CPU structure.
|
---|
702 | * @param fFlags The flags to set.
|
---|
703 | * @sa VMCPU_FF_SET
|
---|
704 | */
|
---|
705 | #ifdef VMCPU_WITH_64_BIT_FFS
|
---|
706 | # if ARCH_BITS > 32
|
---|
707 | # define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
|
---|
708 | do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
|
---|
709 | # else
|
---|
710 | # define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
|
---|
711 | if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
|
---|
712 | else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
|
---|
713 | } while (0)
|
---|
714 | # endif
|
---|
715 | #else
|
---|
716 | # define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
|
---|
717 | do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
|
---|
718 | #endif
|
---|
719 |
|
---|
720 | /** @def VM_FF_CLEAR
|
---|
721 | * Clears a single force action flag.
|
---|
722 | *
|
---|
723 | * @param pVM The cross context VM structure.
|
---|
724 | * @param fFlag The flag to clear.
|
---|
725 | */
|
---|
726 | #define VM_FF_CLEAR(pVM, fFlag) do { \
|
---|
727 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
728 | AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
|
---|
729 | ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
|
---|
730 | } while (0)
|
---|
731 |
|
---|
732 | /** @def VMCPU_FF_CLEAR
|
---|
733 | * Clears a single force action flag for the given VCPU.
|
---|
734 | *
|
---|
735 | * @param pVCpu The cross context virtual CPU structure.
|
---|
736 | * @param fFlag The flag to clear.
|
---|
737 | */
|
---|
738 | #ifdef VMCPU_WITH_64_BIT_FFS
|
---|
739 | # define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
|
---|
740 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
741 | AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
|
---|
742 | ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
|
---|
743 | } while (0)
|
---|
744 | #else
|
---|
745 | # define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
|
---|
746 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
747 | AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
|
---|
748 | ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
|
---|
749 | } while (0)
|
---|
750 | #endif
|
---|
751 |
|
---|
752 | /** @def VMCPU_FF_CLEAR_MASK
|
---|
753 | * Clears two or more force action flags for the given VCPU.
|
---|
754 | *
|
---|
755 | * @param pVCpu The cross context virtual CPU structure.
|
---|
756 | * @param fFlags The flags to clear.
|
---|
757 | */
|
---|
758 | #ifdef VMCPU_WITH_64_BIT_FFS
|
---|
759 | # if ARCH_BITS > 32
|
---|
760 | # define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
|
---|
761 | do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
|
---|
762 | # else
|
---|
763 | # define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
|
---|
764 | if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
|
---|
765 | else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
|
---|
766 | } while (0)
|
---|
767 | # endif
|
---|
768 | #else
|
---|
769 | # define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
|
---|
770 | do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
|
---|
771 | #endif
|
---|
772 |
|
---|
773 | /** @def VM_FF_IS_SET
|
---|
774 | * Checks if single a force action flag is set.
|
---|
775 | *
|
---|
776 | * @param pVM The cross context VM structure.
|
---|
777 | * @param fFlag The flag to check.
|
---|
778 | * @sa VM_FF_IS_ANY_SET
|
---|
779 | */
|
---|
780 | #if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
|
---|
781 | # define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
|
---|
782 | #else
|
---|
783 | # define VM_FF_IS_SET(pVM, fFlag) \
|
---|
784 | ([](PVM a_pVM) -> bool \
|
---|
785 | { \
|
---|
786 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
787 | AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
|
---|
788 | return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
|
---|
789 | }(pVM))
|
---|
790 | #endif
|
---|
791 |
|
---|
792 | /** @def VMCPU_FF_IS_SET
|
---|
793 | * Checks if a single force action flag is set for the given VCPU.
|
---|
794 | *
|
---|
795 | * @param pVCpu The cross context virtual CPU structure.
|
---|
796 | * @param fFlag The flag to check.
|
---|
797 | * @sa VMCPU_FF_IS_ANY_SET
|
---|
798 | */
|
---|
799 | #if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
|
---|
800 | # define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
|
---|
801 | #else
|
---|
802 | # define VMCPU_FF_IS_SET(pVCpu, fFlag) \
|
---|
803 | ([](PCVMCPU a_pVCpu) -> bool \
|
---|
804 | { \
|
---|
805 | AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
|
---|
806 | AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
|
---|
807 | return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
|
---|
808 | }(pVCpu))
|
---|
809 | #endif
|
---|
810 |
|
---|
811 | /** @def VM_FF_IS_ANY_SET
|
---|
812 | * Checks if one or more force action in the specified set is pending.
|
---|
813 | *
|
---|
814 | * @param pVM The cross context VM structure.
|
---|
815 | * @param fFlags The flags to check for.
|
---|
816 | * @sa VM_FF_IS_SET
|
---|
817 | */
|
---|
818 | #define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
|
---|
819 |
|
---|
820 | /** @def VMCPU_FF_IS_ANY_SET
|
---|
821 | * Checks if two or more force action flags in the specified set is set for the given VCPU.
|
---|
822 | *
|
---|
823 | * @param pVCpu The cross context virtual CPU structure.
|
---|
824 | * @param fFlags The flags to check for.
|
---|
825 | * @sa VMCPU_FF_IS_SET
|
---|
826 | */
|
---|
827 | #define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
|
---|
828 |
|
---|
829 | /** @def VM_FF_TEST_AND_CLEAR
|
---|
830 | * Checks if one (!) force action in the specified set is pending and clears it atomically
|
---|
831 | *
|
---|
832 | * @returns true if the bit was set.
|
---|
833 | * @returns false if the bit was clear.
|
---|
834 | * @param pVM The cross context VM structure.
|
---|
835 | * @param fFlag Flag constant to check and clear (_BIT is appended).
|
---|
836 | */
|
---|
837 | #define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
|
---|
838 |
|
---|
839 | /** @def VMCPU_FF_TEST_AND_CLEAR
|
---|
840 | * Checks if one (!) force action in the specified set is pending and clears it atomically
|
---|
841 | *
|
---|
842 | * @returns true if the bit was set.
|
---|
843 | * @returns false if the bit was clear.
|
---|
844 | * @param pVCpu The cross context virtual CPU structure.
|
---|
845 | * @param fFlag Flag constant to check and clear (_BIT is appended).
|
---|
846 | */
|
---|
847 | #define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
|
---|
848 |
|
---|
849 | /** @def VM_FF_IS_PENDING_EXCEPT
|
---|
850 | * Checks if one or more force action in the specified set is pending while one
|
---|
851 | * or more other ones are not.
|
---|
852 | *
|
---|
853 | * @param pVM The cross context VM structure.
|
---|
854 | * @param fFlags The flags to check for.
|
---|
855 | * @param fExcpt The flags that should not be set.
|
---|
856 | */
|
---|
857 | #define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
|
---|
858 | ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
|
---|
859 |
|
---|
860 | /** @def VM_IS_EMT
|
---|
861 | * Checks if the current thread is the emulation thread (EMT).
|
---|
862 | *
|
---|
863 | * @remark The ring-0 variation will need attention if we expand the ring-0
|
---|
864 | * code to let threads other than EMT mess around with the VM.
|
---|
865 | */
|
---|
866 | #ifdef IN_RC
|
---|
867 | # define VM_IS_EMT(pVM) true
|
---|
868 | #else
|
---|
869 | # define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
|
---|
870 | #endif
|
---|
871 |
|
---|
872 | /** @def VMCPU_IS_EMT
|
---|
873 | * Checks if the current thread is the emulation thread (EMT) for the specified
|
---|
874 | * virtual CPU.
|
---|
875 | */
|
---|
876 | #ifdef IN_RC
|
---|
877 | # define VMCPU_IS_EMT(pVCpu) true
|
---|
878 | #else
|
---|
879 | # define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
|
---|
880 | #endif
|
---|
881 |
|
---|
882 | /** @def VM_ASSERT_EMT
|
---|
883 | * Asserts that the current thread IS the emulation thread (EMT).
|
---|
884 | */
|
---|
885 | #ifdef IN_RC
|
---|
886 | # define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
|
---|
887 | #elif defined(IN_RING0)
|
---|
888 | # define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
|
---|
889 | #else
|
---|
890 | # define VM_ASSERT_EMT(pVM) \
|
---|
891 | AssertMsg(VM_IS_EMT(pVM), \
|
---|
892 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
|
---|
893 | #endif
|
---|
894 |
|
---|
895 | /** @def VMCPU_ASSERT_EMT
|
---|
896 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
897 | * specified virtual CPU.
|
---|
898 | */
|
---|
899 | #ifdef IN_RC
|
---|
900 | # define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
|
---|
901 | #elif defined(IN_RING0)
|
---|
902 | # define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
|
---|
903 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
|
---|
904 | RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
|
---|
905 | (pVCpu) ? (pVCpu)->idCpu : 0))
|
---|
906 | #else
|
---|
907 | # define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
|
---|
908 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
909 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
910 | #endif
|
---|
911 |
|
---|
912 | /** @def VM_ASSERT_EMT_RETURN
|
---|
913 | * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
|
---|
914 | */
|
---|
915 | #ifdef IN_RC
|
---|
916 | # define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
|
---|
917 | #elif defined(IN_RING0)
|
---|
918 | # define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
|
---|
919 | #else
|
---|
920 | # define VM_ASSERT_EMT_RETURN(pVM, rc) \
|
---|
921 | AssertMsgReturn(VM_IS_EMT(pVM), \
|
---|
922 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
|
---|
923 | (rc))
|
---|
924 | #endif
|
---|
925 |
|
---|
926 | /** @def VMCPU_ASSERT_EMT_RETURN
|
---|
927 | * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
|
---|
928 | */
|
---|
929 | #ifdef IN_RC
|
---|
930 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
|
---|
931 | #elif defined(IN_RING0)
|
---|
932 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
|
---|
933 | #else
|
---|
934 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
|
---|
935 | AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
|
---|
936 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
937 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
|
---|
938 | (rc))
|
---|
939 | #endif
|
---|
940 |
|
---|
941 | /** @def VMCPU_ASSERT_EMT_OR_GURU
|
---|
942 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
943 | * specified virtual CPU.
|
---|
944 | */
|
---|
945 | #if defined(IN_RC) || defined(IN_RING0)
|
---|
946 | # define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
|
---|
947 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
|
---|
948 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
|
---|
949 | #else
|
---|
950 | # define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
|
---|
951 | AssertMsg( VMCPU_IS_EMT(pVCpu) \
|
---|
952 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
|
---|
953 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
|
---|
954 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
955 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
956 | #endif
|
---|
957 |
|
---|
958 | /** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
|
---|
959 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
960 | * specified virtual CPU or the VM is not running.
|
---|
961 | */
|
---|
962 | #if defined(IN_RC) || defined(IN_RING0)
|
---|
963 | # define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
|
---|
964 | Assert( VMCPU_IS_EMT(pVCpu) \
|
---|
965 | || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
|
---|
966 | #else
|
---|
967 | # define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
|
---|
968 | AssertMsg( VMCPU_IS_EMT(pVCpu) \
|
---|
969 | || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
|
---|
970 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
971 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
972 | #endif
|
---|
973 |
|
---|
974 | /** @def VMSTATE_IS_RUNNING
|
---|
975 | * Checks if the given state indicates a running VM.
|
---|
976 | */
|
---|
977 | #define VMSTATE_IS_RUNNING(a_enmVMState) \
|
---|
978 | ( (enmVMState) == VMSTATE_RUNNING \
|
---|
979 | || (enmVMState) == VMSTATE_RUNNING_LS )
|
---|
980 |
|
---|
981 | /** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
|
---|
982 | * Checks if the VM is running.
|
---|
983 | * @note This is only for pure debug assertions. No AssertReturn or similar!
|
---|
984 | * @sa VMSTATE_IS_RUNNING
|
---|
985 | */
|
---|
986 | #define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
|
---|
987 | ( (pVM)->enmVMState == VMSTATE_RUNNING \
|
---|
988 | || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
|
---|
989 |
|
---|
990 | /** @def VM_ASSERT_IS_NOT_RUNNING
|
---|
991 | * Asserts that the VM is not running.
|
---|
992 | */
|
---|
993 | #if defined(IN_RC) || defined(IN_RING0)
|
---|
994 | #define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
|
---|
995 | #else
|
---|
996 | #define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
|
---|
997 | ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
|
---|
998 | #endif
|
---|
999 |
|
---|
1000 | /** @def VM_ASSERT_EMT0
|
---|
1001 | * Asserts that the current thread IS emulation thread \#0 (EMT0).
|
---|
1002 | */
|
---|
1003 | #ifdef IN_RING3
|
---|
1004 | # define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
|
---|
1005 | #else
|
---|
1006 | # define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
|
---|
1007 | #endif
|
---|
1008 |
|
---|
1009 | /** @def VM_ASSERT_EMT0_RETURN
|
---|
1010 | * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
|
---|
1011 | * it isn't.
|
---|
1012 | */
|
---|
1013 | #ifdef IN_RING3
|
---|
1014 | # define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
|
---|
1015 | #else
|
---|
1016 | # define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
|
---|
1017 | #endif
|
---|
1018 |
|
---|
1019 |
|
---|
1020 | /**
|
---|
1021 | * Asserts that the current thread is NOT the emulation thread.
|
---|
1022 | */
|
---|
1023 | #define VM_ASSERT_OTHER_THREAD(pVM) \
|
---|
1024 | AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
|
---|
1025 |
|
---|
1026 |
|
---|
1027 | /** @def VM_ASSERT_STATE
|
---|
1028 | * Asserts a certain VM state.
|
---|
1029 | */
|
---|
1030 | #define VM_ASSERT_STATE(pVM, _enmState) \
|
---|
1031 | AssertMsg((pVM)->enmVMState == (_enmState), \
|
---|
1032 | ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
|
---|
1033 |
|
---|
1034 | /** @def VM_ASSERT_STATE_RETURN
|
---|
1035 | * Asserts a certain VM state and returns if it doesn't match.
|
---|
1036 | */
|
---|
1037 | #define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
|
---|
1038 | AssertMsgReturn((pVM)->enmVMState == (_enmState), \
|
---|
1039 | ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
|
---|
1040 | (rc))
|
---|
1041 |
|
---|
1042 | /** @def VM_IS_VALID_EXT
|
---|
1043 | * Asserts a the VM handle is valid for external access, i.e. not being destroy
|
---|
1044 | * or terminated. */
|
---|
1045 | #define VM_IS_VALID_EXT(pVM) \
|
---|
1046 | ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
|
---|
1047 | && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
|
---|
1048 | || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
|
---|
1049 | && VM_IS_EMT(pVM))) )
|
---|
1050 |
|
---|
1051 | /** @def VM_ASSERT_VALID_EXT_RETURN
|
---|
1052 | * Asserts a the VM handle is valid for external access, i.e. not being
|
---|
1053 | * destroy or terminated.
|
---|
1054 | */
|
---|
1055 | #define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
|
---|
1056 | AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
|
---|
1057 | ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
|
---|
1058 | ? VMGetStateName(pVM->enmVMState) : ""), \
|
---|
1059 | (rc))
|
---|
1060 |
|
---|
1061 | /** @def VMCPU_ASSERT_VALID_EXT_RETURN
|
---|
1062 | * Asserts a the VMCPU handle is valid for external access, i.e. not being
|
---|
1063 | * destroy or terminated.
|
---|
1064 | */
|
---|
1065 | #define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
|
---|
1066 | AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
|
---|
1067 | && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
|
---|
1068 | && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
|
---|
1069 | ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
|
---|
1070 | RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
|
---|
1071 | ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
|
---|
1072 | (rc))
|
---|
1073 |
|
---|
1074 | #endif /* !VBOX_FOR_DTRACE_LIB */
|
---|
1075 |
|
---|
1076 |
|
---|
1077 | /**
|
---|
1078 | * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
|
---|
1079 | *
|
---|
1080 | * ONLY HM and NEM MAY USE THIS!
|
---|
1081 | *
|
---|
1082 | * @param a_pVM The cross context VM structure.
|
---|
1083 | * @param a_bValue The new value.
|
---|
1084 | * @internal
|
---|
1085 | */
|
---|
1086 | #define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
|
---|
1087 | do { \
|
---|
1088 | *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
|
---|
1089 | ASMCompilerBarrier(); /* just to be on the safe side */ \
|
---|
1090 | } while (0)
|
---|
1091 |
|
---|
1092 | /**
|
---|
1093 | * Checks whether raw-mode is used.
|
---|
1094 | *
|
---|
1095 | * @retval true if either is used.
|
---|
1096 | * @retval false if software virtualization (raw-mode) is used.
|
---|
1097 | *
|
---|
1098 | * @param a_pVM The cross context VM structure.
|
---|
1099 | * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
|
---|
1100 | * @internal
|
---|
1101 | */
|
---|
1102 | #ifdef VBOX_WITH_RAW_MODE
|
---|
1103 | # define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
|
---|
1104 | #else
|
---|
1105 | # define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
|
---|
1106 | #endif
|
---|
1107 |
|
---|
1108 | /**
|
---|
1109 | * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
|
---|
1110 | *
|
---|
1111 | * @retval true if either is used.
|
---|
1112 | * @retval false if software virtualization (raw-mode) is used.
|
---|
1113 | *
|
---|
1114 | * @param a_pVM The cross context VM structure.
|
---|
1115 | * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
|
---|
1116 | * @internal
|
---|
1117 | */
|
---|
1118 | #define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
|
---|
1119 |
|
---|
1120 | /**
|
---|
1121 | * Checks whether HM is being used by this VM.
|
---|
1122 | *
|
---|
1123 | * @retval true if HM (VT-x/AMD-v) is used.
|
---|
1124 | * @retval false if not.
|
---|
1125 | *
|
---|
1126 | * @param a_pVM The cross context VM structure.
|
---|
1127 | * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
|
---|
1128 | * @internal
|
---|
1129 | */
|
---|
1130 | #define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
|
---|
1131 |
|
---|
1132 | /**
|
---|
1133 | * Checks whether NEM is being used by this VM.
|
---|
1134 | *
|
---|
1135 | * @retval true if a native hypervisor API is used.
|
---|
1136 | * @retval false if not.
|
---|
1137 | *
|
---|
1138 | * @param a_pVM The cross context VM structure.
|
---|
1139 | * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
|
---|
1140 | * @internal
|
---|
1141 | */
|
---|
1142 | #define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
1143 |
|
---|
1144 |
|
---|
1145 | /**
|
---|
1146 | * The cross context VM structure.
|
---|
1147 | *
|
---|
1148 | * It contains all the VM data which have to be available in all contexts.
|
---|
1149 | * Even if it contains all the data the idea is to use APIs not to modify all
|
---|
1150 | * the members all around the place. Therefore we make use of unions to hide
|
---|
1151 | * everything which isn't local to the current source module. This means we'll
|
---|
1152 | * have to pay a little bit of attention when adding new members to structures
|
---|
1153 | * in the unions and make sure to keep the padding sizes up to date.
|
---|
1154 | *
|
---|
1155 | * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
|
---|
1156 | */
|
---|
1157 | typedef struct VM
|
---|
1158 | {
|
---|
1159 | /** The state of the VM.
|
---|
1160 | * This field is read only to everyone except the VM and EM. */
|
---|
1161 | VMSTATE volatile enmVMState;
|
---|
1162 | /** Forced action flags.
|
---|
1163 | * See the VM_FF_* \#defines. Updated atomically.
|
---|
1164 | */
|
---|
1165 | volatile uint32_t fGlobalForcedActions;
|
---|
1166 | /** Pointer to the array of page descriptors for the VM structure allocation. */
|
---|
1167 | R3PTRTYPE(PSUPPAGE) paVMPagesR3;
|
---|
1168 | /** Session handle. For use when calling SUPR0 APIs. */
|
---|
1169 | #ifdef IN_RING0
|
---|
1170 | PSUPDRVSESSION pSessionUnsafe;
|
---|
1171 | #else
|
---|
1172 | PSUPDRVSESSION pSession;
|
---|
1173 | #endif
|
---|
1174 | /** Pointer to the ring-3 VM structure. */
|
---|
1175 | PUVM pUVM;
|
---|
1176 | /** Ring-3 Host Context VM Pointer. */
|
---|
1177 | #ifdef IN_RING0
|
---|
1178 | R3PTRTYPE(struct VM *) pVMR3Unsafe;
|
---|
1179 | #else
|
---|
1180 | R3PTRTYPE(struct VM *) pVMR3;
|
---|
1181 | #endif
|
---|
1182 | /** Ring-0 Host Context VM pointer for making ring-0 calls. */
|
---|
1183 | R0PTRTYPE(struct VM *) pVMR0ForCall;
|
---|
1184 | /** Raw-mode Context VM Pointer. */
|
---|
1185 | uint32_t pVMRC;
|
---|
1186 | /** Padding for new raw-mode (long mode). */
|
---|
1187 | uint32_t pVMRCPadding;
|
---|
1188 |
|
---|
1189 | /** The GVM VM handle. Only the GVM should modify this field. */
|
---|
1190 | #ifdef IN_RING0
|
---|
1191 | uint32_t hSelfUnsafe;
|
---|
1192 | #else
|
---|
1193 | uint32_t hSelf;
|
---|
1194 | #endif
|
---|
1195 | /** Number of virtual CPUs. */
|
---|
1196 | #ifdef IN_RING0
|
---|
1197 | uint32_t cCpusUnsafe;
|
---|
1198 | #else
|
---|
1199 | uint32_t cCpus;
|
---|
1200 | #endif
|
---|
1201 | /** CPU excution cap (1-100) */
|
---|
1202 | uint32_t uCpuExecutionCap;
|
---|
1203 |
|
---|
1204 | /** Size of the VM structure. */
|
---|
1205 | uint32_t cbSelf;
|
---|
1206 | /** Size of the VMCPU structure. */
|
---|
1207 | uint32_t cbVCpu;
|
---|
1208 | /** Structure version number (TBD). */
|
---|
1209 | uint32_t uStructVersion;
|
---|
1210 |
|
---|
1211 | /** @name Various items that are frequently accessed.
|
---|
1212 | * @{ */
|
---|
1213 | /** The main execution engine, VM_EXEC_ENGINE_XXX.
|
---|
1214 | * This is set early during vmR3InitRing3 by HM or NEM. */
|
---|
1215 | uint8_t const bMainExecutionEngine;
|
---|
1216 |
|
---|
1217 | /** Hardware VM support is available and enabled.
|
---|
1218 | * Determined very early during init.
|
---|
1219 | * This is placed here for performance reasons.
|
---|
1220 | * @todo obsoleted by bMainExecutionEngine, eliminate. */
|
---|
1221 | bool fHMEnabled;
|
---|
1222 | /** @} */
|
---|
1223 |
|
---|
1224 | /** Alignment padding. */
|
---|
1225 | uint8_t uPadding1[6];
|
---|
1226 |
|
---|
1227 | /** @name Debugging
|
---|
1228 | * @{ */
|
---|
1229 | /** Ring-3 Host Context VM Pointer. */
|
---|
1230 | R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
|
---|
1231 | /** Ring-0 Host Context VM Pointer. */
|
---|
1232 | R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
|
---|
1233 | /** @} */
|
---|
1234 |
|
---|
1235 | /** Max EMT hash lookup collisions (in GVMM). */
|
---|
1236 | uint8_t cMaxEmtHashCollisions;
|
---|
1237 |
|
---|
1238 | /** Padding - the unions must be aligned on a 64 bytes boundary. */
|
---|
1239 | uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
|
---|
1240 |
|
---|
1241 | /** CPUM part. */
|
---|
1242 | union
|
---|
1243 | {
|
---|
1244 | #ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
|
---|
1245 | struct CPUM s;
|
---|
1246 | #endif
|
---|
1247 | #ifdef VBOX_INCLUDED_vmm_cpum_h
|
---|
1248 | /** Read only info exposed about the host and guest CPUs. */
|
---|
1249 | struct
|
---|
1250 | {
|
---|
1251 | /** Padding for hidden fields. */
|
---|
1252 | uint8_t abHidden0[64];
|
---|
1253 | /** Host CPU feature information. */
|
---|
1254 | CPUMFEATURES HostFeatures;
|
---|
1255 | /** Guest CPU feature information. */
|
---|
1256 | CPUMFEATURES GuestFeatures;
|
---|
1257 | } const ro;
|
---|
1258 | #endif
|
---|
1259 | /** @todo this is rather bloated because of static MSR range allocation.
|
---|
1260 | * Probably a good idea to move it to a separate R0 allocation... */
|
---|
1261 | uint8_t padding[8832 + 128*8192 + 0x1d00]; /* multiple of 64 */
|
---|
1262 | } cpum;
|
---|
1263 |
|
---|
1264 | /** PGM part.
|
---|
1265 | * @note 16384 aligned for zero and mmio page storage. */
|
---|
1266 | union
|
---|
1267 | {
|
---|
1268 | #ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
|
---|
1269 | struct PGM s;
|
---|
1270 | #endif
|
---|
1271 | uint8_t padding[53888]; /* multiple of 64 */
|
---|
1272 | } pgm;
|
---|
1273 |
|
---|
1274 | /** VMM part. */
|
---|
1275 | union
|
---|
1276 | {
|
---|
1277 | #ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
|
---|
1278 | struct VMM s;
|
---|
1279 | #endif
|
---|
1280 | uint8_t padding[1600]; /* multiple of 64 */
|
---|
1281 | } vmm;
|
---|
1282 |
|
---|
1283 | /** HM part. */
|
---|
1284 | union
|
---|
1285 | {
|
---|
1286 | #ifdef VMM_INCLUDED_SRC_include_HMInternal_h
|
---|
1287 | struct HM s;
|
---|
1288 | #endif
|
---|
1289 | uint8_t padding[5504]; /* multiple of 64 */
|
---|
1290 | } hm;
|
---|
1291 |
|
---|
1292 | /** TRPM part. */
|
---|
1293 | union
|
---|
1294 | {
|
---|
1295 | #ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
|
---|
1296 | struct TRPM s;
|
---|
1297 | #endif
|
---|
1298 | uint8_t padding[2048]; /* multiple of 64 */
|
---|
1299 | } trpm;
|
---|
1300 |
|
---|
1301 | /** SELM part. */
|
---|
1302 | union
|
---|
1303 | {
|
---|
1304 | #ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
|
---|
1305 | struct SELM s;
|
---|
1306 | #endif
|
---|
1307 | uint8_t padding[768]; /* multiple of 64 */
|
---|
1308 | } selm;
|
---|
1309 |
|
---|
1310 | /** MM part. */
|
---|
1311 | union
|
---|
1312 | {
|
---|
1313 | #ifdef VMM_INCLUDED_SRC_include_MMInternal_h
|
---|
1314 | struct MM s;
|
---|
1315 | #endif
|
---|
1316 | uint8_t padding[192]; /* multiple of 64 */
|
---|
1317 | } mm;
|
---|
1318 |
|
---|
1319 | /** PDM part. */
|
---|
1320 | union
|
---|
1321 | {
|
---|
1322 | #ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
|
---|
1323 | struct PDM s;
|
---|
1324 | #endif
|
---|
1325 | uint8_t padding[22400]; /* multiple of 64 */
|
---|
1326 | } pdm;
|
---|
1327 |
|
---|
1328 | /** IOM part. */
|
---|
1329 | union
|
---|
1330 | {
|
---|
1331 | #ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
|
---|
1332 | struct IOM s;
|
---|
1333 | #endif
|
---|
1334 | uint8_t padding[1152]; /* multiple of 64 */
|
---|
1335 | } iom;
|
---|
1336 |
|
---|
1337 | /** EM part. */
|
---|
1338 | union
|
---|
1339 | {
|
---|
1340 | #ifdef VMM_INCLUDED_SRC_include_EMInternal_h
|
---|
1341 | struct EM s;
|
---|
1342 | #endif
|
---|
1343 | uint8_t padding[256]; /* multiple of 64 */
|
---|
1344 | } em;
|
---|
1345 |
|
---|
1346 | /** NEM part. */
|
---|
1347 | union
|
---|
1348 | {
|
---|
1349 | #ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
|
---|
1350 | struct NEM s;
|
---|
1351 | #endif
|
---|
1352 | uint8_t padding[4608]; /* multiple of 64 */
|
---|
1353 | } nem;
|
---|
1354 |
|
---|
1355 | /** TM part. */
|
---|
1356 | union
|
---|
1357 | {
|
---|
1358 | #ifdef VMM_INCLUDED_SRC_include_TMInternal_h
|
---|
1359 | struct TM s;
|
---|
1360 | #endif
|
---|
1361 | uint8_t padding[10112]; /* multiple of 64 */
|
---|
1362 | } tm;
|
---|
1363 |
|
---|
1364 | /** DBGF part. */
|
---|
1365 | union
|
---|
1366 | {
|
---|
1367 | #ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
|
---|
1368 | struct DBGF s;
|
---|
1369 | #endif
|
---|
1370 | #ifdef VBOX_INCLUDED_vmm_dbgf_h
|
---|
1371 | /** Read only info exposed about interrupt breakpoints and selected events. */
|
---|
1372 | struct
|
---|
1373 | {
|
---|
1374 | /** Bitmap of enabled hardware interrupt breakpoints. */
|
---|
1375 | uint32_t bmHardIntBreakpoints[256 / 32];
|
---|
1376 | /** Bitmap of enabled software interrupt breakpoints. */
|
---|
1377 | uint32_t bmSoftIntBreakpoints[256 / 32];
|
---|
1378 | /** Bitmap of selected events.
|
---|
1379 | * This includes non-selectable events too for simplicity, we maintain the
|
---|
1380 | * state for some of these, as it may come in handy. */
|
---|
1381 | uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
|
---|
1382 | /** Enabled hardware interrupt breakpoints. */
|
---|
1383 | uint32_t cHardIntBreakpoints;
|
---|
1384 | /** Enabled software interrupt breakpoints. */
|
---|
1385 | uint32_t cSoftIntBreakpoints;
|
---|
1386 | /** The number of selected events. */
|
---|
1387 | uint32_t cSelectedEvents;
|
---|
1388 | /** The number of enabled hardware breakpoints. */
|
---|
1389 | uint8_t cEnabledHwBreakpoints;
|
---|
1390 | /** The number of enabled hardware I/O breakpoints. */
|
---|
1391 | uint8_t cEnabledHwIoBreakpoints;
|
---|
1392 | uint8_t au8Alignment1[2]; /**< Alignment padding. */
|
---|
1393 | /** The number of enabled INT3 breakpoints. */
|
---|
1394 | uint32_t volatile cEnabledInt3Breakpoints;
|
---|
1395 | } const ro;
|
---|
1396 | #endif
|
---|
1397 | uint8_t padding[2432]; /* multiple of 64 */
|
---|
1398 | } dbgf;
|
---|
1399 |
|
---|
1400 | /** SSM part. */
|
---|
1401 | union
|
---|
1402 | {
|
---|
1403 | #ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
|
---|
1404 | struct SSM s;
|
---|
1405 | #endif
|
---|
1406 | uint8_t padding[128]; /* multiple of 64 */
|
---|
1407 | } ssm;
|
---|
1408 |
|
---|
1409 | union
|
---|
1410 | {
|
---|
1411 | #ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
|
---|
1412 | struct GIM s;
|
---|
1413 | #endif
|
---|
1414 | uint8_t padding[448]; /* multiple of 64 */
|
---|
1415 | } gim;
|
---|
1416 |
|
---|
1417 | union
|
---|
1418 | {
|
---|
1419 | #ifdef VMM_INCLUDED_SRC_include_APICInternal_h
|
---|
1420 | struct APIC s;
|
---|
1421 | #endif
|
---|
1422 | uint8_t padding[128]; /* multiple of 8 */
|
---|
1423 | } apic;
|
---|
1424 |
|
---|
1425 | /* ---- begin small stuff ---- */
|
---|
1426 |
|
---|
1427 | /** VM part. */
|
---|
1428 | union
|
---|
1429 | {
|
---|
1430 | #ifdef VMM_INCLUDED_SRC_include_VMInternal_h
|
---|
1431 | struct VMINT s;
|
---|
1432 | #endif
|
---|
1433 | uint8_t padding[32]; /* multiple of 8 */
|
---|
1434 | } vm;
|
---|
1435 |
|
---|
1436 | /** CFGM part. */
|
---|
1437 | union
|
---|
1438 | {
|
---|
1439 | #ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
|
---|
1440 | struct CFGM s;
|
---|
1441 | #endif
|
---|
1442 | uint8_t padding[8]; /* multiple of 8 */
|
---|
1443 | } cfgm;
|
---|
1444 |
|
---|
1445 | /** IEM part. */
|
---|
1446 | union
|
---|
1447 | {
|
---|
1448 | #ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
|
---|
1449 | struct IEM s;
|
---|
1450 | #endif
|
---|
1451 | uint8_t padding[8]; /* multiple of 8 */
|
---|
1452 | } iem;
|
---|
1453 |
|
---|
1454 | /** Statistics for ring-0 only components. */
|
---|
1455 | struct
|
---|
1456 | {
|
---|
1457 | /** GMMR0 stats. */
|
---|
1458 | struct
|
---|
1459 | {
|
---|
1460 | /** Chunk TLB hits. */
|
---|
1461 | uint64_t cChunkTlbHits;
|
---|
1462 | /** Chunk TLB misses. */
|
---|
1463 | uint64_t cChunkTlbMisses;
|
---|
1464 | } gmm;
|
---|
1465 | uint64_t au64Padding[6]; /* probably more comming here... */
|
---|
1466 | } R0Stats;
|
---|
1467 |
|
---|
1468 | /** Padding for aligning the structure size on a page boundrary. */
|
---|
1469 | uint8_t abAlignment2[8912 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
|
---|
1470 |
|
---|
1471 | /* ---- end small stuff ---- */
|
---|
1472 |
|
---|
1473 | /** Array of VMCPU ring-3 pointers. */
|
---|
1474 | PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
|
---|
1475 |
|
---|
1476 | /* This point is aligned on a 16384 boundrary (for arm64 purposes). */
|
---|
1477 | } VM;
|
---|
1478 | #ifndef VBOX_FOR_DTRACE_LIB
|
---|
1479 | //AssertCompileSizeAlignment(VM, 16384);
|
---|
1480 | #endif
|
---|
1481 |
|
---|
1482 |
|
---|
1483 | #ifdef IN_RC
|
---|
1484 | RT_C_DECLS_BEGIN
|
---|
1485 |
|
---|
1486 | /** The VM structure.
|
---|
1487 | * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
|
---|
1488 | * globals which we should avoid using.
|
---|
1489 | */
|
---|
1490 | extern DECLIMPORT(VM) g_VM;
|
---|
1491 |
|
---|
1492 | /** The VMCPU structure for virtual CPU \#0.
|
---|
1493 | * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
|
---|
1494 | * globals which we should avoid using.
|
---|
1495 | */
|
---|
1496 | extern DECLIMPORT(VMCPU) g_VCpu0;
|
---|
1497 |
|
---|
1498 | RT_C_DECLS_END
|
---|
1499 | #endif
|
---|
1500 |
|
---|
1501 | /** @} */
|
---|
1502 |
|
---|
1503 | #endif /* !VBOX_INCLUDED_vmm_vm_h */
|
---|
1504 |
|
---|