vm.h@ 45739

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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2013 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** Executing guest code and can be poked. */
72	VMCPUSTATE_STARTED_EXEC,
73	/** Executing guest code in the recompiler. */
74	VMCPUSTATE_STARTED_EXEC_REM,
75	/** Halted. */
76	VMCPUSTATE_STARTED_HALTED,
77
78	/** The end of valid virtual CPU states. */
79	VMCPUSTATE_END,
80
81	/** Ensure 32-bit type. */
82	VMCPUSTATE_32BIT_HACK = 0x7fffffff
83	} VMCPUSTATE;
84
85
86	/**
87	* The cross context virtual CPU structure.
88	*
89	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
90	*/
91	typedef struct VMCPU
92	{
93	/** Per CPU forced action.
94	* See the VMCPU_FF_* \#defines. Updated atomically. */
95	uint32_t volatile fLocalForcedActions; /* 0 */
96	/** The CPU state. */
97	VMCPUSTATE volatile enmState; /* 4 */
98
99	/** Pointer to the ring-3 UVMCPU structure. */
100	PUVMCPU pUVCpu; /* 8 */
101	/** Ring-3 Host Context VM Pointer. */
102	PVMR3 pVMR3; /* 16 / 12 */
103	/** Ring-0 Host Context VM Pointer. */
104	PVMR0 pVMR0; /* 24 / 16 */
105	/** Raw-mode Context VM Pointer. */
106	PVMRC pVMRC; /* 32 / 20 */
107	/** The CPU ID.
108	* This is the index into the VM::aCpu array. */
109	VMCPUID idCpu; /* 36 / 24 */
110	/** The native thread handle. */
111	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
112	/** The native R0 thread handle. (different from the R3 handle!) */
113	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
114	/** Which host CPU ID is this EMT running on.
115	* Only valid when in RC or HMR0 with scheduling disabled. */
116	RTCPUID volatile idHostCpu; /* 56 / 36 */
117
118	/** Trace groups enable flags. */
119	uint32_t fTraceGroups; /* 60 / 40 */
120	/** Align the structures below bit on a 64-byte boundary and make sure it starts
121	* at the same offset in both 64-bit and 32-bit builds.
122	*
123	* @remarks The alignments of the members that are larger than 48 bytes should be
124	* 64-byte for cache line reasons. structs containing small amounts of
125	* data could be lumped together at the end with a < 64 byte padding
126	* following it (to grow into and align the struct size).
127	* */
128	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
129	/** State data for use by ad hoc profiling. */
130	uint32_t uAdHoc;
131	/** Profiling samples for use by ad hoc profiling. */
132	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
133
134	/** CPUM part. */
135	union
136	{
137	#ifdef ___CPUMInternal_h
138	struct CPUMCPU s;
139	#endif
140	uint8_t padding[3584]; /* multiple of 64 */
141	} cpum;
142
143	/** HM part. */
144	union
145	{
146	#ifdef ___HMInternal_h
147	struct HMCPU s;
148	#endif
149	uint8_t padding[5376]; /* multiple of 64 */
150	} hm;
151
152	/** EM part. */
153	union
154	{
155	#ifdef ___EMInternal_h
156	struct EMCPU s;
157	#endif
158	uint8_t padding[1472]; /* multiple of 64 */
159	} em;
160
161	/** IEM part. */
162	union
163	{
164	#ifdef ___IEMInternal_h
165	struct IEMCPU s;
166	#endif
167	uint8_t padding[3072]; /* multiple of 64 */
168	} iem;
169
170	/** TRPM part. */
171	union
172	{
173	#ifdef ___TRPMInternal_h
174	struct TRPMCPU s;
175	#endif
176	uint8_t padding[128]; /* multiple of 64 */
177	} trpm;
178
179	/** TM part. */
180	union
181	{
182	#ifdef ___TMInternal_h
183	struct TMCPU s;
184	#endif
185	uint8_t padding[384]; /* multiple of 64 */
186	} tm;
187
188	/** VMM part. */
189	union
190	{
191	#ifdef ___VMMInternal_h
192	struct VMMCPU s;
193	#endif
194	uint8_t padding[704]; /* multiple of 64 */
195	} vmm;
196
197	/** PDM part. */
198	union
199	{
200	#ifdef ___PDMInternal_h
201	struct PDMCPU s;
202	#endif
203	uint8_t padding[256]; /* multiple of 64 */
204	} pdm;
205
206	/** IOM part. */
207	union
208	{
209	#ifdef ___IOMInternal_h
210	struct IOMCPU s;
211	#endif
212	uint8_t padding[512]; /* multiple of 64 */
213	} iom;
214
215	/** DBGF part.
216	* @todo Combine this with other tiny structures. */
217	union
218	{
219	#ifdef ___DBGFInternal_h
220	struct DBGFCPU s;
221	#endif
222	uint8_t padding[64]; /* multiple of 64 */
223	} dbgf;
224
225	/** Align the following members on page boundary. */
226	uint8_t abAlignment2[448 - 64];
227
228	/** PGM part. */
229	union
230	{
231	#ifdef ___PGMInternal_h
232	struct PGMCPU s;
233	#endif
234	uint8_t padding[4096]; /* multiple of 4096 */
235	} pgm;
236
237	} VMCPU;
238
239
240	#ifndef VBOX_FOR_DTRACE_LIB
241
242	/** @name Operations on VMCPU::enmState
243	* @{ */
244	/** Gets the VMCPU state. */
245	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
246	/** Sets the VMCPU state. */
247	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
248	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
249	/** Cmpares and sets the VMCPU state. */
250	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
251	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
252	/** Checks the VMCPU state. */
253	#ifdef VBOX_STRICT
254	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
255	do { \
256	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
257	AssertMsg(enmState == (enmExpectedState), \
258	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
259	enmState, enmExpectedState, (pVCpu)->idCpu)); \
260	} while (0)
261	#else
262	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
263	#endif
264	/** Tests if the state means that the CPU is started. */
265	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
266	/** Tests if the state means that the CPU is stopped. */
267	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
268	/** @} */
269
270
271	/** The name of the Guest Context VMM Core module. */
272	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
273	/** The name of the Ring 0 Context VMM Core module. */
274	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
275
276	/**
277	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
278	*/
279	#ifdef VBOX_WITH_RAW_MODE
280	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
281	#else
282	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
283	#endif
284
285
286	/** VM Forced Action Flags.
287	*
288	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
289	* action mask of a VM.
290	*
291	* @{
292	*/
293	/** The virtual sync clock has been stopped, go to TM until it has been
294	* restarted... */
295	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
296	/** PDM Queues are pending. */
297	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
298	/** The bit number for VM_FF_PDM_QUEUES. */
299	#define VM_FF_PDM_QUEUES_BIT 3
300	/** PDM DMA transfers are pending. */
301	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
302	/** The bit number for VM_FF_PDM_DMA. */
303	#define VM_FF_PDM_DMA_BIT 4
304	/** This action forces the VM to call DBGF so DBGF can service debugger
305	* requests in the emulation thread.
306	* This action flag stays asserted till DBGF clears it.*/
307	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
308	/** The bit number for VM_FF_DBGF. */
309	#define VM_FF_DBGF_BIT 8
310	/** This action forces the VM to service pending requests from other
311	* thread or requests which must be executed in another context. */
312	#define VM_FF_REQUEST RT_BIT_32(9)
313	/** Check for VM state changes and take appropriate action. */
314	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
315	/** The bit number for VM_FF_CHECK_VM_STATE. */
316	#define VM_FF_CHECK_VM_STATE_BIT 10
317	/** Reset the VM. (postponed) */
318	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
319	/** The bit number for VM_FF_RESET. */
320	#define VM_FF_RESET_BIT 11
321	/** EMT rendezvous in VMM. */
322	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
323	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
324	#define VM_FF_EMT_RENDEZVOUS_BIT 12
325
326	/** PGM needs to allocate handy pages. */
327	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
328	/** PGM is out of memory.
329	* Abandon all loops and code paths which can be resumed and get up to the EM
330	* loops. */
331	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
332	/** PGM is about to perform a lightweight pool flush
333	* Guest SMP: all EMT threads should return to ring 3
334	*/
335	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
336	/** REM needs to be informed about handler changes. */
337	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
338	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
339	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
340	/** Suspend the VM - debug only. */
341	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
342
343
344	/** This action forces the VM to check any pending interrups on the APIC. */
345	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
346	/** This action forces the VM to check any pending interrups on the PIC. */
347	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
348	/** This action forces the VM to schedule and run pending timer (TM).
349	* @remarks Don't move - PATM compatibility. */
350	#define VMCPU_FF_TIMER RT_BIT_32(2)
351	/** This action forces the VM to check any pending NMIs. */
352	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
353	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
354	/** This action forces the VM to check any pending SMIs. */
355	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
356	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
357	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
358	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
359	/** This action forces the VM to service pending requests from other
360	* thread or requests which must be executed in another context. */
361	#define VMCPU_FF_REQUEST RT_BIT_32(9)
362	/** This action forces the VM to service any pending updates to CR3 (used only
363	* by HM). */
364	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
365	/** This action forces the VM to service any pending updates to PAE PDPEs (used
366	* only by HM). */
367	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
368	/** This action forces the VM to resync the page tables before going
369	* back to execute guest code. (GLOBAL FLUSH) */
370	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
371	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
372	* (NON-GLOBAL FLUSH) */
373	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
374	/** Check for pending TLB shootdown actions.
375	* Consumer: HM
376	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
377	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
378	/** Check for pending TLB flush action.
379	* Consumer: HM
380	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
381	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
382	/** The bit number for VMCPU_FF_TLB_FLUSH. */
383	#define VMCPU_FF_TLB_FLUSH_BIT 19
384	#ifdef VBOX_WITH_RAW_MODE
385	/** Check the interrupt and trap gates */
386	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
387	/** Check Guest's TSS ring 0 stack */
388	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
389	/** Check Guest's GDT table */
390	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
391	/** Check Guest's LDT table */
392	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
393	#endif /* VBOX_WITH_RAW_MODE */
394	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
395	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
396	#ifdef VBOX_WITH_RAW_MODE
397	/** CSAM needs to scan the page that's being executed */
398	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
399	/** CSAM needs to do some homework. */
400	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
401	#endif /* VBOX_WITH_RAW_MODE */
402	/** Force return to Ring-3. */
403	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
404
405	/** Externally VM forced actions. Used to quit the idle/wait loop. */
406	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
407	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
408	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
409
410	/** Externally forced VM actions. Used to quit the idle/wait loop. */
411	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
412	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
413	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
414	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
415	\| VMCPU_FF_TIMER)
416
417	/** High priority VM pre-execution actions. */
418	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
419	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
420	\| VM_FF_EMT_RENDEZVOUS)
421	/** High priority VMCPU pre-execution actions. */
422	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
423	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
424	\| VMCPU_FF_INHIBIT_INTERRUPTS \
425	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
426	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
427
428	/** High priority VM pre raw-mode execution mask. */
429	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
430	/** High priority VMCPU pre raw-mode execution mask. */
431	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
432	\| VMCPU_FF_INHIBIT_INTERRUPTS \
433	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
434	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
435
436	/** High priority post-execution actions. */
437	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
438	/** High priority post-execution actions. */
439	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
440	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
441
442	/** Normal priority VM post-execution actions. */
443	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
444	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
445	/** Normal priority VMCPU post-execution actions. */
446	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
447
448	/** Normal priority VM actions. */
449	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
450	\| VM_FF_EMT_RENDEZVOUS)
451	/** Normal priority VMCPU actions. */
452	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
453
454	/** Flags to clear before resuming guest execution. */
455	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
456
457	/** VM Flags that cause the HM loops to go back to ring-3. */
458	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
459	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
460	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
461	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
462
463	/** All the forced VM flags. */
464	#define VM_FF_ALL_MASK (~0U)
465	/** All the forced VMCPU flags. */
466	#define VMCPU_FF_ALL_MASK (~0U)
467
468	/** All the forced VM flags except those related to raw-mode and hardware
469	* assisted execution. */
470	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
471	/** All the forced VMCPU flags except those related to raw-mode and hardware
472	* assisted execution. */
473	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
474	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
475	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
476	/** @} */
477
478	/** @def VM_FF_SET
479	* Sets a force action flag.
480	*
481	* @param pVM VM Handle.
482	* @param fFlag The flag to set.
483	*/
484	#if 1
485	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
486	#else
487	# define VM_FF_SET(pVM, fFlag) \
488	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
489	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
490	} while (0)
491	#endif
492
493	/** @def VMCPU_FF_SET
494	* Sets a force action flag for the given VCPU.
495	*
496	* @param pVCpu VMCPU Handle.
497	* @param fFlag The flag to set.
498	*/
499	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
500
501	/** @def VM_FF_CLEAR
502	* Clears a force action flag.
503	*
504	* @param pVM VM Handle.
505	* @param fFlag The flag to clear.
506	*/
507	#if 1
508	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
509	#else
510	# define VM_FF_CLEAR(pVM, fFlag) \
511	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
512	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
513	} while (0)
514	#endif
515
516	/** @def VMCPU_FF_CLEAR
517	* Clears a force action flag for the given VCPU.
518	*
519	* @param pVCpu VMCPU Handle.
520	* @param fFlag The flag to clear.
521	*/
522	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
523
524	/** @def VM_FF_ISSET
525	* Checks if a force action flag is set.
526	*
527	* @param pVM VM Handle.
528	* @param fFlag The flag to check.
529	*/
530	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
531	/** @deprecated */
532	#define VM_FF_ISSET(pVM, fFlag) VM_FF_IS_SET(pVM, fFlag)
533
534	/** @def VMCPU_FF_ISSET
535	* Checks if a force action flag is set for the given VCPU.
536	*
537	* @param pVCpu VMCPU Handle.
538	* @param fFlag The flag to check.
539	*/
540	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
541	/** @deprecated */
542	#define VMCPU_FF_ISSET(pVCpu, fFlag) VMCPU_FF_IS_SET(pVCpu, fFlag)
543
544	/** @def VM_FF_ISPENDING
545	* Checks if one or more force action in the specified set is pending.
546	*
547	* @param pVM VM Handle.
548	* @param fFlags The flags to check for.
549	*/
550	#define VM_FF_IS_PENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
551	/** @deprecated */
552	#define VM_FF_ISPENDING(pVM, fFlags) VM_FF_IS_PENDING(pVM, fFlags)
553
554	/** @def VM_FF_TESTANDCLEAR
555	* Checks if one (!) force action in the specified set is pending and clears it atomically
556	*
557	* @returns true if the bit was set.
558	* @returns false if the bit was clear.
559	* @param pVM VM Handle.
560	* @param iBit Bit position to check and clear
561	*/
562	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
563	/** @deprecated */
564	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
565
566	/** @def VMCPU_FF_TESTANDCLEAR
567	* Checks if one (!) force action in the specified set is pending and clears it atomically
568	*
569	* @returns true if the bit was set.
570	* @returns false if the bit was clear.
571	* @param pVCpu VMCPU Handle.
572	* @param iBit Bit position to check and clear
573	*/
574	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
575	/** @deprecated */
576	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
577
578	/** @def VMCPU_FF_ISPENDING
579	* Checks if one or more force action in the specified set is pending for the given VCPU.
580	*
581	* @param pVCpu VMCPU Handle.
582	* @param fFlags The flags to check for.
583	*/
584	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
585	/** @deprecated */
586	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) VMCPU_FF_IS_PENDING(pVCpu, fFlags)
587
588	/** @def VM_FF_ISPENDING
589	* Checks if one or more force action in the specified set is pending while one
590	* or more other ones are not.
591	*
592	* @param pVM VM Handle.
593	* @param fFlags The flags to check for.
594	* @param fExcpt The flags that should not be set.
595	*/
596	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
597
598	/** @def VMCPU_FF_IS_PENDING_EXCEPT
599	* Checks if one or more force action in the specified set is pending for the given
600	* VCPU while one or more other ones are not.
601	*
602	* @param pVCpu VMCPU Handle.
603	* @param fFlags The flags to check for.
604	* @param fExcpt The flags that should not be set.
605	*/
606	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
607
608	/** @def VM_IS_EMT
609	* Checks if the current thread is the emulation thread (EMT).
610	*
611	* @remark The ring-0 variation will need attention if we expand the ring-0
612	* code to let threads other than EMT mess around with the VM.
613	*/
614	#ifdef IN_RC
615	# define VM_IS_EMT(pVM) true
616	#else
617	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
618	#endif
619
620	/** @def VMCPU_IS_EMT
621	* Checks if the current thread is the emulation thread (EMT) for the specified
622	* virtual CPU.
623	*/
624	#ifdef IN_RC
625	# define VMCPU_IS_EMT(pVCpu) true
626	#else
627	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
628	#endif
629
630	/** @def VM_ASSERT_EMT
631	* Asserts that the current thread IS the emulation thread (EMT).
632	*/
633	#ifdef IN_RC
634	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
635	#elif defined(IN_RING0)
636	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
637	#else
638	# define VM_ASSERT_EMT(pVM) \
639	AssertMsg(VM_IS_EMT(pVM), \
640	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
641	#endif
642
643	/** @def VMCPU_ASSERT_EMT
644	* Asserts that the current thread IS the emulation thread (EMT) of the
645	* specified virtual CPU.
646	*/
647	#ifdef IN_RC
648	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
649	#elif defined(IN_RING0)
650	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
651	#else
652	# define VMCPU_ASSERT_EMT(pVCpu) \
653	AssertMsg(VMCPU_IS_EMT(pVCpu), \
654	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
655	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
656	#endif
657
658	/** @def VM_ASSERT_EMT_RETURN
659	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
660	*/
661	#ifdef IN_RC
662	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
663	#elif defined(IN_RING0)
664	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
665	#else
666	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
667	AssertMsgReturn(VM_IS_EMT(pVM), \
668	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
669	(rc))
670	#endif
671
672	/** @def VMCPU_ASSERT_EMT_RETURN
673	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
674	*/
675	#ifdef IN_RC
676	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
677	#elif defined(IN_RING0)
678	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
679	#else
680	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
681	AssertMsg(VMCPU_IS_EMT(pVCpu), \
682	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
683	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
684	(rc))
685	#endif
686
687	/** @def VMCPU_ASSERT_EMT_OR_GURU
688	* Asserts that the current thread IS the emulation thread (EMT) of the
689	* specified virtual CPU.
690	*/
691	#if defined(IN_RC) \|\| defined(IN_RING0)
692	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
693	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
694	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
695	#else
696	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
697	AssertMsg( VMCPU_IS_EMT(pVCpu) \
698	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
699	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
700	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
701	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
702	#endif
703
704	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
705	* Asserts that the current thread IS the emulation thread (EMT) of the
706	* specified virtual CPU when the VM is running.
707	*/
708	#if defined(IN_RC) \|\| defined(IN_RING0)
709	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
710	Assert( VMCPU_IS_EMT(pVCpu) \
711	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
712	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
713	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
714	#else
715	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
716	AssertMsg( VMCPU_IS_EMT(pVCpu) \
717	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
718	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
719	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
720	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
721	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
722	#endif
723
724	/** @def VM_ASSERT_EMT0
725	* Asserts that the current thread IS emulation thread \#0 (EMT0).
726	*/
727	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
728
729	/** @def VM_ASSERT_EMT0_RETURN
730	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
731	* it isn't.
732	*/
733	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
734
735
736	/**
737	* Asserts that the current thread is NOT the emulation thread.
738	*/
739	#define VM_ASSERT_OTHER_THREAD(pVM) \
740	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
741
742
743	/** @def VM_ASSERT_STATE_RETURN
744	* Asserts a certain VM state.
745	*/
746	#define VM_ASSERT_STATE(pVM, _enmState) \
747	AssertMsg((pVM)->enmVMState == (_enmState), \
748	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
749
750	/** @def VM_ASSERT_STATE_RETURN
751	* Asserts a certain VM state and returns if it doesn't match.
752	*/
753	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
754	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
755	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
756	(rc))
757
758	/** @def VM_ASSERT_VALID_EXT_RETURN
759	* Asserts a the VM handle is valid for external access, i.e. not being
760	* destroy or terminated.
761	*/
762	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
763	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
764	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
765	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
766	&& VM_IS_EMT(pVM))), \
767	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
768	? VMGetStateName(pVM->enmVMState) : ""), \
769	(rc))
770
771	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
772	* Asserts a the VMCPU handle is valid for external access, i.e. not being
773	* destroy or terminated.
774	*/
775	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
776	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
777	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
778	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
779	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
780	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
781	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
782	(rc))
783
784	#endif /* !VBOX_FOR_DTRACE_LIB */
785
786
787
788	/**
789	* The cross context VM structure.
790	*
791	* It contains all the VM data which have to be available in all contexts.
792	* Even if it contains all the data the idea is to use APIs not to modify all
793	* the members all around the place. Therefore we make use of unions to hide
794	* everything which isn't local to the current source module. This means we'll
795	* have to pay a little bit of attention when adding new members to structures
796	* in the unions and make sure to keep the padding sizes up to date.
797	*
798	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
799	*/
800	typedef struct VM
801	{
802	/** The state of the VM.
803	* This field is read only to everyone except the VM and EM. */
804	VMSTATE volatile enmVMState;
805	/** Forced action flags.
806	* See the VM_FF_* \#defines. Updated atomically.
807	*/
808	volatile uint32_t fGlobalForcedActions;
809	/** Pointer to the array of page descriptors for the VM structure allocation. */
810	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
811	/** Session handle. For use when calling SUPR0 APIs. */
812	PSUPDRVSESSION pSession;
813	/** Pointer to the ring-3 VM structure. */
814	PUVM pUVM;
815	/** Ring-3 Host Context VM Pointer. */
816	R3PTRTYPE(struct VM *) pVMR3;
817	/** Ring-0 Host Context VM Pointer. */
818	R0PTRTYPE(struct VM *) pVMR0;
819	/** Raw-mode Context VM Pointer. */
820	RCPTRTYPE(struct VM *) pVMRC;
821
822	/** The GVM VM handle. Only the GVM should modify this field. */
823	uint32_t hSelf;
824	/** Number of virtual CPUs. */
825	uint32_t cCpus;
826	/** CPU excution cap (1-100) */
827	uint32_t uCpuExecutionCap;
828
829	/** Size of the VM structure including the VMCPU array. */
830	uint32_t cbSelf;
831
832	/** Offset to the VMCPU array starting from beginning of this structure. */
833	uint32_t offVMCPU;
834
835	/**
836	* VMMSwitcher assembly entry point returning to host context.
837	*
838	* Depending on how the host handles the rc status given in @a eax, this may
839	* return and let the caller resume whatever it was doing prior to the call.
840	*
841	*
842	* @param eax The return code, register.
843	* @remark Assume interrupts disabled.
844	* @remark This method pointer lives here because TRPM needs it.
845	*/
846	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
847
848	/**
849	* VMMSwitcher assembly entry point returning to host context without saving the
850	* raw-mode context (hyper) registers.
851	*
852	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
853	* expects the caller to save a RC context in CPUM where one might return if the
854	* return code indicate that this is possible.
855	*
856	* This method pointer lives here because TRPM needs it.
857	*
858	* @param eax The return code, register.
859	* @remark Assume interrupts disabled.
860	* @remark This method pointer lives here because TRPM needs it.
861	*/
862	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
863
864	/** @name Various items that are frequently accessed.
865	* @{ */
866	/** Whether to recompile user mode code or run it raw/hm. */
867	bool fRecompileUser;
868	/** Whether to recompile supervisor mode code or run it raw/hm. */
869	bool fRecompileSupervisor;
870	/** Whether raw mode supports ring-1 code or not. */
871	bool fRawRing1Enabled;
872	/** PATM enabled flag.
873	* This is placed here for performance reasons. */
874	bool fPATMEnabled;
875	/** CSAM enabled flag.
876	* This is placed here for performance reasons. */
877	bool fCSAMEnabled;
878	/** Hardware VM support is available and enabled.
879	* Determined very early during init.
880	* This is placed here for performance reasons. */
881	bool fHMEnabled;
882	/** For asserting on fHMEnable usage. */
883	bool fHMEnabledFixed;
884	/** Hardware VM support requires a minimal raw-mode context.
885	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
886	bool fHMNeedRawModeCtx;
887	/** Set when this VM is the master FT node.
888	* @todo This doesn't need to be here, FTM should store it in it's own
889	* structures instead. */
890	bool fFaultTolerantMaster;
891	/** Large page enabled flag.
892	* @todo This doesn't need to be here, PGM should store it in it's own
893	* structures instead. */
894	bool fUseLargePages;
895	/** @} */
896
897	/** Alignment padding.. */
898	uint8_t uPadding1[2];
899
900	/** @name Debugging
901	* @{ */
902	/** Raw-mode Context VM Pointer. */
903	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
904	/** Ring-3 Host Context VM Pointer. */
905	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
906	/** Ring-0 Host Context VM Pointer. */
907	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
908	/** @} */
909
910	#if HC_ARCH_BITS == 32
911	/** Alignment padding.. */
912	uint32_t uPadding2;
913	#endif
914
915	/** @name Switcher statistics (remove)
916	* @{ */
917	/** Profiling the total time from Qemu to GC. */
918	STAMPROFILEADV StatTotalQemuToGC;
919	/** Profiling the total time from GC to Qemu. */
920	STAMPROFILEADV StatTotalGCToQemu;
921	/** Profiling the total time spent in GC. */
922	STAMPROFILEADV StatTotalInGC;
923	/** Profiling the total time spent not in Qemu. */
924	STAMPROFILEADV StatTotalInQemu;
925	/** Profiling the VMMSwitcher code for going to GC. */
926	STAMPROFILEADV StatSwitcherToGC;
927	/** Profiling the VMMSwitcher code for going to HC. */
928	STAMPROFILEADV StatSwitcherToHC;
929	STAMPROFILEADV StatSwitcherSaveRegs;
930	STAMPROFILEADV StatSwitcherSysEnter;
931	STAMPROFILEADV StatSwitcherDebug;
932	STAMPROFILEADV StatSwitcherCR0;
933	STAMPROFILEADV StatSwitcherCR4;
934	STAMPROFILEADV StatSwitcherJmpCR3;
935	STAMPROFILEADV StatSwitcherRstrRegs;
936	STAMPROFILEADV StatSwitcherLgdt;
937	STAMPROFILEADV StatSwitcherLidt;
938	STAMPROFILEADV StatSwitcherLldt;
939	STAMPROFILEADV StatSwitcherTSS;
940	/** @} */
941
942	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
943	* must start at the same offset on both 64-bit and 32-bit hosts. */
944	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
945
946	/** CPUM part. */
947	union
948	{
949	#ifdef ___CPUMInternal_h
950	struct CPUM s;
951	#endif
952	uint8_t padding[1536]; /* multiple of 64 */
953	} cpum;
954
955	/** VMM part. */
956	union
957	{
958	#ifdef ___VMMInternal_h
959	struct VMM s;
960	#endif
961	uint8_t padding[1600]; /* multiple of 64 */
962	} vmm;
963
964	/** PGM part. */
965	union
966	{
967	#ifdef ___PGMInternal_h
968	struct PGM s;
969	#endif
970	uint8_t padding[40962+6080]; / multiple of 64 */
971	} pgm;
972
973	/** HM part. */
974	union
975	{
976	#ifdef ___HMInternal_h
977	struct HM s;
978	#endif
979	uint8_t padding[5376]; /* multiple of 64 */
980	} hm;
981
982	/** TRPM part. */
983	union
984	{
985	#ifdef ___TRPMInternal_h
986	struct TRPM s;
987	#endif
988	uint8_t padding[5248]; /* multiple of 64 */
989	} trpm;
990
991	/** SELM part. */
992	union
993	{
994	#ifdef ___SELMInternal_h
995	struct SELM s;
996	#endif
997	uint8_t padding[768]; /* multiple of 64 */
998	} selm;
999
1000	/** MM part. */
1001	union
1002	{
1003	#ifdef ___MMInternal_h
1004	struct MM s;
1005	#endif
1006	uint8_t padding[192]; /* multiple of 64 */
1007	} mm;
1008
1009	/** PDM part. */
1010	union
1011	{
1012	#ifdef ___PDMInternal_h
1013	struct PDM s;
1014	#endif
1015	uint8_t padding[1920]; /* multiple of 64 */
1016	} pdm;
1017
1018	/** IOM part. */
1019	union
1020	{
1021	#ifdef ___IOMInternal_h
1022	struct IOM s;
1023	#endif
1024	uint8_t padding[896]; /* multiple of 64 */
1025	} iom;
1026
1027	/** PATM part. */
1028	union
1029	{
1030	#ifdef ___PATMInternal_h
1031	struct PATM s;
1032	#endif
1033	uint8_t padding[768]; /* multiple of 64 */
1034	} patm;
1035
1036	/** CSAM part. */
1037	union
1038	{
1039	#ifdef ___CSAMInternal_h
1040	struct CSAM s;
1041	#endif
1042	uint8_t padding[1088]; /* multiple of 64 */
1043	} csam;
1044
1045	/** EM part. */
1046	union
1047	{
1048	#ifdef ___EMInternal_h
1049	struct EM s;
1050	#endif
1051	uint8_t padding[256]; /* multiple of 64 */
1052	} em;
1053
1054	/** TM part. */
1055	union
1056	{
1057	#ifdef ___TMInternal_h
1058	struct TM s;
1059	#endif
1060	uint8_t padding[2432]; /* multiple of 64 */
1061	} tm;
1062
1063	/** DBGF part. */
1064	union
1065	{
1066	#ifdef ___DBGFInternal_h
1067	struct DBGF s;
1068	#endif
1069	uint8_t padding[2368]; /* multiple of 64 */
1070	} dbgf;
1071
1072	/** SSM part. */
1073	union
1074	{
1075	#ifdef ___SSMInternal_h
1076	struct SSM s;
1077	#endif
1078	uint8_t padding[128]; /* multiple of 64 */
1079	} ssm;
1080
1081	/** FTM part. */
1082	union
1083	{
1084	#ifdef ___FTMInternal_h
1085	struct FTM s;
1086	#endif
1087	uint8_t padding[512]; /* multiple of 64 */
1088	} ftm;
1089
1090	/** REM part. */
1091	union
1092	{
1093	#ifdef ___REMInternal_h
1094	struct REM s;
1095	#endif
1096	uint8_t padding[0x11100]; /* multiple of 64 */
1097	} rem;
1098
1099	/* ---- begin small stuff ---- */
1100
1101	/** VM part. */
1102	union
1103	{
1104	#ifdef ___VMInternal_h
1105	struct VMINT s;
1106	#endif
1107	uint8_t padding[24]; /* multiple of 8 */
1108	} vm;
1109
1110	/** CFGM part. */
1111	union
1112	{
1113	#ifdef ___CFGMInternal_h
1114	struct CFGM s;
1115	#endif
1116	uint8_t padding[8]; /* multiple of 8 */
1117	} cfgm;
1118
1119
1120	/** Padding for aligning the cpu array on a page boundary. */
1121	uint8_t abAlignment2[478];
1122
1123	/* ---- end small stuff ---- */
1124
1125	/** VMCPU array for the configured number of virtual CPUs.
1126	* Must be aligned on a page boundary for TLB hit reasons as well as
1127	* alignment of VMCPU members. */
1128	VMCPU aCpus[1];
1129	} VM;
1130
1131
1132	#ifdef IN_RC
1133	RT_C_DECLS_BEGIN
1134
1135	/** The VM structure.
1136	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1137	* of those magic globals which we should avoid using.
1138	*/
1139	extern DECLIMPORT(VM) g_VM;
1140
1141	RT_C_DECLS_END
1142	#endif
1143
1144	/** @} */
1145
1146	#endif
1147

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source: vbox/trunk/include/VBox/vmm/vm.h@ 45739

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