1 | /** @file
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2 | * PGM - Page Monitor / Monitor.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2020 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef VBOX_INCLUDED_vmm_pgm_h
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27 | #define VBOX_INCLUDED_vmm_pgm_h
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28 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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29 | # pragma once
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30 | #endif
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31 |
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32 | #include <VBox/types.h>
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33 | #include <VBox/sup.h>
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34 | #include <VBox/vmm/vmapi.h>
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35 | #include <VBox/vmm/gmm.h> /* for PGMMREGISTERSHAREDMODULEREQ */
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36 | #include <iprt/x86.h>
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37 | #include <VBox/param.h>
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38 |
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39 | RT_C_DECLS_BEGIN
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40 |
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41 | /** @defgroup grp_pgm The Page Monitor / Manager API
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42 | * @ingroup grp_vmm
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43 | * @{
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44 | */
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45 |
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46 | /**
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47 | * FNPGMRELOCATE callback mode.
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48 | */
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49 | typedef enum PGMRELOCATECALL
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50 | {
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51 | /** The callback is for checking if the suggested address is suitable. */
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52 | PGMRELOCATECALL_SUGGEST = 1,
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53 | /** The callback is for executing the relocation. */
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54 | PGMRELOCATECALL_RELOCATE
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55 | } PGMRELOCATECALL;
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56 |
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57 |
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58 | /**
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59 | * Callback function which will be called when PGM is trying to find
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60 | * a new location for the mapping.
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61 | *
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62 | * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
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63 | * In 1) the callback should say if it objects to a suggested new location. If it
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64 | * accepts the new location, it is called again for doing it's relocation.
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65 | *
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66 | *
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67 | * @returns true if the location is ok.
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68 | * @returns false if another location should be found.
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69 | * @param pVM The cross context VM structure.
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70 | * @param GCPtrOld The old virtual address.
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71 | * @param GCPtrNew The new virtual address.
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72 | * @param enmMode Used to indicate the callback mode.
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73 | * @param pvUser User argument.
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74 | * @remark The return value is no a failure indicator, it's an acceptance
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75 | * indicator. Relocation can not fail!
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76 | */
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77 | typedef DECLCALLBACKTYPE(bool, FNPGMRELOCATE,(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser));
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78 | /** Pointer to a relocation callback function. */
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79 | typedef FNPGMRELOCATE *PFNPGMRELOCATE;
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80 |
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81 |
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82 | /**
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83 | * Memory access origin.
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84 | */
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85 | typedef enum PGMACCESSORIGIN
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86 | {
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87 | /** Invalid zero value. */
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88 | PGMACCESSORIGIN_INVALID = 0,
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89 | /** IEM is access memory. */
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90 | PGMACCESSORIGIN_IEM,
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91 | /** HM is access memory. */
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92 | PGMACCESSORIGIN_HM,
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93 | /** Some device is access memory. */
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94 | PGMACCESSORIGIN_DEVICE,
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95 | /** Someone debugging is access memory. */
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96 | PGMACCESSORIGIN_DEBUGGER,
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97 | /** SELM is access memory. */
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98 | PGMACCESSORIGIN_SELM,
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99 | /** FTM is access memory. */
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100 | PGMACCESSORIGIN_FTM,
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101 | /** REM is access memory. */
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102 | PGMACCESSORIGIN_REM,
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103 | /** IOM is access memory. */
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104 | PGMACCESSORIGIN_IOM,
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105 | /** End of valid values. */
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106 | PGMACCESSORIGIN_END,
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107 | /** Type size hack. */
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108 | PGMACCESSORIGIN_32BIT_HACK = 0x7fffffff
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109 | } PGMACCESSORIGIN;
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110 |
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111 |
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112 | /**
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113 | * Physical page access handler kind.
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114 | */
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115 | typedef enum PGMPHYSHANDLERKIND
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116 | {
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117 | /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
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118 | PGMPHYSHANDLERKIND_MMIO = 1,
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119 | /** Handler all write access to a physical page range. */
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120 | PGMPHYSHANDLERKIND_WRITE,
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121 | /** Handler all access to a physical page range. */
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122 | PGMPHYSHANDLERKIND_ALL
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123 |
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124 | } PGMPHYSHANDLERKIND;
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125 |
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126 | /**
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127 | * Guest Access type
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128 | */
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129 | typedef enum PGMACCESSTYPE
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130 | {
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131 | /** Read access. */
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132 | PGMACCESSTYPE_READ = 1,
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133 | /** Write access. */
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134 | PGMACCESSTYPE_WRITE
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135 | } PGMACCESSTYPE;
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136 |
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137 |
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138 | /** @def PGM_ALL_CB_DECL
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139 | * Macro for declaring a handler callback for all contexts. The handler
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140 | * callback is static in ring-3, and exported in RC and R0.
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141 | * @sa PGM_ALL_CB2_DECL.
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142 | */
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143 | #if defined(IN_RC) || defined(IN_RING0)
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144 | # ifdef __cplusplus
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145 | # define PGM_ALL_CB_DECL(type) extern "C" DECLCALLBACK(DECLEXPORT(type))
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146 | # else
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147 | # define PGM_ALL_CB_DECL(type) DECLCALLBACK(DECLEXPORT(type))
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148 | # endif
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149 | #else
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150 | # define PGM_ALL_CB_DECL(type) static DECLCALLBACK(type)
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151 | #endif
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152 |
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153 | /** @def PGM_ALL_CB2_DECL
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154 | * Macro for declaring a handler callback for all contexts. The handler
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155 | * callback is hidden in ring-3, and exported in RC and R0.
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156 | * @sa PGM_ALL_CB2_DECL.
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157 | */
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158 | #if defined(IN_RC) || defined(IN_RING0)
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159 | # ifdef __cplusplus
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160 | # define PGM_ALL_CB2_DECL(type) extern "C" DECLCALLBACK(DECLEXPORT(type))
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161 | # else
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162 | # define PGM_ALL_CB2_DECL(type) DECLCALLBACK(DECLEXPORT(type))
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163 | # endif
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164 | #else
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165 | # define PGM_ALL_CB2_DECL(type) DECL_HIDDEN_CALLBACK(type)
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166 | #endif
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167 |
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168 | /** @def PGM_ALL_CB2_PROTO
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169 | * Macro for declaring a handler callback for all contexts. The handler
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170 | * callback is hidden in ring-3, and exported in RC and R0.
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171 | * @param fnType The callback function type.
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172 | * @sa PGM_ALL_CB2_DECL.
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173 | */
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174 | #if defined(IN_RC) || defined(IN_RING0)
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175 | # ifdef __cplusplus
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176 | # define PGM_ALL_CB2_PROTO(fnType) extern "C" DECLEXPORT(fnType)
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177 | # else
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178 | # define PGM_ALL_CB2_PROTO(fnType) DECLEXPORT(fnType)
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179 | # endif
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180 | #else
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181 | # define PGM_ALL_CB2_PROTO(fnType) DECLHIDDEN(fnType)
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182 | #endif
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183 |
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184 |
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185 | /**
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186 | * \#PF Handler callback for physical access handler ranges in RC and R0.
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187 | *
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188 | * @returns Strict VBox status code (appropriate for ring-0 and raw-mode).
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189 | * @param pVM The cross context VM structure.
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190 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
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191 | * @param uErrorCode CPU Error code.
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192 | * @param pRegFrame Trap register frame.
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193 | * NULL on DMA and other non CPU access.
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194 | * @param pvFault The fault address (cr2).
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195 | * @param GCPhysFault The GC physical address corresponding to pvFault.
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196 | * @param pvUser User argument.
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197 | * @thread EMT(pVCpu)
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198 | */
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199 | typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPGMRZPHYSPFHANDLER,(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame,
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200 | RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser));
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201 | /** Pointer to PGM access callback. */
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202 | typedef FNPGMRZPHYSPFHANDLER *PFNPGMRZPHYSPFHANDLER;
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203 |
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204 |
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205 | /**
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206 | * Access handler callback for physical access handler ranges.
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207 | *
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208 | * The handler can not raise any faults, it's mainly for monitoring write access
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209 | * to certain pages (like MMIO).
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210 | *
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211 | * @returns Strict VBox status code in ring-0 and raw-mode context, in ring-3
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212 | * the only supported informational status code is
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213 | * VINF_PGM_HANDLER_DO_DEFAULT.
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214 | * @retval VINF_SUCCESS if the handler have carried out the operation.
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215 | * @retval VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the
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216 | * access operation.
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217 | * @retval VINF_EM_XXX in ring-0 and raw-mode context.
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218 | *
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219 | * @param pVM The cross context VM structure.
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220 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
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221 | * @param GCPhys The physical address the guest is writing to.
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222 | * @param pvPhys The HC mapping of that address.
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223 | * @param pvBuf What the guest is reading/writing.
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224 | * @param cbBuf How much it's reading/writing.
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225 | * @param enmAccessType The access type.
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226 | * @param enmOrigin The origin of this call.
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227 | * @param pvUser User argument.
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228 | * @thread EMT(pVCpu)
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229 | */
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230 | typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPGMPHYSHANDLER,(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys,
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231 | void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType,
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232 | PGMACCESSORIGIN enmOrigin, void *pvUser));
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233 | /** Pointer to PGM access callback. */
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234 | typedef FNPGMPHYSHANDLER *PFNPGMPHYSHANDLER;
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235 |
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236 |
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237 | /**
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238 | * Paging mode.
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239 | *
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240 | * @note Part of saved state. Change with extreme care.
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241 | */
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242 | typedef enum PGMMODE
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243 | {
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244 | /** The usual invalid value. */
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245 | PGMMODE_INVALID = 0,
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246 | /** Real mode. */
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247 | PGMMODE_REAL,
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248 | /** Protected mode, no paging. */
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249 | PGMMODE_PROTECTED,
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250 | /** 32-bit paging. */
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251 | PGMMODE_32_BIT,
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252 | /** PAE paging. */
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253 | PGMMODE_PAE,
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254 | /** PAE paging with NX enabled. */
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255 | PGMMODE_PAE_NX,
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256 | /** 64-bit AMD paging (long mode). */
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257 | PGMMODE_AMD64,
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258 | /** 64-bit AMD paging (long mode) with NX enabled. */
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259 | PGMMODE_AMD64_NX,
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260 | /** 32-bit nested paging mode (shadow only; guest physical to host physical). */
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261 | PGMMODE_NESTED_32BIT,
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262 | /** PAE nested paging mode (shadow only; guest physical to host physical). */
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263 | PGMMODE_NESTED_PAE,
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264 | /** AMD64 nested paging mode (shadow only; guest physical to host physical). */
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265 | PGMMODE_NESTED_AMD64,
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266 | /** Extended paging (Intel) mode. */
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267 | PGMMODE_EPT,
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268 | /** Special mode used by NEM to indicate no shadow paging necessary. */
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269 | PGMMODE_NONE,
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270 | /** The max number of modes */
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271 | PGMMODE_MAX,
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272 | /** 32bit hackishness. */
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273 | PGMMODE_32BIT_HACK = 0x7fffffff
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274 | } PGMMODE;
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275 |
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276 | /** Macro for checking if the guest is using paging.
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277 | * @param enmMode PGMMODE_*.
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278 | * @remark ASSUMES certain order of the PGMMODE_* values.
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279 | */
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280 | #define PGMMODE_WITH_PAGING(enmMode) ((enmMode) >= PGMMODE_32_BIT)
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281 |
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282 | /** Macro for checking if it's one of the long mode modes.
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283 | * @param enmMode PGMMODE_*.
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284 | */
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285 | #define PGMMODE_IS_LONG_MODE(enmMode) ((enmMode) == PGMMODE_AMD64_NX || (enmMode) == PGMMODE_AMD64)
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286 |
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287 | /** Macro for checking if it's one of the AMD64 nested modes.
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288 | * @param enmMode PGMMODE_*.
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289 | */
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290 | #define PGMMODE_IS_NESTED(enmMode) ( (enmMode) == PGMMODE_NESTED_32BIT \
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291 | || (enmMode) == PGMMODE_NESTED_PAE \
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292 | || (enmMode) == PGMMODE_NESTED_AMD64)
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293 |
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294 | /** Macro for checking if it's one of the PAE modes.
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295 | * @param enmMode PGMMODE_*.
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296 | */
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297 | #define PGMMODE_IS_PAE(enmMode) ( (enmMode) == PGMMODE_PAE \
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298 | || (enmMode) == PGMMODE_PAE_NX)
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299 |
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300 | /**
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301 | * Is the ROM mapped (true) or is the shadow RAM mapped (false).
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302 | *
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303 | * @returns boolean.
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304 | * @param enmProt The PGMROMPROT value, must be valid.
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305 | */
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306 | #define PGMROMPROT_IS_ROM(enmProt) \
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307 | ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
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308 | || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
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309 |
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310 |
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311 | VMMDECL(bool) PGMIsLockOwner(PVMCC pVM);
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312 |
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313 | VMMDECL(int) PGMRegisterStringFormatTypes(void);
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314 | VMMDECL(void) PGMDeregisterStringFormatTypes(void);
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315 | VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu);
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316 | VMMDECL(int) PGMTrap0eHandler(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
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317 | VMMDECL(int) PGMPrefetchPage(PVMCPUCC pVCpu, RTGCPTR GCPtrPage);
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318 | VMMDECL(int) PGMVerifyAccess(PVMCPUCC pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
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319 | VMMDECL(int) PGMIsValidAccess(PVMCPUCC pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
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320 | VMMDECL(VBOXSTRICTRC) PGMInterpretInstruction(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
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321 | VMMDECL(int) PGMShwGetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
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322 | VMMDECL(int) PGMShwMakePageReadonly(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
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323 | VMMDECL(int) PGMShwMakePageWritable(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
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324 | VMMDECL(int) PGMShwMakePageNotPresent(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
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325 | /** @name Flags for PGMShwMakePageReadonly, PGMShwMakePageWritable and
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326 | * PGMShwMakePageNotPresent
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327 | * @{ */
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328 | /** The call is from an access handler for dealing with the a faulting write
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329 | * operation. The virtual address is within the same page. */
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330 | #define PGM_MK_PG_IS_WRITE_FAULT RT_BIT(0)
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331 | /** The page is an MMIO2. */
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332 | #define PGM_MK_PG_IS_MMIO2 RT_BIT(1)
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333 | /** @}*/
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334 | VMMDECL(int) PGMGstGetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
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335 | VMMDECL(bool) PGMGstIsPagePresent(PVMCPUCC pVCpu, RTGCPTR GCPtr);
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336 | VMMDECL(int) PGMGstSetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
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337 | VMMDECL(int) PGMGstModifyPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
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338 | VMM_INT_DECL(bool) PGMGstArePaePdpesValid(PVMCPUCC pVCpu, PCX86PDPE paPaePdpes);
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339 | VMM_INT_DECL(int) PGMGstMapPaePdpes(PVMCPUCC pVCpu, PCX86PDPE paPaePdpes);
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340 | VMM_INT_DECL(int) PGMGstMapPaePdpesAtCr3(PVMCPUCC pVCpu, uint64_t cr3);
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341 |
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342 | VMMDECL(int) PGMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCPtrPage);
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343 | VMMDECL(int) PGMFlushTLB(PVMCPUCC pVCpu, uint64_t cr3, bool fGlobal, bool fPdpesMapped);
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344 | VMMDECL(int) PGMSyncCR3(PVMCPUCC pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
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345 | VMMDECL(int) PGMUpdateCR3(PVMCPUCC pVCpu, uint64_t cr3, bool fPdpesMapped);
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346 | VMMDECL(int) PGMChangeMode(PVMCPUCC pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
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347 | VMM_INT_DECL(int) PGMHCChangeMode(PVMCC pVM, PVMCPUCC pVCpu, PGMMODE enmGuestMode);
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348 | VMMDECL(void) PGMCr0WpEnabled(PVMCPUCC pVCpu);
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349 | VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu);
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350 | VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu);
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351 | VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
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352 | VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
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353 | VMM_INT_DECL(RTGCPHYS) PGMGetGuestCR3Phys(PVMCPU pVCpu);
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354 | VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
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355 | VMMDECL(bool) PGMHasDirtyPages(PVM pVM);
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356 |
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357 | /** PGM physical access handler type registration handle (heap offset, valid
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358 | * cross contexts without needing fixing up). Callbacks and handler type is
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359 | * associated with this and it is shared by all handler registrations. */
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360 | typedef uint32_t PGMPHYSHANDLERTYPE;
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361 | /** Pointer to a PGM physical handler type registration handle. */
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362 | typedef PGMPHYSHANDLERTYPE *PPGMPHYSHANDLERTYPE;
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363 | /** NIL value for PGM physical access handler type handle. */
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364 | #define NIL_PGMPHYSHANDLERTYPE UINT32_MAX
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365 | VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVMCC pVM, PGMPHYSHANDLERTYPE hType);
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366 | VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType);
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367 |
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368 | VMMDECL(int) PGMHandlerPhysicalRegister(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
|
---|
369 | RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
|
---|
370 | R3PTRTYPE(const char *) pszDesc);
|
---|
371 | VMMDECL(int) PGMHandlerPhysicalModify(PVMCC pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
|
---|
372 | VMMDECL(int) PGMHandlerPhysicalDeregister(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
373 | VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVMCC pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0);
|
---|
374 | VMMDECL(int) PGMHandlerPhysicalSplit(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
|
---|
375 | VMMDECL(int) PGMHandlerPhysicalJoin(PVMCC pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
|
---|
376 | VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
|
---|
377 | VMMDECL(int) PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
|
---|
378 | PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMMio2PageRemap);
|
---|
379 | VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
|
---|
380 | VMMDECL(int) PGMHandlerPhysicalReset(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
381 | VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
382 |
|
---|
383 |
|
---|
384 | /**
|
---|
385 | * Page type.
|
---|
386 | *
|
---|
387 | * @remarks This enum has to fit in a 3-bit field (see PGMPAGE::u3Type).
|
---|
388 | * @remarks This is used in the saved state, so changes to it requires bumping
|
---|
389 | * the saved state version.
|
---|
390 | * @todo So, convert to \#defines!
|
---|
391 | */
|
---|
392 | typedef enum PGMPAGETYPE
|
---|
393 | {
|
---|
394 | /** The usual invalid zero entry. */
|
---|
395 | PGMPAGETYPE_INVALID = 0,
|
---|
396 | /** RAM page. (RWX) */
|
---|
397 | PGMPAGETYPE_RAM,
|
---|
398 | /** MMIO2 page. (RWX) */
|
---|
399 | PGMPAGETYPE_MMIO2,
|
---|
400 | /** MMIO2 page aliased over an MMIO page. (RWX)
|
---|
401 | * See PGMHandlerPhysicalPageAlias(). */
|
---|
402 | PGMPAGETYPE_MMIO2_ALIAS_MMIO,
|
---|
403 | /** Special page aliased over an MMIO page. (RWX)
|
---|
404 | * See PGMHandlerPhysicalPageAliasHC(), but this is generally only used for
|
---|
405 | * VT-x's APIC access page at the moment. Treated as MMIO by everyone except
|
---|
406 | * the shadow paging code. */
|
---|
407 | PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
|
---|
408 | /** Shadowed ROM. (RWX) */
|
---|
409 | PGMPAGETYPE_ROM_SHADOW,
|
---|
410 | /** ROM page. (R-X) */
|
---|
411 | PGMPAGETYPE_ROM,
|
---|
412 | /** MMIO page. (---) */
|
---|
413 | PGMPAGETYPE_MMIO,
|
---|
414 | /** End of valid entries. */
|
---|
415 | PGMPAGETYPE_END
|
---|
416 | } PGMPAGETYPE;
|
---|
417 | AssertCompile(PGMPAGETYPE_END == 8);
|
---|
418 |
|
---|
419 | /** @name PGM page type predicates.
|
---|
420 | * @{ */
|
---|
421 | #define PGMPAGETYPE_IS_READABLE(a_enmType) ( (a_enmType) <= PGMPAGETYPE_ROM )
|
---|
422 | #define PGMPAGETYPE_IS_WRITEABLE(a_enmType) ( (a_enmType) <= PGMPAGETYPE_ROM_SHADOW )
|
---|
423 | #define PGMPAGETYPE_IS_RWX(a_enmType) ( (a_enmType) <= PGMPAGETYPE_ROM_SHADOW )
|
---|
424 | #define PGMPAGETYPE_IS_ROX(a_enmType) ( (a_enmType) == PGMPAGETYPE_ROM )
|
---|
425 | #define PGMPAGETYPE_IS_NP(a_enmType) ( (a_enmType) == PGMPAGETYPE_MMIO )
|
---|
426 | /** @} */
|
---|
427 |
|
---|
428 |
|
---|
429 | VMM_INT_DECL(PGMPAGETYPE) PGMPhysGetPageType(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
430 |
|
---|
431 | VMM_INT_DECL(int) PGMPhysGCPhys2HCPhys(PVMCC pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
|
---|
432 | VMM_INT_DECL(int) PGMPhysGCPtr2HCPhys(PVMCPUCC pVCpu, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
|
---|
433 | VMM_INT_DECL(int) PGMPhysGCPhys2CCPtr(PVMCC pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
434 | VMM_INT_DECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVMCC pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
435 | VMM_INT_DECL(int) PGMPhysGCPtr2CCPtr(PVMCPU pVCpu, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
436 | VMM_INT_DECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVMCPUCC pVCpu, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
437 |
|
---|
438 | VMMDECL(bool) PGMPhysIsA20Enabled(PVMCPU pVCpu);
|
---|
439 | VMMDECL(bool) PGMPhysIsGCPhysValid(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
440 | VMMDECL(bool) PGMPhysIsGCPhysNormal(PVMCC pVM, RTGCPHYS GCPhys);
|
---|
441 | VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPUCC pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
|
---|
442 | VMMDECL(void) PGMPhysReleasePageMappingLock(PVMCC pVM, PPGMPAGEMAPLOCK pLock);
|
---|
443 | VMMDECL(void) PGMPhysBulkReleasePageMappingLocks(PVMCC pVM, uint32_t cPages, PPGMPAGEMAPLOCK paLock);
|
---|
444 |
|
---|
445 | /** @def PGM_PHYS_RW_IS_SUCCESS
|
---|
446 | * Check whether a PGMPhysRead, PGMPhysWrite, PGMPhysReadGCPtr or
|
---|
447 | * PGMPhysWriteGCPtr call completed the given task.
|
---|
448 | *
|
---|
449 | * @returns true if completed, false if not.
|
---|
450 | * @param a_rcStrict The status code.
|
---|
451 | * @sa IOM_SUCCESS
|
---|
452 | */
|
---|
453 | #ifdef IN_RING3
|
---|
454 | # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \
|
---|
455 | ( (a_rcStrict) == VINF_SUCCESS \
|
---|
456 | || (a_rcStrict) == VINF_EM_DBG_STOP \
|
---|
457 | || (a_rcStrict) == VINF_EM_DBG_EVENT \
|
---|
458 | || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \
|
---|
459 | )
|
---|
460 | #elif defined(IN_RING0)
|
---|
461 | # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \
|
---|
462 | ( (a_rcStrict) == VINF_SUCCESS \
|
---|
463 | || (a_rcStrict) == VINF_IOM_R3_MMIO_COMMIT_WRITE \
|
---|
464 | || (a_rcStrict) == VINF_EM_OFF \
|
---|
465 | || (a_rcStrict) == VINF_EM_SUSPEND \
|
---|
466 | || (a_rcStrict) == VINF_EM_RESET \
|
---|
467 | || (a_rcStrict) == VINF_EM_HALT \
|
---|
468 | || (a_rcStrict) == VINF_EM_DBG_STOP \
|
---|
469 | || (a_rcStrict) == VINF_EM_DBG_EVENT \
|
---|
470 | || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \
|
---|
471 | )
|
---|
472 | #elif defined(IN_RC)
|
---|
473 | # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \
|
---|
474 | ( (a_rcStrict) == VINF_SUCCESS \
|
---|
475 | || (a_rcStrict) == VINF_IOM_R3_MMIO_COMMIT_WRITE \
|
---|
476 | || (a_rcStrict) == VINF_EM_OFF \
|
---|
477 | || (a_rcStrict) == VINF_EM_SUSPEND \
|
---|
478 | || (a_rcStrict) == VINF_EM_RESET \
|
---|
479 | || (a_rcStrict) == VINF_EM_HALT \
|
---|
480 | || (a_rcStrict) == VINF_SELM_SYNC_GDT \
|
---|
481 | || (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT \
|
---|
482 | || (a_rcStrict) == VINF_EM_DBG_STOP \
|
---|
483 | || (a_rcStrict) == VINF_EM_DBG_EVENT \
|
---|
484 | || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \
|
---|
485 | )
|
---|
486 | #endif
|
---|
487 | /** @def PGM_PHYS_RW_DO_UPDATE_STRICT_RC
|
---|
488 | * Updates the return code with a new result.
|
---|
489 | *
|
---|
490 | * Both status codes must be successes according to PGM_PHYS_RW_IS_SUCCESS.
|
---|
491 | *
|
---|
492 | * @param a_rcStrict The current return code, to be updated.
|
---|
493 | * @param a_rcStrict2 The new return code to merge in.
|
---|
494 | */
|
---|
495 | #ifdef IN_RING3
|
---|
496 | # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \
|
---|
497 | do { \
|
---|
498 | Assert(rcStrict == VINF_SUCCESS); \
|
---|
499 | Assert(rcStrict2 == VINF_SUCCESS); \
|
---|
500 | } while (0)
|
---|
501 | #elif defined(IN_RING0)
|
---|
502 | # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \
|
---|
503 | do { \
|
---|
504 | Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict)); \
|
---|
505 | Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict2)); \
|
---|
506 | AssertCompile(VINF_IOM_R3_MMIO_COMMIT_WRITE > VINF_EM_LAST); \
|
---|
507 | if ((a_rcStrict2) == VINF_SUCCESS || (a_rcStrict) == (a_rcStrict2)) \
|
---|
508 | { /* likely */ } \
|
---|
509 | else if ( (a_rcStrict) == VINF_SUCCESS \
|
---|
510 | || (a_rcStrict) > (a_rcStrict2)) \
|
---|
511 | (a_rcStrict) = (a_rcStrict2); \
|
---|
512 | } while (0)
|
---|
513 | #elif defined(IN_RC)
|
---|
514 | # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \
|
---|
515 | do { \
|
---|
516 | Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict)); \
|
---|
517 | Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict2)); \
|
---|
518 | AssertCompile(VINF_SELM_SYNC_GDT > VINF_EM_LAST); \
|
---|
519 | AssertCompile(VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT > VINF_EM_LAST); \
|
---|
520 | AssertCompile(VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT < VINF_SELM_SYNC_GDT); \
|
---|
521 | AssertCompile(VINF_IOM_R3_MMIO_COMMIT_WRITE > VINF_EM_LAST); \
|
---|
522 | AssertCompile(VINF_IOM_R3_MMIO_COMMIT_WRITE > VINF_SELM_SYNC_GDT); \
|
---|
523 | AssertCompile(VINF_IOM_R3_MMIO_COMMIT_WRITE > VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT); \
|
---|
524 | if ((a_rcStrict2) == VINF_SUCCESS || (a_rcStrict) == (a_rcStrict2)) \
|
---|
525 | { /* likely */ } \
|
---|
526 | else if ((a_rcStrict) == VINF_SUCCESS) \
|
---|
527 | (a_rcStrict) = (a_rcStrict2); \
|
---|
528 | else if ( ( (a_rcStrict) > (a_rcStrict2) \
|
---|
529 | && ( (a_rcStrict2) <= VINF_EM_RESET \
|
---|
530 | || (a_rcStrict) != VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT) ) \
|
---|
531 | || ( (a_rcStrict2) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT \
|
---|
532 | && (a_rcStrict) > VINF_EM_RESET) ) \
|
---|
533 | (a_rcStrict) = (a_rcStrict2); \
|
---|
534 | } while (0)
|
---|
535 | #endif
|
---|
536 |
|
---|
537 | VMMDECL(VBOXSTRICTRC) PGMPhysRead(PVMCC pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
|
---|
538 | VMMDECL(VBOXSTRICTRC) PGMPhysWrite(PVMCC pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
|
---|
539 | VMMDECL(VBOXSTRICTRC) PGMPhysReadGCPtr(PVMCPUCC pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
|
---|
540 | VMMDECL(VBOXSTRICTRC) PGMPhysWriteGCPtr(PVMCPUCC pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
|
---|
541 |
|
---|
542 | VMMDECL(int) PGMPhysSimpleReadGCPhys(PVMCC pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
|
---|
543 | VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVMCC pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
|
---|
544 | VMMDECL(int) PGMPhysSimpleReadGCPtr(PVMCPUCC pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
|
---|
545 | VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVMCPUCC pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
|
---|
546 | VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPUCC pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
|
---|
547 | VMMDECL(int) PGMPhysInterpretedRead(PVMCPUCC pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
|
---|
548 | VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPUCC pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
|
---|
549 | VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPUCC pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
|
---|
550 |
|
---|
551 | VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers, void **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
552 | VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVMCC pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers);
|
---|
553 | VMM_INT_DECL(int) PGMPhysIemGCPhys2PtrNoLock(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, uint64_t const volatile *puTlbPhysRev,
|
---|
554 | #if defined(IN_RC)
|
---|
555 | R3PTRTYPE(uint8_t *) *ppb,
|
---|
556 | #else
|
---|
557 | R3R0PTRTYPE(uint8_t *) *ppb,
|
---|
558 | #endif
|
---|
559 | uint64_t *pfTlb);
|
---|
560 | /** @name Flags returned by PGMPhysIemGCPhys2PtrNoLock
|
---|
561 | * @{ */
|
---|
562 | #define PGMIEMGCPHYS2PTR_F_NO_WRITE RT_BIT_32(3) /**< Not writable (IEMTLBE_F_PG_NO_WRITE). */
|
---|
563 | #define PGMIEMGCPHYS2PTR_F_NO_READ RT_BIT_32(4) /**< Not readable (IEMTLBE_F_PG_NO_READ). */
|
---|
564 | #define PGMIEMGCPHYS2PTR_F_NO_MAPPINGR3 RT_BIT_32(7) /**< No ring-3 mapping (IEMTLBE_F_NO_MAPPINGR3). */
|
---|
565 | /** @} */
|
---|
566 |
|
---|
567 | /** Information returned by PGMPhysNemQueryPageInfo. */
|
---|
568 | typedef struct PGMPHYSNEMPAGEINFO
|
---|
569 | {
|
---|
570 | /** The host physical address of the page, NIL_HCPHYS if invalid page. */
|
---|
571 | RTHCPHYS HCPhys;
|
---|
572 | /** The NEM access mode for the page, NEM_PAGE_PROT_XXX */
|
---|
573 | uint32_t fNemProt : 8;
|
---|
574 | /** The NEM state associated with the PAGE. */
|
---|
575 | uint32_t u2NemState : 2;
|
---|
576 | /** The NEM state associated with the PAGE before pgmPhysPageMakeWritable was called. */
|
---|
577 | uint32_t u2OldNemState : 2;
|
---|
578 | /** Set if the page has handler. */
|
---|
579 | uint32_t fHasHandlers : 1;
|
---|
580 | /** Set if is the zero page backing it. */
|
---|
581 | uint32_t fZeroPage : 1;
|
---|
582 | /** Set if the page has handler. */
|
---|
583 | PGMPAGETYPE enmType;
|
---|
584 | } PGMPHYSNEMPAGEINFO;
|
---|
585 | /** Pointer to page information for NEM. */
|
---|
586 | typedef PGMPHYSNEMPAGEINFO *PPGMPHYSNEMPAGEINFO;
|
---|
587 | /**
|
---|
588 | * Callback for checking that the page is in sync while under the PGM lock.
|
---|
589 | *
|
---|
590 | * NEM passes this callback to PGMPhysNemQueryPageInfo to check that the page is
|
---|
591 | * in-sync between PGM and the native hypervisor API in an atomic fashion.
|
---|
592 | *
|
---|
593 | * @returns VBox status code.
|
---|
594 | * @param pVM The cross context VM structure.
|
---|
595 | * @param pVCpu The cross context per virtual CPU structure. Optional,
|
---|
596 | * see PGMPhysNemQueryPageInfo.
|
---|
597 | * @param GCPhys The guest physical address (not A20 masked).
|
---|
598 | * @param pInfo The page info structure. This function updates the
|
---|
599 | * u2NemState memory and the caller will update the PGMPAGE
|
---|
600 | * copy accordingly.
|
---|
601 | * @param pvUser Callback user argument.
|
---|
602 | */
|
---|
603 | typedef DECLCALLBACKTYPE(int, FNPGMPHYSNEMCHECKPAGE,(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, PPGMPHYSNEMPAGEINFO pInfo, void *pvUser));
|
---|
604 | /** Pointer to a FNPGMPHYSNEMCHECKPAGE function. */
|
---|
605 | typedef FNPGMPHYSNEMCHECKPAGE *PFNPGMPHYSNEMCHECKPAGE;
|
---|
606 |
|
---|
607 | VMM_INT_DECL(int) PGMPhysNemPageInfoChecker(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, bool fMakeWritable,
|
---|
608 | PPGMPHYSNEMPAGEINFO pInfo, PFNPGMPHYSNEMCHECKPAGE pfnChecker, void *pvUser);
|
---|
609 |
|
---|
610 | /**
|
---|
611 | * Callback for use with PGMPhysNemEnumPagesByState.
|
---|
612 | * @returns VBox status code.
|
---|
613 | * Failure status will stop enumeration immediately and return.
|
---|
614 | * @param pVM The cross context VM structure.
|
---|
615 | * @param pVCpu The cross context per virtual CPU structure. Optional,
|
---|
616 | * see PGMPhysNemEnumPagesByState.
|
---|
617 | * @param GCPhys The guest physical address (not A20 masked).
|
---|
618 | * @param pu2NemState Pointer to variable with the NEM state. This can be
|
---|
619 | * update.
|
---|
620 | * @param pvUser The user argument.
|
---|
621 | */
|
---|
622 | typedef DECLCALLBACKTYPE(int, FNPGMPHYSNEMENUMCALLBACK,(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys,
|
---|
623 | uint8_t *pu2NemState, void *pvUser));
|
---|
624 | /** Pointer to a FNPGMPHYSNEMENUMCALLBACK function. */
|
---|
625 | typedef FNPGMPHYSNEMENUMCALLBACK *PFNPGMPHYSNEMENUMCALLBACK;
|
---|
626 | VMM_INT_DECL(int) PGMPhysNemEnumPagesByState(PVMCC pVM, PVMCPUCC VCpu, uint8_t uMinState,
|
---|
627 | PFNPGMPHYSNEMENUMCALLBACK pfnCallback, void *pvUser);
|
---|
628 |
|
---|
629 |
|
---|
630 | #ifdef VBOX_STRICT
|
---|
631 | VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVMCC pVM);
|
---|
632 | VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
|
---|
633 | VMMDECL(unsigned) PGMAssertCR3(PVMCC pVM, PVMCPUCC pVCpu, uint64_t cr3, uint64_t cr4);
|
---|
634 | #endif /* VBOX_STRICT */
|
---|
635 |
|
---|
636 | VMMDECL(int) PGMSetLargePageUsage(PVMCC pVM, bool fUseLargePages);
|
---|
637 |
|
---|
638 | /**
|
---|
639 | * Query large page usage state
|
---|
640 | *
|
---|
641 | * @returns 0 - disabled, 1 - enabled
|
---|
642 | * @param pVM The cross context VM structure.
|
---|
643 | */
|
---|
644 | #define PGMIsUsingLargePages(pVM) ((pVM)->pgm.s.fUseLargePages)
|
---|
645 |
|
---|
646 |
|
---|
647 | #ifdef IN_RING0
|
---|
648 | /** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
|
---|
649 | * @{
|
---|
650 | */
|
---|
651 | VMMR0_INT_DECL(int) PGMR0InitPerVMData(PGVM pGVM);
|
---|
652 | VMMR0_INT_DECL(int) PGMR0InitVM(PGVM pGVM);
|
---|
653 | VMMR0_INT_DECL(void) PGMR0CleanupVM(PGVM pGVM);
|
---|
654 | VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PGVM pGVM, VMCPUID idCpu);
|
---|
655 | VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PGVM pGVM, VMCPUID idCpu);
|
---|
656 | VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PGVM pGVM, VMCPUID idCpu);
|
---|
657 | VMMR0_INT_DECL(int) PGMR0PhysMMIO2MapKernel(PGVM pGVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2,
|
---|
658 | size_t offSub, size_t cbSub, void **ppvMapping);
|
---|
659 | VMMR0_INT_DECL(int) PGMR0PhysSetupIoMmu(PGVM pGVM);
|
---|
660 | VMMR0DECL(int) PGMR0SharedModuleCheck(PVMCC pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule,
|
---|
661 | PCRTGCPTR64 paRegionsGCPtrs);
|
---|
662 | VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PGVM pGVM, PGVMCPU pGVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
|
---|
663 | PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
|
---|
664 | VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PGVM pGVM, PGVMCPU pGVCpu, PGMMODE enmShwPagingMode,
|
---|
665 | PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, uint32_t uErr);
|
---|
666 | VMMR0_INT_DECL(int) PGMR0PoolGrow(PGVM pGVM, VMCPUID idCpu);
|
---|
667 | /** @} */
|
---|
668 | #endif /* IN_RING0 */
|
---|
669 |
|
---|
670 |
|
---|
671 |
|
---|
672 | #ifdef IN_RING3
|
---|
673 | /** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
|
---|
674 | * @{
|
---|
675 | */
|
---|
676 | VMMR3_INT_DECL(void) PGMR3EnableNemMode(PVM pVM);
|
---|
677 | VMMR3DECL(int) PGMR3Init(PVM pVM);
|
---|
678 | VMMR3DECL(int) PGMR3InitFinalize(PVM pVM);
|
---|
679 | VMMR3_INT_DECL(int) PGMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
|
---|
680 | VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
|
---|
681 | VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
|
---|
682 | VMMR3_INT_DECL(void) PGMR3Reset(PVM pVM);
|
---|
683 | VMMR3_INT_DECL(void) PGMR3ResetNoMorePhysWritesFlag(PVM pVM);
|
---|
684 | VMMR3_INT_DECL(void) PGMR3MemSetup(PVM pVM, bool fReset);
|
---|
685 | VMMR3DECL(int) PGMR3Term(PVM pVM);
|
---|
686 |
|
---|
687 | VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
|
---|
688 | VMMR3DECL(int) PGMR3PhysChangeMemBalloon(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage);
|
---|
689 | VMMR3DECL(int) PGMR3PhysWriteProtectRAM(PVM pVM);
|
---|
690 | VMMR3DECL(uint32_t) PGMR3PhysGetRamRangeCount(PVM pVM);
|
---|
691 | VMMR3DECL(int) PGMR3PhysGetRange(PVM pVM, uint32_t iRange, PRTGCPHYS pGCPhysStart, PRTGCPHYS pGCPhysLast,
|
---|
692 | const char **ppszDesc, bool *pfIsMmio);
|
---|
693 | VMMR3DECL(int) PGMR3QueryMemoryStats(PUVM pUVM, uint64_t *pcbTotalMem, uint64_t *pcbPrivateMem, uint64_t *pcbSharedMem, uint64_t *pcbZeroMem);
|
---|
694 | VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t *pcbAllocMem, uint64_t *pcbFreeMem, uint64_t *pcbBallonedMem, uint64_t *pcbSharedMem);
|
---|
695 |
|
---|
696 | VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType,
|
---|
697 | RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc);
|
---|
698 | VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
|
---|
699 | VMMR3_INT_DECL(int) PGMR3PhysMmio2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
|
---|
700 | uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion);
|
---|
701 | VMMR3_INT_DECL(int) PGMR3PhysMmio2Deregister(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
|
---|
702 | VMMR3_INT_DECL(int) PGMR3PhysMmio2Map(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
|
---|
703 | VMMR3_INT_DECL(int) PGMR3PhysMmio2Unmap(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
|
---|
704 | VMMR3_INT_DECL(int) PGMR3PhysMmio2Reduce(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion);
|
---|
705 | VMMR3_INT_DECL(int) PGMR3PhysMmio2ValidateHandle(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
|
---|
706 | VMMR3_INT_DECL(RTGCPHYS) PGMR3PhysMmio2GetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
|
---|
707 | VMMR3_INT_DECL(int) PGMR3PhysMmio2ChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion);
|
---|
708 |
|
---|
709 |
|
---|
710 | /** @name PGMR3PhysRegisterRom flags.
|
---|
711 | * @{ */
|
---|
712 | /** Inidicates that ROM shadowing should be enabled. */
|
---|
713 | #define PGMPHYS_ROM_FLAGS_SHADOWED UINT8_C(0x01)
|
---|
714 | /** Indicates that what pvBinary points to won't go away
|
---|
715 | * and can be used for strictness checks. */
|
---|
716 | #define PGMPHYS_ROM_FLAGS_PERMANENT_BINARY UINT8_C(0x02)
|
---|
717 | /** Indicates that the ROM is allowed to be missing from saved state.
|
---|
718 | * @note This is a hack for EFI, see @bugref{6940} */
|
---|
719 | #define PGMPHYS_ROM_FLAGS_MAYBE_MISSING_FROM_STATE UINT8_C(0x04)
|
---|
720 | /** Valid flags. */
|
---|
721 | #define PGMPHYS_ROM_FLAGS_VALID_MASK UINT8_C(0x07)
|
---|
722 | /** @} */
|
---|
723 |
|
---|
724 | VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
|
---|
725 | const void *pvBinary, uint32_t cbBinary, uint8_t fFlags, const char *pszDesc);
|
---|
726 | VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
|
---|
727 | VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
|
---|
728 | VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
|
---|
729 |
|
---|
730 | VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
|
---|
731 | VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
|
---|
732 | VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
|
---|
733 |
|
---|
734 | VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind,
|
---|
735 | PFNPGMPHYSHANDLER pfnHandlerR3,
|
---|
736 | R0PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR0,
|
---|
737 | R0PTRTYPE(PFNPGMRZPHYSPFHANDLER) pfnPfHandlerR0,
|
---|
738 | const char *pszDesc, PPGMPHYSHANDLERTYPE phType);
|
---|
739 | VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind,
|
---|
740 | R3PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR3,
|
---|
741 | const char *pszModR0, const char *pszHandlerR0, const char *pszPfHandlerR0,
|
---|
742 | const char *pszModRC, const char *pszHandlerRC, const char *pszPfHandlerRC,
|
---|
743 | const char *pszDesc,
|
---|
744 | PPGMPHYSHANDLERTYPE phType);
|
---|
745 | VMMR3_INT_DECL(int) PGMR3PoolGrow(PVM pVM, PVMCPU pVCpu);
|
---|
746 |
|
---|
747 | VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv);
|
---|
748 | VMMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
|
---|
749 | VMMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
|
---|
750 | VMMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
|
---|
751 | VMMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
|
---|
752 | VMMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value, PGMACCESSORIGIN enmOrigin);
|
---|
753 | VMMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value, PGMACCESSORIGIN enmOrigin);
|
---|
754 | VMMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value, PGMACCESSORIGIN enmOrigin);
|
---|
755 | VMMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value, PGMACCESSORIGIN enmOrigin);
|
---|
756 | VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
|
---|
757 | VMMR3DECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
|
---|
758 | VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
759 | VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
|
---|
760 | VMMR3DECL(int) PGMR3PhysBulkGCPhys2CCPtrExternal(PVM pVM, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
|
---|
761 | void **papvPages, PPGMPAGEMAPLOCK paLocks);
|
---|
762 | VMMR3DECL(int) PGMR3PhysBulkGCPhys2CCPtrReadOnlyExternal(PVM pVM, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
|
---|
763 | void const **papvPages, PPGMPAGEMAPLOCK paLocks);
|
---|
764 | VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
|
---|
765 | VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
|
---|
766 | VMMR3_INT_DECL(int) PGMR3PhysAllocateLargePage(PVM pVM, RTGCPHYS GCPhys);
|
---|
767 |
|
---|
768 | VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
|
---|
769 |
|
---|
770 | VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys);
|
---|
771 | VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys);
|
---|
772 | VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
|
---|
773 | VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
|
---|
774 | VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
|
---|
775 | VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
|
---|
776 | VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
|
---|
777 | VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
|
---|
778 | VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
|
---|
779 | VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
|
---|
780 | VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
|
---|
781 |
|
---|
782 |
|
---|
783 | /** @name Page sharing
|
---|
784 | * @{ */
|
---|
785 | VMMR3DECL(int) PGMR3SharedModuleRegister(PVM pVM, VBOXOSFAMILY enmGuestOS, char *pszModuleName, char *pszVersion,
|
---|
786 | RTGCPTR GCBaseAddr, uint32_t cbModule,
|
---|
787 | uint32_t cRegions, VMMDEVSHAREDREGIONDESC const *paRegions);
|
---|
788 | VMMR3DECL(int) PGMR3SharedModuleUnregister(PVM pVM, char *pszModuleName, char *pszVersion,
|
---|
789 | RTGCPTR GCBaseAddr, uint32_t cbModule);
|
---|
790 | VMMR3DECL(int) PGMR3SharedModuleCheckAll(PVM pVM);
|
---|
791 | VMMR3DECL(int) PGMR3SharedModuleGetPageState(PVM pVM, RTGCPTR GCPtrPage, bool *pfShared, uint64_t *pfPageFlags);
|
---|
792 | /** @} */
|
---|
793 |
|
---|
794 | /** @} */
|
---|
795 | #endif /* IN_RING3 */
|
---|
796 |
|
---|
797 | RT_C_DECLS_END
|
---|
798 |
|
---|
799 | /** @} */
|
---|
800 | #endif /* !VBOX_INCLUDED_vmm_pgm_h */
|
---|
801 |
|
---|