VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidevint.h@ 99760

Last change on this file since 99760 was 98103, checked in by vboxsync, 23 months ago

Copyright year updates by scm.

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1/* $Id: pdmpcidevint.h 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * DevPCI - PDM PCI Internal header - Only for hiding bits of PDMPCIDEV.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * The contents of this file may alternatively be used under the terms
26 * of the Common Development and Distribution License Version 1.0
27 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28 * in the VirtualBox distribution, in which case the provisions of the
29 * CDDL are applicable instead of those of the GPL.
30 *
31 * You may elect to license modified versions of this file under the
32 * terms and conditions of either the GPL or the CDDL or both.
33 *
34 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35 */
36
37#ifndef VBOX_INCLUDED_vmm_pdmpcidevint_h
38#define VBOX_INCLUDED_vmm_pdmpcidevint_h
39#ifndef RT_WITHOUT_PRAGMA_ONCE
40# pragma once
41#endif
42
43#include <VBox/vmm/pdmdev.h>
44
45/** @defgroup grp_pdm_pcidev_int The PDM PCI Device Internals
46 * @ingroup grp_pdm_pcidev
47 *
48 * @remarks The PDM PCI device internals are visible to both PDM and the PCI Bus
49 * implementation, thus it lives among the the public headers despite
50 * being rather private and internal.
51 *
52 * @{
53 */
54
55
56/**
57 * PCI I/O region.
58 */
59typedef struct PCIIOREGION
60{
61 /** Current PCI mapping address, INVALID_PCI_ADDRESS (0xffffffff) means not mapped. */
62 uint64_t addr;
63 /** The region size. Power of 2. */
64 uint64_t size;
65 /** Handle or UINT64_MAX (see PDMPCIDEV_IORGN_F_HANDLE_MASK in fFlags). */
66 uint64_t hHandle;
67 /** PDMPCIDEV_IORGN_F_XXXX. */
68 uint32_t fFlags;
69 /** PCIADDRESSSPACE */
70 uint8_t type;
71 uint8_t abPadding0[3];
72 /** Callback called when the region is mapped or unmapped (new style devs). */
73 R3PTRTYPE(PFNPCIIOREGIONMAP) pfnMap;
74#if R3_ARCH_BITS == 32
75 uint32_t u32Padding2;
76#endif
77} PCIIOREGION;
78AssertCompileSize(PCIIOREGION, 5*8);
79/** Pointer to a PCI I/O region. */
80typedef PCIIOREGION *PPCIIOREGION;
81/** Pointer to a const PCI I/O region. */
82typedef PCIIOREGION const *PCPCIIOREGION;
83
84/**
85 * Callback function for reading from the PCI configuration space.
86 *
87 * @returns Strict VBox status code.
88 * @param pDevIns Pointer to the device instance of the PCI bus.
89 * @param iBus The bus number this device is on.
90 * @param iDevice The number of the device on the bus.
91 * @param u32Address The configuration space register address. [0..255]
92 * @param cb The register size. [1,2,4]
93 * @param pu32Value Where to return the register value.
94 */
95typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCIBRIDGECONFIGREAD,(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice,
96 uint32_t u32Address, unsigned cb, uint32_t *pu32Value));
97/** Pointer to a FNPCICONFIGREAD() function. */
98typedef FNPCIBRIDGECONFIGREAD *PFNPCIBRIDGECONFIGREAD;
99#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
100/** Pointer to a PFNPCICONFIGREAD. */
101typedef PFNPCIBRIDGECONFIGREAD *PPFNPCIBRIDGECONFIGREAD;
102#endif
103
104/**
105 * Callback function for writing to the PCI configuration space.
106 *
107 * @returns Strict VBox status code.
108 * @param pDevIns Pointer to the device instance of the PCI bus.
109 * @param iBus The bus number this device is on.
110 * @param iDevice The number of the device on the bus.
111 * @param u32Address The configuration space register address. [0..255]
112 * @param cb The register size. [1,2,4]
113 * @param u32Value The value that's being written. The number of bits actually used from
114 * this value is determined by the cb parameter.
115 */
116typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCIBRIDGECONFIGWRITE,(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice,
117 uint32_t u32Address, unsigned cb, uint32_t u32Value));
118/** Pointer to a FNPCICONFIGWRITE() function. */
119typedef FNPCIBRIDGECONFIGWRITE *PFNPCIBRIDGECONFIGWRITE;
120#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
121/** Pointer to a PFNPCICONFIGWRITE. */
122typedef PFNPCIBRIDGECONFIGWRITE *PPFNPCIBRIDGECONFIGWRITE;
123#endif
124
125/* Forward declaration */
126struct DEVPCIBUS;
127
128enum {
129 /** Flag whether the device is a pci-to-pci bridge.
130 * This is set prior to device registration. */
131 PCIDEV_FLAG_PCI_TO_PCI_BRIDGE = RT_BIT_32(1),
132 /** Flag whether the device is a PCI Express device.
133 * This is set prior to device registration. */
134 PCIDEV_FLAG_PCI_EXPRESS_DEVICE = RT_BIT_32(2),
135 /** Flag whether the device is capable of MSI.
136 * This one is set by MsiInit(). */
137 PCIDEV_FLAG_MSI_CAPABLE = RT_BIT_32(3),
138 /** Flag whether the device is capable of MSI-X.
139 * This one is set by MsixInit(). */
140 PCIDEV_FLAG_MSIX_CAPABLE = RT_BIT_32(4),
141 /** Flag if device represents real physical device in passthrough mode. */
142 PCIDEV_FLAG_PASSTHROUGH = RT_BIT_32(5),
143 /** Flag whether the device is capable of MSI using 64-bit address. */
144 PCIDEV_FLAG_MSI64_CAPABLE = RT_BIT_32(6)
145
146};
147
148
149/**
150 * PDM PCI Device - Internal data.
151 *
152 * @sa PDMPCIDEV
153 */
154typedef struct PDMPCIDEVINT
155{
156 /** @name Owned by PDM.
157 * @remarks The bus may use the device instance pointers.
158 * @{
159 */
160 /** Pointer to the PDM device the PCI device belongs to. (R3 ptr) */
161 PPDMDEVINSR3 pDevInsR3;
162 /** The CFGM device configuration index (default, PciDev1..255).
163 * This also works as the internal sub-device ordinal with MMIOEx.
164 * @note Same value as idxSubDev, can therefore be removed later. */
165 uint8_t idxDevCfg;
166 /** Set if the it can be reassigned to a different PCI device number. */
167 bool fReassignableDevNo;
168 /** Set if the it can be reassigned to a different PCI function number. */
169 bool fReassignableFunNo;
170 /** Alignment padding - used by ICH9 for region swapping (DevVGA hack). */
171 uint8_t bPadding0;
172 /** Index into the PDM internal bus array (PDM::aPciBuses). */
173 uint8_t idxPdmBus;
174 /** Set if this device has been registered. */
175 bool fRegistered;
176 /** Index into PDMDEVINSR3::apPciDevs (same as PDMPCIDEV::idxSubDev). */
177 uint16_t idxSubDev;
178 /** @} */
179
180 /** @name Owned by the PCI Bus
181 * @remarks PDM will not touch anything here (includes not relocating anything).
182 * @{
183 */
184 /** Pointer to the PCI bus of the device. (R3 ptr) */
185 R3PTRTYPE(struct DEVPCIBUS *) pBusR3;
186 /** Read config callback. */
187 R3PTRTYPE(PFNPCICONFIGREAD) pfnConfigRead;
188 /** Write config callback. */
189 R3PTRTYPE(PFNPCICONFIGWRITE) pfnConfigWrite;
190 /** Read config callback for PCI bridges to pass requests
191 * to devices on another bus. */
192 R3PTRTYPE(PFNPCIBRIDGECONFIGREAD) pfnBridgeConfigRead;
193 /** Write config callback for PCI bridges to pass requests
194 * to devices on another bus. */
195 R3PTRTYPE(PFNPCIBRIDGECONFIGWRITE) pfnBridgeConfigWrite;
196
197 /** Flags of this PCI device, see PCIDEV_FLAG_XXX constants. */
198 uint32_t fFlags;
199 /** Current state of the IRQ pin of the device. */
200 int32_t uIrqPinState;
201
202 /** Offset of MSI PCI capability in config space, or 0.
203 * @todo fix non-standard naming. */
204 uint8_t u8MsiCapOffset;
205 /** Size of MSI PCI capability in config space, or 0.
206 * @todo fix non-standard naming. */
207 uint8_t u8MsiCapSize;
208 /** Offset of MSI-X PCI capability in config space, or 0.
209 * @todo fix non-standard naming. */
210 uint8_t u8MsixCapOffset;
211 /** Size of MSI-X PCI capability in config space, or 0.
212 * @todo fix non-standard naming. */
213 uint8_t u8MsixCapSize;
214 /** Size of the MSI-X region. */
215 uint16_t cbMsixRegion;
216 /** Offset to the PBA for MSI-X. */
217 uint16_t offMsixPba;
218 /** Add padding to align aIORegions to an 16 byte boundary. */
219 uint8_t abPadding2[HC_ARCH_BITS == 32 ? 12 : 8];
220 /** The MMIO handle for the MSI-X MMIO bar. */
221 IOMMMIOHANDLE hMmioMsix;
222
223 /** Pointer to bus specific data. (R3 ptr) */
224 R3PTRTYPE(const void *) pvPciBusPtrR3;
225 /** I/O regions. */
226 PCIIOREGION aIORegions[VBOX_PCI_NUM_REGIONS];
227 /** @} */
228} PDMPCIDEVINT;
229AssertCompileMemberAlignment(PDMPCIDEVINT, aIORegions, 8);
230AssertCompileSize(PDMPCIDEVINT, HC_ARCH_BITS == 32 ? 0x98 : 0x178);
231
232/** Indicate that PDMPCIDEV::Int.s can be declared. */
233#define PDMPCIDEVINT_DECLARED
234
235/** @} */
236
237#endif /* !VBOX_INCLUDED_vmm_pdmpcidevint_h */
238
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