VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 73285

Last change on this file since 73285 was 70181, checked in by vboxsync, 7 years ago

pdmpcidev.h: Modified FNPCICONFIGWRITE to return a status code to facilitate PDMDevHlpDBGFStop use in implementations.
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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmpcidev_h
27#define ___VBox_vmm_pdmpcidev_h
28
29#include <VBox/pci.h>
30#include <iprt/assert.h>
31
32
33/** @defgroup grp_pdm_pcidev PDM PCI Device
34 * @ingroup grp_pdm_device
35 * @{
36 */
37
38/**
39 * Callback function for reading from the PCI configuration space.
40 *
41 * @returns The register value.
42 * @param pDevIns Pointer to the device instance the PCI device
43 * belongs to.
44 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
45 * @param uAddress The configuration space register address. [0..4096]
46 * @param cb The register size. [1,2,4]
47 *
48 * @remarks Called with the PDM lock held. The device lock is NOT take because
49 * that is very likely be a lock order violation.
50 */
51typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, unsigned cb);
52/** Pointer to a FNPCICONFIGREAD() function. */
53typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
54/** Pointer to a PFNPCICONFIGREAD. */
55typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
56
57/**
58 * Callback function for writing to the PCI configuration space.
59 *
60 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status.
61 *
62 * @param pDevIns Pointer to the device instance the PCI device
63 * belongs to.
64 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
65 * @param uAddress The configuration space register address. [0..4096]
66 * @param u32Value The value that's being written. The number of bits actually used from
67 * this value is determined by the cb parameter.
68 * @param cb The register size. [1,2,4]
69 *
70 * @remarks Called with the PDM lock held. The device lock is NOT take because
71 * that is very likely be a lock order violation.
72 */
73typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
74 uint32_t uAddress, uint32_t u32Value, unsigned cb);
75/** Pointer to a FNPCICONFIGWRITE() function. */
76typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
77/** Pointer to a PFNPCICONFIGWRITE. */
78typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
79
80/**
81 * Callback function for mapping an PCI I/O region.
82 *
83 * @returns VBox status code.
84 * @param pDevIns Pointer to the device instance the PCI device
85 * belongs to.
86 * @param pPciDev Pointer to the PCI device.
87 * @param iRegion The region number.
88 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
89 * is an I/O port, otherwise it's a physical address.
90 *
91 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
92 * that the device deregister access handlers for it and update its internal
93 * state to reflect this.
94 *
95 * @param cb Size of the region in bytes.
96 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
97 *
98 * @remarks Called with the PDM lock held. The device lock is NOT take because
99 * that is very likely be a lock order violation.
100 */
101typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
102 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
103/** Pointer to a FNPCIIOREGIONMAP() function. */
104typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
105
106
107/**
108 * Sets the size and type for old saved states from within a
109 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
110 *
111 * @returns VBox status code.
112 * @param pPciDev Pointer to the PCI device.
113 * @param iRegion The region number.
114 * @param cbRegion The region size.
115 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
116 */
117typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
118/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
119typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
120
121
122
123/*
124 * Hack to include the PDMPCIDEVINT structure at the right place
125 * to avoid duplications of FNPCIIOREGIONMAP and such.
126 */
127#ifdef PDMPCIDEV_INCLUDE_PRIVATE
128# include "pdmpcidevint.h"
129#endif
130
131/**
132 * PDM PCI Device structure.
133 *
134 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
135 * devices associated with it. The first PCI device that it registers
136 * automatically becomes the default PCI device and can be used implicitly
137 * with the device helper APIs. Subsequent PCI devices must be specified
138 * explicitly to the device helper APIs when used.
139 */
140typedef struct PDMPCIDEV
141{
142 /** PCI config space. */
143 uint8_t abConfig[256];
144
145 /** Internal data. */
146 union
147 {
148#ifdef PDMPCIDEVINT_DECLARED
149 PDMPCIDEVINT s;
150#endif
151 uint8_t padding[HC_ARCH_BITS == 32 ? 288 : 384];
152 } Int;
153
154 /** @name Read only data.
155 * @{
156 */
157 /** PCI device number [11:3] and function [2:0] on the pci bus.
158 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
159 uint32_t uDevFn;
160 uint32_t Alignment0; /**< Alignment. */
161 /** Device name. */
162 R3PTRTYPE(const char *) pszNameR3;
163 /** @} */
164
165 /**
166 * Callback for dealing with size changes.
167 *
168 * This is set by the PCI device when needed. It is only needed if any changes
169 * in the PCI resources have been made that may be incompatible with saved state
170 * (i.e. does not reflect configuration, but configuration defaults changed).
171 *
172 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
173 * allocation down in size. There is currently no way of growing resources.
174 * Dropping a resource is automatic.
175 *
176 * @returns VBox status code.
177 * @param pDevIns Pointer to the device instance the PCI device
178 * belongs to.
179 * @param pPciDev Pointer to the PCI device.
180 * @param iRegion The region number or UINT32_MAX if old saved state call.
181 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
182 * call, or 0 for dummy 64-bit top half region.
183 * @param enmType The type being loaded, -1 if old saved state call, or
184 * 0xff if dummy 64-bit top half region.
185 * @param pfnOldSetter Callback for setting size and type for call
186 * regarding old saved states. NULL otherwise.
187 */
188 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
189 uint64_t cbRegion, PCIADDRESSSPACE enmType,
190 PFNPCIIOREGIONOLDSETTER pfnOldSetter));
191} PDMPCIDEV;
192#ifdef PDMPCIDEVINT_DECLARED
193AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
194#endif
195
196
197
198/** @name PDM PCI config space accessor function.
199 * @{
200 */
201
202/** @todo handle extended space access. */
203
204DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
205{
206 Assert(offReg < sizeof(pPciDev->abConfig));
207 pPciDev->abConfig[offReg] = u8Value;
208}
209
210DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
211{
212 Assert(offReg < sizeof(pPciDev->abConfig));
213 return pPciDev->abConfig[offReg];
214}
215
216DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
217{
218 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
219 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
220}
221
222DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
223{
224 uint16_t u16Value;
225 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
226 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
227 return RT_H2LE_U16(u16Value);
228}
229
230DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
231{
232 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
233 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
234}
235
236DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
237{
238 uint32_t u32Value;
239 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
240 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
241 return RT_H2LE_U32(u32Value);
242}
243
244DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
245{
246 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
247 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
248}
249
250DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
251{
252 uint64_t u64Value;
253 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
254 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
255 return RT_H2LE_U64(u64Value);
256}
257
258/**
259 * Sets the vendor id config register.
260 * @param pPciDev The PCI device.
261 * @param u16VendorId The vendor id.
262 */
263DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
264{
265 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
266}
267
268/**
269 * Gets the vendor id config register.
270 * @returns the vendor id.
271 * @param pPciDev The PCI device.
272 */
273DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
274{
275 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
276}
277
278
279/**
280 * Sets the device id config register.
281 * @param pPciDev The PCI device.
282 * @param u16DeviceId The device id.
283 */
284DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
285{
286 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
287}
288
289/**
290 * Gets the device id config register.
291 * @returns the device id.
292 * @param pPciDev The PCI device.
293 */
294DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
295{
296 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
297}
298
299/**
300 * Sets the command config register.
301 *
302 * @param pPciDev The PCI device.
303 * @param u16Command The command register value.
304 */
305DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
306{
307 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
308}
309
310
311/**
312 * Gets the command config register.
313 * @returns The command register value.
314 * @param pPciDev The PCI device.
315 */
316DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
317{
318 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
319}
320
321/**
322 * Checks if the given PCI device is a bus master.
323 * @returns true if the device is a bus master, false if not.
324 * @param pPciDev The PCI device.
325 */
326DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
327{
328 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
329}
330
331/**
332 * Checks if INTx interrupts disabled in the command config register.
333 * @returns true if disabled.
334 * @param pPciDev The PCI device.
335 */
336DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
337{
338 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
339}
340
341/**
342 * Gets the status config register.
343 *
344 * @returns status config register.
345 * @param pPciDev The PCI device.
346 */
347DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
348{
349 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
350}
351
352/**
353 * Sets the status config register.
354 *
355 * @param pPciDev The PCI device.
356 * @param u16Status The status register value.
357 */
358DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
359{
360 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
361}
362
363
364/**
365 * Sets the revision id config register.
366 *
367 * @param pPciDev The PCI device.
368 * @param u8RevisionId The revision id.
369 */
370DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
371{
372 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
373}
374
375
376/**
377 * Sets the register level programming class config register.
378 *
379 * @param pPciDev The PCI device.
380 * @param u8ClassProg The new value.
381 */
382DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
383{
384 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
385}
386
387
388/**
389 * Sets the sub-class (aka device class) config register.
390 *
391 * @param pPciDev The PCI device.
392 * @param u8SubClass The sub-class.
393 */
394DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
395{
396 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
397}
398
399
400/**
401 * Sets the base class config register.
402 *
403 * @param pPciDev The PCI device.
404 * @param u8BaseClass The base class.
405 */
406DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
407{
408 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
409}
410
411/**
412 * Sets the header type config register.
413 *
414 * @param pPciDev The PCI device.
415 * @param u8HdrType The header type.
416 */
417DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
418{
419 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
420}
421
422/**
423 * Gets the header type config register.
424 *
425 * @param pPciDev The PCI device.
426 * @returns u8HdrType The header type.
427 */
428DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
429{
430 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
431}
432
433/**
434 * Sets the BIST (built-in self-test) config register.
435 *
436 * @param pPciDev The PCI device.
437 * @param u8Bist The BIST value.
438 */
439DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
440{
441 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
442}
443
444/**
445 * Gets the BIST (built-in self-test) config register.
446 *
447 * @param pPciDev The PCI device.
448 * @returns u8Bist The BIST.
449 */
450DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
451{
452 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
453}
454
455
456/**
457 * Sets a base address config register.
458 *
459 * @param pPciDev The PCI device.
460 * @param iReg Base address register number (0..5).
461 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
462 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
463 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
464 * @param u32Addr The address value.
465 */
466DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
467 uint32_t u32Addr)
468{
469 if (fIOSpace)
470 {
471 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
472 u32Addr |= RT_BIT_32(0);
473 }
474 else
475 {
476 Assert(!(u32Addr & 0xf));
477 if (fPrefetchable)
478 u32Addr |= RT_BIT_32(3);
479 if (f64Bit)
480 u32Addr |= 0x2 << 1;
481 }
482 switch (iReg)
483 {
484 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
485 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
486 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
487 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
488 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
489 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
490 default: AssertFailedReturnVoid();
491 }
492
493 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
494}
495
496/**
497 * Please document me. I don't seem to be getting as much as calculating
498 * the address of some PCI region.
499 */
500DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
501{
502 return iRegion == VBOX_PCI_ROM_SLOT
503 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
504}
505
506/**
507 * Sets the sub-system vendor id config register.
508 *
509 * @param pPciDev The PCI device.
510 * @param u16SubSysVendorId The sub-system vendor id.
511 */
512DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
513{
514 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
515}
516
517/**
518 * Gets the sub-system vendor id config register.
519 * @returns the sub-system vendor id.
520 * @param pPciDev The PCI device.
521 */
522DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
523{
524 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
525}
526
527
528/**
529 * Sets the sub-system id config register.
530 *
531 * @param pPciDev The PCI device.
532 * @param u16SubSystemId The sub-system id.
533 */
534DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
535{
536 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
537}
538
539/**
540 * Gets the sub-system id config register.
541 * @returns the sub-system id.
542 * @param pPciDev The PCI device.
543 */
544DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
545{
546 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
547}
548
549/**
550 * Sets offset to capability list.
551 *
552 * @param pPciDev The PCI device.
553 * @param u8Offset The offset to capability list.
554 */
555DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
556{
557 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
558}
559
560/**
561 * Returns offset to capability list.
562 *
563 * @returns offset to capability list.
564 * @param pPciDev The PCI device.
565 */
566DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
567{
568 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
569}
570
571/**
572 * Sets the interrupt line config register.
573 *
574 * @param pPciDev The PCI device.
575 * @param u8Line The interrupt line.
576 */
577DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
578{
579 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
580}
581
582/**
583 * Gets the interrupt line config register.
584 *
585 * @returns The interrupt line.
586 * @param pPciDev The PCI device.
587 */
588DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
589{
590 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
591}
592
593/**
594 * Sets the interrupt pin config register.
595 *
596 * @param pPciDev The PCI device.
597 * @param u8Pin The interrupt pin.
598 */
599DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
600{
601 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
602}
603
604/**
605 * Gets the interrupt pin config register.
606 *
607 * @returns The interrupt pin.
608 * @param pPciDev The PCI device.
609 */
610DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
611{
612 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
613}
614
615/** @} */
616
617/** @name Aliases for old function names.
618 * @{
619 */
620#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
621# define PCIDevSetByte PDMPciDevSetByte
622# define PCIDevGetByte PDMPciDevGetByte
623# define PCIDevSetWord PDMPciDevSetWord
624# define PCIDevGetWord PDMPciDevGetWord
625# define PCIDevSetDWord PDMPciDevSetDWord
626# define PCIDevGetDWord PDMPciDevGetDWord
627# define PCIDevSetQWord PDMPciDevSetQWord
628# define PCIDevGetQWord PDMPciDevGetQWord
629# define PCIDevSetVendorId PDMPciDevSetVendorId
630# define PCIDevGetVendorId PDMPciDevGetVendorId
631# define PCIDevSetDeviceId PDMPciDevSetDeviceId
632# define PCIDevGetDeviceId PDMPciDevGetDeviceId
633# define PCIDevSetCommand PDMPciDevSetCommand
634# define PCIDevGetCommand PDMPciDevGetCommand
635# define PCIDevIsBusmaster PDMPciDevIsBusmaster
636# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
637# define PCIDevGetStatus PDMPciDevGetStatus
638# define PCIDevSetStatus PDMPciDevSetStatus
639# define PCIDevSetRevisionId PDMPciDevSetRevisionId
640# define PCIDevSetClassProg PDMPciDevSetClassProg
641# define PCIDevSetClassSub PDMPciDevSetClassSub
642# define PCIDevSetClassBase PDMPciDevSetClassBase
643# define PCIDevSetHeaderType PDMPciDevSetHeaderType
644# define PCIDevGetHeaderType PDMPciDevGetHeaderType
645# define PCIDevSetBIST PDMPciDevSetBIST
646# define PCIDevGetBIST PDMPciDevGetBIST
647# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
648# define PCIDevGetRegionReg PDMPciDevGetRegionReg
649# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
650# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
651# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
652# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
653# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
654# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
655# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
656# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
657# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
658# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
659#endif
660/** @} */
661
662
663/* Special purpose "interface" for getting access to the PDMPCIDEV structure
664 * of a ich9pcibridge instance. This is useful for unusual raw or pass-through
665 * implementation which need to provide different PCI configuration space
666 * content for bridges (as long as we don't allow pass-through of bridges or
667 * custom bridge device implementations). */
668typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
669typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
670
671#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
672
673
674/** @} */
675
676#endif
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