VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 69759

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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmpcidev_h
27#define ___VBox_vmm_pdmpcidev_h
28
29#include <VBox/pci.h>
30#include <iprt/assert.h>
31
32
33/** @defgroup grp_pdm_pcidev PDM PCI Device
34 * @ingroup grp_pdm_device
35 * @{
36 */
37
38/**
39 * Callback function for reading from the PCI configuration space.
40 *
41 * @returns The register value.
42 * @param pDevIns Pointer to the device instance the PCI device
43 * belongs to.
44 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
45 * @param uAddress The configuration space register address. [0..4096]
46 * @param cb The register size. [1,2,4]
47 *
48 * @remarks Called with the PDM lock held. The device lock is NOT take because
49 * that is very likely be a lock order violation.
50 */
51typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, unsigned cb);
52/** Pointer to a FNPCICONFIGREAD() function. */
53typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
54/** Pointer to a PFNPCICONFIGREAD. */
55typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
56
57/**
58 * Callback function for writing to the PCI configuration space.
59 *
60 * @param pDevIns Pointer to the device instance the PCI device
61 * belongs to.
62 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
63 * @param uAddress The configuration space register address. [0..4096]
64 * @param u32Value The value that's being written. The number of bits actually used from
65 * this value is determined by the cb parameter.
66 * @param cb The register size. [1,2,4]
67 *
68 * @remarks Called with the PDM lock held. The device lock is NOT take because
69 * that is very likely be a lock order violation.
70 */
71typedef DECLCALLBACK(void) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, uint32_t u32Value, unsigned cb);
72/** Pointer to a FNPCICONFIGWRITE() function. */
73typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
74/** Pointer to a PFNPCICONFIGWRITE. */
75typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
76
77/**
78 * Callback function for mapping an PCI I/O region.
79 *
80 * @returns VBox status code.
81 * @param pDevIns Pointer to the device instance the PCI device
82 * belongs to.
83 * @param pPciDev Pointer to the PCI device.
84 * @param iRegion The region number.
85 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
86 * is an I/O port, otherwise it's a physical address.
87 *
88 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
89 * that the device deregister access handlers for it and update its internal
90 * state to reflect this.
91 *
92 * @param cb Size of the region in bytes.
93 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
94 *
95 * @remarks Called with the PDM lock held. The device lock is NOT take because
96 * that is very likely be a lock order violation.
97 */
98typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
99 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
100/** Pointer to a FNPCIIOREGIONMAP() function. */
101typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
102
103
104/**
105 * Sets the size and type for old saved states from within a
106 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
107 *
108 * @returns VBox status code.
109 * @param pPciDev Pointer to the PCI device.
110 * @param iRegion The region number.
111 * @param cbRegion The region size.
112 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
113 */
114typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
115/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
116typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
117
118
119
120/*
121 * Hack to include the PDMPCIDEVINT structure at the right place
122 * to avoid duplications of FNPCIIOREGIONMAP and such.
123 */
124#ifdef PDMPCIDEV_INCLUDE_PRIVATE
125# include "pdmpcidevint.h"
126#endif
127
128/**
129 * PDM PCI Device structure.
130 *
131 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
132 * devices associated with it. The first PCI device that it registers
133 * automatically becomes the default PCI device and can be used implicitly
134 * with the device helper APIs. Subsequent PCI devices must be specified
135 * explicitly to the device helper APIs when used.
136 */
137typedef struct PDMPCIDEV
138{
139 /** PCI config space. */
140 uint8_t abConfig[256];
141
142 /** Internal data. */
143 union
144 {
145#ifdef PDMPCIDEVINT_DECLARED
146 PDMPCIDEVINT s;
147#endif
148 uint8_t padding[HC_ARCH_BITS == 32 ? 288 : 384];
149 } Int;
150
151 /** @name Read only data.
152 * @{
153 */
154 /** PCI device number [11:3] and function [2:0] on the pci bus.
155 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
156 uint32_t uDevFn;
157 uint32_t Alignment0; /**< Alignment. */
158 /** Device name. */
159 R3PTRTYPE(const char *) pszNameR3;
160 /** @} */
161
162 /**
163 * Callback for dealing with size changes.
164 *
165 * This is set by the PCI device when needed. It is only needed if any changes
166 * in the PCI resources have been made that may be incompatible with saved state
167 * (i.e. does not reflect configuration, but configuration defaults changed).
168 *
169 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
170 * allocation down in size. There is currently no way of growing resources.
171 * Dropping a resource is automatic.
172 *
173 * @returns VBox status code.
174 * @param pDevIns Pointer to the device instance the PCI device
175 * belongs to.
176 * @param pPciDev Pointer to the PCI device.
177 * @param iRegion The region number or UINT32_MAX if old saved state call.
178 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
179 * call, or 0 for dummy 64-bit top half region.
180 * @param enmType The type being loaded, -1 if old saved state call, or
181 * 0xff if dummy 64-bit top half region.
182 * @param pfnOldSetter Callback for setting size and type for call
183 * regarding old saved states. NULL otherwise.
184 */
185 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
186 uint64_t cbRegion, PCIADDRESSSPACE enmType,
187 PFNPCIIOREGIONOLDSETTER pfnOldSetter));
188} PDMPCIDEV;
189#ifdef PDMPCIDEVINT_DECLARED
190AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
191#endif
192
193
194
195/** @name PDM PCI config space accessor function.
196 * @{
197 */
198
199/** @todo handle extended space access. */
200
201DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
202{
203 Assert(offReg < sizeof(pPciDev->abConfig));
204 pPciDev->abConfig[offReg] = u8Value;
205}
206
207DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
208{
209 Assert(offReg < sizeof(pPciDev->abConfig));
210 return pPciDev->abConfig[offReg];
211}
212
213DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
214{
215 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
216 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
217}
218
219DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
220{
221 uint16_t u16Value;
222 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
223 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
224 return RT_H2LE_U16(u16Value);
225}
226
227DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
228{
229 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
230 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
231}
232
233DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
234{
235 uint32_t u32Value;
236 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
237 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
238 return RT_H2LE_U32(u32Value);
239}
240
241DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
242{
243 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
244 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
245}
246
247DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
248{
249 uint64_t u64Value;
250 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
251 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
252 return RT_H2LE_U64(u64Value);
253}
254
255/**
256 * Sets the vendor id config register.
257 * @param pPciDev The PCI device.
258 * @param u16VendorId The vendor id.
259 */
260DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
261{
262 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
263}
264
265/**
266 * Gets the vendor id config register.
267 * @returns the vendor id.
268 * @param pPciDev The PCI device.
269 */
270DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
271{
272 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
273}
274
275
276/**
277 * Sets the device id config register.
278 * @param pPciDev The PCI device.
279 * @param u16DeviceId The device id.
280 */
281DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
282{
283 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
284}
285
286/**
287 * Gets the device id config register.
288 * @returns the device id.
289 * @param pPciDev The PCI device.
290 */
291DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
292{
293 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
294}
295
296/**
297 * Sets the command config register.
298 *
299 * @param pPciDev The PCI device.
300 * @param u16Command The command register value.
301 */
302DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
303{
304 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
305}
306
307
308/**
309 * Gets the command config register.
310 * @returns The command register value.
311 * @param pPciDev The PCI device.
312 */
313DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
314{
315 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
316}
317
318/**
319 * Checks if the given PCI device is a bus master.
320 * @returns true if the device is a bus master, false if not.
321 * @param pPciDev The PCI device.
322 */
323DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
324{
325 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
326}
327
328/**
329 * Checks if INTx interrupts disabled in the command config register.
330 * @returns true if disabled.
331 * @param pPciDev The PCI device.
332 */
333DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
334{
335 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
336}
337
338/**
339 * Gets the status config register.
340 *
341 * @returns status config register.
342 * @param pPciDev The PCI device.
343 */
344DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
345{
346 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
347}
348
349/**
350 * Sets the status config register.
351 *
352 * @param pPciDev The PCI device.
353 * @param u16Status The status register value.
354 */
355DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
356{
357 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
358}
359
360
361/**
362 * Sets the revision id config register.
363 *
364 * @param pPciDev The PCI device.
365 * @param u8RevisionId The revision id.
366 */
367DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
368{
369 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
370}
371
372
373/**
374 * Sets the register level programming class config register.
375 *
376 * @param pPciDev The PCI device.
377 * @param u8ClassProg The new value.
378 */
379DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
380{
381 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
382}
383
384
385/**
386 * Sets the sub-class (aka device class) config register.
387 *
388 * @param pPciDev The PCI device.
389 * @param u8SubClass The sub-class.
390 */
391DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
392{
393 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
394}
395
396
397/**
398 * Sets the base class config register.
399 *
400 * @param pPciDev The PCI device.
401 * @param u8BaseClass The base class.
402 */
403DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
404{
405 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
406}
407
408/**
409 * Sets the header type config register.
410 *
411 * @param pPciDev The PCI device.
412 * @param u8HdrType The header type.
413 */
414DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
415{
416 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
417}
418
419/**
420 * Gets the header type config register.
421 *
422 * @param pPciDev The PCI device.
423 * @returns u8HdrType The header type.
424 */
425DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
426{
427 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
428}
429
430/**
431 * Sets the BIST (built-in self-test) config register.
432 *
433 * @param pPciDev The PCI device.
434 * @param u8Bist The BIST value.
435 */
436DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
437{
438 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
439}
440
441/**
442 * Gets the BIST (built-in self-test) config register.
443 *
444 * @param pPciDev The PCI device.
445 * @returns u8Bist The BIST.
446 */
447DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
448{
449 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
450}
451
452
453/**
454 * Sets a base address config register.
455 *
456 * @param pPciDev The PCI device.
457 * @param iReg Base address register number (0..5).
458 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
459 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
460 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
461 * @param u32Addr The address value.
462 */
463DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
464 uint32_t u32Addr)
465{
466 if (fIOSpace)
467 {
468 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
469 u32Addr |= RT_BIT_32(0);
470 }
471 else
472 {
473 Assert(!(u32Addr & 0xf));
474 if (fPrefetchable)
475 u32Addr |= RT_BIT_32(3);
476 if (f64Bit)
477 u32Addr |= 0x2 << 1;
478 }
479 switch (iReg)
480 {
481 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
482 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
483 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
484 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
485 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
486 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
487 default: AssertFailedReturnVoid();
488 }
489
490 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
491}
492
493/**
494 * Please document me. I don't seem to be getting as much as calculating
495 * the address of some PCI region.
496 */
497DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
498{
499 return iRegion == VBOX_PCI_ROM_SLOT
500 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
501}
502
503/**
504 * Sets the sub-system vendor id config register.
505 *
506 * @param pPciDev The PCI device.
507 * @param u16SubSysVendorId The sub-system vendor id.
508 */
509DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
510{
511 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
512}
513
514/**
515 * Gets the sub-system vendor id config register.
516 * @returns the sub-system vendor id.
517 * @param pPciDev The PCI device.
518 */
519DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
520{
521 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
522}
523
524
525/**
526 * Sets the sub-system id config register.
527 *
528 * @param pPciDev The PCI device.
529 * @param u16SubSystemId The sub-system id.
530 */
531DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
532{
533 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
534}
535
536/**
537 * Gets the sub-system id config register.
538 * @returns the sub-system id.
539 * @param pPciDev The PCI device.
540 */
541DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
542{
543 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
544}
545
546/**
547 * Sets offset to capability list.
548 *
549 * @param pPciDev The PCI device.
550 * @param u8Offset The offset to capability list.
551 */
552DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
553{
554 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
555}
556
557/**
558 * Returns offset to capability list.
559 *
560 * @returns offset to capability list.
561 * @param pPciDev The PCI device.
562 */
563DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
564{
565 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
566}
567
568/**
569 * Sets the interrupt line config register.
570 *
571 * @param pPciDev The PCI device.
572 * @param u8Line The interrupt line.
573 */
574DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
575{
576 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
577}
578
579/**
580 * Gets the interrupt line config register.
581 *
582 * @returns The interrupt line.
583 * @param pPciDev The PCI device.
584 */
585DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
586{
587 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
588}
589
590/**
591 * Sets the interrupt pin config register.
592 *
593 * @param pPciDev The PCI device.
594 * @param u8Pin The interrupt pin.
595 */
596DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
597{
598 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
599}
600
601/**
602 * Gets the interrupt pin config register.
603 *
604 * @returns The interrupt pin.
605 * @param pPciDev The PCI device.
606 */
607DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
608{
609 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
610}
611
612/** @} */
613
614/** @name Aliases for old function names.
615 * @{
616 */
617#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
618# define PCIDevSetByte PDMPciDevSetByte
619# define PCIDevGetByte PDMPciDevGetByte
620# define PCIDevSetWord PDMPciDevSetWord
621# define PCIDevGetWord PDMPciDevGetWord
622# define PCIDevSetDWord PDMPciDevSetDWord
623# define PCIDevGetDWord PDMPciDevGetDWord
624# define PCIDevSetQWord PDMPciDevSetQWord
625# define PCIDevGetQWord PDMPciDevGetQWord
626# define PCIDevSetVendorId PDMPciDevSetVendorId
627# define PCIDevGetVendorId PDMPciDevGetVendorId
628# define PCIDevSetDeviceId PDMPciDevSetDeviceId
629# define PCIDevGetDeviceId PDMPciDevGetDeviceId
630# define PCIDevSetCommand PDMPciDevSetCommand
631# define PCIDevGetCommand PDMPciDevGetCommand
632# define PCIDevIsBusmaster PDMPciDevIsBusmaster
633# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
634# define PCIDevGetStatus PDMPciDevGetStatus
635# define PCIDevSetStatus PDMPciDevSetStatus
636# define PCIDevSetRevisionId PDMPciDevSetRevisionId
637# define PCIDevSetClassProg PDMPciDevSetClassProg
638# define PCIDevSetClassSub PDMPciDevSetClassSub
639# define PCIDevSetClassBase PDMPciDevSetClassBase
640# define PCIDevSetHeaderType PDMPciDevSetHeaderType
641# define PCIDevGetHeaderType PDMPciDevGetHeaderType
642# define PCIDevSetBIST PDMPciDevSetBIST
643# define PCIDevGetBIST PDMPciDevGetBIST
644# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
645# define PCIDevGetRegionReg PDMPciDevGetRegionReg
646# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
647# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
648# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
649# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
650# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
651# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
652# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
653# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
654# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
655# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
656#endif
657/** @} */
658
659
660/* Special purpose "interface" for getting access to the PDMPCIDEV structure
661 * of a ich9pcibridge instance. This is useful for unusual raw or pass-through
662 * implementation which need to provide different PCI configuration space
663 * content for bridges (as long as we don't allow pass-through of bridges or
664 * custom bridge device implementations). */
665typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
666typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
667
668#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
669
670
671/** @} */
672
673#endif
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