VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpci.h@ 62855

Last change on this file since 62855 was 62476, checked in by vboxsync, 8 years ago

(C) 2016

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Line 
1/** @file
2 * PDM - Pluggable Device Manager, raw PCI Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2010-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmpci_h
27#define ___VBox_vmm_pdmpci_h
28
29#include <VBox/types.h>
30#include <VBox/rawpci.h>
31
32RT_C_DECLS_BEGIN
33
34/** @defgroup grp_pdm_pcidev The raw PCI Devices API
35 * @ingroup grp_pdm
36 * @{
37 */
38
39typedef struct PDMIPCIRAW *PPDMIPCIRAW;
40typedef struct PDMIPCIRAW
41{
42 /**
43 * Notify virtual device that interrupt has arrived.
44 * For this callback to be called, interface have to be
45 * registered with PDMIPCIRAWUP::pfnRegisterInterruptListener.
46 *
47 * @note no level parameter, as we can only support flip-flop.
48 *
49 * @param pInterface Pointer to this interface structure.
50 * @param iGuestIrq Guest interrupt number, passed earlier when registering listener.
51 *
52 * @thread Any thread.
53 */
54 DECLR3CALLBACKMEMBER(int, pfnInterruptRequest ,(PPDMIPCIRAW pInterface, int32_t iGuestIrq));
55} PDMIPCIRAW;
56
57typedef struct PDMIPCIRAWUP *PPDMIPCIRAWUP;
58typedef struct PDMIPCIRAWUP
59{
60 /**
61 * Host PCI MMIO access function.
62 */
63
64 /**
65 * Request driver info about PCI region on host PCI device.
66 *
67 * @returns true, if region is present, and out parameters are correct
68 * @param pInterface Pointer to this interface structure.
69 * @param iRegion Region number.
70 * @param pRegStart Where to store region base address (guest).
71 * @param piRegSize Where to store region size.
72 *
73 * @param fMmio If region is MMIO or IO.
74 * @thread Any thread.
75 */
76 DECLR3CALLBACKMEMBER(bool, pfnGetRegionInfo, (PPDMIPCIRAWUP pInterface,
77 int32_t iRegion,
78 RTGCPHYS *pRegStart,
79 uint64_t *piRegSize,
80 uint32_t *pfFlags
81 ));
82
83 /**
84 * Request driver to map part of host device's MMIO region to the VM process and maybe kernel.
85 * Shall only be issued within earlier obtained with pfnGetRegionInfo()
86 * host physical address ranges for the device BARs. Even if failed, device still may function
87 * using pfnMmio* and pfnPio* operations, just much slower.
88 *
89 * @returns status code
90 * @param pInterface Pointer to this interface structure.
91 * @param iRegion Number of the region.
92 * @param StartAddress Host physical address of start.
93 * @param iRegionSize Size of the region.
94 * @param fFlags Flags, currently lowest significant bit set if R0 mapping requested too
95 * @param ppvAddressR3 Where to store mapped region address for R3 (can be 0, if cannot map into userland)
96 * @param ppvAddressR0 Where to store mapped region address for R0 (can be 0, if cannot map into kernel)
97 *
98 * @thread Any thread.
99 */
100 DECLR3CALLBACKMEMBER(int, pfnMapRegion, (PPDMIPCIRAWUP pInterface,
101 int32_t iRegion,
102 RTHCPHYS StartAddress,
103 uint64_t iRegionSize,
104 uint32_t fFlags,
105 RTR3PTR *ppvAddressR3,
106 RTR0PTR *ppvAddressR0
107 ));
108
109 /**
110 * Request driver to unmap part of host device's MMIO region to the VM process.
111 * Shall only be issued with pointer earlier obtained with pfnMapRegion().
112 *
113 * @returns status code
114 * @param pInterface Pointer to this interface structure
115 * @param iRegion Number of the region.
116 * @param StartAddress Host physical address of start.
117 * @param iRegionSize Size of the region.
118 * @param pvAddressR3 R3 address of mapped region.
119 * @param pvAddressR0 R0 address of mapped region.
120 *
121 * @thread Any thread.
122 */
123 DECLR3CALLBACKMEMBER(int, pfnUnmapRegion, (PPDMIPCIRAWUP pInterface,
124 int iRegion,
125 RTHCPHYS StartAddress,
126 uint64_t iRegionSize,
127 RTR3PTR pvAddressR3,
128 RTR0PTR pvAddressR0
129 ));
130
131 /**
132 * Request port IO write.
133 *
134 * @returns status code
135 * @param pInterface Pointer to this interface structure.
136 * @param iPort IO port.
137 * @param iValue Value to write.
138 * @param cb Access width.
139 *
140 * @thread EMT thread.
141 */
142 DECLR3CALLBACKMEMBER(int, pfnPioWrite, (PPDMIPCIRAWUP pInterface,
143 uint16_t iPort,
144 uint32_t iValue,
145 unsigned cb
146 ));
147
148 /**
149 * Request port IO read.
150 *
151 * @returns status code
152 * @param pInterface Pointer to this interface structure.
153 * @param iPort IO port.
154 * @param piValue Place to store read value.
155 * @param cb Access width.
156 *
157 * @thread EMT thread.
158 */
159
160 DECLR3CALLBACKMEMBER(int, pfnPioRead, (PPDMIPCIRAWUP pInterface,
161 uint16_t iPort,
162 uint32_t *piValue,
163 unsigned cb
164 ));
165
166
167 /**
168 * Request MMIO write. This callback is only called if driver wants to receive MMIO via
169 * pu32Flags argument of pfnPciDeviceConstructStart().
170 *
171 * @returns status code
172 * @param pInterface Pointer to this interface structure.
173 * @param Address Guest physical address.
174 * @param pValue Address of value to write.
175 * @param cb Access width.
176 *
177 * @thread EMT thread.
178 */
179 DECLR3CALLBACKMEMBER(int, pfnMmioWrite, (PPDMIPCIRAWUP pInterface,
180 RTR0PTR Address,
181 void const *pValue,
182 unsigned cb
183 ));
184
185 /**
186 * Request MMIO read.
187 *
188 * @returns status code
189 * @param pInterface Pointer to this interface structure.
190 * @param Address Guest physical address.
191 * @param pValue Place to store read value.
192 * @param cb Access width.
193 *
194 * @thread EMT thread.
195 */
196
197 DECLR3CALLBACKMEMBER(int, pfnMmioRead, (PPDMIPCIRAWUP pInterface,
198 RTR0PTR Address,
199 void *pValue,
200 unsigned cb
201 ));
202
203 /**
204 * Host PCI config space accessors.
205 */
206 /**
207 * Request driver to write value to host device's PCI config space.
208 * Host specific way (PIO or MCFG) is used to perform actual operation.
209 *
210 * @returns status code
211 * @param pInterface Pointer to this interface structure.
212 * @param iOffset Offset in PCI config space.
213 * @param iValue Value to write.
214 * @param cb Access width.
215 *
216 * @thread EMT thread.
217 */
218 DECLR3CALLBACKMEMBER(int, pfnPciCfgWrite, (PPDMIPCIRAWUP pInterface,
219 uint32_t iOffset,
220 void* pValue,
221 unsigned cb
222 ));
223 /**
224 * Request driver to read value from host device's PCI config space.
225 * Host specific way (PIO or MCFG) is used to perform actual operation.
226 *
227 * @returns status code
228 * @param pInterface Pointer to this interface structure.
229 * @param iOffset Offset in PCI config space.
230 * @param pValue Where to store read value.
231 * @param cb Access width.
232 *
233 * @thread EMT thread.
234 */
235 DECLR3CALLBACKMEMBER(int, pfnPciCfgRead, (PPDMIPCIRAWUP pInterface,
236 uint32_t iOffset,
237 void *pValue,
238 unsigned cb ));
239
240 /**
241 * Request to enable interrupt notifications. Please note that this is purely
242 * R3 interface, so it's up to implementor to perform necessary machinery
243 * for communications with host OS kernel driver. Typical implementation will start
244 * userland thread waiting on shared semaphore (such as using SUPSEMEVENT),
245 * notified by the kernel interrupt handler, and then will call
246 * upper port pfnInterruptRequest() based on data provided by the driver.
247 * This apporach is taken, as calling VBox code from an asyncronous R0
248 * interrupt handler when VMM may not be even running doesn't look
249 * like a good idea.
250 *
251 * @returns status code
252 * @param pInterface Pointer to this interface structure.
253 * @param pListener Pointer to the listener object.
254 * @param iGuestIrq Guest IRQ to be passed to pfnInterruptRequest().
255 *
256 * @thread Any thread, pfnInterruptRequest() will be usually invoked on a dedicated thread.
257 */
258 DECLR3CALLBACKMEMBER(int, pfnEnableInterruptNotifications, (PPDMIPCIRAWUP pInterface, int32_t iGuestIrq
259 ));
260
261 /**
262 * Request to disable interrupt notifications.
263 *
264 * @returns status code
265 * @param pInterface Pointer to this interface structure.
266 *
267 * @thread Any thread.
268 */
269 DECLR3CALLBACKMEMBER(int, pfnDisableInterruptNotifications, (PPDMIPCIRAWUP pInterface
270 ));
271
272 /**
273 * Notification APIs.
274 */
275
276 /**
277 * Notify driver when raw PCI device construction starts. Have to be the first operation
278 * as initializes internal state and opens host device driver.
279 *
280 * @returns status code
281 * @param pInterface Pointer to this interface structure.
282 * @param iHostAddress Host PCI address of device attached.
283 * @param iGuestAddress Guest PCI address of device attached.
284 * @param szDeviceName Human readable device name.
285 * @param fDeviceFlags Flags for the host device.
286 * @param pu32Flags Flags for virtual device, from the upper driver.
287 *
288 * @thread Any thread.
289 */
290 DECLR3CALLBACKMEMBER(int, pfnPciDeviceConstructStart, (PPDMIPCIRAWUP pInterface,
291 uint32_t iHostAddress,
292 uint32_t iGuestAddress,
293 const char* szDeviceName,
294 uint32_t fDeviceFlags,
295 uint32_t *pu32Flags));
296
297 /**
298 * Notify driver when raw PCI device construction completes, so that it may
299 * perform further actions depending on success or failure of this operation.
300 * Standard action is to raise global IHostPciDevicePlugEvent.
301 *
302 * @param pInterface Pointer to this interface structure.
303 * @param rc Result code of the operation.
304 *
305 * @thread Any thread.
306 */
307 DECLR3CALLBACKMEMBER(void, pfnPciDeviceConstructComplete, (PPDMIPCIRAWUP pInterface,
308 int rc));
309
310 /**
311 * Notify driver on finalization of raw PCI device.
312 *
313 * @param pInterface Pointer to this interface structure.
314 *
315 * @thread Any thread.
316 */
317 DECLR3CALLBACKMEMBER(int, pfnPciDeviceDestruct, (PPDMIPCIRAWUP pInterface,
318 uint32_t fFlags));
319
320 /**
321 * Notify driver on guest power state change.
322 *
323 * @param pInterface Pointer to this interface structure.
324 * @param aState New power state.
325 * @param pu64Param State-specific in/out parameter. For now only used during power-on to provide VM caps.
326 *
327 * @thread Any thread.
328 */
329 DECLR3CALLBACKMEMBER(int, pfnPciDevicePowerStateChange, (PPDMIPCIRAWUP pInterface,
330 PCIRAWPOWERSTATE aState,
331 uint64_t *pu64Param));
332
333 /**
334 * Notify driver about runtime error.
335 *
336 * @param pInterface Pointer to this interface structure.
337 * @param fFatal If error is fatal.
338 * @param szErrorId Error ID.
339 * @param szMessage Error message.
340 *
341 * @thread Any thread.
342 */
343 DECLR3CALLBACKMEMBER(int, pfnReportRuntimeError, (PPDMIPCIRAWUP pInterface,
344 uint8_t fFatal,
345 const char* szErrorId,
346 const char* szMessage));
347} PDMIPCIRAWUP;
348
349/**
350 * Init R0 PCI module.
351 */
352PCIRAWR0DECL(int) PciRawR0Init(void);
353/**
354 * Process request (in R0).
355 */
356PCIRAWR0DECL(int) PciRawR0ProcessReq(PSUPDRVSESSION pSession, PVM pVM, PPCIRAWSENDREQ pReq);
357/**
358 * Terminate R0 PCI module.
359 */
360PCIRAWR0DECL(void) PciRawR0Term(void);
361
362/**
363 * Per-VM R0 module init.
364 */
365PCIRAWR0DECL(int) PciRawR0InitVM(PVM pVM);
366
367/**
368 * Per-VM R0 module termination routine.
369 */
370PCIRAWR0DECL(void) PciRawR0TermVM(PVM pVM);
371
372/**
373 * Flags returned by pfnPciDeviceConstructStart(), to notify device
374 * how it shall handle device IO traffic.
375 */
376typedef enum PCIRAWDEVICEFLAGS
377{
378 /** Intercept port IO (R3 PIO always go to the driver). */
379 PCIRAWRFLAG_CAPTURE_PIO = (1 << 0),
380 /** Intercept MMIO. */
381 PCIRAWRFLAG_CAPTURE_MMIO = (1 << 1),
382 /** Allow bus mastering by physical device (requires IOMMU). */
383 PCIRAWRFLAG_ALLOW_BM = (1 << 2),
384 /** Allow R3 MMIO mapping. */
385 PCIRAWRFLAG_ALLOW_R3MAP = (1 << 3),
386
387 /** The usual 32-bit type blow up. */
388 PCIRAWRFLAG_32BIT_HACK = 0x7fffffff
389} PCIRAWDEVICEFLAGS;
390
391#define PDMIPCIRAWUP_IID "06daa17f-097b-4ebe-a626-15f467b1de12"
392#define PDMIPCIRAW_IID "68c6e4c4-4223-47e0-9134-e3c297992543"
393
394/** @} */
395
396RT_C_DECLS_END
397
398#endif
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