VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 80453

Last change on this file since 80453 was 80253, checked in by vboxsync, 5 years ago

VMM: Started refactoring VMMAll/* for bugref:9217

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_pdmdev_h
27#define VBOX_INCLUDED_vmm_pdmdev_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/vmm/pdmqueue.h>
33#include <VBox/vmm/pdmcritsect.h>
34#ifdef IN_RING3
35# include <VBox/vmm/pdmthread.h>
36#endif
37#include <VBox/vmm/pdmifs.h>
38#include <VBox/vmm/pdmins.h>
39#include <VBox/vmm/pdmcommon.h>
40#include <VBox/vmm/pdmpcidev.h>
41#include <VBox/vmm/iom.h>
42#include <VBox/vmm/tm.h>
43#include <VBox/vmm/ssm.h>
44#include <VBox/vmm/cfgm.h>
45#include <VBox/vmm/dbgf.h>
46#include <VBox/err.h> /* VINF_EM_DBG_STOP, also 120+ source files expecting this. */
47#include <iprt/stdarg.h>
48
49
50RT_C_DECLS_BEGIN
51
52/** @defgroup grp_pdm_device The PDM Devices API
53 * @ingroup grp_pdm
54 * @{
55 */
56
57/**
58 * Construct a device instance for a VM.
59 *
60 * @returns VBox status.
61 * @param pDevIns The device instance data. If the registration structure
62 * is needed, it can be accessed thru pDevIns->pReg.
63 * @param iInstance Instance number. Use this to figure out which registers
64 * and such to use. The instance number is also found in
65 * pDevIns->iInstance, but since it's likely to be
66 * frequently used PDM passes it as parameter.
67 * @param pCfg Configuration node handle for the driver. This is
68 * expected to be in high demand in the constructor and is
69 * therefore passed as an argument. When using it at other
70 * times, it can be found in pDevIns->pCfg.
71 */
72typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
73/** Pointer to a FNPDMDEVCONSTRUCT() function. */
74typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
75
76/**
77 * Destruct a device instance.
78 *
79 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
80 * resources can be freed correctly.
81 *
82 * @returns VBox status.
83 * @param pDevIns The device instance data.
84 *
85 * @remarks The device critical section is not entered. The routine may delete
86 * the critical section, so the caller cannot exit it.
87 */
88typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
89/** Pointer to a FNPDMDEVDESTRUCT() function. */
90typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
91
92/**
93 * Device relocation callback.
94 *
95 * This is called when the instance data has been relocated in raw-mode context
96 * (RC). It is also called when the RC hypervisor selects changes. The device
97 * must fixup all necessary pointers and re-query all interfaces to other RC
98 * devices and drivers.
99 *
100 * Before the RC code is executed the first time, this function will be called
101 * with a 0 delta so RC pointer calculations can be one in one place.
102 *
103 * @param pDevIns Pointer to the device instance.
104 * @param offDelta The relocation delta relative to the old location.
105 *
106 * @remarks A relocation CANNOT fail.
107 *
108 * @remarks The device critical section is not entered. The relocations should
109 * not normally require any locking.
110 */
111typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
112/** Pointer to a FNPDMDEVRELOCATE() function. */
113typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
114
115/**
116 * Power On notification.
117 *
118 * @returns VBox status.
119 * @param pDevIns The device instance data.
120 *
121 * @remarks Caller enters the device critical section.
122 */
123typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
124/** Pointer to a FNPDMDEVPOWERON() function. */
125typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
126
127/**
128 * Reset notification.
129 *
130 * @returns VBox status.
131 * @param pDevIns The device instance data.
132 *
133 * @remarks Caller enters the device critical section.
134 */
135typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
136/** Pointer to a FNPDMDEVRESET() function. */
137typedef FNPDMDEVRESET *PFNPDMDEVRESET;
138
139/**
140 * Soft reset notification.
141 *
142 * This is mainly for emulating the 286 style protected mode exits, in which
143 * most devices should remain in their current state.
144 *
145 * @returns VBox status.
146 * @param pDevIns The device instance data.
147 * @param fFlags PDMVMRESET_F_XXX (only bits relevant to soft resets).
148 *
149 * @remarks Caller enters the device critical section.
150 */
151typedef DECLCALLBACK(void) FNPDMDEVSOFTRESET(PPDMDEVINS pDevIns, uint32_t fFlags);
152/** Pointer to a FNPDMDEVSOFTRESET() function. */
153typedef FNPDMDEVSOFTRESET *PFNPDMDEVSOFTRESET;
154
155/** @name PDMVMRESET_F_XXX - VM reset flags.
156 * These flags are used both for FNPDMDEVSOFTRESET and for hardware signalling
157 * reset via PDMDevHlpVMReset.
158 * @{ */
159/** Unknown reason. */
160#define PDMVMRESET_F_UNKNOWN UINT32_C(0x00000000)
161/** GIM triggered reset. */
162#define PDMVMRESET_F_GIM UINT32_C(0x00000001)
163/** The last source always causing hard resets. */
164#define PDMVMRESET_F_LAST_ALWAYS_HARD PDMVMRESET_F_GIM
165/** ACPI triggered reset. */
166#define PDMVMRESET_F_ACPI UINT32_C(0x0000000c)
167/** PS/2 system port A (92h) reset. */
168#define PDMVMRESET_F_PORT_A UINT32_C(0x0000000d)
169/** Keyboard reset. */
170#define PDMVMRESET_F_KBD UINT32_C(0x0000000e)
171/** Tripple fault. */
172#define PDMVMRESET_F_TRIPLE_FAULT UINT32_C(0x0000000f)
173/** Reset source mask. */
174#define PDMVMRESET_F_SRC_MASK UINT32_C(0x0000000f)
175/** @} */
176
177/**
178 * Suspend notification.
179 *
180 * @returns VBox status.
181 * @param pDevIns The device instance data.
182 * @thread EMT(0)
183 *
184 * @remarks Caller enters the device critical section.
185 */
186typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
187/** Pointer to a FNPDMDEVSUSPEND() function. */
188typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
189
190/**
191 * Resume notification.
192 *
193 * @returns VBox status.
194 * @param pDevIns The device instance data.
195 *
196 * @remarks Caller enters the device critical section.
197 */
198typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
199/** Pointer to a FNPDMDEVRESUME() function. */
200typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
201
202/**
203 * Power Off notification.
204 *
205 * This is always called when VMR3PowerOff is called.
206 * There will be no callback when hot plugging devices.
207 *
208 * @param pDevIns The device instance data.
209 * @thread EMT(0)
210 *
211 * @remarks Caller enters the device critical section.
212 */
213typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
214/** Pointer to a FNPDMDEVPOWEROFF() function. */
215typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
216
217/**
218 * Attach command.
219 *
220 * This is called to let the device attach to a driver for a specified LUN
221 * at runtime. This is not called during VM construction, the device
222 * constructor has to attach to all the available drivers.
223 *
224 * This is like plugging in the keyboard or mouse after turning on the PC.
225 *
226 * @returns VBox status code.
227 * @param pDevIns The device instance.
228 * @param iLUN The logical unit which is being attached.
229 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
230 *
231 * @remarks Caller enters the device critical section.
232 */
233typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
234/** Pointer to a FNPDMDEVATTACH() function. */
235typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
236
237/**
238 * Detach notification.
239 *
240 * This is called when a driver is detaching itself from a LUN of the device.
241 * The device should adjust its state to reflect this.
242 *
243 * This is like unplugging the network cable to use it for the laptop or
244 * something while the PC is still running.
245 *
246 * @param pDevIns The device instance.
247 * @param iLUN The logical unit which is being detached.
248 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
249 *
250 * @remarks Caller enters the device critical section.
251 */
252typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
253/** Pointer to a FNPDMDEVDETACH() function. */
254typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
255
256/**
257 * Query the base interface of a logical unit.
258 *
259 * @returns VBOX status code.
260 * @param pDevIns The device instance.
261 * @param iLUN The logicial unit to query.
262 * @param ppBase Where to store the pointer to the base interface of the LUN.
263 *
264 * @remarks The device critical section is not entered.
265 */
266typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
267/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
268typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
269
270/**
271 * Init complete notification (after ring-0 & RC init since 5.1).
272 *
273 * This can be done to do communication with other devices and other
274 * initialization which requires everything to be in place.
275 *
276 * @returns VBOX status code.
277 * @param pDevIns The device instance.
278 *
279 * @remarks Caller enters the device critical section.
280 */
281typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
282/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
283typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
284
285
286/**
287 * The context of a pfnMemSetup call.
288 */
289typedef enum PDMDEVMEMSETUPCTX
290{
291 /** Invalid zero value. */
292 PDMDEVMEMSETUPCTX_INVALID = 0,
293 /** After construction. */
294 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
295 /** After reset. */
296 PDMDEVMEMSETUPCTX_AFTER_RESET,
297 /** Type size hack. */
298 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
299} PDMDEVMEMSETUPCTX;
300
301
302/**
303 * PDM Device Registration Structure.
304 *
305 * This structure is used when registering a device from VBoxInitDevices() in HC
306 * Ring-3. PDM will continue use till the VM is terminated.
307 */
308typedef struct PDMDEVREG
309{
310 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
311 uint32_t u32Version;
312 /** Device name. */
313 char szName[32];
314 /** Name of the raw-mode context module (no path).
315 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
316 char szRCMod[32];
317 /** Name of the ring-0 module (no path).
318 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
319 char szR0Mod[32];
320 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
321 * remain unchanged from registration till VM destruction. */
322 const char *pszDescription;
323
324 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
325 uint32_t fFlags;
326 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
327 uint32_t fClass;
328 /** Maximum number of instances (per VM). */
329 uint32_t cMaxInstances;
330 /** Size of the instance data. */
331 uint32_t cbInstance;
332
333 /** Construct instance - required. */
334 PFNPDMDEVCONSTRUCT pfnConstruct;
335 /** Destruct instance - optional.
336 * Critical section NOT entered (will be destroyed). */
337 PFNPDMDEVDESTRUCT pfnDestruct;
338 /** Relocation command - optional.
339 * Critical section NOT entered. */
340 PFNPDMDEVRELOCATE pfnRelocate;
341
342 /**
343 * Memory setup callback.
344 *
345 * @param pDevIns The device instance data.
346 * @param enmCtx Indicates the context of the call.
347 * @remarks The critical section is entered prior to calling this method.
348 */
349 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
350
351 /** Power on notification - optional.
352 * Critical section is entered. */
353 PFNPDMDEVPOWERON pfnPowerOn;
354 /** Reset notification - optional.
355 * Critical section is entered. */
356 PFNPDMDEVRESET pfnReset;
357 /** Suspend notification - optional.
358 * Critical section is entered. */
359 PFNPDMDEVSUSPEND pfnSuspend;
360 /** Resume notification - optional.
361 * Critical section is entered. */
362 PFNPDMDEVRESUME pfnResume;
363 /** Attach command - optional.
364 * Critical section is entered. */
365 PFNPDMDEVATTACH pfnAttach;
366 /** Detach notification - optional.
367 * Critical section is entered. */
368 PFNPDMDEVDETACH pfnDetach;
369 /** Query a LUN base interface - optional.
370 * Critical section is NOT entered. */
371 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
372 /** Init complete notification - optional.
373 * Critical section is entered. */
374 PFNPDMDEVINITCOMPLETE pfnInitComplete;
375 /** Power off notification - optional.
376 * Critical section is entered. */
377 PFNPDMDEVPOWEROFF pfnPowerOff;
378 /** Software system reset notification - optional.
379 * Critical section is entered. */
380 PFNPDMDEVSOFTRESET pfnSoftReset;
381 /** Initialization safty marker. */
382 uint32_t u32VersionEnd;
383} PDMDEVREG;
384/** Pointer to a PDM Device Structure. */
385typedef PDMDEVREG *PPDMDEVREG;
386/** Const pointer to a PDM Device Structure. */
387typedef PDMDEVREG const *PCPDMDEVREG;
388
389/** Current DEVREG version number. */
390#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 1)
391
392/** PDM Device Flags.
393 * @{ */
394/** This flag is used to indicate that the device has a RC component. */
395#define PDM_DEVREG_FLAGS_RC 0x00000001
396/** This flag is used to indicate that the device has a R0 component. */
397#define PDM_DEVREG_FLAGS_R0 0x00000002
398
399/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
400 * The bit count for the current host. */
401#if HC_ARCH_BITS == 32
402# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
403#elif HC_ARCH_BITS == 64
404# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
405#else
406# error Unsupported HC_ARCH_BITS value.
407#endif
408/** The host bit count mask. */
409#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
410
411/** The device support only 32-bit guests. */
412#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
413/** The device support only 64-bit guests. */
414#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
415/** The device support both 32-bit & 64-bit guests. */
416#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
417/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
418 * The guest bit count for the current compilation. */
419#if GC_ARCH_BITS == 32
420# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
421#elif GC_ARCH_BITS == 64
422# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
423#else
424# error Unsupported GC_ARCH_BITS value.
425#endif
426/** The guest bit count mask. */
427#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
428
429/** A convenience. */
430#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
431
432/** Indicates that the devices support PAE36 on a 32-bit guest. */
433#define PDM_DEVREG_FLAGS_PAE36 0x00001000
434
435/** Indicates that the device needs to be notified before the drivers when suspending. */
436#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
437
438/** Indicates that the device needs to be notified before the drivers when powering off. */
439#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
440
441/** Indicates that the device needs to be notified before the drivers when resetting. */
442#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
443/** @} */
444
445
446/** PDM Device Classes.
447 * The order is important, lower bit earlier instantiation.
448 * @{ */
449/** Architecture device. */
450#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
451/** Architecture BIOS device. */
452#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
453/** PCI bus brigde. */
454#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
455/** ISA bus brigde. */
456#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
457/** Input device (mouse, keyboard, joystick, HID, ...). */
458#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
459/** Interrupt controller (PIC). */
460#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
461/** Interval controoler (PIT). */
462#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
463/** RTC/CMOS. */
464#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
465/** DMA controller. */
466#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
467/** VMM Device. */
468#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
469/** Graphics device, like VGA. */
470#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
471/** Storage controller device. */
472#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
473/** Network interface controller. */
474#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
475/** Audio. */
476#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
477/** USB HIC. */
478#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
479/** ACPI. */
480#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
481/** Serial controller device. */
482#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
483/** Parallel controller device */
484#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
485/** Host PCI pass-through device */
486#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
487/** Misc devices (always last). */
488#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
489/** @} */
490
491
492/** @name IRQ Level for use with the *SetIrq APIs.
493 * @{
494 */
495/** Assert the IRQ (can assume value 1). */
496#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
497/** Deassert the IRQ (can assume value 0). */
498#define PDM_IRQ_LEVEL_LOW 0
499/** flip-flop - deassert and then assert the IRQ again immediately. */
500#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
501/** @} */
502
503/**
504 * Registration record for MSI/MSI-X emulation.
505 */
506typedef struct PDMMSIREG
507{
508 /** Number of MSI interrupt vectors, 0 if MSI not supported */
509 uint16_t cMsiVectors;
510 /** Offset of MSI capability */
511 uint8_t iMsiCapOffset;
512 /** Offset of next capability to MSI */
513 uint8_t iMsiNextOffset;
514 /** If we support 64-bit MSI addressing */
515 bool fMsi64bit;
516 /** If we do not support per-vector masking */
517 bool fMsiNoMasking;
518
519 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
520 uint16_t cMsixVectors;
521 /** Offset of MSI-X capability */
522 uint8_t iMsixCapOffset;
523 /** Offset of next capability to MSI-X */
524 uint8_t iMsixNextOffset;
525 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
526 uint8_t iMsixBar;
527} PDMMSIREG;
528typedef PDMMSIREG *PPDMMSIREG;
529
530/**
531 * PCI Bus registration structure.
532 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
533 */
534typedef struct PDMPCIBUSREG
535{
536 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
537 uint32_t u32Version;
538
539 /**
540 * Registers the device with the default PCI bus.
541 *
542 * @returns VBox status code.
543 * @param pDevIns Device instance of the PCI Bus.
544 * @param pPciDev The PCI device structure.
545 * @param fFlags Reserved for future use, PDMPCIDEVREG_F_MBZ.
546 * @param uPciDevNo PDMPCIDEVREG_DEV_NO_FIRST_UNUSED, or a specific
547 * device number (0-31).
548 * @param uPciFunNo PDMPCIDEVREG_FUN_NO_FIRST_UNUSED, or a specific
549 * function number (0-7).
550 * @param pszName Device name (static but not unique).
551 *
552 * @remarks Caller enters the PDM critical section.
553 */
554 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
555 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
556
557 /**
558 * Initialize MSI or MSI-X emulation support in a PCI device.
559 *
560 * This cannot handle all corner cases of the MSI/MSI-X spec, but for the
561 * vast majority of device emulation it covers everything necessary. It's
562 * fully automatic, taking care of all BAR and config space requirements,
563 * and interrupt delivery is done using PDMDevHlpPCISetIrq and friends.
564 * When MSI/MSI-X is enabled then the iIrq parameter is redefined to take
565 * the vector number (otherwise it has the usual INTA-D meaning for PCI).
566 *
567 * A device not using this can still offer MSI/MSI-X. In this case it's
568 * completely up to the device (in the MSI-X case) to create/register the
569 * necessary MMIO BAR, handle all config space/BAR updating and take care
570 * of delivering the interrupts appropriately.
571 *
572 * @returns VBox status code.
573 * @param pDevIns Device instance of the PCI Bus.
574 * @param pPciDev The PCI device structure.
575 * @param pMsiReg MSI emulation registration structure
576 * @remarks Caller enters the PDM critical section.
577 */
578 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
579
580 /**
581 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
582 *
583 * @returns VBox status code.
584 * @param pDevIns Device instance of the PCI Bus.
585 * @param pPciDev The PCI device structure.
586 * @param iRegion The region number.
587 * @param cbRegion Size of the region.
588 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
589 * @param pfnCallback Callback for doing the mapping.
590 * @remarks Caller enters the PDM critical section.
591 */
592 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
593 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
594
595 /**
596 * Register PCI configuration space read/write callbacks.
597 *
598 * @param pDevIns Device instance of the PCI Bus.
599 * @param pPciDev The PCI device structure.
600 * @param pfnRead Pointer to the user defined PCI config read function.
601 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
602 * PCI config read function. This way, user can decide when (and if)
603 * to call default PCI config read function. Can be NULL.
604 * @param pfnWrite Pointer to the user defined PCI config write function.
605 * @param ppfnWriteOld Pointer to function pointer which will receive the old (default)
606 * PCI config write function. This way, user can decide when (and if)
607 * to call default PCI config write function. Can be NULL.
608 * @remarks Caller enters the PDM critical section.
609 * @thread EMT
610 */
611 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
612 PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
613 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
614
615 /**
616 * Set the IRQ for a PCI device.
617 *
618 * @param pDevIns Device instance of the PCI Bus.
619 * @param pPciDev The PCI device structure.
620 * @param iIrq IRQ number to set.
621 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
622 * @param uTagSrc The IRQ tag and source (for tracing).
623 * @remarks Caller enters the PDM critical section.
624 */
625 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
626
627 /** The name of the SetIrq RC entry point. */
628 const char *pszSetIrqRC;
629
630 /** The name of the SetIrq R0 entry point. */
631 const char *pszSetIrqR0;
632
633} PDMPCIBUSREG;
634/** Pointer to a PCI bus registration structure. */
635typedef PDMPCIBUSREG *PPDMPCIBUSREG;
636
637/** Current PDMPCIBUSREG version number. */
638#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 7, 0)
639
640/**
641 * PCI Bus RC helpers.
642 */
643typedef struct PDMPCIHLPRC
644{
645 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
646 uint32_t u32Version;
647
648 /**
649 * Set an ISA IRQ.
650 *
651 * @param pDevIns PCI device instance.
652 * @param iIrq IRQ number to set.
653 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
654 * @param uTagSrc The IRQ tag and source (for tracing).
655 * @thread EMT only.
656 */
657 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
658
659 /**
660 * Set an I/O-APIC IRQ.
661 *
662 * @param pDevIns PCI device instance.
663 * @param iIrq IRQ number to set.
664 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
665 * @param uTagSrc The IRQ tag and source (for tracing).
666 * @thread EMT only.
667 */
668 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
669
670 /**
671 * Send an MSI.
672 *
673 * @param pDevIns PCI device instance.
674 * @param GCPhys Physical address MSI request was written.
675 * @param uValue Value written.
676 * @param uTagSrc The IRQ tag and source (for tracing).
677 * @thread EMT only.
678 */
679 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
680
681
682 /**
683 * Acquires the PDM lock.
684 *
685 * @returns VINF_SUCCESS on success.
686 * @returns rc if we failed to acquire the lock.
687 * @param pDevIns The PCI device instance.
688 * @param rc What to return if we fail to acquire the lock.
689 */
690 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
691
692 /**
693 * Releases the PDM lock.
694 *
695 * @param pDevIns The PCI device instance.
696 */
697 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
698
699 /** Just a safety precaution. */
700 uint32_t u32TheEnd;
701} PDMPCIHLPRC;
702/** Pointer to PCI helpers. */
703typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
704/** Pointer to const PCI helpers. */
705typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
706
707/** Current PDMPCIHLPRC version number. */
708#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
709
710
711/**
712 * PCI Bus R0 helpers.
713 */
714typedef struct PDMPCIHLPR0
715{
716 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
717 uint32_t u32Version;
718
719 /**
720 * Set an ISA IRQ.
721 *
722 * @param pDevIns PCI device instance.
723 * @param iIrq IRQ number to set.
724 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
725 * @param uTagSrc The IRQ tag and source (for tracing).
726 * @thread EMT only.
727 */
728 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
729
730 /**
731 * Set an I/O-APIC IRQ.
732 *
733 * @param pDevIns PCI device instance.
734 * @param iIrq IRQ number to set.
735 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
736 * @param uTagSrc The IRQ tag and source (for tracing).
737 * @thread EMT only.
738 */
739 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
740
741 /**
742 * Send an MSI.
743 *
744 * @param pDevIns PCI device instance.
745 * @param GCPhys Physical address MSI request was written.
746 * @param uValue Value written.
747 * @param uTagSrc The IRQ tag and source (for tracing).
748 * @thread EMT only.
749 */
750 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
751
752
753 /**
754 * Acquires the PDM lock.
755 *
756 * @returns VINF_SUCCESS on success.
757 * @returns rc if we failed to acquire the lock.
758 * @param pDevIns The PCI device instance.
759 * @param rc What to return if we fail to acquire the lock.
760 */
761 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
762
763 /**
764 * Releases the PDM lock.
765 *
766 * @param pDevIns The PCI device instance.
767 */
768 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
769
770 /** Just a safety precaution. */
771 uint32_t u32TheEnd;
772} PDMPCIHLPR0;
773/** Pointer to PCI helpers. */
774typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
775/** Pointer to const PCI helpers. */
776typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
777
778/** Current PDMPCIHLPR0 version number. */
779#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
780
781/**
782 * PCI device helpers.
783 */
784typedef struct PDMPCIHLPR3
785{
786 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
787 uint32_t u32Version;
788
789 /**
790 * Set an ISA IRQ.
791 *
792 * @param pDevIns The PCI device instance.
793 * @param iIrq IRQ number to set.
794 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
795 * @param uTagSrc The IRQ tag and source (for tracing).
796 */
797 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
798
799 /**
800 * Set an I/O-APIC IRQ.
801 *
802 * @param pDevIns The PCI device instance.
803 * @param iIrq IRQ number to set.
804 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
805 * @param uTagSrc The IRQ tag and source (for tracing).
806 */
807 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
808
809 /**
810 * Send an MSI.
811 *
812 * @param pDevIns PCI device instance.
813 * @param GCPhys Physical address MSI request was written.
814 * @param uValue Value written.
815 * @param uTagSrc The IRQ tag and source (for tracing).
816 */
817 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
818
819 /**
820 * Checks if the given address is an MMIO2 or pre-registered MMIO base address.
821 *
822 * @returns true/false accordingly.
823 * @param pDevIns The PCI device instance.
824 * @param pOwner The owner of the memory, optional.
825 * @param GCPhys The address to check.
826 * @sa PGMR3PhysMMIOExIsBase
827 */
828 DECLR3CALLBACKMEMBER(bool, pfnIsMMIOExBase,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
829
830 /**
831 * Gets the address of the RC PCI Bus helpers.
832 *
833 * This should be called at both construction and relocation time
834 * to obtain the correct address of the RC helpers.
835 *
836 * @returns RC pointer to the PCI Bus helpers.
837 * @param pDevIns Device instance of the PCI Bus.
838 * @thread EMT only.
839 */
840 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
841
842 /**
843 * Gets the address of the R0 PCI Bus helpers.
844 *
845 * This should be called at both construction and relocation time
846 * to obtain the correct address of the R0 helpers.
847 *
848 * @returns R0 pointer to the PCI Bus helpers.
849 * @param pDevIns Device instance of the PCI Bus.
850 * @thread EMT only.
851 */
852 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
853
854 /**
855 * Acquires the PDM lock.
856 *
857 * @returns VINF_SUCCESS on success.
858 * @returns Fatal error on failure.
859 * @param pDevIns The PCI device instance.
860 * @param rc Dummy for making the interface identical to the RC and R0 versions.
861 */
862 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
863
864 /**
865 * Releases the PDM lock.
866 *
867 * @param pDevIns The PCI device instance.
868 */
869 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
870
871 /** Just a safety precaution. */
872 uint32_t u32TheEnd;
873} PDMPCIHLPR3;
874/** Pointer to PCI helpers. */
875typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
876/** Pointer to const PCI helpers. */
877typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
878
879/** Current PDMPCIHLPR3 version number. */
880#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 1)
881
882
883/**
884 * Programmable Interrupt Controller registration structure.
885 */
886typedef struct PDMPICREG
887{
888 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
889 uint32_t u32Version;
890
891 /**
892 * Set the an IRQ.
893 *
894 * @param pDevIns Device instance of the PIC.
895 * @param iIrq IRQ number to set.
896 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
897 * @param uTagSrc The IRQ tag and source (for tracing).
898 * @remarks Caller enters the PDM critical section.
899 */
900 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
901
902 /**
903 * Get a pending interrupt.
904 *
905 * @returns Pending interrupt number.
906 * @param pDevIns Device instance of the PIC.
907 * @param puTagSrc Where to return the IRQ tag and source.
908 * @remarks Caller enters the PDM critical section.
909 */
910 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
911
912 /** The name of the RC SetIrq entry point. */
913 const char *pszSetIrqRC;
914 /** The name of the RC GetInterrupt entry point. */
915 const char *pszGetInterruptRC;
916
917 /** The name of the R0 SetIrq entry point. */
918 const char *pszSetIrqR0;
919 /** The name of the R0 GetInterrupt entry point. */
920 const char *pszGetInterruptR0;
921} PDMPICREG;
922/** Pointer to a PIC registration structure. */
923typedef PDMPICREG *PPDMPICREG;
924
925/** Current PDMPICREG version number. */
926#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
927
928/**
929 * PIC RC helpers.
930 */
931typedef struct PDMPICHLPRC
932{
933 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
934 uint32_t u32Version;
935
936 /**
937 * Set the interrupt force action flag.
938 *
939 * @param pDevIns Device instance of the PIC.
940 */
941 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
942
943 /**
944 * Clear the interrupt force action flag.
945 *
946 * @param pDevIns Device instance of the PIC.
947 */
948 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
949
950 /**
951 * Acquires the PDM lock.
952 *
953 * @returns VINF_SUCCESS on success.
954 * @returns rc if we failed to acquire the lock.
955 * @param pDevIns The PIC device instance.
956 * @param rc What to return if we fail to acquire the lock.
957 */
958 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
959
960 /**
961 * Releases the PDM lock.
962 *
963 * @param pDevIns The PIC device instance.
964 */
965 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
966
967 /** Just a safety precaution. */
968 uint32_t u32TheEnd;
969} PDMPICHLPRC;
970
971/** Pointer to PIC RC helpers. */
972typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
973/** Pointer to const PIC RC helpers. */
974typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
975
976/** Current PDMPICHLPRC version number. */
977#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
978
979
980/**
981 * PIC R0 helpers.
982 */
983typedef struct PDMPICHLPR0
984{
985 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
986 uint32_t u32Version;
987
988 /**
989 * Set the interrupt force action flag.
990 *
991 * @param pDevIns Device instance of the PIC.
992 */
993 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
994
995 /**
996 * Clear the interrupt force action flag.
997 *
998 * @param pDevIns Device instance of the PIC.
999 */
1000 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1001
1002 /**
1003 * Acquires the PDM lock.
1004 *
1005 * @returns VINF_SUCCESS on success.
1006 * @returns rc if we failed to acquire the lock.
1007 * @param pDevIns The PIC device instance.
1008 * @param rc What to return if we fail to acquire the lock.
1009 */
1010 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1011
1012 /**
1013 * Releases the PDM lock.
1014 *
1015 * @param pDevIns The PCI device instance.
1016 */
1017 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1018
1019 /** Just a safety precaution. */
1020 uint32_t u32TheEnd;
1021} PDMPICHLPR0;
1022
1023/** Pointer to PIC R0 helpers. */
1024typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
1025/** Pointer to const PIC R0 helpers. */
1026typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
1027
1028/** Current PDMPICHLPR0 version number. */
1029#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
1030
1031/**
1032 * PIC R3 helpers.
1033 */
1034typedef struct PDMPICHLPR3
1035{
1036 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
1037 uint32_t u32Version;
1038
1039 /**
1040 * Set the interrupt force action flag.
1041 *
1042 * @param pDevIns Device instance of the PIC.
1043 */
1044 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1045
1046 /**
1047 * Clear the interrupt force action flag.
1048 *
1049 * @param pDevIns Device instance of the PIC.
1050 */
1051 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1052
1053 /**
1054 * Acquires the PDM lock.
1055 *
1056 * @returns VINF_SUCCESS on success.
1057 * @returns Fatal error on failure.
1058 * @param pDevIns The PIC device instance.
1059 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1060 */
1061 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1062
1063 /**
1064 * Releases the PDM lock.
1065 *
1066 * @param pDevIns The PIC device instance.
1067 */
1068 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1069
1070 /**
1071 * Gets the address of the RC PIC helpers.
1072 *
1073 * This should be called at both construction and relocation time
1074 * to obtain the correct address of the RC helpers.
1075 *
1076 * @returns RC pointer to the PIC helpers.
1077 * @param pDevIns Device instance of the PIC.
1078 */
1079 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1080
1081 /**
1082 * Gets the address of the R0 PIC helpers.
1083 *
1084 * This should be called at both construction and relocation time
1085 * to obtain the correct address of the R0 helpers.
1086 *
1087 * @returns R0 pointer to the PIC helpers.
1088 * @param pDevIns Device instance of the PIC.
1089 */
1090 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1091
1092 /** Just a safety precaution. */
1093 uint32_t u32TheEnd;
1094} PDMPICHLPR3;
1095
1096/** Pointer to PIC R3 helpers. */
1097typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1098/** Pointer to const PIC R3 helpers. */
1099typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1100
1101/** Current PDMPICHLPR3 version number. */
1102#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1103
1104
1105
1106/**
1107 * Firmware registration structure.
1108 */
1109typedef struct PDMFWREG
1110{
1111 /** Struct version+magic number (PDM_FWREG_VERSION). */
1112 uint32_t u32Version;
1113
1114 /**
1115 * Checks whether this is a hard or soft reset.
1116 *
1117 * The current definition of soft reset is what the PC BIOS does when CMOS[0xF]
1118 * is 5, 9 or 0xA.
1119 *
1120 * @returns true if hard reset, false if soft.
1121 * @param pDevIns Device instance of the firmware.
1122 * @param fFlags PDMRESET_F_XXX passed to the PDMDevHlpVMReset API.
1123 */
1124 DECLR3CALLBACKMEMBER(bool, pfnIsHardReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
1125
1126 /** Just a safety precaution. */
1127 uint32_t u32TheEnd;
1128} PDMFWREG;
1129/** Pointer to a FW registration structure. */
1130typedef PDMFWREG *PPDMFWREG;
1131/** Pointer to a const FW registration structure. */
1132typedef PDMFWREG const *PCPDMFWREG;
1133
1134/** Current PDMFWREG version number. */
1135#define PDM_FWREG_VERSION PDM_VERSION_MAKE(0xffdd, 1, 0)
1136
1137/**
1138 * Firmware R3 helpers.
1139 */
1140typedef struct PDMFWHLPR3
1141{
1142 /** Structure version. PDM_FWHLP_VERSION defines the current version. */
1143 uint32_t u32Version;
1144
1145 /** Just a safety precaution. */
1146 uint32_t u32TheEnd;
1147} PDMFWHLPR3;
1148
1149/** Pointer to FW R3 helpers. */
1150typedef R3PTRTYPE(PDMFWHLPR3 *) PPDMFWHLPR3;
1151/** Pointer to const FW R3 helpers. */
1152typedef R3PTRTYPE(const PDMFWHLPR3 *) PCPDMFWHLPR3;
1153
1154/** Current PDMFWHLPR3 version number. */
1155#define PDM_FWHLPR3_VERSION PDM_VERSION_MAKE(0xffdb, 1, 0)
1156
1157
1158/**
1159 * APIC mode argument for apicR3SetCpuIdFeatureLevel.
1160 *
1161 * Also used in saved-states, CFGM don't change existing values.
1162 */
1163typedef enum PDMAPICMODE
1164{
1165 /** Invalid 0 entry. */
1166 PDMAPICMODE_INVALID = 0,
1167 /** No APIC. */
1168 PDMAPICMODE_NONE,
1169 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1170 PDMAPICMODE_APIC,
1171 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1172 PDMAPICMODE_X2APIC,
1173 /** The usual 32-bit paranoia. */
1174 PDMAPICMODE_32BIT_HACK = 0x7fffffff
1175} PDMAPICMODE;
1176
1177/**
1178 * APIC irq argument for pfnSetInterruptFF and pfnClearInterruptFF.
1179 */
1180typedef enum PDMAPICIRQ
1181{
1182 /** Invalid 0 entry. */
1183 PDMAPICIRQ_INVALID = 0,
1184 /** Normal hardware interrupt. */
1185 PDMAPICIRQ_HARDWARE,
1186 /** NMI. */
1187 PDMAPICIRQ_NMI,
1188 /** SMI. */
1189 PDMAPICIRQ_SMI,
1190 /** ExtINT (HW interrupt via PIC). */
1191 PDMAPICIRQ_EXTINT,
1192 /** Interrupt arrived, needs to be updated to the IRR. */
1193 PDMAPICIRQ_UPDATE_PENDING,
1194 /** The usual 32-bit paranoia. */
1195 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1196} PDMAPICIRQ;
1197
1198
1199/**
1200 * I/O APIC registration structure.
1201 */
1202typedef struct PDMIOAPICREG
1203{
1204 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1205 uint32_t u32Version;
1206
1207 /**
1208 * Set an IRQ.
1209 *
1210 * @param pDevIns Device instance of the I/O APIC.
1211 * @param iIrq IRQ number to set.
1212 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1213 * @param uTagSrc The IRQ tag and source (for tracing).
1214 *
1215 * @remarks Caller enters the PDM critical section
1216 * Actually, as per 2018-07-21 this isn't true (bird).
1217 */
1218 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1219
1220 /** The name of the RC SetIrq entry point. */
1221 const char *pszSetIrqRC;
1222
1223 /** The name of the R0 SetIrq entry point. */
1224 const char *pszSetIrqR0;
1225
1226 /**
1227 * Send a MSI.
1228 *
1229 * @param pDevIns Device instance of the I/O APIC.
1230 * @param GCPhys Request address.
1231 * @param uValue Request value.
1232 * @param uTagSrc The IRQ tag and source (for tracing).
1233 *
1234 * @remarks Caller enters the PDM critical section
1235 * Actually, as per 2018-07-21 this isn't true (bird).
1236 */
1237 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1238
1239 /** The name of the RC SendMsi entry point. */
1240 const char *pszSendMsiRC;
1241
1242 /** The name of the R0 SendMsi entry point. */
1243 const char *pszSendMsiR0;
1244
1245 /**
1246 * Set the EOI for an interrupt vector.
1247 *
1248 * @returns Strict VBox status code - only the following informational status codes:
1249 * @retval VINF_IOM_R3_MMIO_WRITE if the I/O APIC lock is contenteded and we're in R0 or RC.2
1250 * @retval VINF_SUCCESS
1251 *
1252 * @param pDevIns Device instance of the I/O APIC.
1253 * @param u8Vector The vector.
1254 *
1255 * @remarks Caller enters the PDM critical section
1256 * Actually, as per 2018-07-21 this isn't true (bird).
1257 */
1258 DECLR3CALLBACKMEMBER(int, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
1259
1260 /** The name of the RC SetEoi entry point. */
1261 const char *pszSetEoiRC;
1262
1263 /** The name of the R0 SetEoi entry point. */
1264 const char *pszSetEoiR0;
1265} PDMIOAPICREG;
1266/** Pointer to an APIC registration structure. */
1267typedef PDMIOAPICREG *PPDMIOAPICREG;
1268
1269/** Current PDMAPICREG version number. */
1270#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 5, 0)
1271
1272
1273/**
1274 * IOAPIC RC helpers.
1275 */
1276typedef struct PDMIOAPICHLPRC
1277{
1278 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1279 uint32_t u32Version;
1280
1281 /**
1282 * Private interface between the IOAPIC and APIC.
1283 *
1284 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1285 *
1286 * @returns status code.
1287 * @param pDevIns Device instance of the IOAPIC.
1288 * @param u8Dest See APIC implementation.
1289 * @param u8DestMode See APIC implementation.
1290 * @param u8DeliveryMode See APIC implementation.
1291 * @param uVector See APIC implementation.
1292 * @param u8Polarity See APIC implementation.
1293 * @param u8TriggerMode See APIC implementation.
1294 * @param uTagSrc The IRQ tag and source (for tracing).
1295 */
1296 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1297 uint8_t uVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1298
1299 /**
1300 * Acquires the PDM lock.
1301 *
1302 * @returns VINF_SUCCESS on success.
1303 * @returns rc if we failed to acquire the lock.
1304 * @param pDevIns The IOAPIC device instance.
1305 * @param rc What to return if we fail to acquire the lock.
1306 */
1307 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1308
1309 /**
1310 * Releases the PDM lock.
1311 *
1312 * @param pDevIns The IOAPIC device instance.
1313 */
1314 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1315
1316 /** Just a safety precaution. */
1317 uint32_t u32TheEnd;
1318} PDMIOAPICHLPRC;
1319/** Pointer to IOAPIC RC helpers. */
1320typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1321/** Pointer to const IOAPIC helpers. */
1322typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1323
1324/** Current PDMIOAPICHLPRC version number. */
1325#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1326
1327
1328/**
1329 * IOAPIC R0 helpers.
1330 */
1331typedef struct PDMIOAPICHLPR0
1332{
1333 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1334 uint32_t u32Version;
1335
1336 /**
1337 * Private interface between the IOAPIC and APIC.
1338 *
1339 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1340 *
1341 * @returns status code.
1342 * @param pDevIns Device instance of the IOAPIC.
1343 * @param u8Dest See APIC implementation.
1344 * @param u8DestMode See APIC implementation.
1345 * @param u8DeliveryMode See APIC implementation.
1346 * @param uVector See APIC implementation.
1347 * @param u8Polarity See APIC implementation.
1348 * @param u8TriggerMode See APIC implementation.
1349 * @param uTagSrc The IRQ tag and source (for tracing).
1350 */
1351 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1352 uint8_t uVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1353
1354 /**
1355 * Acquires the PDM lock.
1356 *
1357 * @returns VINF_SUCCESS on success.
1358 * @returns rc if we failed to acquire the lock.
1359 * @param pDevIns The IOAPIC device instance.
1360 * @param rc What to return if we fail to acquire the lock.
1361 */
1362 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1363
1364 /**
1365 * Releases the PDM lock.
1366 *
1367 * @param pDevIns The IOAPIC device instance.
1368 */
1369 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1370
1371 /** Just a safety precaution. */
1372 uint32_t u32TheEnd;
1373} PDMIOAPICHLPR0;
1374/** Pointer to IOAPIC R0 helpers. */
1375typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1376/** Pointer to const IOAPIC helpers. */
1377typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1378
1379/** Current PDMIOAPICHLPR0 version number. */
1380#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1381
1382/**
1383 * IOAPIC R3 helpers.
1384 */
1385typedef struct PDMIOAPICHLPR3
1386{
1387 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1388 uint32_t u32Version;
1389
1390 /**
1391 * Private interface between the IOAPIC and APIC.
1392 *
1393 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1394 *
1395 * @returns status code
1396 * @param pDevIns Device instance of the IOAPIC.
1397 * @param u8Dest See APIC implementation.
1398 * @param u8DestMode See APIC implementation.
1399 * @param u8DeliveryMode See APIC implementation.
1400 * @param uVector See APIC implementation.
1401 * @param u8Polarity See APIC implementation.
1402 * @param u8TriggerMode See APIC implementation.
1403 * @param uTagSrc The IRQ tag and source (for tracing).
1404 */
1405 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1406 uint8_t uVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1407
1408 /**
1409 * Acquires the PDM lock.
1410 *
1411 * @returns VINF_SUCCESS on success.
1412 * @returns Fatal error on failure.
1413 * @param pDevIns The IOAPIC device instance.
1414 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1415 */
1416 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1417
1418 /**
1419 * Releases the PDM lock.
1420 *
1421 * @param pDevIns The IOAPIC device instance.
1422 */
1423 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1424
1425 /**
1426 * Gets the address of the RC IOAPIC helpers.
1427 *
1428 * This should be called at both construction and relocation time
1429 * to obtain the correct address of the RC helpers.
1430 *
1431 * @returns RC pointer to the IOAPIC helpers.
1432 * @param pDevIns Device instance of the IOAPIC.
1433 */
1434 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1435
1436 /**
1437 * Gets the address of the R0 IOAPIC helpers.
1438 *
1439 * This should be called at both construction and relocation time
1440 * to obtain the correct address of the R0 helpers.
1441 *
1442 * @returns R0 pointer to the IOAPIC helpers.
1443 * @param pDevIns Device instance of the IOAPIC.
1444 */
1445 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1446
1447 /** Just a safety precaution. */
1448 uint32_t u32TheEnd;
1449} PDMIOAPICHLPR3;
1450/** Pointer to IOAPIC R3 helpers. */
1451typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1452/** Pointer to const IOAPIC helpers. */
1453typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1454
1455/** Current PDMIOAPICHLPR3 version number. */
1456#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1457
1458
1459/**
1460 * HPET registration structure.
1461 */
1462typedef struct PDMHPETREG
1463{
1464 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1465 uint32_t u32Version;
1466
1467} PDMHPETREG;
1468/** Pointer to an HPET registration structure. */
1469typedef PDMHPETREG *PPDMHPETREG;
1470
1471/** Current PDMHPETREG version number. */
1472#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1473
1474/**
1475 * HPET RC helpers.
1476 *
1477 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1478 * at some later point.
1479 */
1480typedef struct PDMHPETHLPRC
1481{
1482 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1483 uint32_t u32Version;
1484
1485 /** Just a safety precaution. */
1486 uint32_t u32TheEnd;
1487} PDMHPETHLPRC;
1488
1489/** Pointer to HPET RC helpers. */
1490typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1491/** Pointer to const HPET RC helpers. */
1492typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1493
1494/** Current PDMHPETHLPRC version number. */
1495#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1496
1497
1498/**
1499 * HPET R0 helpers.
1500 *
1501 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1502 * at some later point.
1503 */
1504typedef struct PDMHPETHLPR0
1505{
1506 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1507 uint32_t u32Version;
1508
1509 /** Just a safety precaution. */
1510 uint32_t u32TheEnd;
1511} PDMHPETHLPR0;
1512
1513/** Pointer to HPET R0 helpers. */
1514typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1515/** Pointer to const HPET R0 helpers. */
1516typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1517
1518/** Current PDMHPETHLPR0 version number. */
1519#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1520
1521/**
1522 * HPET R3 helpers.
1523 */
1524typedef struct PDMHPETHLPR3
1525{
1526 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1527 uint32_t u32Version;
1528
1529 /**
1530 * Gets the address of the RC HPET helpers.
1531 *
1532 * This should be called at both construction and relocation time
1533 * to obtain the correct address of the RC helpers.
1534 *
1535 * @returns RC pointer to the HPET helpers.
1536 * @param pDevIns Device instance of the HPET.
1537 */
1538 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1539
1540 /**
1541 * Gets the address of the R0 HPET helpers.
1542 *
1543 * This should be called at both construction and relocation time
1544 * to obtain the correct address of the R0 helpers.
1545 *
1546 * @returns R0 pointer to the HPET helpers.
1547 * @param pDevIns Device instance of the HPET.
1548 */
1549 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1550
1551 /**
1552 * Set legacy mode on PIT and RTC.
1553 *
1554 * @returns VINF_SUCCESS on success.
1555 * @returns rc if we failed to set legacy mode.
1556 * @param pDevIns Device instance of the HPET.
1557 * @param fActivated Whether legacy mode is activated or deactivated.
1558 */
1559 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1560
1561
1562 /**
1563 * Set IRQ, bypassing ISA bus override rules.
1564 *
1565 * @returns VINF_SUCCESS on success.
1566 * @returns rc if we failed to set legacy mode.
1567 * @param pDevIns Device instance of the HPET.
1568 * @param iIrq IRQ number to set.
1569 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1570 */
1571 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1572
1573 /** Just a safety precaution. */
1574 uint32_t u32TheEnd;
1575} PDMHPETHLPR3;
1576
1577/** Pointer to HPET R3 helpers. */
1578typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1579/** Pointer to const HPET R3 helpers. */
1580typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1581
1582/** Current PDMHPETHLPR3 version number. */
1583#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1584
1585
1586/**
1587 * Raw PCI device registration structure.
1588 */
1589typedef struct PDMPCIRAWREG
1590{
1591 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1592 uint32_t u32Version;
1593 /** Just a safety precaution. */
1594 uint32_t u32TheEnd;
1595} PDMPCIRAWREG;
1596/** Pointer to a raw PCI registration structure. */
1597typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1598
1599/** Current PDMPCIRAWREG version number. */
1600#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1601
1602/**
1603 * Raw PCI device raw-mode context helpers.
1604 */
1605typedef struct PDMPCIRAWHLPRC
1606{
1607 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1608 uint32_t u32Version;
1609 /** Just a safety precaution. */
1610 uint32_t u32TheEnd;
1611} PDMPCIRAWHLPRC;
1612/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1613typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1614/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1615typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1616
1617/** Current PDMPCIRAWHLPRC version number. */
1618#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1619
1620/**
1621 * Raw PCI device ring-0 context helpers.
1622 */
1623typedef struct PDMPCIRAWHLPR0
1624{
1625 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1626 uint32_t u32Version;
1627 /** Just a safety precaution. */
1628 uint32_t u32TheEnd;
1629} PDMPCIRAWHLPR0;
1630/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1631typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1632/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1633typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1634
1635/** Current PDMPCIRAWHLPR0 version number. */
1636#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1637
1638
1639/**
1640 * Raw PCI device ring-3 context helpers.
1641 */
1642typedef struct PDMPCIRAWHLPR3
1643{
1644 /** Undefined structure version and magic number. */
1645 uint32_t u32Version;
1646
1647 /**
1648 * Gets the address of the RC raw PCI device helpers.
1649 *
1650 * This should be called at both construction and relocation time to obtain
1651 * the correct address of the RC helpers.
1652 *
1653 * @returns RC pointer to the raw PCI device helpers.
1654 * @param pDevIns Device instance of the raw PCI device.
1655 */
1656 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1657
1658 /**
1659 * Gets the address of the R0 raw PCI device helpers.
1660 *
1661 * This should be called at both construction and relocation time to obtain
1662 * the correct address of the R0 helpers.
1663 *
1664 * @returns R0 pointer to the raw PCI device helpers.
1665 * @param pDevIns Device instance of the raw PCI device.
1666 */
1667 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1668
1669 /** Just a safety precaution. */
1670 uint32_t u32TheEnd;
1671} PDMPCIRAWHLPR3;
1672/** Pointer to raw PCI R3 helpers. */
1673typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
1674/** Pointer to const raw PCI R3 helpers. */
1675typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
1676
1677/** Current PDMPCIRAWHLPR3 version number. */
1678#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
1679
1680
1681#ifdef IN_RING3
1682
1683/**
1684 * DMA Transfer Handler.
1685 *
1686 * @returns Number of bytes transferred.
1687 * @param pDevIns Device instance of the DMA.
1688 * @param pvUser User pointer.
1689 * @param uChannel Channel number.
1690 * @param off DMA position.
1691 * @param cb Block size.
1692 * @remarks The device lock is not taken, however, the DMA device lock is held.
1693 */
1694typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1695/** Pointer to a FNDMATRANSFERHANDLER(). */
1696typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1697
1698/**
1699 * DMA Controller registration structure.
1700 */
1701typedef struct PDMDMAREG
1702{
1703 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1704 uint32_t u32Version;
1705
1706 /**
1707 * Execute pending transfers.
1708 *
1709 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1710 * @param pDevIns Device instance of the DMAC.
1711 * @remarks No locks held, called on EMT(0) as a form of serialization.
1712 */
1713 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1714
1715 /**
1716 * Register transfer function for DMA channel.
1717 *
1718 * @param pDevIns Device instance of the DMAC.
1719 * @param uChannel Channel number.
1720 * @param pfnTransferHandler Device specific transfer function.
1721 * @param pvUser User pointer to be passed to the callback.
1722 * @remarks No locks held, called on an EMT.
1723 */
1724 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1725
1726 /**
1727 * Read memory
1728 *
1729 * @returns Number of bytes read.
1730 * @param pDevIns Device instance of the DMAC.
1731 * @param uChannel Channel number.
1732 * @param pvBuffer Pointer to target buffer.
1733 * @param off DMA position.
1734 * @param cbBlock Block size.
1735 * @remarks No locks held, called on an EMT.
1736 */
1737 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1738
1739 /**
1740 * Write memory
1741 *
1742 * @returns Number of bytes written.
1743 * @param pDevIns Device instance of the DMAC.
1744 * @param uChannel Channel number.
1745 * @param pvBuffer Memory to write.
1746 * @param off DMA position.
1747 * @param cbBlock Block size.
1748 * @remarks No locks held, called on an EMT.
1749 */
1750 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1751
1752 /**
1753 * Set the DREQ line.
1754 *
1755 * @param pDevIns Device instance of the DMAC.
1756 * @param uChannel Channel number.
1757 * @param uLevel Level of the line.
1758 * @remarks No locks held, called on an EMT.
1759 */
1760 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1761
1762 /**
1763 * Get channel mode
1764 *
1765 * @returns Channel mode.
1766 * @param pDevIns Device instance of the DMAC.
1767 * @param uChannel Channel number.
1768 * @remarks No locks held, called on an EMT.
1769 */
1770 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1771
1772} PDMDMACREG;
1773/** Pointer to a DMAC registration structure. */
1774typedef PDMDMACREG *PPDMDMACREG;
1775
1776/** Current PDMDMACREG version number. */
1777#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1778
1779
1780/**
1781 * DMA Controller device helpers.
1782 */
1783typedef struct PDMDMACHLP
1784{
1785 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1786 uint32_t u32Version;
1787
1788 /* to-be-defined */
1789
1790} PDMDMACHLP;
1791/** Pointer to DMAC helpers. */
1792typedef PDMDMACHLP *PPDMDMACHLP;
1793/** Pointer to const DMAC helpers. */
1794typedef const PDMDMACHLP *PCPDMDMACHLP;
1795
1796/** Current PDMDMACHLP version number. */
1797#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1798
1799#endif /* IN_RING3 */
1800
1801
1802
1803/**
1804 * RTC registration structure.
1805 */
1806typedef struct PDMRTCREG
1807{
1808 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1809 uint32_t u32Version;
1810 uint32_t u32Alignment; /**< structure size alignment. */
1811
1812 /**
1813 * Write to a CMOS register and update the checksum if necessary.
1814 *
1815 * @returns VBox status code.
1816 * @param pDevIns Device instance of the RTC.
1817 * @param iReg The CMOS register index.
1818 * @param u8Value The CMOS register value.
1819 * @remarks Caller enters the device critical section.
1820 */
1821 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1822
1823 /**
1824 * Read a CMOS register.
1825 *
1826 * @returns VBox status code.
1827 * @param pDevIns Device instance of the RTC.
1828 * @param iReg The CMOS register index.
1829 * @param pu8Value Where to store the CMOS register value.
1830 * @remarks Caller enters the device critical section.
1831 */
1832 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1833
1834} PDMRTCREG;
1835/** Pointer to a RTC registration structure. */
1836typedef PDMRTCREG *PPDMRTCREG;
1837/** Pointer to a const RTC registration structure. */
1838typedef const PDMRTCREG *PCPDMRTCREG;
1839
1840/** Current PDMRTCREG version number. */
1841#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
1842
1843
1844/**
1845 * RTC device helpers.
1846 */
1847typedef struct PDMRTCHLP
1848{
1849 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1850 uint32_t u32Version;
1851
1852 /* to-be-defined */
1853
1854} PDMRTCHLP;
1855/** Pointer to RTC helpers. */
1856typedef PDMRTCHLP *PPDMRTCHLP;
1857/** Pointer to const RTC helpers. */
1858typedef const PDMRTCHLP *PCPDMRTCHLP;
1859
1860/** Current PDMRTCHLP version number. */
1861#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1862
1863
1864
1865#ifdef IN_RING3
1866
1867/** @name Special values for PDMDEVHLPR3::pfnPCIRegister parameters.
1868 * @{ */
1869/** Use the primary device configruation (0). */
1870# define PDMPCIDEVREG_CFG_PRIMARY 0
1871/** Use the next device configuration number in the sequence (max + 1). */
1872# define PDMPCIDEVREG_CFG_NEXT UINT32_MAX
1873/** Same device number (and bus) as the previous PCI device registered with the PDM device.
1874 * This is handy when registering multiple PCI device functions and the device number
1875 * is left up to the PCI bus. In order to facilitate on PDM device instance for each
1876 * PCI function, this searches earlier PDM device instances as well. */
1877# define PDMPCIDEVREG_DEV_NO_SAME_AS_PREV UINT8_C(0xfd)
1878/** Use the first unused device number (all functions must be unused). */
1879# define PDMPCIDEVREG_DEV_NO_FIRST_UNUSED UINT8_C(0xfe)
1880/** Use the first unused device function. */
1881# define PDMPCIDEVREG_FUN_NO_FIRST_UNUSED UINT8_C(0xff)
1882
1883/** The device and function numbers are not mandatory, just suggestions. */
1884# define PDMPCIDEVREG_F_NOT_MANDATORY_NO RT_BIT_32(0)
1885/** Registering a PCI bridge device. */
1886# define PDMPCIDEVREG_F_PCI_BRIDGE RT_BIT_32(1)
1887/** Valid flag mask. */
1888# define PDMPCIDEVREG_F_VALID_MASK UINT32_C(0x00000003)
1889/** @} */
1890
1891/** Current PDMDEVHLPR3 version number. */
1892#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 23, 0)
1893
1894/**
1895 * PDM Device API.
1896 */
1897typedef struct PDMDEVHLPR3
1898{
1899 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
1900 uint32_t u32Version;
1901
1902 /**
1903 * Register a number of I/O ports with a device.
1904 *
1905 * These callbacks are of course for the host context (HC).
1906 * Register HC handlers before guest context (GC) handlers! There must be a
1907 * HC handler for every GC handler!
1908 *
1909 * @returns VBox status.
1910 * @param pDevIns The device instance to register the ports with.
1911 * @param Port First port number in the range.
1912 * @param cPorts Number of ports to register.
1913 * @param pvUser User argument.
1914 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1915 * @param pfnIn Pointer to function which is gonna handle IN operations.
1916 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1917 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1918 * @param pszDesc Pointer to description string. This must not be freed.
1919 * @remarks Caller enters the device critical section prior to invoking the
1920 * registered callback methods.
1921 */
1922 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
1923 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1924 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1925
1926 /**
1927 * Register a number of I/O ports with a device for RC.
1928 *
1929 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1930 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1931 * for every RC handler!
1932 *
1933 * @returns VBox status.
1934 * @param pDevIns The device instance to register the ports with
1935 * and which RC module to resolve the names
1936 * against.
1937 * @param Port First port number in the range.
1938 * @param cPorts Number of ports to register.
1939 * @param pvUser User argument.
1940 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1941 * @param pszIn Name of the RC function which is gonna handle IN operations.
1942 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1943 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1944 * @param pszDesc Pointer to description string. This must not be freed.
1945 * @remarks Caller enters the device critical section prior to invoking the
1946 * registered callback methods.
1947 */
1948 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
1949 const char *pszOut, const char *pszIn,
1950 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1951
1952 /**
1953 * Register a number of I/O ports with a device.
1954 *
1955 * These callbacks are of course for the ring-0 host context (R0).
1956 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1957 *
1958 * @returns VBox status.
1959 * @param pDevIns The device instance to register the ports with.
1960 * @param Port First port number in the range.
1961 * @param cPorts Number of ports to register.
1962 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1963 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1964 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1965 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1966 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1967 * @param pszDesc Pointer to description string. This must not be freed.
1968 * @remarks Caller enters the device critical section prior to invoking the
1969 * registered callback methods.
1970 */
1971 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
1972 const char *pszOut, const char *pszIn,
1973 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1974
1975 /**
1976 * Deregister I/O ports.
1977 *
1978 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1979 *
1980 * @returns VBox status.
1981 * @param pDevIns The device instance owning the ports.
1982 * @param Port First port number in the range.
1983 * @param cPorts Number of ports to deregister.
1984 */
1985 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
1986
1987 /**
1988 * Register a Memory Mapped I/O (MMIO) region.
1989 *
1990 * These callbacks are of course for the ring-3 context (R3). Register HC
1991 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
1992 * must be a R3 handler for every RC and R0 handler!
1993 *
1994 * @returns VBox status.
1995 * @param pDevIns The device instance to register the MMIO with.
1996 * @param GCPhysStart First physical address in the range.
1997 * @param cbRange The size of the range (in bytes).
1998 * @param pvUser User argument.
1999 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2000 * @param pfnRead Pointer to function which is gonna handle Read operations.
2001 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2002 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2003 * @param pszDesc Pointer to description string. This must not be freed.
2004 * @remarks Caller enters the device critical section prior to invoking the
2005 * registered callback methods.
2006 */
2007 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
2008 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2009 uint32_t fFlags, const char *pszDesc));
2010
2011 /**
2012 * Register a Memory Mapped I/O (MMIO) region for RC.
2013 *
2014 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2015 * (R3) handlers before guest context handlers! There must be a R3 handler for
2016 * every RC handler!
2017 *
2018 * @returns VBox status.
2019 * @param pDevIns The device instance to register the MMIO with.
2020 * @param GCPhysStart First physical address in the range.
2021 * @param cbRange The size of the range (in bytes).
2022 * @param pvUser User argument.
2023 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2024 * @param pszRead Name of the RC function which is gonna handle Read operations.
2025 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2026 * @remarks Caller enters the device critical section prior to invoking the
2027 * registered callback methods.
2028 */
2029 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser,
2030 const char *pszWrite, const char *pszRead, const char *pszFill));
2031
2032 /**
2033 * Register a Memory Mapped I/O (MMIO) region for R0.
2034 *
2035 * These callbacks are for the ring-0 host context (R0). Register ring-3
2036 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2037 * every R0 handler!
2038 *
2039 * @returns VBox status.
2040 * @param pDevIns The device instance to register the MMIO with.
2041 * @param GCPhysStart First physical address in the range.
2042 * @param cbRange The size of the range (in bytes).
2043 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2044 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2045 * @param pszRead Name of the RC function which is gonna handle Read operations.
2046 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2047 * @remarks Caller enters the device critical section prior to invoking the
2048 * registered callback methods.
2049 */
2050 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
2051 const char *pszWrite, const char *pszRead, const char *pszFill));
2052
2053 /**
2054 * Deregister a Memory Mapped I/O (MMIO) region.
2055 *
2056 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2057 *
2058 * @returns VBox status.
2059 * @param pDevIns The device instance owning the MMIO region(s).
2060 * @param GCPhysStart First physical address in the range.
2061 * @param cbRange The size of the range (in bytes).
2062 */
2063 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange));
2064
2065 /**
2066 * Allocate and register a MMIO2 region.
2067 *
2068 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2069 * RAM associated with a device. It is also non-shared memory with a
2070 * permanent ring-3 mapping and page backing (presently).
2071 *
2072 * @returns VBox status.
2073 * @param pDevIns The device instance.
2074 * @param pPciDev The PCI device the region is associated with, or
2075 * NULL if no PCI device association.
2076 * @param iRegion The region number. Use the PCI region number as
2077 * this must be known to the PCI bus device too. If
2078 * it's not associated with the PCI device, then
2079 * any number up to UINT8_MAX is fine.
2080 * @param cb The size (in bytes) of the region.
2081 * @param fFlags Reserved for future use, must be zero.
2082 * @param ppv Where to store the address of the ring-3 mapping
2083 * of the memory.
2084 * @param pszDesc Pointer to description string. This must not be
2085 * freed.
2086 * @thread EMT.
2087 */
2088 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb,
2089 uint32_t fFlags, void **ppv, const char *pszDesc));
2090
2091 /**
2092 * Pre-register a Memory Mapped I/O (MMIO) region.
2093 *
2094 * This API must be used for large PCI MMIO regions, as it handles these much
2095 * more efficiently and with greater flexibility when it comes to heap usage.
2096 * It is only available during device construction.
2097 *
2098 * To map and unmap the pre-registered region into and our of guest address
2099 * space, use the PDMDevHlpMMIOExMap and PDMDevHlpMMIOExUnmap helpers.
2100 *
2101 * You may call PDMDevHlpMMIOExDeregister from the destructor to free the region
2102 * for reasons of symmetry, but it will be automatically deregistered by PDM
2103 * once the destructor returns.
2104 *
2105 * @returns VBox status.
2106 * @param pDevIns The device instance to register the MMIO with.
2107 * @param pPciDev The PCI device to associate the region with, use
2108 * NULL to not associate it with any device.
2109 * @param iRegion The PCI region number. When @a pPciDev is NULL,
2110 * this is a unique number between 0 and UINT8_MAX.
2111 * @param cbRegion The size of the range (in bytes).
2112 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2113 * @param pszDesc Pointer to description string. This must not be freed.
2114 * @param pvUser Ring-3 user argument.
2115 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2116 * @param pfnRead Pointer to function which is gonna handle Read operations.
2117 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2118 * @param pvUserR0 Ring-0 user argument. Optional.
2119 * @param pszWriteR0 The name of the ring-0 write handler method. Optional.
2120 * @param pszReadR0 The name of the ring-0 read handler method. Optional.
2121 * @param pszFillR0 The name of the ring-0 fill/memset handler method. Optional.
2122 * @param pvUserRC Raw-mode context user argument. Optional. If
2123 * unsigned value is 0x10000 or higher, it will be
2124 * automatically relocated with the hypervisor
2125 * guest mapping.
2126 * @param pszWriteRC The name of the raw-mode context write handler method. Optional.
2127 * @param pszReadRC The name of the raw-mode context read handler method. Optional.
2128 * @param pszFillRC The name of the raw-mode context fill/memset handler method. Optional.
2129 * @thread EMT
2130 *
2131 * @remarks Caller enters the device critical section prior to invoking the
2132 * registered callback methods.
2133 * @sa PDMDevHlpMMIOExMap, PDMDevHlpMMIOExUnmap, PDMDevHlpMMIOExDeregister,
2134 * PDMDevHlpMMIORegisterEx
2135 */
2136 DECLR3CALLBACKMEMBER(int, pfnMMIOExPreRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,
2137 uint32_t fFlags, const char *pszDesc, RTHCPTR pvUser,
2138 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2139 RTR0PTR pvUserR0, const char *pszWriteR0, const char *pszReadR0, const char *pszFillR0,
2140 RTRCPTR pvUserRC, const char *pszWriteRC, const char *pszReadRC, const char *pszFillRC));
2141
2142 /**
2143 * Deregisters and frees a MMIO or MMIO2 region.
2144 *
2145 * Any physical (and virtual) access handlers registered for the region must
2146 * be deregistered before calling this function (MMIO2 only).
2147 *
2148 * @returns VBox status code.
2149 * @param pDevIns The device instance.
2150 * @param pPciDev The PCI device the region is associated with, or
2151 * NULL if not associated with any.
2152 * @param iRegion The region number used during registration.
2153 * @thread EMT.
2154 */
2155 DECLR3CALLBACKMEMBER(int, pfnMMIOExDeregister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion));
2156
2157 /**
2158 * Maps a MMIO or MMIO2 region into the physical memory space.
2159 *
2160 * A MMIO2 range or a pre-registered MMIO range may overlap with base memory if
2161 * a lot of RAM is configured for the VM, in which case we'll drop the base
2162 * memory pages. Presently we will make no attempt to preserve anything that
2163 * happens to be present in the base memory that is replaced, this is of course
2164 * incorrect but it's too much effort.
2165 *
2166 * @returns VBox status code.
2167 * @param pDevIns The device instance.
2168 * @param pPciDev The PCI device the region is associated with, or
2169 * NULL if not associated with any.
2170 * @param iRegion The region number used during registration.
2171 * @param GCPhys The physical address to map it at.
2172 * @thread EMT.
2173 */
2174 DECLR3CALLBACKMEMBER(int, pfnMMIOExMap,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys));
2175
2176 /**
2177 * Unmaps a MMIO or MMIO2 region previously mapped using pfnMMIOExMap.
2178 *
2179 * @returns VBox status code.
2180 * @param pDevIns The device instance.
2181 * @param pPciDev The PCI device the region is associated with, or
2182 * NULL if not associated with any.
2183 * @param iRegion The region number used during registration.
2184 * @param GCPhys The physical address it's currently mapped at.
2185 * @thread EMT.
2186 */
2187 DECLR3CALLBACKMEMBER(int, pfnMMIOExUnmap,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys));
2188
2189 /**
2190 * Reduces the length of a MMIO2 or pre-registered MMIO range.
2191 *
2192 * This is for implementations of PDMPCIDEV::pfnRegionLoadChangeHookR3 and will
2193 * only work during saved state restore. It will not call the PCI bus code, as
2194 * that is expected to restore the saved resource configuration.
2195 *
2196 * It just adjusts the mapping length of the region so that when pfnMMIOExMap is
2197 * called it will only map @a cbRegion bytes and not the value set during
2198 * registration.
2199 *
2200 * @return VBox status code.
2201 * @param pDevIns The device owning the range.
2202 * @param pPciDev The PCI device the region is associated with, or
2203 * NULL if not associated with any.
2204 * @param iRegion The region.
2205 * @param cbRegion The new size, must be smaller.
2206 */
2207 DECLR3CALLBACKMEMBER(int, pfnMMIOExReduce,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion));
2208
2209 /**
2210 * Maps a portion of an MMIO2 region into the hypervisor region.
2211 *
2212 * Callers of this API must never deregister the MMIO2 region before the
2213 * VM is powered off.
2214 *
2215 * @return VBox status code.
2216 * @param pDevIns The device owning the MMIO2 memory.
2217 * @param pPciDev The PCI device the region is associated with, or
2218 * NULL if not associated with any.
2219 * @param iRegion The region.
2220 * @param off The offset into the region. Will be rounded down
2221 * to closest page boundary.
2222 * @param cb The number of bytes to map. Will be rounded up
2223 * to the closest page boundary.
2224 * @param pszDesc Mapping description.
2225 * @param pRCPtr Where to store the RC address.
2226 */
2227 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
2228 RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr));
2229
2230 /**
2231 * Maps a portion of an MMIO2 region into kernel space (host).
2232 *
2233 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2234 * or the VM is terminated.
2235 *
2236 * @return VBox status code.
2237 * @param pDevIns The device owning the MMIO2 memory.
2238 * @param pPciDev The PCI device the region is associated with, or
2239 * NULL if not associated with any.
2240 * @param iRegion The region.
2241 * @param off The offset into the region. Must be page
2242 * aligned.
2243 * @param cb The number of bytes to map. Must be page
2244 * aligned.
2245 * @param pszDesc Mapping description.
2246 * @param pR0Ptr Where to store the R0 address.
2247 */
2248 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
2249 RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr));
2250
2251 /**
2252 * Register a ROM (BIOS) region.
2253 *
2254 * It goes without saying that this is read-only memory. The memory region must be
2255 * in unassigned memory. I.e. from the top of the address space or on the PC in
2256 * the 0xa0000-0xfffff range.
2257 *
2258 * @returns VBox status.
2259 * @param pDevIns The device instance owning the ROM region.
2260 * @param GCPhysStart First physical address in the range.
2261 * Must be page aligned!
2262 * @param cbRange The size of the range (in bytes).
2263 * Must be page aligned!
2264 * @param pvBinary Pointer to the binary data backing the ROM image.
2265 * @param cbBinary The size of the binary pointer. This must
2266 * be equal or smaller than @a cbRange.
2267 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2268 * @param pszDesc Pointer to description string. This must not be freed.
2269 *
2270 * @remark There is no way to remove the rom, automatically on device cleanup or
2271 * manually from the device yet. At present I doubt we need such features...
2272 */
2273 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2274 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2275
2276 /**
2277 * Changes the protection of shadowed ROM mapping.
2278 *
2279 * This is intented for use by the system BIOS, chipset or device in question to
2280 * change the protection of shadowed ROM code after init and on reset.
2281 *
2282 * @param pDevIns The device instance.
2283 * @param GCPhysStart Where the mapping starts.
2284 * @param cbRange The size of the mapping.
2285 * @param enmProt The new protection type.
2286 */
2287 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2288
2289 /**
2290 * Register a save state data unit.
2291 *
2292 * @returns VBox status.
2293 * @param pDevIns The device instance.
2294 * @param uVersion Data layout version number.
2295 * @param cbGuess The approximate amount of data in the unit.
2296 * Only for progress indicators.
2297 * @param pszBefore Name of data unit which we should be put in
2298 * front of. Optional (NULL).
2299 *
2300 * @param pfnLivePrep Prepare live save callback, optional.
2301 * @param pfnLiveExec Execute live save callback, optional.
2302 * @param pfnLiveVote Vote live save callback, optional.
2303 *
2304 * @param pfnSavePrep Prepare save callback, optional.
2305 * @param pfnSaveExec Execute save callback, optional.
2306 * @param pfnSaveDone Done save callback, optional.
2307 *
2308 * @param pfnLoadPrep Prepare load callback, optional.
2309 * @param pfnLoadExec Execute load callback, optional.
2310 * @param pfnLoadDone Done load callback, optional.
2311 * @remarks Caller enters the device critical section prior to invoking the
2312 * registered callback methods.
2313 */
2314 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2315 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2316 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2317 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2318
2319 /**
2320 * Creates a timer.
2321 *
2322 * @returns VBox status.
2323 * @param pDevIns The device instance.
2324 * @param enmClock The clock to use on this timer.
2325 * @param pfnCallback Callback function.
2326 * @param pvUser User argument for the callback.
2327 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2328 * @param pszDesc Pointer to description string which must stay around
2329 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2330 * @param ppTimer Where to store the timer on success.
2331 * @remarks Caller enters the device critical section prior to invoking the
2332 * callback.
2333 */
2334 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback,
2335 void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2336
2337 /**
2338 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2339 *
2340 * @returns pTime.
2341 * @param pDevIns The device instance.
2342 * @param pTime Where to store the time.
2343 */
2344 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2345
2346 /**
2347 * Read physical memory.
2348 *
2349 * @returns VINF_SUCCESS (for now).
2350 * @param pDevIns The device instance.
2351 * @param GCPhys Physical address start reading from.
2352 * @param pvBuf Where to put the read bits.
2353 * @param cbRead How many bytes to read.
2354 * @thread Any thread, but the call may involve the emulation thread.
2355 */
2356 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2357
2358 /**
2359 * Write to physical memory.
2360 *
2361 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2362 * @param pDevIns The device instance.
2363 * @param GCPhys Physical address to write to.
2364 * @param pvBuf What to write.
2365 * @param cbWrite How many bytes to write.
2366 * @thread Any thread, but the call may involve the emulation thread.
2367 */
2368 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2369
2370 /**
2371 * Requests the mapping of a guest page into ring-3.
2372 *
2373 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2374 * release it.
2375 *
2376 * This API will assume your intention is to write to the page, and will
2377 * therefore replace shared and zero pages. If you do not intend to modify the
2378 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2379 *
2380 * @returns VBox status code.
2381 * @retval VINF_SUCCESS on success.
2382 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2383 * backing or if the page has any active access handlers. The caller
2384 * must fall back on using PGMR3PhysWriteExternal.
2385 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2386 *
2387 * @param pDevIns The device instance.
2388 * @param GCPhys The guest physical address of the page that
2389 * should be mapped.
2390 * @param fFlags Flags reserved for future use, MBZ.
2391 * @param ppv Where to store the address corresponding to
2392 * GCPhys.
2393 * @param pLock Where to store the lock information that
2394 * pfnPhysReleasePageMappingLock needs.
2395 *
2396 * @remark Avoid calling this API from within critical sections (other than the
2397 * PGM one) because of the deadlock risk when we have to delegating the
2398 * task to an EMT.
2399 * @thread Any.
2400 */
2401 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv,
2402 PPGMPAGEMAPLOCK pLock));
2403
2404 /**
2405 * Requests the mapping of a guest page into ring-3, external threads.
2406 *
2407 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2408 * release it.
2409 *
2410 * @returns VBox status code.
2411 * @retval VINF_SUCCESS on success.
2412 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2413 * backing or if the page as an active ALL access handler. The caller
2414 * must fall back on using PGMPhysRead.
2415 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2416 *
2417 * @param pDevIns The device instance.
2418 * @param GCPhys The guest physical address of the page that
2419 * should be mapped.
2420 * @param fFlags Flags reserved for future use, MBZ.
2421 * @param ppv Where to store the address corresponding to
2422 * GCPhys.
2423 * @param pLock Where to store the lock information that
2424 * pfnPhysReleasePageMappingLock needs.
2425 *
2426 * @remark Avoid calling this API from within critical sections.
2427 * @thread Any.
2428 */
2429 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags,
2430 void const **ppv, PPGMPAGEMAPLOCK pLock));
2431
2432 /**
2433 * Release the mapping of a guest page.
2434 *
2435 * This is the counter part of pfnPhysGCPhys2CCPtr and
2436 * pfnPhysGCPhys2CCPtrReadOnly.
2437 *
2438 * @param pDevIns The device instance.
2439 * @param pLock The lock structure initialized by the mapping
2440 * function.
2441 */
2442 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2443
2444 /**
2445 * Read guest physical memory by virtual address.
2446 *
2447 * @param pDevIns The device instance.
2448 * @param pvDst Where to put the read bits.
2449 * @param GCVirtSrc Guest virtual address to start reading from.
2450 * @param cb How many bytes to read.
2451 * @thread The emulation thread.
2452 */
2453 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2454
2455 /**
2456 * Write to guest physical memory by virtual address.
2457 *
2458 * @param pDevIns The device instance.
2459 * @param GCVirtDst Guest virtual address to write to.
2460 * @param pvSrc What to write.
2461 * @param cb How many bytes to write.
2462 * @thread The emulation thread.
2463 */
2464 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2465
2466 /**
2467 * Convert a guest virtual address to a guest physical address.
2468 *
2469 * @returns VBox status code.
2470 * @param pDevIns The device instance.
2471 * @param GCPtr Guest virtual address.
2472 * @param pGCPhys Where to store the GC physical address
2473 * corresponding to GCPtr.
2474 * @thread The emulation thread.
2475 * @remark Careful with page boundaries.
2476 */
2477 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2478
2479 /**
2480 * Allocate memory which is associated with current VM instance
2481 * and automatically freed on it's destruction.
2482 *
2483 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2484 * @param pDevIns The device instance.
2485 * @param cb Number of bytes to allocate.
2486 */
2487 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2488
2489 /**
2490 * Allocate memory which is associated with current VM instance
2491 * and automatically freed on it's destruction. The memory is ZEROed.
2492 *
2493 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2494 * @param pDevIns The device instance.
2495 * @param cb Number of bytes to allocate.
2496 */
2497 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2498
2499 /**
2500 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2501 *
2502 * @param pDevIns The device instance.
2503 * @param pv Pointer to the memory to free.
2504 */
2505 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2506
2507 /**
2508 * Gets the VM state.
2509 *
2510 * @returns VM state.
2511 * @param pDevIns The device instance.
2512 * @thread Any thread (just keep in mind that it's volatile info).
2513 */
2514 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2515
2516 /**
2517 * Checks if the VM was teleported and hasn't been fully resumed yet.
2518 *
2519 * @returns true / false.
2520 * @param pDevIns The device instance.
2521 * @thread Any thread.
2522 */
2523 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2524
2525 /**
2526 * Set the VM error message
2527 *
2528 * @returns rc.
2529 * @param pDevIns The device instance.
2530 * @param rc VBox status code.
2531 * @param SRC_POS Use RT_SRC_POS.
2532 * @param pszFormat Error message format string.
2533 * @param ... Error message arguments.
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2536 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
2537
2538 /**
2539 * Set the VM error message
2540 *
2541 * @returns rc.
2542 * @param pDevIns The device instance.
2543 * @param rc VBox status code.
2544 * @param SRC_POS Use RT_SRC_POS.
2545 * @param pszFormat Error message format string.
2546 * @param va Error message arguments.
2547 */
2548 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2549 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2550
2551 /**
2552 * Set the VM runtime error message
2553 *
2554 * @returns VBox status code.
2555 * @param pDevIns The device instance.
2556 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2557 * @param pszErrorId Error ID string.
2558 * @param pszFormat Error message format string.
2559 * @param ... Error message arguments.
2560 */
2561 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2562 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
2563
2564 /**
2565 * Set the VM runtime error message
2566 *
2567 * @returns VBox status code.
2568 * @param pDevIns The device instance.
2569 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2570 * @param pszErrorId Error ID string.
2571 * @param pszFormat Error message format string.
2572 * @param va Error message arguments.
2573 */
2574 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2575 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
2576
2577 /**
2578 * Stops the VM and enters the debugger to look at the guest state.
2579 *
2580 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2581 * invoking this function directly.
2582 *
2583 * @returns VBox status code which must be passed up to the VMM.
2584 * @param pDevIns The device instance.
2585 * @param pszFile Filename of the assertion location.
2586 * @param iLine The linenumber of the assertion location.
2587 * @param pszFunction Function of the assertion location.
2588 * @param pszFormat Message. (optional)
2589 * @param args Message parameters.
2590 */
2591 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction,
2592 const char *pszFormat, va_list args) RT_IPRT_FORMAT_ATTR(5, 0));
2593
2594 /**
2595 * Register a info handler with DBGF.
2596 *
2597 * @returns VBox status code.
2598 * @param pDevIns The device instance.
2599 * @param pszName The identifier of the info.
2600 * @param pszDesc The description of the info and any arguments
2601 * the handler may take.
2602 * @param pfnHandler The handler function to be called to display the
2603 * info.
2604 */
2605 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2606
2607 /**
2608 * Register a info handler with DBGF, argv style.
2609 *
2610 * @returns VBox status code.
2611 * @param pDevIns The device instance.
2612 * @param pszName The identifier of the info.
2613 * @param pszDesc The description of the info and any arguments
2614 * the handler may take.
2615 * @param pfnHandler The handler function to be called to display the
2616 * info.
2617 */
2618 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegisterArgv,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFINFOARGVDEV pfnHandler));
2619
2620 /**
2621 * Registers a set of registers for a device.
2622 *
2623 * The @a pvUser argument of the getter and setter callbacks will be
2624 * @a pDevIns. The register names will be prefixed by the device name followed
2625 * immediately by the instance number.
2626 *
2627 * @returns VBox status code.
2628 * @param pDevIns The device instance.
2629 * @param paRegisters The register descriptors.
2630 *
2631 * @remarks The device critical section is NOT entered prior to working the
2632 * callbacks registered via this helper!
2633 */
2634 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2635
2636 /**
2637 * Gets the trace buffer handle.
2638 *
2639 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2640 * really inteded for direct usage, thus no inline wrapper function.
2641 *
2642 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2643 * @param pDevIns The device instance.
2644 */
2645 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2646
2647 /**
2648 * Registers a statistics sample if statistics are enabled.
2649 *
2650 * @param pDevIns Device instance of the DMA.
2651 * @param pvSample Pointer to the sample.
2652 * @param enmType Sample type. This indicates what pvSample is
2653 * pointing at.
2654 * @param pszName Sample name. The name is on this form
2655 * "/<component>/<sample>". Further nesting is
2656 * possible.
2657 * @param enmUnit Sample unit.
2658 * @param pszDesc Sample description.
2659 */
2660 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2661
2662 /**
2663 * Same as pfnSTAMRegister except that the name is specified in a
2664 * RTStrPrintf like fashion.
2665 *
2666 * @returns VBox status.
2667 * @param pDevIns Device instance of the DMA.
2668 * @param pvSample Pointer to the sample.
2669 * @param enmType Sample type. This indicates what pvSample is
2670 * pointing at.
2671 * @param enmVisibility Visibility type specifying whether unused
2672 * statistics should be visible or not.
2673 * @param enmUnit Sample unit.
2674 * @param pszDesc Sample description.
2675 * @param pszName The sample name format string.
2676 * @param ... Arguments to the format string.
2677 */
2678 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2679 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2680 const char *pszName, ...) RT_IPRT_FORMAT_ATTR(7, 8));
2681
2682 /**
2683 * Same as pfnSTAMRegister except that the name is specified in a
2684 * RTStrPrintfV like fashion.
2685 *
2686 * @returns VBox status.
2687 * @param pDevIns Device instance of the DMA.
2688 * @param pvSample Pointer to the sample.
2689 * @param enmType Sample type. This indicates what pvSample is
2690 * pointing at.
2691 * @param enmVisibility Visibility type specifying whether unused
2692 * statistics should be visible or not.
2693 * @param enmUnit Sample unit.
2694 * @param pszDesc Sample description.
2695 * @param pszName The sample name format string.
2696 * @param args Arguments to the format string.
2697 */
2698 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2699 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2700 const char *pszName, va_list args) RT_IPRT_FORMAT_ATTR(7, 0));
2701
2702 /**
2703 * Registers a PCI device with the default PCI bus.
2704 *
2705 * @returns VBox status code.
2706 * @param pDevIns The device instance.
2707 * @param pPciDev The PCI device structure.
2708 * This must be kept in the instance data.
2709 * The PCI configuration must be initialized before registration.
2710 * @param idxDevCfg The CFGM configuration index to use for this
2711 * device.
2712 * Zero indicates the default configuration
2713 * (PDMPCIDEVREG_CFG_PRIMARY), whereas 1 to 255
2714 * references subkeys "PciDev1" thru "PciDev255".
2715 * Pass PDMPCIDEVREG_CFG_NEXT to use the next
2716 * number in the sequence (last + 1).
2717 * @param fFlags Reserved for future use, PDMPCIDEVREG_F_MBZ.
2718 * @param uPciDevNo PDMPCIDEVREG_DEV_NO_FIRST_UNUSED,
2719 * PDMPCIDEVREG_DEV_NO_SAME_AS_PREV, or a specific
2720 * device number (0-31). This will be ignored if
2721 * the CFGM configuration contains a PCIDeviceNo
2722 * value.
2723 * @param uPciFunNo PDMPCIDEVREG_FUN_NO_FIRST_UNUSED, or a specific
2724 * function number (0-7). This will be ignored if
2725 * the CFGM configuration contains a PCIFunctionNo
2726 * value.
2727 * @param pszName Device name, if NULL PDMDEVREG::szName is used.
2728 * The pointer is saved, so don't free or changed.
2729 */
2730 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
2731 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
2732
2733 /**
2734 * Initialize MSI or MSI-X emulation support for the given PCI device.
2735 *
2736 * @see PDMPCIBUSREG::pfnRegisterMsiR3 for details.
2737 *
2738 * @returns VBox status code.
2739 * @param pDevIns The device instance.
2740 * @param pPciDev The PCI device. NULL is an alias for the first
2741 * one registered.
2742 * @param pMsiReg MSI emulation registration structure.
2743 */
2744 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
2745
2746 /**
2747 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2748 *
2749 * @returns VBox status code.
2750 * @param pDevIns The device instance.
2751 * @param pPciDev The PCI device structure. If NULL the default
2752 * PCI device for this device instance is used.
2753 * @param iRegion The region number.
2754 * @param cbRegion Size of the region.
2755 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2756 * @param pfnCallback Callback for doing the mapping.
2757 * @remarks The callback will be invoked holding the PDM lock. The device lock
2758 * is NOT take because that is very likely be a lock order violation.
2759 */
2760 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,
2761 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2762
2763 /**
2764 * Register PCI configuration space read/write callbacks.
2765 *
2766 * @param pDevIns The device instance.
2767 * @param pPciDev The PCI device structure. If NULL the default
2768 * PCI device for this device instance is used.
2769 * @param pfnRead Pointer to the user defined PCI config read function.
2770 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2771 * PCI config read function. This way, user can decide when (and if)
2772 * to call default PCI config read function. Can be NULL.
2773 * @param pfnWrite Pointer to the user defined PCI config write function.
2774 * @param ppfnWriteOld Pointer to function pointer which will receive
2775 * the old (default) PCI config write function.
2776 * This way, user can decide when (and if) to call
2777 * default PCI config write function. Can be NULL.
2778 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2779 * is NOT take because that is very likely be a lock order violation.
2780 * @thread EMT
2781 */
2782 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
2783 PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2784 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2785
2786 /**
2787 * Bus master physical memory read.
2788 *
2789 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2790 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2791 * @param pDevIns The device instance.
2792 * @param pPciDev The PCI device structure. If NULL the default
2793 * PCI device for this device instance is used.
2794 * @param GCPhys Physical address start reading from.
2795 * @param pvBuf Where to put the read bits.
2796 * @param cbRead How many bytes to read.
2797 * @thread Any thread, but the call may involve the emulation thread.
2798 */
2799 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2800
2801 /**
2802 * Bus master physical memory write.
2803 *
2804 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2805 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2806 * @param pDevIns The device instance.
2807 * @param pPciDev The PCI device structure. If NULL the default
2808 * PCI device for this device instance is used.
2809 * @param GCPhys Physical address to write to.
2810 * @param pvBuf What to write.
2811 * @param cbWrite How many bytes to write.
2812 * @thread Any thread, but the call may involve the emulation thread.
2813 */
2814 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2815
2816 /**
2817 * Sets the IRQ for the given PCI device.
2818 *
2819 * @param pDevIns The device instance.
2820 * @param pPciDev The PCI device structure. If NULL the default
2821 * PCI device for this device instance is used.
2822 * @param iIrq IRQ number to set.
2823 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2824 * @thread Any thread, but will involve the emulation thread.
2825 */
2826 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel));
2827
2828 /**
2829 * Sets the IRQ for the given PCI device, but doesn't wait for EMT to process
2830 * the request when not called from EMT.
2831 *
2832 * @param pDevIns The device instance.
2833 * @param pPciDev The PCI device structure. If NULL the default
2834 * PCI device for this device instance is used.
2835 * @param iIrq IRQ number to set.
2836 * @param iLevel IRQ level.
2837 * @thread Any thread, but will involve the emulation thread.
2838 */
2839 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel));
2840
2841 /**
2842 * Set ISA IRQ for a device.
2843 *
2844 * @param pDevIns The device instance.
2845 * @param iIrq IRQ number to set.
2846 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2847 * @thread Any thread, but will involve the emulation thread.
2848 */
2849 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2850
2851 /**
2852 * Set the ISA IRQ for a device, but don't wait for EMT to process
2853 * the request when not called from EMT.
2854 *
2855 * @param pDevIns The device instance.
2856 * @param iIrq IRQ number to set.
2857 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2858 * @thread Any thread, but will involve the emulation thread.
2859 */
2860 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2861
2862 /**
2863 * Send an MSI straight to the I/O APIC.
2864 *
2865 * @param pDevIns PCI device instance.
2866 * @param GCPhys Physical address MSI request was written.
2867 * @param uValue Value written.
2868 * @thread Any thread, but will involve the emulation thread.
2869 */
2870 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue));
2871
2872 /**
2873 * Attaches a driver (chain) to the device.
2874 *
2875 * The first call for a LUN this will serve as a registration of the LUN. The pBaseInterface and
2876 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2877 *
2878 * @returns VBox status code.
2879 * @param pDevIns The device instance.
2880 * @param iLun The logical unit to attach.
2881 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2882 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2883 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2884 * for the live of the device instance.
2885 */
2886 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
2887 PPDMIBASE *ppBaseInterface, const char *pszDesc));
2888
2889 /**
2890 * Detaches an attached driver (chain) from the device again.
2891 *
2892 * @returns VBox status code.
2893 * @param pDevIns The device instance.
2894 * @param pDrvIns The driver instance to detach.
2895 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2896 */
2897 DECLR3CALLBACKMEMBER(int, pfnDriverDetach,(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags));
2898
2899 /**
2900 * Create a queue.
2901 *
2902 * @returns VBox status code.
2903 * @param pDevIns The device instance.
2904 * @param cbItem The size of a queue item.
2905 * @param cItems The number of items in the queue.
2906 * @param cMilliesInterval The number of milliseconds between polling the queue.
2907 * If 0 then the emulation thread will be notified whenever an item arrives.
2908 * @param pfnCallback The consumer function.
2909 * @param fRZEnabled Set if the queue should work in RC and R0.
2910 * @param pszName The queue base name. The instance number will be
2911 * appended automatically.
2912 * @param ppQueue Where to store the queue handle on success.
2913 * @thread The emulation thread.
2914 * @remarks The device critical section will NOT be entered before calling the
2915 * callback. No locks will be held, but for now it's safe to assume
2916 * that only one EMT will do queue callbacks at any one time.
2917 */
2918 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
2919 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2920
2921 /**
2922 * Initializes a PDM critical section.
2923 *
2924 * The PDM critical sections are derived from the IPRT critical sections, but
2925 * works in RC and R0 as well.
2926 *
2927 * @returns VBox status code.
2928 * @param pDevIns The device instance.
2929 * @param pCritSect Pointer to the critical section.
2930 * @param SRC_POS Use RT_SRC_POS.
2931 * @param pszNameFmt Format string for naming the critical section.
2932 * For statistics and lock validation.
2933 * @param va Arguments for the format string.
2934 */
2935 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2936 const char *pszNameFmt, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2937
2938 /**
2939 * Gets the NOP critical section.
2940 *
2941 * @returns The ring-3 address of the NOP critical section.
2942 * @param pDevIns The device instance.
2943 */
2944 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
2945
2946 /**
2947 * Gets the NOP critical section.
2948 *
2949 * @returns The ring-0 address of the NOP critical section.
2950 * @param pDevIns The device instance.
2951 */
2952 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
2953
2954 /**
2955 * Gets the NOP critical section.
2956 *
2957 * @returns The raw-mode context address of the NOP critical section.
2958 * @param pDevIns The device instance.
2959 */
2960 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
2961
2962 /**
2963 * Changes the device level critical section from the automatically created
2964 * default to one desired by the device constructor.
2965 *
2966 * @returns VBox status code.
2967 * @param pDevIns The device instance.
2968 * @param pCritSect The critical section to use. NULL is not
2969 * valid, instead use the NOP critical
2970 * section.
2971 */
2972 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
2973
2974 /**
2975 * Creates a PDM thread.
2976 *
2977 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2978 * resuming, and destroying the thread as the VM state changes.
2979 *
2980 * @returns VBox status code.
2981 * @param pDevIns The device instance.
2982 * @param ppThread Where to store the thread 'handle'.
2983 * @param pvUser The user argument to the thread function.
2984 * @param pfnThread The thread function.
2985 * @param pfnWakeup The wakup callback. This is called on the EMT
2986 * thread when a state change is pending.
2987 * @param cbStack See RTThreadCreate.
2988 * @param enmType See RTThreadCreate.
2989 * @param pszName See RTThreadCreate.
2990 * @remarks The device critical section will NOT be entered prior to invoking
2991 * the function pointers.
2992 */
2993 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2994 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2995
2996 /**
2997 * Set up asynchronous handling of a suspend, reset or power off notification.
2998 *
2999 * This shall only be called when getting the notification. It must be called
3000 * for each one.
3001 *
3002 * @returns VBox status code.
3003 * @param pDevIns The device instance.
3004 * @param pfnAsyncNotify The callback.
3005 * @thread EMT(0)
3006 * @remarks The caller will enter the device critical section prior to invoking
3007 * the callback.
3008 */
3009 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3010
3011 /**
3012 * Notify EMT(0) that the device has completed the asynchronous notification
3013 * handling.
3014 *
3015 * This can be called at any time, spurious calls will simply be ignored.
3016 *
3017 * @param pDevIns The device instance.
3018 * @thread Any
3019 */
3020 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3021
3022 /**
3023 * Register the RTC device.
3024 *
3025 * @returns VBox status code.
3026 * @param pDevIns The device instance.
3027 * @param pRtcReg Pointer to a RTC registration structure.
3028 * @param ppRtcHlp Where to store the pointer to the helper
3029 * functions.
3030 */
3031 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3032
3033 /**
3034 * Register a PCI Bus.
3035 *
3036 * @returns VBox status code, but the positive values 0..31 are used to indicate
3037 * bus number rather than informational status codes.
3038 * @param pDevIns The device instance.
3039 * @param pPciBusReg Pointer to PCI bus registration structure.
3040 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3041 * helpers.
3042 * @param piBus Where to return the PDM bus number. Optional.
3043 */
3044 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg,
3045 PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus));
3046
3047 /**
3048 * Register the PIC device.
3049 *
3050 * @returns VBox status code.
3051 * @param pDevIns The device instance.
3052 * @param pPicReg Pointer to a PIC registration structure.
3053 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3054 * helpers.
3055 */
3056 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3057
3058 /**
3059 * Register the APIC device.
3060 *
3061 * @returns VBox status code.
3062 * @param pDevIns The device instance.
3063 */
3064 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns));
3065
3066 /**
3067 * Register the I/O APIC device.
3068 *
3069 * @returns VBox status code.
3070 * @param pDevIns The device instance.
3071 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3072 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3073 * helpers.
3074 */
3075 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3076
3077 /**
3078 * Register the HPET device.
3079 *
3080 * @returns VBox status code.
3081 * @param pDevIns The device instance.
3082 * @param pHpetReg Pointer to a HPET registration structure.
3083 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3084 * helpers.
3085 */
3086 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3087
3088 /**
3089 * Register a raw PCI device.
3090 *
3091 * @returns VBox status code.
3092 * @param pDevIns The device instance.
3093 * @param pPciRawReg Pointer to a raw PCI registration structure.
3094 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3095 * device helpers.
3096 */
3097 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3098
3099 /**
3100 * Register the DMA device.
3101 *
3102 * @returns VBox status code.
3103 * @param pDevIns The device instance.
3104 * @param pDmacReg Pointer to a DMAC registration structure.
3105 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3106 */
3107 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3108
3109 /**
3110 * Register transfer function for DMA channel.
3111 *
3112 * @returns VBox status code.
3113 * @param pDevIns The device instance.
3114 * @param uChannel Channel number.
3115 * @param pfnTransferHandler Device specific transfer callback function.
3116 * @param pvUser User pointer to pass to the callback.
3117 * @thread EMT
3118 */
3119 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3120
3121 /**
3122 * Read memory.
3123 *
3124 * @returns VBox status code.
3125 * @param pDevIns The device instance.
3126 * @param uChannel Channel number.
3127 * @param pvBuffer Pointer to target buffer.
3128 * @param off DMA position.
3129 * @param cbBlock Block size.
3130 * @param pcbRead Where to store the number of bytes which was
3131 * read. optional.
3132 * @thread EMT
3133 */
3134 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3135
3136 /**
3137 * Write memory.
3138 *
3139 * @returns VBox status code.
3140 * @param pDevIns The device instance.
3141 * @param uChannel Channel number.
3142 * @param pvBuffer Memory to write.
3143 * @param off DMA position.
3144 * @param cbBlock Block size.
3145 * @param pcbWritten Where to store the number of bytes which was
3146 * written. optional.
3147 * @thread EMT
3148 */
3149 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3150
3151 /**
3152 * Set the DREQ line.
3153 *
3154 * @returns VBox status code.
3155 * @param pDevIns Device instance.
3156 * @param uChannel Channel number.
3157 * @param uLevel Level of the line.
3158 * @thread EMT
3159 */
3160 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3161
3162 /**
3163 * Get channel mode.
3164 *
3165 * @returns Channel mode. See specs.
3166 * @param pDevIns The device instance.
3167 * @param uChannel Channel number.
3168 * @thread EMT
3169 */
3170 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3171
3172 /**
3173 * Schedule DMA execution.
3174 *
3175 * @param pDevIns The device instance.
3176 * @thread Any thread.
3177 */
3178 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3179
3180 /**
3181 * Write CMOS value and update the checksum(s).
3182 *
3183 * @returns VBox status code.
3184 * @param pDevIns The device instance.
3185 * @param iReg The CMOS register index.
3186 * @param u8Value The CMOS register value.
3187 * @thread EMT
3188 */
3189 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3190
3191 /**
3192 * Read CMOS value.
3193 *
3194 * @returns VBox status code.
3195 * @param pDevIns The device instance.
3196 * @param iReg The CMOS register index.
3197 * @param pu8Value Where to store the CMOS register value.
3198 * @thread EMT
3199 */
3200 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3201
3202 /**
3203 * Assert that the current thread is the emulation thread.
3204 *
3205 * @returns True if correct.
3206 * @returns False if wrong.
3207 * @param pDevIns The device instance.
3208 * @param pszFile Filename of the assertion location.
3209 * @param iLine The linenumber of the assertion location.
3210 * @param pszFunction Function of the assertion location.
3211 */
3212 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3213
3214 /**
3215 * Assert that the current thread is NOT the emulation thread.
3216 *
3217 * @returns True if correct.
3218 * @returns False if wrong.
3219 * @param pDevIns The device instance.
3220 * @param pszFile Filename of the assertion location.
3221 * @param iLine The linenumber of the assertion location.
3222 * @param pszFunction Function of the assertion location.
3223 */
3224 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3225
3226 /**
3227 * Resolves the symbol for a raw-mode context interface.
3228 *
3229 * @returns VBox status code.
3230 * @param pDevIns The device instance.
3231 * @param pvInterface The interface structure.
3232 * @param cbInterface The size of the interface structure.
3233 * @param pszSymPrefix What to prefix the symbols in the list with
3234 * before resolving them. This must start with
3235 * 'dev' and contain the driver name.
3236 * @param pszSymList List of symbols corresponding to the interface.
3237 * There is generally a there is generally a define
3238 * holding this list associated with the interface
3239 * definition (INTERFACE_SYM_LIST). For more
3240 * details see PDMR3LdrGetInterfaceSymbols.
3241 * @thread EMT
3242 */
3243 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3244 const char *pszSymPrefix, const char *pszSymList));
3245
3246 /**
3247 * Resolves the symbol for a ring-0 context interface.
3248 *
3249 * @returns VBox status code.
3250 * @param pDevIns The device instance.
3251 * @param pvInterface The interface structure.
3252 * @param cbInterface The size of the interface structure.
3253 * @param pszSymPrefix What to prefix the symbols in the list with
3254 * before resolving them. This must start with
3255 * 'dev' and contain the driver name.
3256 * @param pszSymList List of symbols corresponding to the interface.
3257 * There is generally a there is generally a define
3258 * holding this list associated with the interface
3259 * definition (INTERFACE_SYM_LIST). For more
3260 * details see PDMR3LdrGetInterfaceSymbols.
3261 * @thread EMT
3262 */
3263 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3264 const char *pszSymPrefix, const char *pszSymList));
3265
3266 /**
3267 * Call the ring-0 request handler routine of the device.
3268 *
3269 * For this to work, the device must be ring-0 enabled and export a request
3270 * handler function. The name of the function must be the device name in
3271 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3272 * 'ReqHandler'. The device name will be captialized. It shall take the
3273 * exact same arguments as this function and be declared using
3274 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3275 *
3276 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3277 * or two as the handler address will be resolved on each invocation. This
3278 * is the reason for the EMT only restriction as well.
3279 *
3280 * @returns VBox status code.
3281 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3282 * handler function.
3283 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3284 *
3285 * @param pDevIns The device instance.
3286 * @param uOperation The operation to perform.
3287 * @param u64Arg 64-bit integer argument.
3288 * @thread EMT
3289 */
3290 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3291
3292 /**
3293 * Gets the reason for the most recent VM suspend.
3294 *
3295 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3296 * suspend has been made or if the pDevIns is invalid.
3297 * @param pDevIns The device instance.
3298 */
3299 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3300
3301 /**
3302 * Gets the reason for the most recent VM resume.
3303 *
3304 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3305 * resume has been made or if the pDevIns is invalid.
3306 * @param pDevIns The device instance.
3307 */
3308 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3309
3310 /**
3311 * Requests the mapping of multiple guest page into ring-3.
3312 *
3313 * When you're done with the pages, call pfnPhysBulkReleasePageMappingLocks()
3314 * ASAP to release them.
3315 *
3316 * This API will assume your intention is to write to the pages, and will
3317 * therefore replace shared and zero pages. If you do not intend to modify the
3318 * pages, use the pfnPhysBulkGCPhys2CCPtrReadOnly() API.
3319 *
3320 * @returns VBox status code.
3321 * @retval VINF_SUCCESS on success.
3322 * @retval VERR_PGM_PHYS_PAGE_RESERVED if any of the pages has no physical
3323 * backing or if any of the pages the page has any active access
3324 * handlers. The caller must fall back on using PGMR3PhysWriteExternal.
3325 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if @a paGCPhysPages contains
3326 * an invalid physical address.
3327 *
3328 * @param pDevIns The device instance.
3329 * @param cPages Number of pages to lock.
3330 * @param paGCPhysPages The guest physical address of the pages that
3331 * should be mapped (@a cPages entries).
3332 * @param fFlags Flags reserved for future use, MBZ.
3333 * @param papvPages Where to store the ring-3 mapping addresses
3334 * corresponding to @a paGCPhysPages.
3335 * @param paLocks Where to store the locking information that
3336 * pfnPhysBulkReleasePageMappingLock needs (@a cPages
3337 * in length).
3338 *
3339 * @remark Avoid calling this API from within critical sections (other than the
3340 * PGM one) because of the deadlock risk when we have to delegating the
3341 * task to an EMT.
3342 * @thread Any.
3343 * @since 6.0.6
3344 */
3345 DECLR3CALLBACKMEMBER(int, pfnPhysBulkGCPhys2CCPtr,(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
3346 uint32_t fFlags, void **papvPages, PPGMPAGEMAPLOCK paLocks));
3347
3348 /**
3349 * Requests the mapping of multiple guest page into ring-3, for reading only.
3350 *
3351 * When you're done with the pages, call pfnPhysBulkReleasePageMappingLocks()
3352 * ASAP to release them.
3353 *
3354 * @returns VBox status code.
3355 * @retval VINF_SUCCESS on success.
3356 * @retval VERR_PGM_PHYS_PAGE_RESERVED if any of the pages has no physical
3357 * backing or if any of the pages the page has an active ALL access
3358 * handler. The caller must fall back on using PGMR3PhysWriteExternal.
3359 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if @a paGCPhysPages contains
3360 * an invalid physical address.
3361 *
3362 * @param pDevIns The device instance.
3363 * @param cPages Number of pages to lock.
3364 * @param paGCPhysPages The guest physical address of the pages that
3365 * should be mapped (@a cPages entries).
3366 * @param fFlags Flags reserved for future use, MBZ.
3367 * @param papvPages Where to store the ring-3 mapping addresses
3368 * corresponding to @a paGCPhysPages.
3369 * @param paLocks Where to store the lock information that
3370 * pfnPhysReleasePageMappingLock needs (@a cPages
3371 * in length).
3372 *
3373 * @remark Avoid calling this API from within critical sections.
3374 * @thread Any.
3375 * @since 6.0.6
3376 */
3377 DECLR3CALLBACKMEMBER(int, pfnPhysBulkGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
3378 uint32_t fFlags, void const **papvPages, PPGMPAGEMAPLOCK paLocks));
3379
3380 /**
3381 * Release the mappings of multiple guest pages.
3382 *
3383 * This is the counter part of pfnPhysBulkGCPhys2CCPtr and
3384 * pfnPhysBulkGCPhys2CCPtrReadOnly.
3385 *
3386 * @param pDevIns The device instance.
3387 * @param cPages Number of pages to unlock.
3388 * @param paLocks The lock structures initialized by the mapping
3389 * function (@a cPages in length).
3390 * @thread Any.
3391 * @since 6.0.6
3392 */
3393 DECLR3CALLBACKMEMBER(void, pfnPhysBulkReleasePageMappingLocks,(PPDMDEVINS pDevIns, uint32_t cPages, PPGMPAGEMAPLOCK paLocks));
3394
3395 /**
3396 * Changes the number of an MMIO2 or pre-registered MMIO region.
3397 *
3398 * This should only be used to deal with saved state problems, so there is no
3399 * convenience inline wrapper for this method.
3400 *
3401 * @returns VBox status code.
3402 * @param pDevIns The device instance.
3403 * @param pPciDev The PCI device the region is associated with, or
3404 * NULL if not associated with any.
3405 * @param iRegion The region.
3406 * @param iNewRegion The new region index.
3407 *
3408 * @sa @bugref{9359}
3409 */
3410 DECLR3CALLBACKMEMBER(int, pfnMMIOExChangeRegionNo,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
3411 uint32_t iNewRegion));
3412
3413 /** Space reserved for future members.
3414 * @{ */
3415 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3416 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3417 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3418 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3419 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3420 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3421 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3422 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3423 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3424 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3425 /** @} */
3426
3427
3428 /** API available to trusted devices only.
3429 *
3430 * These APIs are providing unrestricted access to the guest and the VM,
3431 * or they are interacting intimately with PDM.
3432 *
3433 * @{
3434 */
3435
3436 /**
3437 * Gets the user mode VM handle. Restricted API.
3438 *
3439 * @returns User mode VM Handle.
3440 * @param pDevIns The device instance.
3441 */
3442 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3443
3444 /**
3445 * Gets the global VM handle. Restricted API.
3446 *
3447 * @returns VM Handle.
3448 * @param pDevIns The device instance.
3449 */
3450 DECLR3CALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns));
3451
3452 /**
3453 * Gets the VMCPU handle. Restricted API.
3454 *
3455 * @returns VMCPU Handle.
3456 * @param pDevIns The device instance.
3457 */
3458 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3459
3460 /**
3461 * The the VM CPU ID of the current thread (restricted API).
3462 *
3463 * @returns The VMCPUID of the calling thread, NIL_VMCPUID if not EMT.
3464 * @param pDevIns The device instance.
3465 */
3466 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3467
3468 /**
3469 * Registers the VMM device heap or notifies about mapping/unmapping.
3470 *
3471 * This interface serves three purposes:
3472 *
3473 * -# Register the VMM device heap during device construction
3474 * for the HM to use.
3475 * -# Notify PDM/HM that it's mapped into guest address
3476 * space (i.e. usable).
3477 * -# Notify PDM/HM that it is being unmapped from the guest
3478 * address space (i.e. not usable).
3479 *
3480 * @returns VBox status code.
3481 * @param pDevIns The device instance.
3482 * @param GCPhys The physical address if mapped, NIL_RTGCPHYS if
3483 * not mapped.
3484 * @param pvHeap Ring 3 heap pointer.
3485 * @param cbHeap Size of the heap.
3486 * @thread EMT.
3487 */
3488 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap));
3489
3490 /**
3491 * Registers the firmware (BIOS, EFI) device with PDM.
3492 *
3493 * The firmware provides a callback table and gets a special PDM helper table.
3494 * There can only be one firmware device for a VM.
3495 *
3496 * @returns VBox status code.
3497 * @param pDevIns The device instance.
3498 * @param pFwReg Firmware registration structure.
3499 * @param ppFwHlp Where to return the firmware helper structure.
3500 * @remarks Only valid during device construction.
3501 * @thread EMT(0)
3502 */
3503 DECLR3CALLBACKMEMBER(int, pfnFirmwareRegister,(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp));
3504
3505 /**
3506 * Resets the VM.
3507 *
3508 * @returns The appropriate VBox status code to pass around on reset.
3509 * @param pDevIns The device instance.
3510 * @param fFlags PDMVMRESET_F_XXX flags.
3511 * @thread The emulation thread.
3512 */
3513 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
3514
3515 /**
3516 * Suspends the VM.
3517 *
3518 * @returns The appropriate VBox status code to pass around on suspend.
3519 * @param pDevIns The device instance.
3520 * @thread The emulation thread.
3521 */
3522 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3523
3524 /**
3525 * Suspends, saves and powers off the VM.
3526 *
3527 * @returns The appropriate VBox status code to pass around.
3528 * @param pDevIns The device instance.
3529 * @thread An emulation thread.
3530 */
3531 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3532
3533 /**
3534 * Power off the VM.
3535 *
3536 * @returns The appropriate VBox status code to pass around on power off.
3537 * @param pDevIns The device instance.
3538 * @thread The emulation thread.
3539 */
3540 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3541
3542 /**
3543 * Checks if the Gate A20 is enabled or not.
3544 *
3545 * @returns true if A20 is enabled.
3546 * @returns false if A20 is disabled.
3547 * @param pDevIns The device instance.
3548 * @thread The emulation thread.
3549 */
3550 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3551
3552 /**
3553 * Enables or disables the Gate A20.
3554 *
3555 * @param pDevIns The device instance.
3556 * @param fEnable Set this flag to enable the Gate A20; clear it
3557 * to disable.
3558 * @thread The emulation thread.
3559 */
3560 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3561
3562 /**
3563 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3564 * thread.
3565 *
3566 * @param pDevIns The device instance.
3567 * @param iLeaf The CPUID leaf to get.
3568 * @param pEax Where to store the EAX value.
3569 * @param pEbx Where to store the EBX value.
3570 * @param pEcx Where to store the ECX value.
3571 * @param pEdx Where to store the EDX value.
3572 * @thread EMT.
3573 */
3574 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3575
3576 /**
3577 * Get the current virtual clock time in a VM. The clock frequency must be
3578 * queried separately.
3579 *
3580 * @returns Current clock time.
3581 * @param pDevIns The device instance.
3582 */
3583 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3584
3585 /**
3586 * Get the frequency of the virtual clock.
3587 *
3588 * @returns The clock frequency (not variable at run-time).
3589 * @param pDevIns The device instance.
3590 */
3591 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3592
3593 /**
3594 * Get the current virtual clock time in a VM, in nanoseconds.
3595 *
3596 * @returns Current clock time (in ns).
3597 * @param pDevIns The device instance.
3598 */
3599 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3600
3601 /**
3602 * Gets the support driver session.
3603 *
3604 * This is intended for working with the semaphore API.
3605 *
3606 * @returns Support driver session handle.
3607 * @param pDevIns The device instance.
3608 */
3609 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3610
3611 /**
3612 * Queries a generic object from the VMM user.
3613 *
3614 * @returns Pointer to the object if found, NULL if not.
3615 * @param pDevIns The device instance.
3616 * @param pUuid The UUID of what's being queried. The UUIDs and
3617 * the usage conventions are defined by the user.
3618 *
3619 * @note It is strictly forbidden to call this internally in VBox! This
3620 * interface is exclusively for hacks in externally developed devices.
3621 */
3622 DECLR3CALLBACKMEMBER(void *, pfnQueryGenericUserObject,(PPDMDEVINS pDevIns, PCRTUUID pUuid));
3623
3624 /** @} */
3625
3626 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3627 uint32_t u32TheEnd;
3628} PDMDEVHLPR3;
3629#endif /* !IN_RING3 */
3630/** Pointer to the R3 PDM Device API. */
3631typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3632/** Pointer to the R3 PDM Device API, const variant. */
3633typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3634
3635
3636/**
3637 * PDM Device API - RC Variant.
3638 */
3639typedef struct PDMDEVHLPRC
3640{
3641 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3642 uint32_t u32Version;
3643
3644 /**
3645 * Bus master physical memory read from the given PCI device.
3646 *
3647 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3648 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3649 * @param pDevIns The device instance.
3650 * @param pPciDev The PCI device structure. If NULL the default
3651 * PCI device for this device instance is used.
3652 * @param GCPhys Physical address start reading from.
3653 * @param pvBuf Where to put the read bits.
3654 * @param cbRead How many bytes to read.
3655 * @thread Any thread, but the call may involve the emulation thread.
3656 */
3657 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
3658 void *pvBuf, size_t cbRead));
3659
3660 /**
3661 * Bus master physical memory write from the given PCI device.
3662 *
3663 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3664 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3665 * @param pDevIns The device instance.
3666 * @param pPciDev The PCI device structure. If NULL the default
3667 * PCI device for this device instance is used.
3668 * @param GCPhys Physical address to write to.
3669 * @param pvBuf What to write.
3670 * @param cbWrite How many bytes to write.
3671 * @thread Any thread, but the call may involve the emulation thread.
3672 */
3673 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
3674 const void *pvBuf, size_t cbWrite));
3675
3676 /**
3677 * Set the IRQ for the given PCI device.
3678 *
3679 * @param pDevIns Device instance.
3680 * @param pPciDev The PCI device structure. If NULL the default
3681 * PCI device for this device instance is used.
3682 * @param iIrq IRQ number to set.
3683 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3684 * @thread Any thread, but will involve the emulation thread.
3685 */
3686 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel));
3687
3688 /**
3689 * Set ISA IRQ for a device.
3690 *
3691 * @param pDevIns Device instance.
3692 * @param iIrq IRQ number to set.
3693 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3694 * @thread Any thread, but will involve the emulation thread.
3695 */
3696 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3697
3698 /**
3699 * Send an MSI straight to the I/O APIC.
3700 *
3701 * @param pDevIns PCI device instance.
3702 * @param GCPhys Physical address MSI request was written.
3703 * @param uValue Value written.
3704 * @thread Any thread, but will involve the emulation thread.
3705 */
3706 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue));
3707
3708 /**
3709 * Read physical memory.
3710 *
3711 * @returns VINF_SUCCESS (for now).
3712 * @param pDevIns Device instance.
3713 * @param GCPhys Physical address start reading from.
3714 * @param pvBuf Where to put the read bits.
3715 * @param cbRead How many bytes to read.
3716 */
3717 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3718
3719 /**
3720 * Write to physical memory.
3721 *
3722 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3723 * @param pDevIns Device instance.
3724 * @param GCPhys Physical address to write to.
3725 * @param pvBuf What to write.
3726 * @param cbWrite How many bytes to write.
3727 */
3728 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3729
3730 /**
3731 * Checks if the Gate A20 is enabled or not.
3732 *
3733 * @returns true if A20 is enabled.
3734 * @returns false if A20 is disabled.
3735 * @param pDevIns Device instance.
3736 * @thread The emulation thread.
3737 */
3738 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3739
3740 /**
3741 * Gets the VM state.
3742 *
3743 * @returns VM state.
3744 * @param pDevIns The device instance.
3745 * @thread Any thread (just keep in mind that it's volatile info).
3746 */
3747 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3748
3749 /**
3750 * Set the VM error message
3751 *
3752 * @returns rc.
3753 * @param pDevIns Driver instance.
3754 * @param rc VBox status code.
3755 * @param SRC_POS Use RT_SRC_POS.
3756 * @param pszFormat Error message format string.
3757 * @param ... Error message arguments.
3758 */
3759 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3760 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
3761
3762 /**
3763 * Set the VM error message
3764 *
3765 * @returns rc.
3766 * @param pDevIns Driver instance.
3767 * @param rc VBox status code.
3768 * @param SRC_POS Use RT_SRC_POS.
3769 * @param pszFormat Error message format string.
3770 * @param va Error message arguments.
3771 */
3772 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3773 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3774
3775 /**
3776 * Set the VM runtime error message
3777 *
3778 * @returns VBox status code.
3779 * @param pDevIns Device instance.
3780 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3781 * @param pszErrorId Error ID string.
3782 * @param pszFormat Error message format string.
3783 * @param ... Error message arguments.
3784 */
3785 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3786 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
3787
3788 /**
3789 * Set the VM runtime error message
3790 *
3791 * @returns VBox status code.
3792 * @param pDevIns Device instance.
3793 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3794 * @param pszErrorId Error ID string.
3795 * @param pszFormat Error message format string.
3796 * @param va Error message arguments.
3797 */
3798 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3799 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
3800
3801 /**
3802 * Set parameters for pending MMIO patch operation
3803 *
3804 * @returns VBox status code.
3805 * @param pDevIns Device instance.
3806 * @param GCPhys MMIO physical address
3807 * @param pCachedData GC pointer to cached data
3808 */
3809 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3810
3811 /**
3812 * Gets the VM handle. Restricted API.
3813 *
3814 * @returns VM Handle.
3815 * @param pDevIns Device instance.
3816 */
3817 DECLRCCALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns));
3818
3819 /**
3820 * Gets the VMCPU handle. Restricted API.
3821 *
3822 * @returns VMCPU Handle.
3823 * @param pDevIns The device instance.
3824 */
3825 DECLRCCALLBACKMEMBER(PVMCPUCC, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3826
3827 /**
3828 * The the VM CPU ID of the current thread (restricted API).
3829 *
3830 * @returns The VMCPUID of the calling thread, NIL_VMCPUID if not EMT.
3831 * @param pDevIns The device instance.
3832 */
3833 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3834
3835 /**
3836 * Get the current virtual clock time in a VM. The clock frequency must be
3837 * queried separately.
3838 *
3839 * @returns Current clock time.
3840 * @param pDevIns The device instance.
3841 */
3842 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3843
3844 /**
3845 * Get the frequency of the virtual clock.
3846 *
3847 * @returns The clock frequency (not variable at run-time).
3848 * @param pDevIns The device instance.
3849 */
3850 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3851
3852 /**
3853 * Get the current virtual clock time in a VM, in nanoseconds.
3854 *
3855 * @returns Current clock time (in ns).
3856 * @param pDevIns The device instance.
3857 */
3858 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3859
3860 /**
3861 * Gets the trace buffer handle.
3862 *
3863 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3864 * really inteded for direct usage, thus no inline wrapper function.
3865 *
3866 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3867 * @param pDevIns The device instance.
3868 */
3869 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3870
3871 /** Space reserved for future members.
3872 * @{ */
3873 DECLRCCALLBACKMEMBER(void, pfnReserved1,(void));
3874 DECLRCCALLBACKMEMBER(void, pfnReserved2,(void));
3875 DECLRCCALLBACKMEMBER(void, pfnReserved3,(void));
3876 DECLRCCALLBACKMEMBER(void, pfnReserved4,(void));
3877 DECLRCCALLBACKMEMBER(void, pfnReserved5,(void));
3878 DECLRCCALLBACKMEMBER(void, pfnReserved6,(void));
3879 DECLRCCALLBACKMEMBER(void, pfnReserved7,(void));
3880 DECLRCCALLBACKMEMBER(void, pfnReserved8,(void));
3881 DECLRCCALLBACKMEMBER(void, pfnReserved9,(void));
3882 DECLRCCALLBACKMEMBER(void, pfnReserved10,(void));
3883 /** @} */
3884
3885 /** Just a safety precaution. */
3886 uint32_t u32TheEnd;
3887} PDMDEVHLPRC;
3888/** Pointer PDM Device RC API. */
3889typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3890/** Pointer PDM Device RC API. */
3891typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3892
3893/** Current PDMDEVHLP version number. */
3894#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 7, 0)
3895
3896
3897/**
3898 * PDM Device API - R0 Variant.
3899 */
3900typedef struct PDMDEVHLPR0
3901{
3902 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3903 uint32_t u32Version;
3904
3905 /**
3906 * Bus master physical memory read from the given PCI device.
3907 *
3908 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3909 * VERR_EM_MEMORY.
3910 * @param pDevIns The device instance.
3911 * @param pPciDev The PCI device structure. If NULL the default
3912 * PCI device for this device instance is used.
3913 * @param GCPhys Physical address start reading from.
3914 * @param pvBuf Where to put the read bits.
3915 * @param cbRead How many bytes to read.
3916 * @thread Any thread, but the call may involve the emulation thread.
3917 */
3918 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
3919 void *pvBuf, size_t cbRead));
3920
3921 /**
3922 * Bus master physical memory write from the given PCI device.
3923 *
3924 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3925 * VERR_EM_MEMORY.
3926 * @param pDevIns The device instance.
3927 * @param pPciDev The PCI device structure. If NULL the default
3928 * PCI device for this device instance is used.
3929 * @param GCPhys Physical address to write to.
3930 * @param pvBuf What to write.
3931 * @param cbWrite How many bytes to write.
3932 * @thread Any thread, but the call may involve the emulation thread.
3933 */
3934 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
3935 const void *pvBuf, size_t cbWrite));
3936
3937 /**
3938 * Set the IRQ for the given PCI device.
3939 *
3940 * @param pDevIns Device instance.
3941 * @param pPciDev The PCI device structure. If NULL the default
3942 * PCI device for this device instance is used.
3943 * @param iIrq IRQ number to set.
3944 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3945 * @thread Any thread, but will involve the emulation thread.
3946 */
3947 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel));
3948
3949 /**
3950 * Set ISA IRQ for a device.
3951 *
3952 * @param pDevIns Device instance.
3953 * @param iIrq IRQ number to set.
3954 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3955 * @thread Any thread, but will involve the emulation thread.
3956 */
3957 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3958
3959 /**
3960 * Send an MSI straight to the I/O APIC.
3961 *
3962 * @param pDevIns PCI device instance.
3963 * @param GCPhys Physical address MSI request was written.
3964 * @param uValue Value written.
3965 * @thread Any thread, but will involve the emulation thread.
3966 */
3967 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue));
3968
3969 /**
3970 * Read physical memory.
3971 *
3972 * @returns VINF_SUCCESS (for now).
3973 * @param pDevIns Device instance.
3974 * @param GCPhys Physical address start reading from.
3975 * @param pvBuf Where to put the read bits.
3976 * @param cbRead How many bytes to read.
3977 */
3978 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3979
3980 /**
3981 * Write to physical memory.
3982 *
3983 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3984 * @param pDevIns Device instance.
3985 * @param GCPhys Physical address to write to.
3986 * @param pvBuf What to write.
3987 * @param cbWrite How many bytes to write.
3988 */
3989 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3990
3991 /**
3992 * Checks if the Gate A20 is enabled or not.
3993 *
3994 * @returns true if A20 is enabled.
3995 * @returns false if A20 is disabled.
3996 * @param pDevIns Device instance.
3997 * @thread The emulation thread.
3998 */
3999 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
4000
4001 /**
4002 * Gets the VM state.
4003 *
4004 * @returns VM state.
4005 * @param pDevIns The device instance.
4006 * @thread Any thread (just keep in mind that it's volatile info).
4007 */
4008 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
4009
4010 /**
4011 * Set the VM error message
4012 *
4013 * @returns rc.
4014 * @param pDevIns Driver instance.
4015 * @param rc VBox status code.
4016 * @param SRC_POS Use RT_SRC_POS.
4017 * @param pszFormat Error message format string.
4018 * @param ... Error message arguments.
4019 */
4020 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4021 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
4022
4023 /**
4024 * Set the VM error message
4025 *
4026 * @returns rc.
4027 * @param pDevIns Driver instance.
4028 * @param rc VBox status code.
4029 * @param SRC_POS Use RT_SRC_POS.
4030 * @param pszFormat Error message format string.
4031 * @param va Error message arguments.
4032 */
4033 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4034 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
4035
4036 /**
4037 * Set the VM runtime error message
4038 *
4039 * @returns VBox status code.
4040 * @param pDevIns Device instance.
4041 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4042 * @param pszErrorId Error ID string.
4043 * @param pszFormat Error message format string.
4044 * @param ... Error message arguments.
4045 */
4046 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4047 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
4048
4049 /**
4050 * Set the VM runtime error message
4051 *
4052 * @returns VBox status code.
4053 * @param pDevIns Device instance.
4054 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4055 * @param pszErrorId Error ID string.
4056 * @param pszFormat Error message format string.
4057 * @param va Error message arguments.
4058 */
4059 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4060 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
4061
4062 /**
4063 * Set parameters for pending MMIO patch operation
4064 *
4065 * @returns rc.
4066 * @param pDevIns Device instance.
4067 * @param GCPhys MMIO physical address
4068 * @param pCachedData GC pointer to cached data
4069 */
4070 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4071
4072 /**
4073 * Gets the VM handle. Restricted API.
4074 *
4075 * @returns VM Handle.
4076 * @param pDevIns Device instance.
4077 */
4078 DECLR0CALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns));
4079
4080 /**
4081 * Gets the VMCPU handle. Restricted API.
4082 *
4083 * @returns VMCPU Handle.
4084 * @param pDevIns The device instance.
4085 */
4086 DECLR0CALLBACKMEMBER(PVMCPUCC, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4087
4088 /**
4089 * The the VM CPU ID of the current thread (restricted API).
4090 *
4091 * @returns The VMCPUID of the calling thread, NIL_VMCPUID if not EMT.
4092 * @param pDevIns The device instance.
4093 */
4094 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4095
4096 /**
4097 * Get the current virtual clock time in a VM. The clock frequency must be
4098 * queried separately.
4099 *
4100 * @returns Current clock time.
4101 * @param pDevIns The device instance.
4102 */
4103 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4104
4105 /**
4106 * Get the frequency of the virtual clock.
4107 *
4108 * @returns The clock frequency (not variable at run-time).
4109 * @param pDevIns The device instance.
4110 */
4111 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4112
4113 /**
4114 * Get the current virtual clock time in a VM, in nanoseconds.
4115 *
4116 * @returns Current clock time (in ns).
4117 * @param pDevIns The device instance.
4118 */
4119 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4120
4121 /**
4122 * Gets the trace buffer handle.
4123 *
4124 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4125 * really inteded for direct usage, thus no inline wrapper function.
4126 *
4127 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4128 * @param pDevIns The device instance.
4129 */
4130 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4131
4132 /** Space reserved for future members.
4133 * @{ */
4134 DECLR0CALLBACKMEMBER(void, pfnReserved1,(void));
4135 DECLR0CALLBACKMEMBER(void, pfnReserved2,(void));
4136 DECLR0CALLBACKMEMBER(void, pfnReserved3,(void));
4137 DECLR0CALLBACKMEMBER(void, pfnReserved4,(void));
4138 DECLR0CALLBACKMEMBER(void, pfnReserved5,(void));
4139 DECLR0CALLBACKMEMBER(void, pfnReserved6,(void));
4140 DECLR0CALLBACKMEMBER(void, pfnReserved7,(void));
4141 DECLR0CALLBACKMEMBER(void, pfnReserved8,(void));
4142 DECLR0CALLBACKMEMBER(void, pfnReserved9,(void));
4143 DECLR0CALLBACKMEMBER(void, pfnReserved10,(void));
4144 /** @} */
4145
4146 /** Just a safety precaution. */
4147 uint32_t u32TheEnd;
4148} PDMDEVHLPR0;
4149/** Pointer PDM Device R0 API. */
4150typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4151/** Pointer PDM Device GC API. */
4152typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4153
4154/** Current PDMDEVHLP version number. */
4155#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 8, 0)
4156
4157
4158
4159/**
4160 * PDM Device Instance.
4161 */
4162typedef struct PDMDEVINS
4163{
4164 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4165 uint32_t u32Version;
4166 /** Device instance number. */
4167 uint32_t iInstance;
4168
4169 /** Pointer the GC PDM Device API. */
4170 PCPDMDEVHLPRC pHlpRC;
4171 /** Pointer to device instance data. */
4172 RTRCPTR pvInstanceDataRC;
4173 /** The critical section for the device, see pCritSectXR3. */
4174 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4175 /** Alignment padding. */
4176 RTRCPTR pAlignmentRC;
4177
4178 /** Pointer the R0 PDM Device API. */
4179 PCPDMDEVHLPR0 pHlpR0;
4180 /** Pointer to device instance data (R0). */
4181 RTR0PTR pvInstanceDataR0;
4182 /** The critical section for the device, see pCritSectXR3. */
4183 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4184
4185 /** Pointer the HC PDM Device API. */
4186 PCPDMDEVHLPR3 pHlpR3;
4187 /** Pointer to device instance data. */
4188 RTR3PTR pvInstanceDataR3;
4189 /** The critical section for the device.
4190 *
4191 * TM and IOM will enter this critical section before calling into the device
4192 * code. PDM will when doing power on, power off, reset, suspend and resume
4193 * notifications. SSM will currently not, but this will be changed later on.
4194 *
4195 * The device gets a critical section automatically assigned to it before
4196 * the constructor is called. If the constructor wishes to use a different
4197 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4198 * very early on.
4199 */
4200 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4201
4202 /** Pointer to device registration structure. */
4203 R3PTRTYPE(PCPDMDEVREG) pReg;
4204 /** Configuration handle. */
4205 R3PTRTYPE(PCFGMNODE) pCfg;
4206
4207 /** The base interface of the device.
4208 *
4209 * The device constructor initializes this if it has any
4210 * device level interfaces to export. To obtain this interface
4211 * call PDMR3QueryDevice(). */
4212 PDMIBASE IBase;
4213
4214 /** Tracing indicator. */
4215 uint32_t fTracing;
4216 /** The tracing ID of this device. */
4217 uint32_t idTracing;
4218#if HC_ARCH_BITS == 32
4219 /** Align the internal data more naturally. */
4220 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4221#endif
4222
4223 /** Internal data. */
4224 union
4225 {
4226#ifdef PDMDEVINSINT_DECLARED
4227 PDMDEVINSINT s;
4228#endif
4229 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4230 } Internal;
4231
4232 /** Device instance data. The size of this area is defined
4233 * in the PDMDEVREG::cbInstanceData field. */
4234 char achInstanceData[8];
4235} PDMDEVINS;
4236
4237/** Current PDMDEVINS version number. */
4238#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4239
4240/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4241#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_UOFFSETOF(PDMDEVINS, IBase)) )
4242
4243/**
4244 * Checks the structure versions of the device instance and device helpers,
4245 * returning if they are incompatible.
4246 *
4247 * This is for use in the constructor.
4248 *
4249 * @param pDevIns The device instance pointer.
4250 */
4251#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4252 do \
4253 { \
4254 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4255 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4256 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4257 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4258 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4259 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4260 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4261 } while (0)
4262
4263/**
4264 * Quietly checks the structure versions of the device instance and device
4265 * helpers, returning if they are incompatible.
4266 *
4267 * This is for use in the destructor.
4268 *
4269 * @param pDevIns The device instance pointer.
4270 */
4271#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4272 do \
4273 { \
4274 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4275 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4276 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4277 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4278 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4279 } while (0)
4280
4281/**
4282 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4283 * constructor - returns on failure.
4284 *
4285 * This should be invoked after having initialized the instance data
4286 * sufficiently for the correct operation of the destructor. The destructor is
4287 * always called!
4288 *
4289 * @param pDevIns Pointer to the PDM device instance.
4290 * @param pszValidValues Patterns describing the valid value names. See
4291 * RTStrSimplePatternMultiMatch for details on the
4292 * pattern syntax.
4293 * @param pszValidNodes Patterns describing the valid node (key) names.
4294 * Pass empty string if no valid nodes.
4295 */
4296#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4297 do \
4298 { \
4299 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4300 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4301 if (RT_SUCCESS(rcValCfg)) \
4302 { /* likely */ } else return rcValCfg; \
4303 } while (0)
4304
4305/** @def PDMDEV_ASSERT_EMT
4306 * Assert that the current thread is the emulation thread.
4307 */
4308#ifdef VBOX_STRICT
4309# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4310#else
4311# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4312#endif
4313
4314/** @def PDMDEV_ASSERT_OTHER
4315 * Assert that the current thread is NOT the emulation thread.
4316 */
4317#ifdef VBOX_STRICT
4318# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4319#else
4320# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4321#endif
4322
4323/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4324 * Assert that the current thread is owner of the VM lock.
4325 */
4326#ifdef VBOX_STRICT
4327# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4328#else
4329# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4330#endif
4331
4332/** @def PDMDEV_SET_ERROR
4333 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4334 */
4335#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4336 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4337
4338/** @def PDMDEV_SET_RUNTIME_ERROR
4339 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4340 */
4341#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4342 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4343
4344/** @def PDMDEVINS_2_RCPTR
4345 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4346 */
4347#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTRCUINTPTR)(pDevIns)->pvInstanceDataRC - (RTRCUINTPTR)RT_UOFFSETOF(PDMDEVINS, achInstanceData)) )
4348
4349/** @def PDMDEVINS_2_R3PTR
4350 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4351 */
4352#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_UOFFSETOF(PDMDEVINS, achInstanceData)) )
4353
4354/** @def PDMDEVINS_2_R0PTR
4355 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4356 */
4357#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_UOFFSETOF(PDMDEVINS, achInstanceData)) )
4358
4359
4360#ifdef IN_RING3
4361
4362/**
4363 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4364 */
4365DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4366 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4367 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4368{
4369 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4370}
4371
4372/**
4373 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4374 */
4375DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4376 const char *pszOut, const char *pszIn, const char *pszOutStr,
4377 const char *pszInStr, const char *pszDesc)
4378{
4379 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4380}
4381
4382/**
4383 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4384 */
4385DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4386 const char *pszOut, const char *pszIn, const char *pszOutStr,
4387 const char *pszInStr, const char *pszDesc)
4388{
4389 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4390}
4391
4392/**
4393 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4394 */
4395DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4396{
4397 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4398}
4399
4400/**
4401 * Register a Memory Mapped I/O (MMIO) region.
4402 *
4403 * These callbacks are of course for the ring-3 context (R3). Register HC
4404 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4405 * must be a R3 handler for every RC and R0 handler!
4406 *
4407 * @returns VBox status.
4408 * @param pDevIns The device instance to register the MMIO with.
4409 * @param GCPhysStart First physical address in the range.
4410 * @param cbRange The size of the range (in bytes).
4411 * @param pvUser User argument.
4412 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4413 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4414 * @param pfnRead Pointer to function which is gonna handle Read operations.
4415 * @param pszDesc Pointer to description string. This must not be freed.
4416 */
4417DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
4418 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4419{
4420 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4421 fFlags, pszDesc);
4422}
4423
4424/**
4425 * Register a Memory Mapped I/O (MMIO) region for RC.
4426 *
4427 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4428 * (R3) handlers before guest context handlers! There must be a R3 handler for
4429 * every RC handler!
4430 *
4431 * @returns VBox status.
4432 * @param pDevIns The device instance to register the MMIO with.
4433 * @param GCPhysStart First physical address in the range.
4434 * @param cbRange The size of the range (in bytes).
4435 * @param pvUser User argument.
4436 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4437 * @param pszRead Name of the RC function which is gonna handle Read operations.
4438 */
4439DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser,
4440 const char *pszWrite, const char *pszRead)
4441{
4442 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4443}
4444
4445/**
4446 * Register a Memory Mapped I/O (MMIO) region for R0.
4447 *
4448 * These callbacks are for the ring-0 host context (R0). Register ring-3
4449 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
4450 * every R0 handler!
4451 *
4452 * @returns VBox status.
4453 * @param pDevIns The device instance to register the MMIO with.
4454 * @param GCPhysStart First physical address in the range.
4455 * @param cbRange The size of the range (in bytes).
4456 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
4457 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4458 * @param pszRead Name of the RC function which is gonna handle Read operations.
4459 * @remarks Caller enters the device critical section prior to invoking the
4460 * registered callback methods.
4461 */
4462DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
4463 const char *pszWrite, const char *pszRead)
4464{
4465 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4466}
4467
4468/**
4469 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4470 */
4471DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
4472 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4473 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4474{
4475 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4476 fFlags, pszDesc);
4477}
4478
4479/**
4480 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4481 */
4482DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser,
4483 const char *pszWrite, const char *pszRead, const char *pszFill)
4484{
4485 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4486}
4487
4488/**
4489 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4490 */
4491DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
4492 const char *pszWrite, const char *pszRead, const char *pszFill)
4493{
4494 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4495}
4496
4497/**
4498 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4499 */
4500DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange)
4501{
4502 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4503}
4504
4505/**
4506 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4507 */
4508DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb,
4509 uint32_t fFlags, void **ppv, const char *pszDesc)
4510{
4511 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, pPciDev, iRegion, cb, fFlags, ppv, pszDesc);
4512}
4513
4514/**
4515 * @copydoc PDMDEVHLPR3::pfnMMIOExPreRegister
4516 */
4517DECLINLINE(int) PDMDevHlpMMIOExPreRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,
4518 uint32_t fFlags, const char *pszDesc, RTHCPTR pvUser,
4519 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
4520 RTR0PTR pvUserR0, const char *pszWriteR0, const char *pszReadR0, const char *pszFillR0,
4521 RTRCPTR pvUserRC, const char *pszWriteRC, const char *pszReadRC, const char *pszFillRC)
4522{
4523 return pDevIns->pHlpR3->pfnMMIOExPreRegister(pDevIns, pPciDev, iRegion, cbRegion, fFlags, pszDesc,
4524 pvUser, pfnWrite, pfnRead, pfnFill,
4525 pvUserR0, pszWriteR0, pszReadR0, pszFillR0,
4526 pvUserRC, pszWriteRC, pszReadRC, pszFillRC);
4527}
4528
4529/**
4530 * @copydoc PDMDEVHLPR3::pfnMMIOExDeregister
4531 * @param pPciDev The PCI device the region is associated with, use
4532 * NULL to indicate it is not associated with a device.
4533 */
4534DECLINLINE(int) PDMDevHlpMMIOExDeregister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)
4535{
4536 return pDevIns->pHlpR3->pfnMMIOExDeregister(pDevIns, pPciDev, iRegion);
4537}
4538
4539/**
4540 * @copydoc PDMDEVHLPR3::pfnMMIOExMap
4541 * @param pPciDev The PCI device the region is associated with, use
4542 * NULL to indicate it is not associated with a device.
4543 */
4544DECLINLINE(int) PDMDevHlpMMIOExMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
4545{
4546 return pDevIns->pHlpR3->pfnMMIOExMap(pDevIns, pPciDev, iRegion, GCPhys);
4547}
4548
4549/**
4550 * @copydoc PDMDEVHLPR3::pfnMMIOExUnmap
4551 * @param pPciDev The PCI device the region is associated with, use
4552 * NULL to indicate it is not associated with a device.
4553 */
4554DECLINLINE(int) PDMDevHlpMMIOExUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
4555{
4556 return pDevIns->pHlpR3->pfnMMIOExUnmap(pDevIns, pPciDev, iRegion, GCPhys);
4557}
4558
4559/**
4560 * @copydoc PDMDEVHLPR3::pfnMMIOExReduce
4561 */
4562DECLINLINE(int) PDMDevHlpMMIOExReduce(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion)
4563{
4564 return pDevIns->pHlpR3->pfnMMIOExReduce(pDevIns, pPciDev, iRegion, cbRegion);
4565}
4566
4567#ifdef VBOX_WITH_RAW_MODE_KEEP
4568/**
4569 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4570 */
4571DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4572 const char *pszDesc, PRTRCPTR pRCPtr)
4573{
4574 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, pPciDev, iRegion, off, cb, pszDesc, pRCPtr);
4575}
4576#endif
4577
4578/**
4579 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4580 */
4581DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4582 const char *pszDesc, PRTR0PTR pR0Ptr)
4583{
4584 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, pPciDev, iRegion, off, cb, pszDesc, pR0Ptr);
4585}
4586
4587/**
4588 * @copydoc PDMDEVHLPR3::pfnROMRegister
4589 */
4590DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4591 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4592{
4593 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4594}
4595
4596/**
4597 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4598 */
4599DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4600{
4601 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4602}
4603
4604/**
4605 * Register a save state data unit.
4606 *
4607 * @returns VBox status.
4608 * @param pDevIns The device instance.
4609 * @param uVersion Data layout version number.
4610 * @param cbGuess The approximate amount of data in the unit.
4611 * Only for progress indicators.
4612 * @param pfnSaveExec Execute save callback, optional.
4613 * @param pfnLoadExec Execute load callback, optional.
4614 */
4615DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4616 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4617{
4618 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4619 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4620 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4621 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4622}
4623
4624/**
4625 * Register a save state data unit with a live save callback as well.
4626 *
4627 * @returns VBox status.
4628 * @param pDevIns The device instance.
4629 * @param uVersion Data layout version number.
4630 * @param cbGuess The approximate amount of data in the unit.
4631 * Only for progress indicators.
4632 * @param pfnLiveExec Execute live callback, optional.
4633 * @param pfnSaveExec Execute save callback, optional.
4634 * @param pfnLoadExec Execute load callback, optional.
4635 */
4636DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4637 PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4638{
4639 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4640 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4641 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4642 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4643}
4644
4645/**
4646 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4647 */
4648DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4649 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4650 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4651 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4652{
4653 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4654 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4655 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4656 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4657}
4658
4659/**
4660 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4661 */
4662DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4663 const char *pszDesc, PPTMTIMERR3 ppTimer)
4664{
4665 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4666}
4667
4668/**
4669 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4670 */
4671DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4672{
4673 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4674}
4675
4676#endif /* IN_RING3 */
4677
4678/**
4679 * @copydoc PDMDEVHLPR3::pfnPhysRead
4680 */
4681DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4682{
4683 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4684}
4685
4686/**
4687 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4688 */
4689DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4690{
4691 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4692}
4693
4694#ifdef IN_RING3
4695
4696/**
4697 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4698 */
4699DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4700{
4701 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4702}
4703
4704/**
4705 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4706 */
4707DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv,
4708 PPGMPAGEMAPLOCK pLock)
4709{
4710 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4711}
4712
4713/**
4714 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4715 */
4716DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4717{
4718 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4719}
4720
4721/**
4722 * @copydoc PDMDEVHLPR3::pfnPhysBulkGCPhys2CCPtr
4723 */
4724DECLINLINE(int) PDMDevHlpPhysBulkGCPhys2CCPtr(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
4725 uint32_t fFlags, void **papvPages, PPGMPAGEMAPLOCK paLocks)
4726{
4727 return pDevIns->CTX_SUFF(pHlp)->pfnPhysBulkGCPhys2CCPtr(pDevIns, cPages, paGCPhysPages, fFlags, papvPages, paLocks);
4728}
4729
4730/**
4731 * @copydoc PDMDEVHLPR3::pfnPhysBulkGCPhys2CCPtrReadOnly
4732 */
4733DECLINLINE(int) PDMDevHlpPhysBulkGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
4734 uint32_t fFlags, void const **papvPages, PPGMPAGEMAPLOCK paLocks)
4735{
4736 return pDevIns->CTX_SUFF(pHlp)->pfnPhysBulkGCPhys2CCPtrReadOnly(pDevIns, cPages, paGCPhysPages, fFlags, papvPages, paLocks);
4737}
4738
4739/**
4740 * @copydoc PDMDEVHLPR3::pfnPhysBulkReleasePageMappingLocks
4741 */
4742DECLINLINE(void) PDMDevHlpPhysBulkReleasePageMappingLocks(PPDMDEVINS pDevIns, uint32_t cPages, PPGMPAGEMAPLOCK paLocks)
4743{
4744 pDevIns->CTX_SUFF(pHlp)->pfnPhysBulkReleasePageMappingLocks(pDevIns, cPages, paLocks);
4745}
4746
4747/**
4748 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4749 */
4750DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4751{
4752 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4753}
4754
4755/**
4756 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4757 */
4758DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4759{
4760 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4761}
4762
4763/**
4764 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4765 */
4766DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4767{
4768 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4769}
4770
4771/**
4772 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4773 */
4774DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4775{
4776 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4777}
4778
4779/**
4780 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4781 */
4782DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4783{
4784 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4785}
4786
4787/**
4788 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4789 */
4790DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4791{
4792 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4793}
4794#endif /* IN_RING3 */
4795
4796/**
4797 * @copydoc PDMDEVHLPR3::pfnVMState
4798 */
4799DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4800{
4801 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4802}
4803
4804#ifdef IN_RING3
4805/**
4806 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4807 */
4808DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4809{
4810 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4811}
4812#endif /* IN_RING3 */
4813
4814/**
4815 * @copydoc PDMDEVHLPR3::pfnVMSetError
4816 */
4817DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL,
4818 const char *pszFormat, ...)
4819{
4820 va_list va;
4821 va_start(va, pszFormat);
4822 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4823 va_end(va);
4824 return rc;
4825}
4826
4827/**
4828 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4829 */
4830DECLINLINE(int) RT_IPRT_FORMAT_ATTR(4, 5) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4831 const char *pszFormat, ...)
4832{
4833 va_list va;
4834 int rc;
4835 va_start(va, pszFormat);
4836 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4837 va_end(va);
4838 return rc;
4839}
4840
4841/**
4842 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4843 *
4844 * @returns VBox status code which must be passed up to the VMM. This will be
4845 * VINF_SUCCESS in non-strict builds.
4846 * @param pDevIns The device instance.
4847 * @param SRC_POS Use RT_SRC_POS.
4848 * @param pszFormat Message. (optional)
4849 * @param ... Message parameters.
4850 */
4851DECLINLINE(int) RT_IPRT_FORMAT_ATTR(5, 6) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4852{
4853#ifdef VBOX_STRICT
4854# ifdef IN_RING3
4855 int rc;
4856 va_list args;
4857 va_start(args, pszFormat);
4858 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4859 va_end(args);
4860 return rc;
4861# else
4862 NOREF(pDevIns);
4863 NOREF(pszFile);
4864 NOREF(iLine);
4865 NOREF(pszFunction);
4866 NOREF(pszFormat);
4867 return VINF_EM_DBG_STOP;
4868# endif
4869#else
4870 NOREF(pDevIns);
4871 NOREF(pszFile);
4872 NOREF(iLine);
4873 NOREF(pszFunction);
4874 NOREF(pszFormat);
4875 return VINF_SUCCESS;
4876#endif
4877}
4878
4879#ifdef IN_RING3
4880
4881/**
4882 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4883 */
4884DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4885{
4886 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4887}
4888
4889/**
4890 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegisterArgv
4891 */
4892DECLINLINE(int) PDMDevHlpDBGFInfoRegisterArgv(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFINFOARGVDEV pfnHandler)
4893{
4894 return pDevIns->pHlpR3->pfnDBGFInfoRegisterArgv(pDevIns, pszName, pszDesc, pfnHandler);
4895}
4896
4897/**
4898 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4899 */
4900DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4901{
4902 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4903}
4904
4905/**
4906 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4907 */
4908DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4909{
4910 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4911}
4912
4913/**
4914 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4915 */
4916DECLINLINE(void) RT_IPRT_FORMAT_ATTR(7, 8) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
4917 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4918 const char *pszDesc, const char *pszName, ...)
4919{
4920 va_list va;
4921 va_start(va, pszName);
4922 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4923 va_end(va);
4924}
4925
4926/*
4927 * Registers the device with the default PCI bus.
4928 *
4929 * @returns VBox status code.
4930 * @param pDevIns The device instance.
4931 * @param pPciDev The PCI device structure.
4932 * This must be kept in the instance data.
4933 * The PCI configuration must be initialized before registration.
4934 */
4935DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev)
4936{
4937 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev, PDMPCIDEVREG_CFG_NEXT, 0 /*fFlags*/,
4938 PDMPCIDEVREG_DEV_NO_FIRST_UNUSED, PDMPCIDEVREG_FUN_NO_FIRST_UNUSED, NULL);
4939}
4940
4941/**
4942 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4943 */
4944DECLINLINE(int) PDMDevHlpPCIRegisterEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
4945 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName)
4946{
4947 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev, idxDevCfg, fFlags, uPciDevNo, uPciFunNo, pszName);
4948}
4949
4950/**
4951 * Registers a I/O region (memory mapped or I/O ports) for the default PCI
4952 * device.
4953 *
4954 * @returns VBox status code.
4955 * @param pDevIns The device instance.
4956 * @param iRegion The region number.
4957 * @param cbRegion Size of the region.
4958 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
4959 * @param pfnCallback Callback for doing the mapping.
4960 * @remarks The callback will be invoked holding the PDM lock. The device lock
4961 * is NOT take because that is very likely be a lock order violation.
4962 */
4963DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, RTGCPHYS cbRegion,
4964 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4965{
4966 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, enmType, pfnCallback);
4967}
4968
4969/**
4970 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4971 */
4972DECLINLINE(int) PDMDevHlpPCIIORegionRegisterEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
4973 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4974{
4975 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
4976}
4977
4978/**
4979 * Initialize MSI emulation support for the first PCI device.
4980 *
4981 * @returns VBox status code.
4982 * @param pDevIns The device instance.
4983 * @param pMsiReg MSI emulation registration structure.
4984 */
4985DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4986{
4987 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, NULL, pMsiReg);
4988}
4989
4990/**
4991 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4992 */
4993DECLINLINE(int) PDMDevHlpPCIRegisterMsiEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
4994{
4995 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pPciDev, pMsiReg);
4996}
4997
4998/**
4999 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
5000 */
5001DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
5002 PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
5003 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
5004{
5005 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
5006}
5007
5008#endif /* IN_RING3 */
5009
5010/**
5011 * Bus master physical memory read from the default PCI device.
5012 *
5013 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
5014 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
5015 * @param pDevIns The device instance.
5016 * @param GCPhys Physical address start reading from.
5017 * @param pvBuf Where to put the read bits.
5018 * @param cbRead How many bytes to read.
5019 * @thread Any thread, but the call may involve the emulation thread.
5020 */
5021DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
5022{
5023 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, NULL, GCPhys, pvBuf, cbRead);
5024}
5025
5026/**
5027 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
5028 */
5029DECLINLINE(int) PDMDevHlpPCIPhysReadEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
5030{
5031 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead);
5032}
5033
5034/**
5035 * Bus master physical memory write from the default PCI device.
5036 *
5037 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
5038 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
5039 * @param pDevIns The device instance.
5040 * @param GCPhys Physical address to write to.
5041 * @param pvBuf What to write.
5042 * @param cbWrite How many bytes to write.
5043 * @thread Any thread, but the call may involve the emulation thread.
5044 */
5045DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
5046{
5047 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, NULL, GCPhys, pvBuf, cbWrite);
5048}
5049
5050/**
5051 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
5052 */
5053DECLINLINE(int) PDMDevHlpPCIPhysWriteEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
5054{
5055 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite);
5056}
5057
5058/**
5059 * Sets the IRQ for the default PCI device.
5060 *
5061 * @param pDevIns The device instance.
5062 * @param iIrq IRQ number to set.
5063 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
5064 * @thread Any thread, but will involve the emulation thread.
5065 */
5066DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5067{
5068 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, NULL, iIrq, iLevel);
5069}
5070
5071/**
5072 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
5073 */
5074DECLINLINE(void) PDMDevHlpPCISetIrqEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
5075{
5076 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
5077}
5078
5079/**
5080 * Sets the IRQ for the given PCI device, but doesn't wait for EMT to process
5081 * the request when not called from EMT.
5082 *
5083 * @param pDevIns The device instance.
5084 * @param iIrq IRQ number to set.
5085 * @param iLevel IRQ level.
5086 * @thread Any thread, but will involve the emulation thread.
5087 */
5088DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5089{
5090 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, NULL, iIrq, iLevel);
5091}
5092
5093/**
5094 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
5095 */
5096DECLINLINE(void) PDMDevHlpPCISetIrqNoWaitEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
5097{
5098 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
5099}
5100
5101/**
5102 * @copydoc PDMDEVHLPR3::pfnISASetIrq
5103 */
5104DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5105{
5106 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5107}
5108
5109/**
5110 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
5111 */
5112DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5113{
5114 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5115}
5116
5117/**
5118 * @copydoc PDMDEVHLPR3::pfnIoApicSendMsi
5119 */
5120DECLINLINE(void) PDMDevHlpIoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue)
5121{
5122 pDevIns->CTX_SUFF(pHlp)->pfnIoApicSendMsi(pDevIns, GCPhys, uValue);
5123}
5124
5125#ifdef IN_RING3
5126
5127/**
5128 * @copydoc PDMDEVHLPR3::pfnDriverAttach
5129 */
5130DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
5131{
5132 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
5133}
5134
5135/**
5136 * @copydoc PDMDEVHLPR3::pfnDriverDetach
5137 */
5138DECLINLINE(int) PDMDevHlpDriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
5139{
5140 return pDevIns->pHlpR3->pfnDriverDetach(pDevIns, pDrvIns, fFlags);
5141}
5142
5143/**
5144 * @copydoc PDMDEVHLPR3::pfnQueueCreate
5145 */
5146DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
5147 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
5148{
5149 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
5150}
5151
5152/**
5153 * Initializes a PDM critical section.
5154 *
5155 * The PDM critical sections are derived from the IPRT critical sections, but
5156 * works in RC and R0 as well.
5157 *
5158 * @returns VBox status code.
5159 * @param pDevIns The device instance.
5160 * @param pCritSect Pointer to the critical section.
5161 * @param SRC_POS Use RT_SRC_POS.
5162 * @param pszNameFmt Format string for naming the critical section.
5163 * For statistics and lock validation.
5164 * @param ... Arguments for the format string.
5165 */
5166DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
5167 const char *pszNameFmt, ...)
5168{
5169 int rc;
5170 va_list va;
5171 va_start(va, pszNameFmt);
5172 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
5173 va_end(va);
5174 return rc;
5175}
5176
5177/**
5178 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
5179 */
5180DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
5181{
5182 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
5183}
5184
5185/**
5186 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
5187 */
5188DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
5189{
5190 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
5191}
5192
5193/**
5194 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
5195 */
5196DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
5197{
5198 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
5199}
5200
5201/**
5202 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
5203 */
5204DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
5205{
5206 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
5207}
5208
5209/**
5210 * @copydoc PDMDEVHLPR3::pfnThreadCreate
5211 */
5212DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
5213 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
5214{
5215 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
5216}
5217
5218/**
5219 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
5220 */
5221DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
5222{
5223 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
5224}
5225
5226/**
5227 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
5228 */
5229DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
5230{
5231 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
5232}
5233
5234/**
5235 * @copydoc PDMDEVHLPR3::pfnA20Set
5236 */
5237DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
5238{
5239 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5240}
5241
5242/**
5243 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5244 */
5245DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5246{
5247 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5248}
5249
5250/**
5251 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5252 */
5253DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus)
5254{
5255 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3, piBus);
5256}
5257
5258/**
5259 * @copydoc PDMDEVHLPR3::pfnPICRegister
5260 */
5261DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5262{
5263 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5264}
5265
5266/**
5267 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5268 */
5269DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns)
5270{
5271 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns);
5272}
5273
5274/**
5275 * @copydoc PDMDEVHLPR3::pfnIOAPICRegister
5276 */
5277DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5278{
5279 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5280}
5281
5282/**
5283 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5284 */
5285DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5286{
5287 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5288}
5289
5290/**
5291 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5292 */
5293DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5294{
5295 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5296}
5297
5298/**
5299 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5300 */
5301DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5302{
5303 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5304}
5305
5306/**
5307 * @copydoc PDMDEVHLPR3::pfnDMARegister
5308 */
5309DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5310{
5311 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5312}
5313
5314/**
5315 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5316 */
5317DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5318{
5319 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5320}
5321
5322/**
5323 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5324 */
5325DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5326{
5327 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5328}
5329
5330/**
5331 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5332 */
5333DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5334{
5335 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5336}
5337
5338/**
5339 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5340 */
5341DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5342{
5343 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5344}
5345
5346/**
5347 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5348 */
5349DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5350{
5351 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5352}
5353
5354/**
5355 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5356 */
5357DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5358{
5359 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5360}
5361
5362/**
5363 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5364 */
5365DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5366{
5367 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5368}
5369
5370/**
5371 * @copydoc PDMDEVHLPR3::pfnCallR0
5372 */
5373DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5374{
5375 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5376}
5377
5378/**
5379 * @copydoc PDMDEVHLPR3::pfnVMGetSuspendReason
5380 */
5381DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5382{
5383 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5384}
5385
5386/**
5387 * @copydoc PDMDEVHLPR3::pfnVMGetResumeReason
5388 */
5389DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5390{
5391 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5392}
5393
5394/**
5395 * @copydoc PDMDEVHLPR3::pfnGetUVM
5396 */
5397DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5398{
5399 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5400}
5401
5402#endif /* IN_RING3 */
5403
5404/**
5405 * @copydoc PDMDEVHLPR3::pfnGetVM
5406 */
5407DECLINLINE(PVMCC) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5408{
5409 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5410}
5411
5412/**
5413 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5414 */
5415DECLINLINE(PVMCPUCC) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5416{
5417 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5418}
5419
5420/**
5421 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5422 */
5423DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5424{
5425 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5426}
5427
5428/**
5429 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5430 */
5431DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5432{
5433 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5434}
5435
5436/**
5437 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5438 */
5439DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5440{
5441 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5442}
5443
5444/**
5445 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5446 */
5447DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5448{
5449 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5450}
5451
5452#ifdef IN_RING3
5453
5454/**
5455 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5456 */
5457DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap)
5458{
5459 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbHeap);
5460}
5461
5462/**
5463 * @copydoc PDMDEVHLPR3::pfnFirmwareRegister
5464 */
5465DECLINLINE(int) PDMDevHlpFirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
5466{
5467 return pDevIns->pHlpR3->pfnFirmwareRegister(pDevIns, pFwReg, ppFwHlp);
5468}
5469
5470/**
5471 * @copydoc PDMDEVHLPR3::pfnVMReset
5472 */
5473DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
5474{
5475 return pDevIns->pHlpR3->pfnVMReset(pDevIns, fFlags);
5476}
5477
5478/**
5479 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5480 */
5481DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5482{
5483 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5484}
5485
5486/**
5487 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5488 */
5489DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5490{
5491 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5492}
5493
5494/**
5495 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5496 */
5497DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5498{
5499 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5500}
5501
5502#endif /* IN_RING3 */
5503
5504/**
5505 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5506 */
5507DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5508{
5509 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5510}
5511
5512#ifdef IN_RING3
5513
5514/**
5515 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5516 */
5517DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5518{
5519 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5520}
5521
5522/**
5523 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5524 */
5525DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5526{
5527 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5528}
5529
5530/**
5531 * @copydoc PDMDEVHLPR3::pfnQueryGenericUserObject
5532 */
5533DECLINLINE(void *) PDMDevHlpQueryGenericUserObject(PPDMDEVINS pDevIns, PCRTUUID pUuid)
5534{
5535 return pDevIns->pHlpR3->pfnQueryGenericUserObject(pDevIns, pUuid);
5536}
5537
5538#endif /* IN_RING3 */
5539
5540/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5541typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5542
5543/**
5544 * Callbacks for VBoxDeviceRegister().
5545 */
5546typedef struct PDMDEVREGCB
5547{
5548 /** Interface version.
5549 * This is set to PDM_DEVREG_CB_VERSION. */
5550 uint32_t u32Version;
5551
5552 /**
5553 * Registers a device with the current VM instance.
5554 *
5555 * @returns VBox status code.
5556 * @param pCallbacks Pointer to the callback table.
5557 * @param pReg Pointer to the device registration record.
5558 * This data must be permanent and readonly.
5559 */
5560 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5561} PDMDEVREGCB;
5562
5563/** Current version of the PDMDEVREGCB structure. */
5564#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5565
5566
5567/**
5568 * The VBoxDevicesRegister callback function.
5569 *
5570 * PDM will invoke this function after loading a device module and letting
5571 * the module decide which devices to register and how to handle conflicts.
5572 *
5573 * @returns VBox status code.
5574 * @param pCallbacks Pointer to the callback table.
5575 * @param u32Version VBox version number.
5576 */
5577typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5578
5579/** @} */
5580
5581RT_C_DECLS_END
5582
5583#endif /* !VBOX_INCLUDED_vmm_pdmdev_h */
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