VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 56299

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDrvIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is always called when VMR3PowerOff is called.
164 * There will be no callback when hot plugging devices.
165 *
166 * @param pDevIns The device instance data.
167 * @thread EMT(0)
168 *
169 * @remarks Caller enters the device critical section.
170 */
171typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
172/** Pointer to a FNPDMDEVPOWEROFF() function. */
173typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
174
175/**
176 * Attach command.
177 *
178 * This is called to let the device attach to a driver for a specified LUN
179 * at runtime. This is not called during VM construction, the device
180 * constructor have to attach to all the available drivers.
181 *
182 * This is like plugging in the keyboard or mouse after turning on the PC.
183 *
184 * @returns VBox status code.
185 * @param pDevIns The device instance.
186 * @param iLUN The logical unit which is being detached.
187 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
188 *
189 * @remarks Caller enters the device critical section.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust it's state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 *
208 * @remarks Caller enters the device critical section.
209 */
210typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
211/** Pointer to a FNPDMDEVDETACH() function. */
212typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
213
214/**
215 * Query the base interface of a logical unit.
216 *
217 * @returns VBOX status code.
218 * @param pDevIns The device instance.
219 * @param iLUN The logicial unit to query.
220 * @param ppBase Where to store the pointer to the base interface of the LUN.
221 *
222 * @remarks The device critical section is not entered.
223 */
224typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
225/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
226typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
227
228/**
229 * Init complete notification.
230 * This can be done to do communication with other devices and other
231 * initialization which requires everything to be in place.
232 *
233 * @returns VBOX status code.
234 * @param pDevIns The device instance.
235 *
236 * @remarks Caller enters the device critical section.
237 */
238typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
239/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
240typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
241
242
243/**
244 * The context of a pfnMemSetup call.
245 */
246typedef enum PDMDEVMEMSETUPCTX
247{
248 /** Invalid zero value. */
249 PDMDEVMEMSETUPCTX_INVALID = 0,
250 /** After construction. */
251 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
252 /** After reset. */
253 PDMDEVMEMSETUPCTX_AFTER_RESET,
254 /** Type size hack. */
255 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
256} PDMDEVMEMSETUPCTX;
257
258
259/**
260 * PDM Device Registration Structure.
261 *
262 * This structure is used when registering a device from VBoxInitDevices() in HC
263 * Ring-3. PDM will continue use till the VM is terminated.
264 */
265typedef struct PDMDEVREG
266{
267 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
268 uint32_t u32Version;
269 /** Device name. */
270 char szName[32];
271 /** Name of the raw-mode context module (no path).
272 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
273 char szRCMod[32];
274 /** Name of the ring-0 module (no path).
275 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
276 char szR0Mod[32];
277 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
278 * remain unchanged from registration till VM destruction. */
279 const char *pszDescription;
280
281 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
282 uint32_t fFlags;
283 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
284 uint32_t fClass;
285 /** Maximum number of instances (per VM). */
286 uint32_t cMaxInstances;
287 /** Size of the instance data. */
288 uint32_t cbInstance;
289
290 /** Construct instance - required. */
291 PFNPDMDEVCONSTRUCT pfnConstruct;
292 /** Destruct instance - optional.
293 * Critical section NOT entered (will be destroyed). */
294 PFNPDMDEVDESTRUCT pfnDestruct;
295 /** Relocation command - optional.
296 * Critical section NOT entered. */
297 PFNPDMDEVRELOCATE pfnRelocate;
298
299 /**
300 * Memory setup callback.
301 *
302 * @param pDevIns The device instance data.
303 * @param enmCtx Indicates the context of the call.
304 * @remarks The critical section is entered prior to calling this method.
305 */
306 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
307
308 /** Power on notification - optional.
309 * Critical section is entered. */
310 PFNPDMDEVPOWERON pfnPowerOn;
311 /** Reset notification - optional.
312 * Critical section is entered. */
313 PFNPDMDEVRESET pfnReset;
314 /** Suspend notification - optional.
315 * Critical section is entered. */
316 PFNPDMDEVSUSPEND pfnSuspend;
317 /** Resume notification - optional.
318 * Critical section is entered. */
319 PFNPDMDEVRESUME pfnResume;
320 /** Attach command - optional.
321 * Critical section is entered. */
322 PFNPDMDEVATTACH pfnAttach;
323 /** Detach notification - optional.
324 * Critical section is entered. */
325 PFNPDMDEVDETACH pfnDetach;
326 /** Query a LUN base interface - optional.
327 * Critical section is NOT entered. */
328 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
329 /** Init complete notification - optional.
330 * Critical section is entered. */
331 PFNPDMDEVINITCOMPLETE pfnInitComplete;
332 /** Power off notification - optional.
333 * Critical section is entered. */
334 PFNPDMDEVPOWEROFF pfnPowerOff;
335 /** @todo */
336 PFNRT pfnSoftReset;
337 /** Initialization safty marker. */
338 uint32_t u32VersionEnd;
339} PDMDEVREG;
340/** Pointer to a PDM Device Structure. */
341typedef PDMDEVREG *PPDMDEVREG;
342/** Const pointer to a PDM Device Structure. */
343typedef PDMDEVREG const *PCPDMDEVREG;
344
345/** Current DEVREG version number. */
346#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
347
348/** PDM Device Flags.
349 * @{ */
350/** This flag is used to indicate that the device has a RC component. */
351#define PDM_DEVREG_FLAGS_RC 0x00000001
352/** This flag is used to indicate that the device has a R0 component. */
353#define PDM_DEVREG_FLAGS_R0 0x00000002
354
355/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
356 * The bit count for the current host. */
357#if HC_ARCH_BITS == 32
358# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
359#elif HC_ARCH_BITS == 64
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
361#else
362# error Unsupported HC_ARCH_BITS value.
363#endif
364/** The host bit count mask. */
365#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
366
367/** The device support only 32-bit guests. */
368#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
369/** The device support only 64-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
371/** The device support both 32-bit & 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
373/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
374 * The guest bit count for the current compilation. */
375#if GC_ARCH_BITS == 32
376# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
377#elif GC_ARCH_BITS == 64
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
379#else
380# error Unsupported GC_ARCH_BITS value.
381#endif
382/** The guest bit count mask. */
383#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
384
385/** A convenience. */
386#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
387
388/** Indicates that the devices support PAE36 on a 32-bit guest. */
389#define PDM_DEVREG_FLAGS_PAE36 0x00001000
390
391/** Indicates that the device needs to be notified before the drivers when suspending. */
392#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
393
394/** Indicates that the device needs to be notified before the drivers when powering off. */
395#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
396
397/** Indicates that the device needs to be notified before the drivers when resetting. */
398#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
399/** @} */
400
401
402/** PDM Device Classes.
403 * The order is important, lower bit earlier instantiation.
404 * @{ */
405/** Architecture device. */
406#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
407/** Architecture BIOS device. */
408#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
409/** PCI bus brigde. */
410#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
411/** ISA bus brigde. */
412#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
413/** Input device (mouse, keyboard, joystick, HID, ...). */
414#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
415/** Interrupt controller (PIC). */
416#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
417/** Interval controoler (PIT). */
418#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
419/** RTC/CMOS. */
420#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
421/** DMA controller. */
422#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
423/** VMM Device. */
424#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
425/** Graphics device, like VGA. */
426#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
427/** Storage controller device. */
428#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
429/** Network interface controller. */
430#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
431/** Audio. */
432#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
433/** USB HIC. */
434#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
435/** ACPI. */
436#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
437/** Serial controller device. */
438#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
439/** Parallel controller device */
440#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
441/** Host PCI pass-through device */
442#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
443/** Misc devices (always last). */
444#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
445/** @} */
446
447
448/** @name IRQ Level for use with the *SetIrq APIs.
449 * @{
450 */
451/** Assert the IRQ (can assume value 1). */
452#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
453/** Deassert the IRQ (can assume value 0). */
454#define PDM_IRQ_LEVEL_LOW 0
455/** flip-flop - deassert and then assert the IRQ again immediately. */
456#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
457/** @} */
458
459/**
460 * Registration record for MSI.
461 */
462typedef struct PDMMSIREG
463{
464 /** Number of MSI interrupt vectors, 0 if MSI not supported */
465 uint16_t cMsiVectors;
466 /** Offset of MSI capability */
467 uint8_t iMsiCapOffset;
468 /** Offset of next capability to MSI */
469 uint8_t iMsiNextOffset;
470 /** If we support 64-bit MSI addressing */
471 bool fMsi64bit;
472
473 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
474 uint16_t cMsixVectors;
475 /** Offset of MSI-X capability */
476 uint8_t iMsixCapOffset;
477 /** Offset of next capability to MSI-X */
478 uint8_t iMsixNextOffset;
479 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
480 uint8_t iMsixBar;
481} PDMMSIREG;
482typedef PDMMSIREG *PPDMMSIREG;
483
484/**
485 * PCI Bus registration structure.
486 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
487 */
488typedef struct PDMPCIBUSREG
489{
490 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
491 uint32_t u32Version;
492
493 /**
494 * Registers the device with the default PCI bus.
495 *
496 * @returns VBox status code.
497 * @param pDevIns Device instance of the PCI Bus.
498 * @param pPciDev The PCI device structure.
499 * Any PCI enabled device must keep this in it's instance data!
500 * Fill in the PCI data config before registration, please.
501 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
502 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
503 * If negative, the pci bus device will assign one.
504 * @remarks Caller enters the PDM critical section.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
507
508 /**
509 * Initialize MSI support in a PCI device.
510 *
511 * @returns VBox status code.
512 * @param pDevIns Device instance of the PCI Bus.
513 * @param pPciDev The PCI device structure.
514 * @param pMsiReg MSI registration structure
515 * @remarks Caller enters the PDM critical section.
516 */
517 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
518
519 /**
520 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
521 *
522 * @returns VBox status code.
523 * @param pDevIns Device instance of the PCI Bus.
524 * @param pPciDev The PCI device structure.
525 * @param iRegion The region number.
526 * @param cbRegion Size of the region.
527 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
528 * @param pfnCallback Callback for doing the mapping.
529 * @remarks Caller enters the PDM critical section.
530 */
531 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
532
533 /**
534 * Register PCI configuration space read/write callbacks.
535 *
536 * @param pDevIns Device instance of the PCI Bus.
537 * @param pPciDev The PCI device structure.
538 * @param pfnRead Pointer to the user defined PCI config read function.
539 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
540 * PCI config read function. This way, user can decide when (and if)
541 * to call default PCI config read function. Can be NULL.
542 * @param pfnWrite Pointer to the user defined PCI config write function.
543 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
544 * PCI config write function. This way, user can decide when (and if)
545 * to call default PCI config write function. Can be NULL.
546 * @remarks Caller enters the PDM critical section.
547 * @thread EMT
548 */
549 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
550 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
551
552 /**
553 * Set the IRQ for a PCI device.
554 *
555 * @param pDevIns Device instance of the PCI Bus.
556 * @param pPciDev The PCI device structure.
557 * @param iIrq IRQ number to set.
558 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
559 * @param uTagSrc The IRQ tag and source (for tracing).
560 * @remarks Caller enters the PDM critical section.
561 */
562 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
563
564 /**
565 * Called to perform the job of the bios.
566 * This is only called for the first PCI Bus - it is expected to
567 * service all the PCI buses.
568 *
569 * @returns VBox status.
570 * @param pDevIns Device instance of the first bus.
571 * @remarks Caller enters the PDM critical section.
572 */
573 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
574
575 /** The name of the SetIrq RC entry point. */
576 const char *pszSetIrqRC;
577
578 /** The name of the SetIrq R0 entry point. */
579 const char *pszSetIrqR0;
580
581} PDMPCIBUSREG;
582/** Pointer to a PCI bus registration structure. */
583typedef PDMPCIBUSREG *PPDMPCIBUSREG;
584
585/** Current PDMPCIBUSREG version number. */
586#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
587
588/**
589 * PCI Bus RC helpers.
590 */
591typedef struct PDMPCIHLPRC
592{
593 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
594 uint32_t u32Version;
595
596 /**
597 * Set an ISA IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @param uTagSrc The IRQ tag and source (for tracing).
603 * @thread EMT only.
604 */
605 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
606
607 /**
608 * Set an I/O-APIC IRQ.
609 *
610 * @param pDevIns PCI device instance.
611 * @param iIrq IRQ number to set.
612 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
613 * @param uTagSrc The IRQ tag and source (for tracing).
614 * @thread EMT only.
615 */
616 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
617
618 /**
619 * Send an MSI.
620 *
621 * @param pDevIns PCI device instance.
622 * @param GCPhys Physical address MSI request was written.
623 * @param uValue Value written.
624 * @param uTagSrc The IRQ tag and source (for tracing).
625 * @thread EMT only.
626 */
627 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
628
629
630 /**
631 * Acquires the PDM lock.
632 *
633 * @returns VINF_SUCCESS on success.
634 * @returns rc if we failed to acquire the lock.
635 * @param pDevIns The PCI device instance.
636 * @param rc What to return if we fail to acquire the lock.
637 */
638 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
639
640 /**
641 * Releases the PDM lock.
642 *
643 * @param pDevIns The PCI device instance.
644 */
645 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
646
647 /** Just a safety precaution. */
648 uint32_t u32TheEnd;
649} PDMPCIHLPRC;
650/** Pointer to PCI helpers. */
651typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
652/** Pointer to const PCI helpers. */
653typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
654
655/** Current PDMPCIHLPRC version number. */
656#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
657
658
659/**
660 * PCI Bus R0 helpers.
661 */
662typedef struct PDMPCIHLPR0
663{
664 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
665 uint32_t u32Version;
666
667 /**
668 * Set an ISA IRQ.
669 *
670 * @param pDevIns PCI device instance.
671 * @param iIrq IRQ number to set.
672 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
673 * @param uTagSrc The IRQ tag and source (for tracing).
674 * @thread EMT only.
675 */
676 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
677
678 /**
679 * Set an I/O-APIC IRQ.
680 *
681 * @param pDevIns PCI device instance.
682 * @param iIrq IRQ number to set.
683 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
684 * @param uTagSrc The IRQ tag and source (for tracing).
685 * @thread EMT only.
686 */
687 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
688
689 /**
690 * Send an MSI.
691 *
692 * @param pDevIns PCI device instance.
693 * @param GCPhys Physical address MSI request was written.
694 * @param uValue Value written.
695 * @param uTagSrc The IRQ tag and source (for tracing).
696 * @thread EMT only.
697 */
698 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
699
700
701 /**
702 * Acquires the PDM lock.
703 *
704 * @returns VINF_SUCCESS on success.
705 * @returns rc if we failed to acquire the lock.
706 * @param pDevIns The PCI device instance.
707 * @param rc What to return if we fail to acquire the lock.
708 */
709 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
710
711 /**
712 * Releases the PDM lock.
713 *
714 * @param pDevIns The PCI device instance.
715 */
716 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
717
718 /** Just a safety precaution. */
719 uint32_t u32TheEnd;
720} PDMPCIHLPR0;
721/** Pointer to PCI helpers. */
722typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
723/** Pointer to const PCI helpers. */
724typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
725
726/** Current PDMPCIHLPR0 version number. */
727#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
728
729/**
730 * PCI device helpers.
731 */
732typedef struct PDMPCIHLPR3
733{
734 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set an ISA IRQ.
739 *
740 * @param pDevIns The PCI device instance.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 * @param uTagSrc The IRQ tag and source (for tracing).
744 */
745 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
746
747 /**
748 * Set an I/O-APIC IRQ.
749 *
750 * @param pDevIns The PCI device instance.
751 * @param iIrq IRQ number to set.
752 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
753 * @param uTagSrc The IRQ tag and source (for tracing).
754 */
755 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
756
757 /**
758 * Send an MSI.
759 *
760 * @param pDevIns PCI device instance.
761 * @param GCPhys Physical address MSI request was written.
762 * @param uValue Value written.
763 * @param uTagSrc The IRQ tag and source (for tracing).
764 */
765 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
766
767 /**
768 * Checks if the given address is an MMIO2 base address or not.
769 *
770 * @returns true/false accordingly.
771 * @param pDevIns The PCI device instance.
772 * @param pOwner The owner of the memory, optional.
773 * @param GCPhys The address to check.
774 */
775 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
776
777 /**
778 * Gets the address of the RC PCI Bus helpers.
779 *
780 * This should be called at both construction and relocation time
781 * to obtain the correct address of the RC helpers.
782 *
783 * @returns RC pointer to the PCI Bus helpers.
784 * @param pDevIns Device instance of the PCI Bus.
785 * @thread EMT only.
786 */
787 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
788
789 /**
790 * Gets the address of the R0 PCI Bus helpers.
791 *
792 * This should be called at both construction and relocation time
793 * to obtain the correct address of the R0 helpers.
794 *
795 * @returns R0 pointer to the PCI Bus helpers.
796 * @param pDevIns Device instance of the PCI Bus.
797 * @thread EMT only.
798 */
799 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
800
801 /**
802 * Acquires the PDM lock.
803 *
804 * @returns VINF_SUCCESS on success.
805 * @returns Fatal error on failure.
806 * @param pDevIns The PCI device instance.
807 * @param rc Dummy for making the interface identical to the RC and R0 versions.
808 */
809 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
810
811 /**
812 * Releases the PDM lock.
813 *
814 * @param pDevIns The PCI device instance.
815 */
816 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
817
818 /** Just a safety precaution. */
819 uint32_t u32TheEnd;
820} PDMPCIHLPR3;
821/** Pointer to PCI helpers. */
822typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
823/** Pointer to const PCI helpers. */
824typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
825
826/** Current PDMPCIHLPR3 version number. */
827#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
828
829
830/**
831 * Programmable Interrupt Controller registration structure.
832 */
833typedef struct PDMPICREG
834{
835 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
836 uint32_t u32Version;
837
838 /**
839 * Set the an IRQ.
840 *
841 * @param pDevIns Device instance of the PIC.
842 * @param iIrq IRQ number to set.
843 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
844 * @param uTagSrc The IRQ tag and source (for tracing).
845 * @remarks Caller enters the PDM critical section.
846 */
847 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
848
849 /**
850 * Get a pending interrupt.
851 *
852 * @returns Pending interrupt number.
853 * @param pDevIns Device instance of the PIC.
854 * @param puTagSrc Where to return the IRQ tag and source.
855 * @remarks Caller enters the PDM critical section.
856 */
857 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
858
859 /** The name of the RC SetIrq entry point. */
860 const char *pszSetIrqRC;
861 /** The name of the RC GetInterrupt entry point. */
862 const char *pszGetInterruptRC;
863
864 /** The name of the R0 SetIrq entry point. */
865 const char *pszSetIrqR0;
866 /** The name of the R0 GetInterrupt entry point. */
867 const char *pszGetInterruptR0;
868} PDMPICREG;
869/** Pointer to a PIC registration structure. */
870typedef PDMPICREG *PPDMPICREG;
871
872/** Current PDMPICREG version number. */
873#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
874
875/**
876 * PIC RC helpers.
877 */
878typedef struct PDMPICHLPRC
879{
880 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
881 uint32_t u32Version;
882
883 /**
884 * Set the interrupt force action flag.
885 *
886 * @param pDevIns Device instance of the PIC.
887 */
888 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
889
890 /**
891 * Clear the interrupt force action flag.
892 *
893 * @param pDevIns Device instance of the PIC.
894 */
895 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
896
897 /**
898 * Acquires the PDM lock.
899 *
900 * @returns VINF_SUCCESS on success.
901 * @returns rc if we failed to acquire the lock.
902 * @param pDevIns The PIC device instance.
903 * @param rc What to return if we fail to acquire the lock.
904 */
905 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
906
907 /**
908 * Releases the PDM lock.
909 *
910 * @param pDevIns The PIC device instance.
911 */
912 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
913
914 /** Just a safety precaution. */
915 uint32_t u32TheEnd;
916} PDMPICHLPRC;
917
918/** Pointer to PIC RC helpers. */
919typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
920/** Pointer to const PIC RC helpers. */
921typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
922
923/** Current PDMPICHLPRC version number. */
924#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
925
926
927/**
928 * PIC R0 helpers.
929 */
930typedef struct PDMPICHLPR0
931{
932 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
933 uint32_t u32Version;
934
935 /**
936 * Set the interrupt force action flag.
937 *
938 * @param pDevIns Device instance of the PIC.
939 */
940 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
941
942 /**
943 * Clear the interrupt force action flag.
944 *
945 * @param pDevIns Device instance of the PIC.
946 */
947 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
948
949 /**
950 * Acquires the PDM lock.
951 *
952 * @returns VINF_SUCCESS on success.
953 * @returns rc if we failed to acquire the lock.
954 * @param pDevIns The PIC device instance.
955 * @param rc What to return if we fail to acquire the lock.
956 */
957 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
958
959 /**
960 * Releases the PDM lock.
961 *
962 * @param pDevIns The PCI device instance.
963 */
964 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
965
966 /** Just a safety precaution. */
967 uint32_t u32TheEnd;
968} PDMPICHLPR0;
969
970/** Pointer to PIC R0 helpers. */
971typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
972/** Pointer to const PIC R0 helpers. */
973typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
974
975/** Current PDMPICHLPR0 version number. */
976#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
977
978/**
979 * PIC R3 helpers.
980 */
981typedef struct PDMPICHLPR3
982{
983 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
984 uint32_t u32Version;
985
986 /**
987 * Set the interrupt force action flag.
988 *
989 * @param pDevIns Device instance of the PIC.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
992
993 /**
994 * Clear the interrupt force action flag.
995 *
996 * @param pDevIns Device instance of the PIC.
997 */
998 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
999
1000 /**
1001 * Acquires the PDM lock.
1002 *
1003 * @returns VINF_SUCCESS on success.
1004 * @returns Fatal error on failure.
1005 * @param pDevIns The PIC device instance.
1006 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1007 */
1008 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1009
1010 /**
1011 * Releases the PDM lock.
1012 *
1013 * @param pDevIns The PIC device instance.
1014 */
1015 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1016
1017 /**
1018 * Gets the address of the RC PIC helpers.
1019 *
1020 * This should be called at both construction and relocation time
1021 * to obtain the correct address of the RC helpers.
1022 *
1023 * @returns RC pointer to the PIC helpers.
1024 * @param pDevIns Device instance of the PIC.
1025 */
1026 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1027
1028 /**
1029 * Gets the address of the R0 PIC helpers.
1030 *
1031 * This should be called at both construction and relocation time
1032 * to obtain the correct address of the R0 helpers.
1033 *
1034 * @returns R0 pointer to the PIC helpers.
1035 * @param pDevIns Device instance of the PIC.
1036 */
1037 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1038
1039 /** Just a safety precaution. */
1040 uint32_t u32TheEnd;
1041} PDMPICHLPR3;
1042
1043/** Pointer to PIC R3 helpers. */
1044typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1045/** Pointer to const PIC R3 helpers. */
1046typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1047
1048/** Current PDMPICHLPR3 version number. */
1049#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1050
1051
1052
1053/**
1054 * Advanced Programmable Interrupt Controller registration structure.
1055 */
1056typedef struct PDMAPICREG
1057{
1058 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1059 uint32_t u32Version;
1060
1061 /**
1062 * Get a pending interrupt.
1063 *
1064 * @returns Pending interrupt number.
1065 * @param pDevIns Device instance of the APIC.
1066 * @param idCpu The VCPU Id.
1067 * @param puTagSrc Where to return the tag source.
1068 * @remarks Caller enters the PDM critical section
1069 */
1070 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1071
1072 /**
1073 * Check if the APIC has a pending interrupt/if a TPR change would active one
1074 *
1075 * @returns Pending interrupt yes/no
1076 * @param pDevIns Device instance of the APIC.
1077 * @param idCpu The VCPU Id.
1078 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1079 * (optional, can be NULL).
1080 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1081 * prior to calling this method.
1082 */
1083 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t *pu8PendingIrq));
1084
1085 /**
1086 * Set the APIC base.
1087 *
1088 * @param pDevIns Device instance of the APIC.
1089 * @param idCpu The VCPU Id.
1090 * @param u64Base The new base.
1091 * @remarks Caller enters the PDM critical section.
1092 */
1093 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1094
1095 /**
1096 * Get the APIC base.
1097 *
1098 * @returns Current base.
1099 * @param pDevIns Device instance of the APIC.
1100 * @param idCpu The VCPU Id.
1101 * @remarks Caller enters the PDM critical section.
1102 */
1103 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1104
1105 /**
1106 * Set the TPR (task priority register).
1107 *
1108 * @param pDevIns Device instance of the APIC.
1109 * @param idCpu The VCPU id.
1110 * @param u8TPR The new TPR.
1111 * @remarks Caller enters the PDM critical section.
1112 */
1113 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1114
1115 /**
1116 * Get the TPR (task priority register).
1117 *
1118 * @returns The current TPR.
1119 * @param pDevIns Device instance of the APIC.
1120 * @param idCpu VCPU id
1121 * @remarks Caller enters the PDM critical section.
1122 */
1123 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1124
1125 /**
1126 * Write to a MSR in APIC range.
1127 *
1128 * @returns VBox status code.
1129 * @param pDevIns Device instance of the APIC.
1130 * @param idCpu Target CPU.
1131 * @param u32Reg The MSR begin written to.
1132 * @param u64Value The value to write.
1133 *
1134 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1135 * calling this method.
1136 */
1137 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1138
1139 /**
1140 * Read from a MSR in APIC range.
1141 *
1142 * @returns VBox status code.
1143 * @param pDevIns Device instance of the APIC.
1144 * @param idCpu Target CPU.
1145 * @param u32Reg MSR to read.
1146 * @param pu64Value Where to return the read value.
1147 *
1148 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1149 * calling this method.
1150 */
1151 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1152
1153 /**
1154 * Private interface between the IOAPIC and APIC.
1155 *
1156 * This is a low-level, APIC/IOAPIC implementation specific interface which
1157 * is registered with PDM only because it makes life so much simpler right
1158 * now (GC bits). This is a bad bad hack! The correct way of doing this
1159 * would involve some way of querying GC interfaces and relocating them.
1160 * Perhaps doing some kind of device init in GC...
1161 *
1162 * @returns status code.
1163 * @param pDevIns Device instance of the APIC.
1164 * @param u8Dest See APIC implementation.
1165 * @param u8DestMode See APIC implementation.
1166 * @param u8DeliveryMode See APIC implementation.
1167 * @param iVector See APIC implementation.
1168 * @param u8Polarity See APIC implementation.
1169 * @param u8TriggerMode See APIC implementation.
1170 * @param uTagSrc The IRQ tag and source (for tracing).
1171 * @remarks Caller enters the PDM critical section
1172 */
1173 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1174 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1175
1176 /**
1177 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1178 *
1179 * Used for virtual wire mode when interrupts from the PIC are passed through
1180 * LAPIC.
1181 *
1182 * @returns status code.
1183 * @param pDevIns Device instance of the APIC.
1184 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1185 * @param u8Level The level.
1186 * @param uTagSrc The IRQ tag and source (for tracing).
1187 * @remarks Caller enters the PDM critical section
1188 */
1189 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1190
1191 /**
1192 * Get the APIC timer frequency (in Hz).
1193 *
1194 * @returns The frequency of the APIC timer.
1195 * @param pDevIns Device instance of the APIC.
1196 */
1197 DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3, (PPDMDEVINS pDevIns));
1198
1199 /** The name of the RC GetInterrupt entry point. */
1200 const char *pszGetInterruptRC;
1201 /** The name of the RC HasPendingIrq entry point. */
1202 const char *pszHasPendingIrqRC;
1203 /** The name of the RC SetBase entry point. */
1204 const char *pszSetBaseRC;
1205 /** The name of the RC GetBase entry point. */
1206 const char *pszGetBaseRC;
1207 /** The name of the RC SetTPR entry point. */
1208 const char *pszSetTPRRC;
1209 /** The name of the RC GetTPR entry point. */
1210 const char *pszGetTPRRC;
1211 /** The name of the RC WriteMSR entry point. */
1212 const char *pszWriteMSRRC;
1213 /** The name of the RC ReadMSR entry point. */
1214 const char *pszReadMSRRC;
1215 /** The name of the RC BusDeliver entry point. */
1216 const char *pszBusDeliverRC;
1217 /** The name of the RC LocalInterrupt entry point. */
1218 const char *pszLocalInterruptRC;
1219 /** The name of the RC GetTimerFreq entry point. */
1220 const char *pszGetTimerFreqRC;
1221
1222 /** The name of the R0 GetInterrupt entry point. */
1223 const char *pszGetInterruptR0;
1224 /** The name of the R0 HasPendingIrq entry point. */
1225 const char *pszHasPendingIrqR0;
1226 /** The name of the R0 SetBase entry point. */
1227 const char *pszSetBaseR0;
1228 /** The name of the R0 GetBase entry point. */
1229 const char *pszGetBaseR0;
1230 /** The name of the R0 SetTPR entry point. */
1231 const char *pszSetTPRR0;
1232 /** The name of the R0 GetTPR entry point. */
1233 const char *pszGetTPRR0;
1234 /** The name of the R0 WriteMSR entry point. */
1235 const char *pszWriteMSRR0;
1236 /** The name of the R0 ReadMSR entry point. */
1237 const char *pszReadMSRR0;
1238 /** The name of the R0 BusDeliver entry point. */
1239 const char *pszBusDeliverR0;
1240 /** The name of the R0 LocalInterrupt entry point. */
1241 const char *pszLocalInterruptR0;
1242 /** The name of the R0 GetTimerFreq entry point. */
1243 const char *pszGetTimerFreqR0;
1244} PDMAPICREG;
1245/** Pointer to an APIC registration structure. */
1246typedef PDMAPICREG *PPDMAPICREG;
1247
1248/** Current PDMAPICREG version number. */
1249#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1250
1251
1252/**
1253 * APIC version argument for pfnChangeFeature.
1254 */
1255typedef enum PDMAPICVERSION
1256{
1257 /** Invalid 0 entry. */
1258 PDMAPICVERSION_INVALID = 0,
1259 /** No APIC. */
1260 PDMAPICVERSION_NONE,
1261 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1262 PDMAPICVERSION_APIC,
1263 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1264 PDMAPICVERSION_X2APIC,
1265 /** The usual 32-bit paranoia. */
1266 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1267} PDMAPICVERSION;
1268
1269/**
1270 * APIC irq argument for SetInterruptFF.
1271 */
1272typedef enum PDMAPICIRQ
1273{
1274 /** Invalid 0 entry. */
1275 PDMAPICIRQ_INVALID = 0,
1276 /** Normal hardware interrupt. */
1277 PDMAPICIRQ_HARDWARE,
1278 /** NMI. */
1279 PDMAPICIRQ_NMI,
1280 /** SMI. */
1281 PDMAPICIRQ_SMI,
1282 /** ExtINT (HW interrupt via PIC). */
1283 PDMAPICIRQ_EXTINT,
1284 /** The usual 32-bit paranoia. */
1285 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1286} PDMAPICIRQ;
1287
1288
1289/**
1290 * APIC RC helpers.
1291 */
1292typedef struct PDMAPICHLPRC
1293{
1294 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1295 uint32_t u32Version;
1296
1297 /**
1298 * Set the interrupt force action flag.
1299 *
1300 * @param pDevIns Device instance of the APIC.
1301 * @param enmType IRQ type.
1302 * @param idCpu Virtual CPU to set flag upon.
1303 */
1304 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1305
1306 /**
1307 * Clear the interrupt force action flag.
1308 *
1309 * @param pDevIns Device instance of the APIC.
1310 * @param enmType IRQ type.
1311 * @param idCpu Virtual CPU to clear flag upon.
1312 */
1313 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1314
1315 /**
1316 * Calculates an IRQ tag for a timer, IPI or similar event.
1317 *
1318 * @returns The IRQ tag.
1319 * @param pDevIns Device instance of the APIC.
1320 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1321 */
1322 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1323
1324 /**
1325 * Modifies APIC-related bits in the CPUID feature mask.
1326 *
1327 * @param pDevIns Device instance of the APIC.
1328 * @param enmVersion Supported APIC version.
1329 */
1330 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1331
1332 /**
1333 * Acquires the PDM lock.
1334 *
1335 * @returns VINF_SUCCESS on success.
1336 * @returns rc if we failed to acquire the lock.
1337 * @param pDevIns The APIC device instance.
1338 * @param rc What to return if we fail to acquire the lock.
1339 */
1340 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1341
1342 /**
1343 * Releases the PDM lock.
1344 *
1345 * @param pDevIns The APIC device instance.
1346 */
1347 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1348
1349 /**
1350 * Get the virtual CPU id corresponding to the current EMT.
1351 *
1352 * @param pDevIns The APIC device instance.
1353 */
1354 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1355
1356 /** Just a safety precaution. */
1357 uint32_t u32TheEnd;
1358} PDMAPICHLPRC;
1359/** Pointer to APIC GC helpers. */
1360typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1361/** Pointer to const APIC helpers. */
1362typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1363
1364/** Current PDMAPICHLPRC version number. */
1365#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1366
1367
1368/**
1369 * APIC R0 helpers.
1370 */
1371typedef struct PDMAPICHLPR0
1372{
1373 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1374 uint32_t u32Version;
1375
1376 /**
1377 * Set the interrupt force action flag.
1378 *
1379 * @param pDevIns Device instance of the APIC.
1380 * @param enmType IRQ type.
1381 * @param idCpu Virtual CPU to set flag upon.
1382 */
1383 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1384
1385 /**
1386 * Clear the interrupt force action flag.
1387 *
1388 * @param pDevIns Device instance of the APIC.
1389 * @param enmType IRQ type.
1390 * @param idCpu Virtual CPU to clear flag upon.
1391 */
1392 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1393
1394 /**
1395 * Calculates an IRQ tag for a timer, IPI or similar event.
1396 *
1397 * @returns The IRQ tag.
1398 * @param pDevIns Device instance of the APIC.
1399 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1400 */
1401 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1402
1403 /**
1404 * Modifies APIC-related bits in the CPUID feature mask.
1405 *
1406 * @param pDevIns Device instance of the APIC.
1407 * @param enmVersion Supported APIC version.
1408 */
1409 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1410
1411 /**
1412 * Acquires the PDM lock.
1413 *
1414 * @returns VINF_SUCCESS on success.
1415 * @returns rc if we failed to acquire the lock.
1416 * @param pDevIns The APIC device instance.
1417 * @param rc What to return if we fail to acquire the lock.
1418 */
1419 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1420
1421 /**
1422 * Releases the PDM lock.
1423 *
1424 * @param pDevIns The APIC device instance.
1425 */
1426 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1427
1428 /**
1429 * Get the virtual CPU id corresponding to the current EMT.
1430 *
1431 * @param pDevIns The APIC device instance.
1432 */
1433 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1434
1435 /** Just a safety precaution. */
1436 uint32_t u32TheEnd;
1437} PDMAPICHLPR0;
1438/** Pointer to APIC GC helpers. */
1439typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1440/** Pointer to const APIC helpers. */
1441typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1442
1443/** Current PDMAPICHLPR0 version number. */
1444#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1445
1446/**
1447 * APIC R3 helpers.
1448 */
1449typedef struct PDMAPICHLPR3
1450{
1451 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1452 uint32_t u32Version;
1453
1454 /**
1455 * Set the interrupt force action flag.
1456 *
1457 * @param pDevIns Device instance of the APIC.
1458 * @param enmType IRQ type.
1459 * @param idCpu Virtual CPU to set flag upon.
1460 */
1461 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1462
1463 /**
1464 * Clear the interrupt force action flag.
1465 *
1466 * @param pDevIns Device instance of the APIC.
1467 * @param enmType IRQ type.
1468 * @param idCpu Virtual CPU to clear flag upon.
1469 */
1470 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1471
1472 /**
1473 * Calculates an IRQ tag for a timer, IPI or similar event.
1474 *
1475 * @returns The IRQ tag.
1476 * @param pDevIns Device instance of the APIC.
1477 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1478 */
1479 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1480
1481 /**
1482 * Modifies APIC-related bits in the CPUID feature mask.
1483 *
1484 * @param pDevIns Device instance of the APIC.
1485 * @param enmVersion Supported APIC version.
1486 */
1487 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1488
1489 /**
1490 * Get the virtual CPU id corresponding to the current EMT.
1491 *
1492 * @param pDevIns The APIC device instance.
1493 */
1494 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1495
1496 /**
1497 * Sends SIPI to given virtual CPU.
1498 *
1499 * @param pDevIns The APIC device instance.
1500 * @param idCpu Virtual CPU to perform SIPI on
1501 * @param iVector SIPI vector
1502 */
1503 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1504
1505 /**
1506 * Sends init IPI to given virtual CPU, should result in reset and
1507 * halting till SIPI.
1508 *
1509 * @param pDevIns The APIC device instance.
1510 * @param idCpu Virtual CPU to perform SIPI on
1511 */
1512 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1513
1514 /**
1515 * Gets the address of the RC APIC helpers.
1516 *
1517 * This should be called at both construction and relocation time
1518 * to obtain the correct address of the RC helpers.
1519 *
1520 * @returns GC pointer to the APIC helpers.
1521 * @param pDevIns Device instance of the APIC.
1522 */
1523 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1524
1525 /**
1526 * Gets the address of the R0 APIC helpers.
1527 *
1528 * This should be called at both construction and relocation time
1529 * to obtain the correct address of the R0 helpers.
1530 *
1531 * @returns R0 pointer to the APIC helpers.
1532 * @param pDevIns Device instance of the APIC.
1533 */
1534 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1535
1536 /**
1537 * Get the critical section used to synchronize the PICs, PCI and stuff.
1538 *
1539 * @returns Ring-3 pointer to the critical section.
1540 * @param pDevIns The APIC device instance.
1541 */
1542 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1543
1544 /**
1545 * Get the critical section used to synchronize the PICs, PCI and stuff.
1546 *
1547 * @returns Raw-mode context pointer to the critical section.
1548 * @param pDevIns The APIC device instance.
1549 */
1550 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1551
1552 /**
1553 * Get the critical section used to synchronize the PICs, PCI and stuff.
1554 *
1555 * @returns Ring-0 pointer to the critical section.
1556 * @param pDevIns The APIC device instance.
1557 */
1558 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1559
1560 /** Just a safety precaution. */
1561 uint32_t u32TheEnd;
1562} PDMAPICHLPR3;
1563/** Pointer to APIC helpers. */
1564typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1565/** Pointer to const APIC helpers. */
1566typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1567
1568/** Current PDMAPICHLP version number. */
1569#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1570
1571
1572/**
1573 * I/O APIC registration structure.
1574 */
1575typedef struct PDMIOAPICREG
1576{
1577 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1578 uint32_t u32Version;
1579
1580 /**
1581 * Set the an IRQ.
1582 *
1583 * @param pDevIns Device instance of the I/O APIC.
1584 * @param iIrq IRQ number to set.
1585 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1586 * @param uTagSrc The IRQ tag and source (for tracing).
1587 * @remarks Caller enters the PDM critical section
1588 */
1589 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1590
1591 /** The name of the RC SetIrq entry point. */
1592 const char *pszSetIrqRC;
1593
1594 /** The name of the R0 SetIrq entry point. */
1595 const char *pszSetIrqR0;
1596
1597 /**
1598 * Send a MSI.
1599 *
1600 * @param pDevIns Device instance of the I/O APIC.
1601 * @param GCPhys Request address.
1602 * @param uValue Request value.
1603 * @param uTagSrc The IRQ tag and source (for tracing).
1604 * @remarks Caller enters the PDM critical section
1605 */
1606 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1607
1608 /** The name of the RC SendMsi entry point. */
1609 const char *pszSendMsiRC;
1610
1611 /** The name of the R0 SendMsi entry point. */
1612 const char *pszSendMsiR0;
1613} PDMIOAPICREG;
1614/** Pointer to an APIC registration structure. */
1615typedef PDMIOAPICREG *PPDMIOAPICREG;
1616
1617/** Current PDMAPICREG version number. */
1618#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1619
1620
1621/**
1622 * IOAPIC RC helpers.
1623 */
1624typedef struct PDMIOAPICHLPRC
1625{
1626 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1627 uint32_t u32Version;
1628
1629 /**
1630 * Private interface between the IOAPIC and APIC.
1631 *
1632 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1633 *
1634 * @returns status code.
1635 * @param pDevIns Device instance of the IOAPIC.
1636 * @param u8Dest See APIC implementation.
1637 * @param u8DestMode See APIC implementation.
1638 * @param u8DeliveryMode See APIC implementation.
1639 * @param iVector See APIC implementation.
1640 * @param u8Polarity See APIC implementation.
1641 * @param u8TriggerMode See APIC implementation.
1642 * @param uTagSrc The IRQ tag and source (for tracing).
1643 */
1644 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1645 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1646
1647 /**
1648 * Acquires the PDM lock.
1649 *
1650 * @returns VINF_SUCCESS on success.
1651 * @returns rc if we failed to acquire the lock.
1652 * @param pDevIns The IOAPIC device instance.
1653 * @param rc What to return if we fail to acquire the lock.
1654 */
1655 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1656
1657 /**
1658 * Releases the PDM lock.
1659 *
1660 * @param pDevIns The IOAPIC device instance.
1661 */
1662 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1663
1664 /** Just a safety precaution. */
1665 uint32_t u32TheEnd;
1666} PDMIOAPICHLPRC;
1667/** Pointer to IOAPIC RC helpers. */
1668typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1669/** Pointer to const IOAPIC helpers. */
1670typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1671
1672/** Current PDMIOAPICHLPRC version number. */
1673#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1674
1675
1676/**
1677 * IOAPIC R0 helpers.
1678 */
1679typedef struct PDMIOAPICHLPR0
1680{
1681 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1682 uint32_t u32Version;
1683
1684 /**
1685 * Private interface between the IOAPIC and APIC.
1686 *
1687 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1688 *
1689 * @returns status code.
1690 * @param pDevIns Device instance of the IOAPIC.
1691 * @param u8Dest See APIC implementation.
1692 * @param u8DestMode See APIC implementation.
1693 * @param u8DeliveryMode See APIC implementation.
1694 * @param iVector See APIC implementation.
1695 * @param u8Polarity See APIC implementation.
1696 * @param u8TriggerMode See APIC implementation.
1697 * @param uTagSrc The IRQ tag and source (for tracing).
1698 */
1699 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1700 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1701
1702 /**
1703 * Acquires the PDM lock.
1704 *
1705 * @returns VINF_SUCCESS on success.
1706 * @returns rc if we failed to acquire the lock.
1707 * @param pDevIns The IOAPIC device instance.
1708 * @param rc What to return if we fail to acquire the lock.
1709 */
1710 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1711
1712 /**
1713 * Releases the PDM lock.
1714 *
1715 * @param pDevIns The IOAPIC device instance.
1716 */
1717 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1718
1719 /** Just a safety precaution. */
1720 uint32_t u32TheEnd;
1721} PDMIOAPICHLPR0;
1722/** Pointer to IOAPIC R0 helpers. */
1723typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1724/** Pointer to const IOAPIC helpers. */
1725typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1726
1727/** Current PDMIOAPICHLPR0 version number. */
1728#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1729
1730/**
1731 * IOAPIC R3 helpers.
1732 */
1733typedef struct PDMIOAPICHLPR3
1734{
1735 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1736 uint32_t u32Version;
1737
1738 /**
1739 * Private interface between the IOAPIC and APIC.
1740 *
1741 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1742 *
1743 * @returns status code
1744 * @param pDevIns Device instance of the IOAPIC.
1745 * @param u8Dest See APIC implementation.
1746 * @param u8DestMode See APIC implementation.
1747 * @param u8DeliveryMode See APIC implementation.
1748 * @param iVector See APIC implementation.
1749 * @param u8Polarity See APIC implementation.
1750 * @param u8TriggerMode See APIC implementation.
1751 * @param uTagSrc The IRQ tag and source (for tracing).
1752 */
1753 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1754 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1755
1756 /**
1757 * Acquires the PDM lock.
1758 *
1759 * @returns VINF_SUCCESS on success.
1760 * @returns Fatal error on failure.
1761 * @param pDevIns The IOAPIC device instance.
1762 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1763 */
1764 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1765
1766 /**
1767 * Releases the PDM lock.
1768 *
1769 * @param pDevIns The IOAPIC device instance.
1770 */
1771 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1772
1773 /**
1774 * Gets the address of the RC IOAPIC helpers.
1775 *
1776 * This should be called at both construction and relocation time
1777 * to obtain the correct address of the RC helpers.
1778 *
1779 * @returns RC pointer to the IOAPIC helpers.
1780 * @param pDevIns Device instance of the IOAPIC.
1781 */
1782 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1783
1784 /**
1785 * Gets the address of the R0 IOAPIC helpers.
1786 *
1787 * This should be called at both construction and relocation time
1788 * to obtain the correct address of the R0 helpers.
1789 *
1790 * @returns R0 pointer to the IOAPIC helpers.
1791 * @param pDevIns Device instance of the IOAPIC.
1792 */
1793 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1794
1795 /** Just a safety precaution. */
1796 uint32_t u32TheEnd;
1797} PDMIOAPICHLPR3;
1798/** Pointer to IOAPIC R3 helpers. */
1799typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1800/** Pointer to const IOAPIC helpers. */
1801typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1802
1803/** Current PDMIOAPICHLPR3 version number. */
1804#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1805
1806
1807/**
1808 * HPET registration structure.
1809 */
1810typedef struct PDMHPETREG
1811{
1812 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1813 uint32_t u32Version;
1814
1815} PDMHPETREG;
1816/** Pointer to an HPET registration structure. */
1817typedef PDMHPETREG *PPDMHPETREG;
1818
1819/** Current PDMHPETREG version number. */
1820#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1821
1822/**
1823 * HPET RC helpers.
1824 *
1825 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1826 * at some later point.
1827 */
1828typedef struct PDMHPETHLPRC
1829{
1830 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1831 uint32_t u32Version;
1832
1833 /** Just a safety precaution. */
1834 uint32_t u32TheEnd;
1835} PDMHPETHLPRC;
1836
1837/** Pointer to HPET RC helpers. */
1838typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1839/** Pointer to const HPET RC helpers. */
1840typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1841
1842/** Current PDMHPETHLPRC version number. */
1843#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1844
1845
1846/**
1847 * HPET R0 helpers.
1848 *
1849 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1850 * at some later point.
1851 */
1852typedef struct PDMHPETHLPR0
1853{
1854 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1855 uint32_t u32Version;
1856
1857 /** Just a safety precaution. */
1858 uint32_t u32TheEnd;
1859} PDMHPETHLPR0;
1860
1861/** Pointer to HPET R0 helpers. */
1862typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1863/** Pointer to const HPET R0 helpers. */
1864typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1865
1866/** Current PDMHPETHLPR0 version number. */
1867#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1868
1869/**
1870 * HPET R3 helpers.
1871 */
1872typedef struct PDMHPETHLPR3
1873{
1874 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1875 uint32_t u32Version;
1876
1877 /**
1878 * Gets the address of the RC HPET helpers.
1879 *
1880 * This should be called at both construction and relocation time
1881 * to obtain the correct address of the RC helpers.
1882 *
1883 * @returns RC pointer to the HPET helpers.
1884 * @param pDevIns Device instance of the HPET.
1885 */
1886 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1887
1888 /**
1889 * Gets the address of the R0 HPET helpers.
1890 *
1891 * This should be called at both construction and relocation time
1892 * to obtain the correct address of the R0 helpers.
1893 *
1894 * @returns R0 pointer to the HPET helpers.
1895 * @param pDevIns Device instance of the HPET.
1896 */
1897 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1898
1899 /**
1900 * Set legacy mode on PIT and RTC.
1901 *
1902 * @returns VINF_SUCCESS on success.
1903 * @returns rc if we failed to set legacy mode.
1904 * @param pDevIns Device instance of the HPET.
1905 * @param fActivated Whether legacy mode is activated or deactivated.
1906 */
1907 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1908
1909
1910 /**
1911 * Set IRQ, bypassing ISA bus override rules.
1912 *
1913 * @returns VINF_SUCCESS on success.
1914 * @returns rc if we failed to set legacy mode.
1915 * @param pDevIns Device instance of the HPET.
1916 * @param fActivate Activate or deactivate legacy mode.
1917 */
1918 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1919
1920 /** Just a safety precaution. */
1921 uint32_t u32TheEnd;
1922} PDMHPETHLPR3;
1923
1924/** Pointer to HPET R3 helpers. */
1925typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1926/** Pointer to const HPET R3 helpers. */
1927typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1928
1929/** Current PDMHPETHLPR3 version number. */
1930#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1931
1932
1933/**
1934 * Raw PCI device registration structure.
1935 */
1936typedef struct PDMPCIRAWREG
1937{
1938 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1939 uint32_t u32Version;
1940 /** Just a safety precaution. */
1941 uint32_t u32TheEnd;
1942} PDMPCIRAWREG;
1943/** Pointer to a raw PCI registration structure. */
1944typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1945
1946/** Current PDMPCIRAWREG version number. */
1947#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1948
1949/**
1950 * Raw PCI device raw-mode context helpers.
1951 */
1952typedef struct PDMPCIRAWHLPRC
1953{
1954 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1955 uint32_t u32Version;
1956 /** Just a safety precaution. */
1957 uint32_t u32TheEnd;
1958} PDMPCIRAWHLPRC;
1959/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1960typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1961/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1962typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1963
1964/** Current PDMPCIRAWHLPRC version number. */
1965#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1966
1967/**
1968 * Raw PCI device ring-0 context helpers.
1969 */
1970typedef struct PDMPCIRAWHLPR0
1971{
1972 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1973 uint32_t u32Version;
1974 /** Just a safety precaution. */
1975 uint32_t u32TheEnd;
1976} PDMPCIRAWHLPR0;
1977/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1978typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1979/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1980typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1981
1982/** Current PDMPCIRAWHLPR0 version number. */
1983#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1984
1985
1986/**
1987 * Raw PCI device ring-3 context helpers.
1988 */
1989typedef struct PDMPCIRAWHLPR3
1990{
1991 /** Undefined structure version and magic number. */
1992 uint32_t u32Version;
1993
1994 /**
1995 * Gets the address of the RC raw PCI device helpers.
1996 *
1997 * This should be called at both construction and relocation time to obtain
1998 * the correct address of the RC helpers.
1999 *
2000 * @returns RC pointer to the raw PCI device helpers.
2001 * @param pDevIns Device instance of the raw PCI device.
2002 */
2003 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2004
2005 /**
2006 * Gets the address of the R0 raw PCI device helpers.
2007 *
2008 * This should be called at both construction and relocation time to obtain
2009 * the correct address of the R0 helpers.
2010 *
2011 * @returns R0 pointer to the raw PCI device helpers.
2012 * @param pDevIns Device instance of the raw PCI device.
2013 */
2014 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2015
2016 /** Just a safety precaution. */
2017 uint32_t u32TheEnd;
2018} PDMPCIRAWHLPR3;
2019/** Pointer to raw PCI R3 helpers. */
2020typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2021/** Pointer to const raw PCI R3 helpers. */
2022typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2023
2024/** Current PDMPCIRAWHLPR3 version number. */
2025#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2026
2027
2028#ifdef IN_RING3
2029
2030/**
2031 * DMA Transfer Handler.
2032 *
2033 * @returns Number of bytes transferred.
2034 * @param pDevIns Device instance of the DMA.
2035 * @param pvUser User pointer.
2036 * @param uChannel Channel number.
2037 * @param off DMA position.
2038 * @param cb Block size.
2039 * @remarks The device lock is not taken, however, the DMA device lock is held.
2040 */
2041typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2042/** Pointer to a FNDMATRANSFERHANDLER(). */
2043typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2044
2045/**
2046 * DMA Controller registration structure.
2047 */
2048typedef struct PDMDMAREG
2049{
2050 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2051 uint32_t u32Version;
2052
2053 /**
2054 * Execute pending transfers.
2055 *
2056 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2057 * @param pDevIns Device instance of the DMAC.
2058 * @remarks No locks held, called on EMT(0) as a form of serialization.
2059 */
2060 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2061
2062 /**
2063 * Register transfer function for DMA channel.
2064 *
2065 * @param pDevIns Device instance of the DMAC.
2066 * @param uChannel Channel number.
2067 * @param pfnTransferHandler Device specific transfer function.
2068 * @param pvUSer User pointer to be passed to the callback.
2069 * @remarks No locks held, called on an EMT.
2070 */
2071 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2072
2073 /**
2074 * Read memory
2075 *
2076 * @returns Number of bytes read.
2077 * @param pDevIns Device instance of the DMAC.
2078 * @param pvBuffer Pointer to target buffer.
2079 * @param off DMA position.
2080 * @param cbBlock Block size.
2081 * @remarks No locks held, called on an EMT.
2082 */
2083 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2084
2085 /**
2086 * Write memory
2087 *
2088 * @returns Number of bytes written.
2089 * @param pDevIns Device instance of the DMAC.
2090 * @param pvBuffer Memory to write.
2091 * @param off DMA position.
2092 * @param cbBlock Block size.
2093 * @remarks No locks held, called on an EMT.
2094 */
2095 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2096
2097 /**
2098 * Set the DREQ line.
2099 *
2100 * @param pDevIns Device instance of the DMAC.
2101 * @param uChannel Channel number.
2102 * @param uLevel Level of the line.
2103 * @remarks No locks held, called on an EMT.
2104 */
2105 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2106
2107 /**
2108 * Get channel mode
2109 *
2110 * @returns Channel mode.
2111 * @param pDevIns Device instance of the DMAC.
2112 * @param uChannel Channel number.
2113 * @remarks No locks held, called on an EMT.
2114 */
2115 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2116
2117} PDMDMACREG;
2118/** Pointer to a DMAC registration structure. */
2119typedef PDMDMACREG *PPDMDMACREG;
2120
2121/** Current PDMDMACREG version number. */
2122#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2123
2124
2125/**
2126 * DMA Controller device helpers.
2127 */
2128typedef struct PDMDMACHLP
2129{
2130 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2131 uint32_t u32Version;
2132
2133 /* to-be-defined */
2134
2135} PDMDMACHLP;
2136/** Pointer to DMAC helpers. */
2137typedef PDMDMACHLP *PPDMDMACHLP;
2138/** Pointer to const DMAC helpers. */
2139typedef const PDMDMACHLP *PCPDMDMACHLP;
2140
2141/** Current PDMDMACHLP version number. */
2142#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2143
2144#endif /* IN_RING3 */
2145
2146
2147
2148/**
2149 * RTC registration structure.
2150 */
2151typedef struct PDMRTCREG
2152{
2153 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2154 uint32_t u32Version;
2155 uint32_t u32Alignment; /**< structure size alignment. */
2156
2157 /**
2158 * Write to a CMOS register and update the checksum if necessary.
2159 *
2160 * @returns VBox status code.
2161 * @param pDevIns Device instance of the RTC.
2162 * @param iReg The CMOS register index.
2163 * @param u8Value The CMOS register value.
2164 * @remarks Caller enters the device critical section.
2165 */
2166 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2167
2168 /**
2169 * Read a CMOS register.
2170 *
2171 * @returns VBox status code.
2172 * @param pDevIns Device instance of the RTC.
2173 * @param iReg The CMOS register index.
2174 * @param pu8Value Where to store the CMOS register value.
2175 * @remarks Caller enters the device critical section.
2176 */
2177 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2178
2179} PDMRTCREG;
2180/** Pointer to a RTC registration structure. */
2181typedef PDMRTCREG *PPDMRTCREG;
2182/** Pointer to a const RTC registration structure. */
2183typedef const PDMRTCREG *PCPDMRTCREG;
2184
2185/** Current PDMRTCREG version number. */
2186#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2187
2188
2189/**
2190 * RTC device helpers.
2191 */
2192typedef struct PDMRTCHLP
2193{
2194 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2195 uint32_t u32Version;
2196
2197 /* to-be-defined */
2198
2199} PDMRTCHLP;
2200/** Pointer to RTC helpers. */
2201typedef PDMRTCHLP *PPDMRTCHLP;
2202/** Pointer to const RTC helpers. */
2203typedef const PDMRTCHLP *PCPDMRTCHLP;
2204
2205/** Current PDMRTCHLP version number. */
2206#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2207
2208
2209
2210#ifdef IN_RING3
2211
2212/**
2213 * PDM Device API.
2214 */
2215typedef struct PDMDEVHLPR3
2216{
2217 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2218 uint32_t u32Version;
2219
2220 /**
2221 * Register a number of I/O ports with a device.
2222 *
2223 * These callbacks are of course for the host context (HC).
2224 * Register HC handlers before guest context (GC) handlers! There must be a
2225 * HC handler for every GC handler!
2226 *
2227 * @returns VBox status.
2228 * @param pDevIns The device instance to register the ports with.
2229 * @param Port First port number in the range.
2230 * @param cPorts Number of ports to register.
2231 * @param pvUser User argument.
2232 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2233 * @param pfnIn Pointer to function which is gonna handle IN operations.
2234 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2235 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2236 * @param pszDesc Pointer to description string. This must not be freed.
2237 * @remarks Caller enters the device critical section prior to invoking the
2238 * registered callback methods.
2239 */
2240 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2241 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2242 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2243
2244 /**
2245 * Register a number of I/O ports with a device for RC.
2246 *
2247 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2248 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2249 * for every RC handler!
2250 *
2251 * @returns VBox status.
2252 * @param pDevIns The device instance to register the ports with
2253 * and which RC module to resolve the names
2254 * against.
2255 * @param Port First port number in the range.
2256 * @param cPorts Number of ports to register.
2257 * @param pvUser User argument.
2258 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2259 * @param pszIn Name of the RC function which is gonna handle IN operations.
2260 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2261 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2262 * @param pszDesc Pointer to description string. This must not be freed.
2263 * @remarks Caller enters the device critical section prior to invoking the
2264 * registered callback methods.
2265 */
2266 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2267 const char *pszOut, const char *pszIn,
2268 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2269
2270 /**
2271 * Register a number of I/O ports with a device.
2272 *
2273 * These callbacks are of course for the ring-0 host context (R0).
2274 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2275 *
2276 * @returns VBox status.
2277 * @param pDevIns The device instance to register the ports with.
2278 * @param Port First port number in the range.
2279 * @param cPorts Number of ports to register.
2280 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2281 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2282 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2283 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2284 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2285 * @param pszDesc Pointer to description string. This must not be freed.
2286 * @remarks Caller enters the device critical section prior to invoking the
2287 * registered callback methods.
2288 */
2289 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2290 const char *pszOut, const char *pszIn,
2291 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2292
2293 /**
2294 * Deregister I/O ports.
2295 *
2296 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2297 *
2298 * @returns VBox status.
2299 * @param pDevIns The device instance owning the ports.
2300 * @param Port First port number in the range.
2301 * @param cPorts Number of ports to deregister.
2302 */
2303 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2304
2305 /**
2306 * Register a Memory Mapped I/O (MMIO) region.
2307 *
2308 * These callbacks are of course for the ring-3 context (R3). Register HC
2309 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2310 * must be a R3 handler for every RC and R0 handler!
2311 *
2312 * @returns VBox status.
2313 * @param pDevIns The device instance to register the MMIO with.
2314 * @param GCPhysStart First physical address in the range.
2315 * @param cbRange The size of the range (in bytes).
2316 * @param pvUser User argument.
2317 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2318 * @param pfnRead Pointer to function which is gonna handle Read operations.
2319 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2320 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2321 * @param pszDesc Pointer to description string. This must not be freed.
2322 * @remarks Caller enters the device critical section prior to invoking the
2323 * registered callback methods.
2324 */
2325 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2326 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2327 uint32_t fFlags, const char *pszDesc));
2328
2329 /**
2330 * Register a Memory Mapped I/O (MMIO) region for GC.
2331 *
2332 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2333 * (R3) handlers before guest context handlers! There must be a R3 handler for
2334 * every RC handler!
2335 *
2336 * @returns VBox status.
2337 * @param pDevIns The device instance to register the MMIO with.
2338 * @param GCPhysStart First physical address in the range.
2339 * @param cbRange The size of the range (in bytes).
2340 * @param pvUser User argument.
2341 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2342 * @param pszRead Name of the RC function which is gonna handle Read operations.
2343 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2344 * @remarks Caller enters the device critical section prior to invoking the
2345 * registered callback methods.
2346 */
2347 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2348 const char *pszWrite, const char *pszRead, const char *pszFill));
2349
2350 /**
2351 * Register a Memory Mapped I/O (MMIO) region for R0.
2352 *
2353 * These callbacks are for the ring-0 host context (R0). Register ring-3
2354 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2355 * every R0 handler!
2356 *
2357 * @returns VBox status.
2358 * @param pDevIns The device instance to register the MMIO with.
2359 * @param GCPhysStart First physical address in the range.
2360 * @param cbRange The size of the range (in bytes).
2361 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2362 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2363 * @param pszRead Name of the RC function which is gonna handle Read operations.
2364 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2365 * @param pszDesc Obsolete. NULL is fine.
2366 * @remarks Caller enters the device critical section prior to invoking the
2367 * registered callback methods.
2368 */
2369 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2370 const char *pszWrite, const char *pszRead, const char *pszFill));
2371
2372 /**
2373 * Deregister a Memory Mapped I/O (MMIO) region.
2374 *
2375 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2376 *
2377 * @returns VBox status.
2378 * @param pDevIns The device instance owning the MMIO region(s).
2379 * @param GCPhysStart First physical address in the range.
2380 * @param cbRange The size of the range (in bytes).
2381 */
2382 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2383
2384 /**
2385 * Allocate and register a MMIO2 region.
2386 *
2387 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2388 * RAM associated with a device. It is also non-shared memory with a
2389 * permanent ring-3 mapping and page backing (presently).
2390 *
2391 * @returns VBox status.
2392 * @param pDevIns The device instance.
2393 * @param iRegion The region number. Use the PCI region number as
2394 * this must be known to the PCI bus device too. If
2395 * it's not associated with the PCI device, then
2396 * any number up to UINT8_MAX is fine.
2397 * @param cb The size (in bytes) of the region.
2398 * @param fFlags Reserved for future use, must be zero.
2399 * @param ppv Where to store the address of the ring-3 mapping
2400 * of the memory.
2401 * @param pszDesc Pointer to description string. This must not be
2402 * freed.
2403 * @thread EMT.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2406
2407 /**
2408 * Deregisters and frees a MMIO2 region.
2409 *
2410 * Any physical (and virtual) access handlers registered for the region must
2411 * be deregistered before calling this function.
2412 *
2413 * @returns VBox status code.
2414 * @param pDevIns The device instance.
2415 * @param iRegion The region number used during registration.
2416 * @thread EMT.
2417 */
2418 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2419
2420 /**
2421 * Maps a MMIO2 region into the physical memory space.
2422 *
2423 * A MMIO2 range may overlap with base memory if a lot of RAM
2424 * is configured for the VM, in which case we'll drop the base
2425 * memory pages. Presently we will make no attempt to preserve
2426 * anything that happens to be present in the base memory that
2427 * is replaced, this is of course incorrect but it's too much
2428 * effort.
2429 *
2430 * @returns VBox status code.
2431 * @param pDevIns The device instance.
2432 * @param iRegion The region number used during registration.
2433 * @param GCPhys The physical address to map it at.
2434 * @thread EMT.
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2437
2438 /**
2439 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2440 *
2441 * @returns VBox status code.
2442 * @param pDevIns The device instance.
2443 * @param iRegion The region number used during registration.
2444 * @param GCPhys The physical address it's currently mapped at.
2445 * @thread EMT.
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2448
2449 /**
2450 * Maps a portion of an MMIO2 region into the hypervisor region.
2451 *
2452 * Callers of this API must never deregister the MMIO2 region before the
2453 * VM is powered off.
2454 *
2455 * @return VBox status code.
2456 * @param pDevIns The device owning the MMIO2 memory.
2457 * @param iRegion The region.
2458 * @param off The offset into the region. Will be rounded down
2459 * to closest page boundary.
2460 * @param cb The number of bytes to map. Will be rounded up
2461 * to the closest page boundary.
2462 * @param pszDesc Mapping description.
2463 * @param pRCPtr Where to store the RC address.
2464 */
2465 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2466 const char *pszDesc, PRTRCPTR pRCPtr));
2467
2468 /**
2469 * Maps a portion of an MMIO2 region into kernel space (host).
2470 *
2471 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2472 * or the VM is terminated.
2473 *
2474 * @return VBox status code.
2475 * @param pDevIns The device owning the MMIO2 memory.
2476 * @param iRegion The region.
2477 * @param off The offset into the region. Must be page
2478 * aligned.
2479 * @param cb The number of bytes to map. Must be page
2480 * aligned.
2481 * @param pszDesc Mapping description.
2482 * @param pR0Ptr Where to store the R0 address.
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2485 const char *pszDesc, PRTR0PTR pR0Ptr));
2486
2487 /**
2488 * Register a ROM (BIOS) region.
2489 *
2490 * It goes without saying that this is read-only memory. The memory region must be
2491 * in unassigned memory. I.e. from the top of the address space or on the PC in
2492 * the 0xa0000-0xfffff range.
2493 *
2494 * @returns VBox status.
2495 * @param pDevIns The device instance owning the ROM region.
2496 * @param GCPhysStart First physical address in the range.
2497 * Must be page aligned!
2498 * @param cbRange The size of the range (in bytes).
2499 * Must be page aligned!
2500 * @param pvBinary Pointer to the binary data backing the ROM image.
2501 * @param cbBinary The size of the binary pointer. This must
2502 * be equal or smaller than @a cbRange.
2503 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2504 * @param pszDesc Pointer to description string. This must not be freed.
2505 *
2506 * @remark There is no way to remove the rom, automatically on device cleanup or
2507 * manually from the device yet. At present I doubt we need such features...
2508 */
2509 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2510 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2511
2512 /**
2513 * Changes the protection of shadowed ROM mapping.
2514 *
2515 * This is intented for use by the system BIOS, chipset or device in question to
2516 * change the protection of shadowed ROM code after init and on reset.
2517 *
2518 * @param pDevIns The device instance.
2519 * @param GCPhysStart Where the mapping starts.
2520 * @param cbRange The size of the mapping.
2521 * @param enmProt The new protection type.
2522 */
2523 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2524
2525 /**
2526 * Register a save state data unit.
2527 *
2528 * @returns VBox status.
2529 * @param pDevIns The device instance.
2530 * @param pszName Data unit name.
2531 * @param uInstance The instance identifier of the data unit.
2532 * This must together with the name be unique.
2533 * @param uVersion Data layout version number.
2534 * @param cbGuess The approximate amount of data in the unit.
2535 * Only for progress indicators.
2536 * @param pszBefore Name of data unit which we should be put in
2537 * front of. Optional (NULL).
2538 *
2539 * @param pfnLivePrep Prepare live save callback, optional.
2540 * @param pfnLiveExec Execute live save callback, optional.
2541 * @param pfnLiveVote Vote live save callback, optional.
2542 *
2543 * @param pfnSavePrep Prepare save callback, optional.
2544 * @param pfnSaveExec Execute save callback, optional.
2545 * @param pfnSaveDone Done save callback, optional.
2546 *
2547 * @param pfnLoadPrep Prepare load callback, optional.
2548 * @param pfnLoadExec Execute load callback, optional.
2549 * @param pfnLoadDone Done load callback, optional.
2550 * @remarks Caller enters the device critical section prior to invoking the
2551 * registered callback methods.
2552 */
2553 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2554 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2555 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2556 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2557
2558 /**
2559 * Creates a timer.
2560 *
2561 * @returns VBox status.
2562 * @param pDevIns The device instance.
2563 * @param enmClock The clock to use on this timer.
2564 * @param pfnCallback Callback function.
2565 * @param pvUser User argument for the callback.
2566 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2567 * @param pszDesc Pointer to description string which must stay around
2568 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2569 * @param ppTimer Where to store the timer on success.
2570 * @remarks Caller enters the device critical section prior to invoking the
2571 * callback.
2572 */
2573 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2574
2575 /**
2576 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2577 *
2578 * @returns pTime.
2579 * @param pDevIns The device instance.
2580 * @param pTime Where to store the time.
2581 */
2582 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2583
2584 /**
2585 * Read physical memory.
2586 *
2587 * @returns VINF_SUCCESS (for now).
2588 * @param pDevIns The device instance.
2589 * @param GCPhys Physical address start reading from.
2590 * @param pvBuf Where to put the read bits.
2591 * @param cbRead How many bytes to read.
2592 * @thread Any thread, but the call may involve the emulation thread.
2593 */
2594 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2595
2596 /**
2597 * Write to physical memory.
2598 *
2599 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2600 * @param pDevIns The device instance.
2601 * @param GCPhys Physical address to write to.
2602 * @param pvBuf What to write.
2603 * @param cbWrite How many bytes to write.
2604 * @thread Any thread, but the call may involve the emulation thread.
2605 */
2606 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2607
2608 /**
2609 * Requests the mapping of a guest page into ring-3.
2610 *
2611 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2612 * release it.
2613 *
2614 * This API will assume your intention is to write to the page, and will
2615 * therefore replace shared and zero pages. If you do not intend to modify the
2616 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2617 *
2618 * @returns VBox status code.
2619 * @retval VINF_SUCCESS on success.
2620 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2621 * backing or if the page has any active access handlers. The caller
2622 * must fall back on using PGMR3PhysWriteExternal.
2623 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2624 *
2625 * @param pVM The VM handle.
2626 * @param GCPhys The guest physical address of the page that
2627 * should be mapped.
2628 * @param fFlags Flags reserved for future use, MBZ.
2629 * @param ppv Where to store the address corresponding to
2630 * GCPhys.
2631 * @param pLock Where to store the lock information that
2632 * pfnPhysReleasePageMappingLock needs.
2633 *
2634 * @remark Avoid calling this API from within critical sections (other than the
2635 * PGM one) because of the deadlock risk when we have to delegating the
2636 * task to an EMT.
2637 * @thread Any.
2638 */
2639 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2640
2641 /**
2642 * Requests the mapping of a guest page into ring-3, external threads.
2643 *
2644 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2645 * release it.
2646 *
2647 * @returns VBox status code.
2648 * @retval VINF_SUCCESS on success.
2649 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2650 * backing or if the page as an active ALL access handler. The caller
2651 * must fall back on using PGMPhysRead.
2652 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2653 *
2654 * @param pDevIns The device instance.
2655 * @param GCPhys The guest physical address of the page that
2656 * should be mapped.
2657 * @param fFlags Flags reserved for future use, MBZ.
2658 * @param ppv Where to store the address corresponding to
2659 * GCPhys.
2660 * @param pLock Where to store the lock information that
2661 * pfnPhysReleasePageMappingLock needs.
2662 *
2663 * @remark Avoid calling this API from within critical sections.
2664 * @thread Any.
2665 */
2666 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2667
2668 /**
2669 * Release the mapping of a guest page.
2670 *
2671 * This is the counter part of pfnPhysGCPhys2CCPtr and
2672 * pfnPhysGCPhys2CCPtrReadOnly.
2673 *
2674 * @param pDevIns The device instance.
2675 * @param pLock The lock structure initialized by the mapping
2676 * function.
2677 */
2678 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2679
2680 /**
2681 * Read guest physical memory by virtual address.
2682 *
2683 * @param pDevIns The device instance.
2684 * @param pvDst Where to put the read bits.
2685 * @param GCVirtSrc Guest virtual address to start reading from.
2686 * @param cb How many bytes to read.
2687 * @thread The emulation thread.
2688 */
2689 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2690
2691 /**
2692 * Write to guest physical memory by virtual address.
2693 *
2694 * @param pDevIns The device instance.
2695 * @param GCVirtDst Guest virtual address to write to.
2696 * @param pvSrc What to write.
2697 * @param cb How many bytes to write.
2698 * @thread The emulation thread.
2699 */
2700 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2701
2702 /**
2703 * Convert a guest virtual address to a guest physical address.
2704 *
2705 * @returns VBox status code.
2706 * @param pDevIns The device instance.
2707 * @param GCPtr Guest virtual address.
2708 * @param pGCPhys Where to store the GC physical address
2709 * corresponding to GCPtr.
2710 * @thread The emulation thread.
2711 * @remark Careful with page boundaries.
2712 */
2713 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2714
2715 /**
2716 * Allocate memory which is associated with current VM instance
2717 * and automatically freed on it's destruction.
2718 *
2719 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2720 * @param pDevIns The device instance.
2721 * @param cb Number of bytes to allocate.
2722 */
2723 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2724
2725 /**
2726 * Allocate memory which is associated with current VM instance
2727 * and automatically freed on it's destruction. The memory is ZEROed.
2728 *
2729 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2730 * @param pDevIns The device instance.
2731 * @param cb Number of bytes to allocate.
2732 */
2733 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2734
2735 /**
2736 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2737 *
2738 * @param pDevIns The device instance.
2739 * @param pv Pointer to the memory to free.
2740 */
2741 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2742
2743 /**
2744 * Gets the VM state.
2745 *
2746 * @returns VM state.
2747 * @param pDevIns The device instance.
2748 * @thread Any thread (just keep in mind that it's volatile info).
2749 */
2750 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2751
2752 /**
2753 * Checks if the VM was teleported and hasn't been fully resumed yet.
2754 *
2755 * @returns true / false.
2756 * @param pDevIns The device instance.
2757 * @thread Any thread.
2758 */
2759 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2760
2761 /**
2762 * Set the VM error message
2763 *
2764 * @returns rc.
2765 * @param pDevIns The device instance.
2766 * @param rc VBox status code.
2767 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2768 * @param pszFormat Error message format string.
2769 * @param ... Error message arguments.
2770 */
2771 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2772
2773 /**
2774 * Set the VM error message
2775 *
2776 * @returns rc.
2777 * @param pDevIns The device instance.
2778 * @param rc VBox status code.
2779 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2780 * @param pszFormat Error message format string.
2781 * @param va Error message arguments.
2782 */
2783 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2784
2785 /**
2786 * Set the VM runtime error message
2787 *
2788 * @returns VBox status code.
2789 * @param pDevIns The device instance.
2790 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2791 * @param pszErrorId Error ID string.
2792 * @param pszFormat Error message format string.
2793 * @param ... Error message arguments.
2794 */
2795 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2796
2797 /**
2798 * Set the VM runtime error message
2799 *
2800 * @returns VBox status code.
2801 * @param pDevIns The device instance.
2802 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2803 * @param pszErrorId Error ID string.
2804 * @param pszFormat Error message format string.
2805 * @param va Error message arguments.
2806 */
2807 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2808
2809 /**
2810 * Stops the VM and enters the debugger to look at the guest state.
2811 *
2812 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2813 * invoking this function directly.
2814 *
2815 * @returns VBox status code which must be passed up to the VMM.
2816 * @param pDevIns The device instance.
2817 * @param pszFile Filename of the assertion location.
2818 * @param iLine The linenumber of the assertion location.
2819 * @param pszFunction Function of the assertion location.
2820 * @param pszFormat Message. (optional)
2821 * @param args Message parameters.
2822 */
2823 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2824
2825 /**
2826 * Register a info handler with DBGF,
2827 *
2828 * @returns VBox status code.
2829 * @param pDevIns The device instance.
2830 * @param pszName The identifier of the info.
2831 * @param pszDesc The description of the info and any arguments
2832 * the handler may take.
2833 * @param pfnHandler The handler function to be called to display the
2834 * info.
2835 */
2836 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2837
2838 /**
2839 * Registers a set of registers for a device.
2840 *
2841 * The @a pvUser argument of the getter and setter callbacks will be
2842 * @a pDevIns. The register names will be prefixed by the device name followed
2843 * immediately by the instance number.
2844 *
2845 * @returns VBox status code.
2846 * @param pDevIns The device instance.
2847 * @param paRegisters The register descriptors.
2848 *
2849 * @remarks The device critical section is NOT entered prior to working the
2850 * callbacks registered via this helper!
2851 */
2852 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2853
2854 /**
2855 * Gets the trace buffer handle.
2856 *
2857 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2858 * really inteded for direct usage, thus no inline wrapper function.
2859 *
2860 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2861 * @param pDevIns The device instance.
2862 */
2863 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2864
2865 /**
2866 * Registers a statistics sample if statistics are enabled.
2867 *
2868 * @param pDevIns Device instance of the DMA.
2869 * @param pvSample Pointer to the sample.
2870 * @param enmType Sample type. This indicates what pvSample is
2871 * pointing at.
2872 * @param pszName Sample name. The name is on this form
2873 * "/<component>/<sample>". Further nesting is
2874 * possible.
2875 * @param enmUnit Sample unit.
2876 * @param pszDesc Sample description.
2877 */
2878 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2879
2880 /**
2881 * Same as pfnSTAMRegister except that the name is specified in a
2882 * RTStrPrintf like fashion.
2883 *
2884 * @returns VBox status.
2885 * @param pDevIns Device instance of the DMA.
2886 * @param pvSample Pointer to the sample.
2887 * @param enmType Sample type. This indicates what pvSample is
2888 * pointing at.
2889 * @param enmVisibility Visibility type specifying whether unused
2890 * statistics should be visible or not.
2891 * @param enmUnit Sample unit.
2892 * @param pszDesc Sample description.
2893 * @param pszName The sample name format string.
2894 * @param ... Arguments to the format string.
2895 */
2896 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2897 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2898
2899 /**
2900 * Same as pfnSTAMRegister except that the name is specified in a
2901 * RTStrPrintfV like fashion.
2902 *
2903 * @returns VBox status.
2904 * @param pDevIns Device instance of the DMA.
2905 * @param pvSample Pointer to the sample.
2906 * @param enmType Sample type. This indicates what pvSample is
2907 * pointing at.
2908 * @param enmVisibility Visibility type specifying whether unused
2909 * statistics should be visible or not.
2910 * @param enmUnit Sample unit.
2911 * @param pszDesc Sample description.
2912 * @param pszName The sample name format string.
2913 * @param args Arguments to the format string.
2914 */
2915 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2916 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2917
2918 /**
2919 * Registers the device with the default PCI bus.
2920 *
2921 * @returns VBox status code.
2922 * @param pDevIns The device instance.
2923 * @param pPciDev The PCI device structure.
2924 * Any PCI enabled device must keep this in it's instance data!
2925 * Fill in the PCI data config before registration, please.
2926 * @remark This is the simple interface, a Ex interface will be created if
2927 * more features are needed later.
2928 */
2929 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2930
2931 /**
2932 * Initialize MSI support in a PCI device.
2933 *
2934 * @returns VBox status code.
2935 * @param pDevIns The device instance.
2936 * @param pMsiReg MSI registartion structure.
2937 */
2938 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2939
2940 /**
2941 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2942 *
2943 * @returns VBox status code.
2944 * @param pDevIns The device instance.
2945 * @param iRegion The region number.
2946 * @param cbRegion Size of the region.
2947 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2948 * @param pfnCallback Callback for doing the mapping.
2949 * @remarks The callback will be invoked holding the PDM lock. The device lock
2950 * is NOT take because that is very likely be a lock order violation.
2951 */
2952 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2953 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2954
2955 /**
2956 * Register PCI configuration space read/write callbacks.
2957 *
2958 * @param pDevIns The device instance.
2959 * @param pPciDev The PCI device structure.
2960 * If NULL the default PCI device for this device instance is used.
2961 * @param pfnRead Pointer to the user defined PCI config read function.
2962 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2963 * PCI config read function. This way, user can decide when (and if)
2964 * to call default PCI config read function. Can be NULL.
2965 * @param pfnWrite Pointer to the user defined PCI config write function.
2966 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2967 * PCI config write function. This way, user can decide when (and if)
2968 * to call default PCI config write function. Can be NULL.
2969 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2970 * is NOT take because that is very likely be a lock order violation.
2971 * @thread EMT
2972 */
2973 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2974 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2975
2976 /**
2977 * Bus master physical memory read.
2978 *
2979 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2980 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2981 * @param pDevIns The device instance.
2982 * @param GCPhys Physical address start reading from.
2983 * @param pvBuf Where to put the read bits.
2984 * @param cbRead How many bytes to read.
2985 * @thread Any thread, but the call may involve the emulation thread.
2986 */
2987 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2988
2989 /**
2990 * Bus master physical memory write.
2991 *
2992 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2993 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2994 * @param pDevIns The device instance.
2995 * @param GCPhys Physical address to write to.
2996 * @param pvBuf What to write.
2997 * @param cbWrite How many bytes to write.
2998 * @thread Any thread, but the call may involve the emulation thread.
2999 */
3000 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3001
3002 /**
3003 * Set the IRQ for a PCI device.
3004 *
3005 * @param pDevIns The device instance.
3006 * @param iIrq IRQ number to set.
3007 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3008 * @thread Any thread, but will involve the emulation thread.
3009 */
3010 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3011
3012 /**
3013 * Set the IRQ for a PCI device, but don't wait for EMT to process
3014 * the request when not called from EMT.
3015 *
3016 * @param pDevIns The device instance.
3017 * @param iIrq IRQ number to set.
3018 * @param iLevel IRQ level.
3019 * @thread Any thread, but will involve the emulation thread.
3020 */
3021 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3022
3023 /**
3024 * Set ISA IRQ for a device.
3025 *
3026 * @param pDevIns The device instance.
3027 * @param iIrq IRQ number to set.
3028 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3029 * @thread Any thread, but will involve the emulation thread.
3030 */
3031 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3032
3033 /**
3034 * Set the ISA IRQ for a device, but don't wait for EMT to process
3035 * the request when not called from EMT.
3036 *
3037 * @param pDevIns The device instance.
3038 * @param iIrq IRQ number to set.
3039 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3040 * @thread Any thread, but will involve the emulation thread.
3041 */
3042 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3043
3044 /**
3045 * Attaches a driver (chain) to the device.
3046 *
3047 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3048 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3049 *
3050 * @returns VBox status code.
3051 * @param pDevIns The device instance.
3052 * @param iLun The logical unit to attach.
3053 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3054 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3055 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3056 * for the live of the device instance.
3057 */
3058 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3059 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3060
3061 /**
3062 * Create a queue.
3063 *
3064 * @returns VBox status code.
3065 * @param pDevIns The device instance.
3066 * @param cbItem The size of a queue item.
3067 * @param cItems The number of items in the queue.
3068 * @param cMilliesInterval The number of milliseconds between polling the queue.
3069 * If 0 then the emulation thread will be notified whenever an item arrives.
3070 * @param pfnCallback The consumer function.
3071 * @param fRZEnabled Set if the queue should work in RC and R0.
3072 * @param pszName The queue base name. The instance number will be
3073 * appended automatically.
3074 * @param ppQueue Where to store the queue handle on success.
3075 * @thread The emulation thread.
3076 * @remarks The device critical section will NOT be entered before calling the
3077 * callback. No locks will be held, but for now it's safe to assume
3078 * that only one EMT will do queue callbacks at any one time.
3079 */
3080 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3081 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3082
3083 /**
3084 * Initializes a PDM critical section.
3085 *
3086 * The PDM critical sections are derived from the IPRT critical sections, but
3087 * works in RC and R0 as well.
3088 *
3089 * @returns VBox status code.
3090 * @param pDevIns The device instance.
3091 * @param pCritSect Pointer to the critical section.
3092 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3093 * @param pszNameFmt Format string for naming the critical section.
3094 * For statistics and lock validation.
3095 * @param va Arguments for the format string.
3096 */
3097 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3098 const char *pszNameFmt, va_list va));
3099
3100 /**
3101 * Gets the NOP critical section.
3102 *
3103 * @returns The ring-3 address of the NOP critical section.
3104 * @param pDevIns The device instance.
3105 */
3106 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3107
3108 /**
3109 * Gets the NOP critical section.
3110 *
3111 * @returns The ring-0 address of the NOP critical section.
3112 * @param pDevIns The device instance.
3113 */
3114 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3115
3116 /**
3117 * Gets the NOP critical section.
3118 *
3119 * @returns The raw-mode context address of the NOP critical section.
3120 * @param pDevIns The device instance.
3121 */
3122 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3123
3124 /**
3125 * Changes the device level critical section from the automatically created
3126 * default to one desired by the device constructor.
3127 *
3128 * @returns VBox status code.
3129 * @param pDevIns The device instance.
3130 * @param pCritSect The critical section to use. NULL is not
3131 * valid, instead use the NOP critical
3132 * section.
3133 */
3134 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3135
3136 /**
3137 * Creates a PDM thread.
3138 *
3139 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3140 * resuming, and destroying the thread as the VM state changes.
3141 *
3142 * @returns VBox status code.
3143 * @param pDevIns The device instance.
3144 * @param ppThread Where to store the thread 'handle'.
3145 * @param pvUser The user argument to the thread function.
3146 * @param pfnThread The thread function.
3147 * @param pfnWakeup The wakup callback. This is called on the EMT
3148 * thread when a state change is pending.
3149 * @param cbStack See RTThreadCreate.
3150 * @param enmType See RTThreadCreate.
3151 * @param pszName See RTThreadCreate.
3152 * @remarks The device critical section will NOT be entered prior to invoking
3153 * the function pointers.
3154 */
3155 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3156 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3157
3158 /**
3159 * Set up asynchronous handling of a suspend, reset or power off notification.
3160 *
3161 * This shall only be called when getting the notification. It must be called
3162 * for each one.
3163 *
3164 * @returns VBox status code.
3165 * @param pDevIns The device instance.
3166 * @param pfnAsyncNotify The callback.
3167 * @thread EMT(0)
3168 * @remarks The caller will enter the device critical section prior to invoking
3169 * the callback.
3170 */
3171 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3172
3173 /**
3174 * Notify EMT(0) that the device has completed the asynchronous notification
3175 * handling.
3176 *
3177 * This can be called at any time, spurious calls will simply be ignored.
3178 *
3179 * @param pDevIns The device instance.
3180 * @thread Any
3181 */
3182 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3183
3184 /**
3185 * Register the RTC device.
3186 *
3187 * @returns VBox status code.
3188 * @param pDevIns The device instance.
3189 * @param pRtcReg Pointer to a RTC registration structure.
3190 * @param ppRtcHlp Where to store the pointer to the helper
3191 * functions.
3192 */
3193 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3194
3195 /**
3196 * Register the PCI Bus.
3197 *
3198 * @returns VBox status code.
3199 * @param pDevIns The device instance.
3200 * @param pPciBusReg Pointer to PCI bus registration structure.
3201 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3202 * helpers.
3203 */
3204 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3205
3206 /**
3207 * Register the PIC device.
3208 *
3209 * @returns VBox status code.
3210 * @param pDevIns The device instance.
3211 * @param pPicReg Pointer to a PIC registration structure.
3212 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3213 * helpers.
3214 */
3215 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3216
3217 /**
3218 * Register the APIC device.
3219 *
3220 * @returns VBox status code.
3221 * @param pDevIns The device instance.
3222 * @param pApicReg Pointer to a APIC registration structure.
3223 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3224 */
3225 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3226
3227 /**
3228 * Register the I/O APIC device.
3229 *
3230 * @returns VBox status code.
3231 * @param pDevIns The device instance.
3232 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3233 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3234 * helpers.
3235 */
3236 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3237
3238 /**
3239 * Register the HPET device.
3240 *
3241 * @returns VBox status code.
3242 * @param pDevIns The device instance.
3243 * @param pHpetReg Pointer to a HPET registration structure.
3244 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3245 * helpers.
3246 */
3247 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3248
3249 /**
3250 * Register a raw PCI device.
3251 *
3252 * @returns VBox status code.
3253 * @param pDevIns The device instance.
3254 * @param pHpetReg Pointer to a raw PCI registration structure.
3255 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3256 * device helpers.
3257 */
3258 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3259
3260 /**
3261 * Register the DMA device.
3262 *
3263 * @returns VBox status code.
3264 * @param pDevIns The device instance.
3265 * @param pDmacReg Pointer to a DMAC registration structure.
3266 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3267 */
3268 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3269
3270 /**
3271 * Register transfer function for DMA channel.
3272 *
3273 * @returns VBox status code.
3274 * @param pDevIns The device instance.
3275 * @param uChannel Channel number.
3276 * @param pfnTransferHandler Device specific transfer callback function.
3277 * @param pvUser User pointer to pass to the callback.
3278 * @thread EMT
3279 */
3280 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3281
3282 /**
3283 * Read memory.
3284 *
3285 * @returns VBox status code.
3286 * @param pDevIns The device instance.
3287 * @param uChannel Channel number.
3288 * @param pvBuffer Pointer to target buffer.
3289 * @param off DMA position.
3290 * @param cbBlock Block size.
3291 * @param pcbRead Where to store the number of bytes which was
3292 * read. optional.
3293 * @thread EMT
3294 */
3295 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3296
3297 /**
3298 * Write memory.
3299 *
3300 * @returns VBox status code.
3301 * @param pDevIns The device instance.
3302 * @param uChannel Channel number.
3303 * @param pvBuffer Memory to write.
3304 * @param off DMA position.
3305 * @param cbBlock Block size.
3306 * @param pcbWritten Where to store the number of bytes which was
3307 * written. optional.
3308 * @thread EMT
3309 */
3310 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3311
3312 /**
3313 * Set the DREQ line.
3314 *
3315 * @returns VBox status code.
3316 * @param pDevIns Device instance.
3317 * @param uChannel Channel number.
3318 * @param uLevel Level of the line.
3319 * @thread EMT
3320 */
3321 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3322
3323 /**
3324 * Get channel mode.
3325 *
3326 * @returns Channel mode. See specs.
3327 * @param pDevIns The device instance.
3328 * @param uChannel Channel number.
3329 * @thread EMT
3330 */
3331 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3332
3333 /**
3334 * Schedule DMA execution.
3335 *
3336 * @param pDevIns The device instance.
3337 * @thread Any thread.
3338 */
3339 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3340
3341 /**
3342 * Write CMOS value and update the checksum(s).
3343 *
3344 * @returns VBox status code.
3345 * @param pDevIns The device instance.
3346 * @param iReg The CMOS register index.
3347 * @param u8Value The CMOS register value.
3348 * @thread EMT
3349 */
3350 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3351
3352 /**
3353 * Read CMOS value.
3354 *
3355 * @returns VBox status code.
3356 * @param pDevIns The device instance.
3357 * @param iReg The CMOS register index.
3358 * @param pu8Value Where to store the CMOS register value.
3359 * @thread EMT
3360 */
3361 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3362
3363 /**
3364 * Assert that the current thread is the emulation thread.
3365 *
3366 * @returns True if correct.
3367 * @returns False if wrong.
3368 * @param pDevIns The device instance.
3369 * @param pszFile Filename of the assertion location.
3370 * @param iLine The linenumber of the assertion location.
3371 * @param pszFunction Function of the assertion location.
3372 */
3373 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3374
3375 /**
3376 * Assert that the current thread is NOT the emulation thread.
3377 *
3378 * @returns True if correct.
3379 * @returns False if wrong.
3380 * @param pDevIns The device instance.
3381 * @param pszFile Filename of the assertion location.
3382 * @param iLine The linenumber of the assertion location.
3383 * @param pszFunction Function of the assertion location.
3384 */
3385 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3386
3387 /**
3388 * Resolves the symbol for a raw-mode context interface.
3389 *
3390 * @returns VBox status code.
3391 * @param pDevIns The device instance.
3392 * @param pvInterface The interface structure.
3393 * @param cbInterface The size of the interface structure.
3394 * @param pszSymPrefix What to prefix the symbols in the list with
3395 * before resolving them. This must start with
3396 * 'dev' and contain the driver name.
3397 * @param pszSymList List of symbols corresponding to the interface.
3398 * There is generally a there is generally a define
3399 * holding this list associated with the interface
3400 * definition (INTERFACE_SYM_LIST). For more
3401 * details see PDMR3LdrGetInterfaceSymbols.
3402 * @thread EMT
3403 */
3404 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3405 const char *pszSymPrefix, const char *pszSymList));
3406
3407 /**
3408 * Resolves the symbol for a ring-0 context interface.
3409 *
3410 * @returns VBox status code.
3411 * @param pDevIns The device instance.
3412 * @param pvInterface The interface structure.
3413 * @param cbInterface The size of the interface structure.
3414 * @param pszSymPrefix What to prefix the symbols in the list with
3415 * before resolving them. This must start with
3416 * 'dev' and contain the driver name.
3417 * @param pszSymList List of symbols corresponding to the interface.
3418 * There is generally a there is generally a define
3419 * holding this list associated with the interface
3420 * definition (INTERFACE_SYM_LIST). For more
3421 * details see PDMR3LdrGetInterfaceSymbols.
3422 * @thread EMT
3423 */
3424 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3425 const char *pszSymPrefix, const char *pszSymList));
3426
3427 /**
3428 * Call the ring-0 request handler routine of the device.
3429 *
3430 * For this to work, the device must be ring-0 enabled and export a request
3431 * handler function. The name of the function must be the device name in
3432 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3433 * 'ReqHandler'. The device name will be captialized. It shall take the
3434 * exact same arguments as this function and be declared using
3435 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3436 *
3437 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3438 * or two as the handler address will be resolved on each invocation. This
3439 * is the reason for the EMT only restriction as well.
3440 *
3441 * @returns VBox status code.
3442 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3443 * handler function.
3444 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3445 *
3446 * @param pDevIns The device instance.
3447 * @param uOperation The operation to perform.
3448 * @param u64Arg 64-bit integer argument.
3449 * @thread EMT
3450 */
3451 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3452
3453 /**
3454 * Gets the reason for the most recent VM suspend.
3455 *
3456 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3457 * suspend has been made or if the pDevIns is invalid.
3458 * @param pDevIns The device instance.
3459 */
3460 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3461
3462 /**
3463 * Gets the reason for the most recent VM resume.
3464 *
3465 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3466 * resume has been made or if the pDevIns is invalid.
3467 * @param pDevIns The device instance.
3468 */
3469 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3470
3471
3472 /** Space reserved for future members.
3473 * @{ */
3474 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3475 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3476 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3477 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3478 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3479 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3480 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3481 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3482 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3483 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3484 /** @} */
3485
3486
3487 /** API available to trusted devices only.
3488 *
3489 * These APIs are providing unrestricted access to the guest and the VM,
3490 * or they are interacting intimately with PDM.
3491 *
3492 * @{
3493 */
3494
3495 /**
3496 * Gets the user mode VM handle. Restricted API.
3497 *
3498 * @returns User mode VM Handle.
3499 * @param pDevIns The device instance.
3500 */
3501 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3502
3503 /**
3504 * Gets the global VM handle. Restricted API.
3505 *
3506 * @returns VM Handle.
3507 * @param pDevIns The device instance.
3508 */
3509 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3510
3511 /**
3512 * Gets the VMCPU handle. Restricted API.
3513 *
3514 * @returns VMCPU Handle.
3515 * @param pDevIns The device instance.
3516 */
3517 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3518
3519 /**
3520 * The the VM CPU ID of the current thread (restricted API).
3521 *
3522 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3523 * @param pDevIns The device instance.
3524 */
3525 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3526
3527 /**
3528 * Registers the VMM device heap
3529 *
3530 * @returns VBox status code.
3531 * @param pDevIns The device instance.
3532 * @param GCPhys The physical address.
3533 * @param pvHeap Ring 3 heap pointer.
3534 * @param cbSize Size of the heap.
3535 * @thread EMT.
3536 */
3537 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3538
3539 /**
3540 * Unregisters the VMM device heap
3541 *
3542 * @returns VBox status code.
3543 * @param pDevIns The device instance.
3544 * @param GCPhys The physical address.
3545 * @thread EMT.
3546 */
3547 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3548
3549 /**
3550 * Resets the VM.
3551 *
3552 * @returns The appropriate VBox status code to pass around on reset.
3553 * @param pDevIns The device instance.
3554 * @thread The emulation thread.
3555 */
3556 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3557
3558 /**
3559 * Suspends the VM.
3560 *
3561 * @returns The appropriate VBox status code to pass around on suspend.
3562 * @param pDevIns The device instance.
3563 * @thread The emulation thread.
3564 */
3565 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3566
3567 /**
3568 * Suspends, saves and powers off the VM.
3569 *
3570 * @returns The appropriate VBox status code to pass around.
3571 * @param pDevIns The device instance.
3572 * @thread An emulation thread.
3573 */
3574 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3575
3576 /**
3577 * Power off the VM.
3578 *
3579 * @returns The appropriate VBox status code to pass around on power off.
3580 * @param pDevIns The device instance.
3581 * @thread The emulation thread.
3582 */
3583 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3584
3585 /**
3586 * Checks if the Gate A20 is enabled or not.
3587 *
3588 * @returns true if A20 is enabled.
3589 * @returns false if A20 is disabled.
3590 * @param pDevIns The device instance.
3591 * @thread The emulation thread.
3592 */
3593 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3594
3595 /**
3596 * Enables or disables the Gate A20.
3597 *
3598 * @param pDevIns The device instance.
3599 * @param fEnable Set this flag to enable the Gate A20; clear it
3600 * to disable.
3601 * @thread The emulation thread.
3602 */
3603 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3604
3605 /**
3606 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3607 * thread.
3608 *
3609 * @param pDevIns The device instance.
3610 * @param iLeaf The CPUID leaf to get.
3611 * @param pEax Where to store the EAX value.
3612 * @param pEbx Where to store the EBX value.
3613 * @param pEcx Where to store the ECX value.
3614 * @param pEdx Where to store the EDX value.
3615 * @thread EMT.
3616 */
3617 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3618
3619 /**
3620 * Get the current virtual clock time in a VM. The clock frequency must be
3621 * queried separately.
3622 *
3623 * @returns Current clock time.
3624 * @param pDevIns The device instance.
3625 */
3626 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3627
3628 /**
3629 * Get the frequency of the virtual clock.
3630 *
3631 * @returns The clock frequency (not variable at run-time).
3632 * @param pDevIns The device instance.
3633 */
3634 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3635
3636 /**
3637 * Get the current virtual clock time in a VM, in nanoseconds.
3638 *
3639 * @returns Current clock time (in ns).
3640 * @param pDevIns The device instance.
3641 */
3642 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3643
3644 /**
3645 * Gets the support driver session.
3646 *
3647 * This is intended for working with the semaphore API.
3648 *
3649 * @returns Support driver session handle.
3650 * @param pDrvIns The driver instance.
3651 */
3652 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3653
3654 /** @} */
3655
3656 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3657 uint32_t u32TheEnd;
3658} PDMDEVHLPR3;
3659#endif /* !IN_RING3 */
3660/** Pointer to the R3 PDM Device API. */
3661typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3662/** Pointer to the R3 PDM Device API, const variant. */
3663typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3664
3665/** Current PDMDEVHLPR3 version number. */
3666#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 14, 1)
3667
3668
3669/**
3670 * PDM Device API - RC Variant.
3671 */
3672typedef struct PDMDEVHLPRC
3673{
3674 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3675 uint32_t u32Version;
3676
3677 /**
3678 * Bus master physical memory read.
3679 *
3680 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3681 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3682 * @param pDevIns The device instance.
3683 * @param GCPhys Physical address start reading from.
3684 * @param pvBuf Where to put the read bits.
3685 * @param cbRead How many bytes to read.
3686 * @thread Any thread, but the call may involve the emulation thread.
3687 */
3688 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3689
3690 /**
3691 * Bus master physical memory write.
3692 *
3693 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3694 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3695 * @param pDevIns The device instance.
3696 * @param GCPhys Physical address to write to.
3697 * @param pvBuf What to write.
3698 * @param cbWrite How many bytes to write.
3699 * @thread Any thread, but the call may involve the emulation thread.
3700 */
3701 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3702
3703 /**
3704 * Set the IRQ for a PCI device.
3705 *
3706 * @param pDevIns Device instance.
3707 * @param iIrq IRQ number to set.
3708 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3709 * @thread Any thread, but will involve the emulation thread.
3710 */
3711 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3712
3713 /**
3714 * Set ISA IRQ for a device.
3715 *
3716 * @param pDevIns Device instance.
3717 * @param iIrq IRQ number to set.
3718 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3719 * @thread Any thread, but will involve the emulation thread.
3720 */
3721 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3722
3723 /**
3724 * Read physical memory.
3725 *
3726 * @returns VINF_SUCCESS (for now).
3727 * @param pDevIns Device instance.
3728 * @param GCPhys Physical address start reading from.
3729 * @param pvBuf Where to put the read bits.
3730 * @param cbRead How many bytes to read.
3731 */
3732 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3733
3734 /**
3735 * Write to physical memory.
3736 *
3737 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3738 * @param pDevIns Device instance.
3739 * @param GCPhys Physical address to write to.
3740 * @param pvBuf What to write.
3741 * @param cbWrite How many bytes to write.
3742 */
3743 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3744
3745 /**
3746 * Checks if the Gate A20 is enabled or not.
3747 *
3748 * @returns true if A20 is enabled.
3749 * @returns false if A20 is disabled.
3750 * @param pDevIns Device instance.
3751 * @thread The emulation thread.
3752 */
3753 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3754
3755 /**
3756 * Gets the VM state.
3757 *
3758 * @returns VM state.
3759 * @param pDevIns The device instance.
3760 * @thread Any thread (just keep in mind that it's volatile info).
3761 */
3762 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3763
3764 /**
3765 * Set the VM error message
3766 *
3767 * @returns rc.
3768 * @param pDrvIns Driver instance.
3769 * @param rc VBox status code.
3770 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3771 * @param pszFormat Error message format string.
3772 * @param ... Error message arguments.
3773 */
3774 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3775
3776 /**
3777 * Set the VM error message
3778 *
3779 * @returns rc.
3780 * @param pDrvIns Driver instance.
3781 * @param rc VBox status code.
3782 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3783 * @param pszFormat Error message format string.
3784 * @param va Error message arguments.
3785 */
3786 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3787
3788 /**
3789 * Set the VM runtime error message
3790 *
3791 * @returns VBox status code.
3792 * @param pDevIns Device instance.
3793 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3794 * @param pszErrorId Error ID string.
3795 * @param pszFormat Error message format string.
3796 * @param ... Error message arguments.
3797 */
3798 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3799
3800 /**
3801 * Set the VM runtime error message
3802 *
3803 * @returns VBox status code.
3804 * @param pDevIns Device instance.
3805 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3806 * @param pszErrorId Error ID string.
3807 * @param pszFormat Error message format string.
3808 * @param va Error message arguments.
3809 */
3810 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3811
3812 /**
3813 * Set parameters for pending MMIO patch operation
3814 *
3815 * @returns VBox status code.
3816 * @param pDevIns Device instance.
3817 * @param GCPhys MMIO physical address
3818 * @param pCachedData GC pointer to cached data
3819 */
3820 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3821
3822 /**
3823 * Gets the VM handle. Restricted API.
3824 *
3825 * @returns VM Handle.
3826 * @param pDevIns Device instance.
3827 */
3828 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3829
3830 /**
3831 * Gets the VMCPU handle. Restricted API.
3832 *
3833 * @returns VMCPU Handle.
3834 * @param pDevIns The device instance.
3835 */
3836 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3837
3838 /**
3839 * The the VM CPU ID of the current thread (restricted API).
3840 *
3841 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3842 * @param pDevIns The device instance.
3843 */
3844 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3845
3846 /**
3847 * Get the current virtual clock time in a VM. The clock frequency must be
3848 * queried separately.
3849 *
3850 * @returns Current clock time.
3851 * @param pDevIns The device instance.
3852 */
3853 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3854
3855 /**
3856 * Get the frequency of the virtual clock.
3857 *
3858 * @returns The clock frequency (not variable at run-time).
3859 * @param pDevIns The device instance.
3860 */
3861 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3862
3863 /**
3864 * Get the current virtual clock time in a VM, in nanoseconds.
3865 *
3866 * @returns Current clock time (in ns).
3867 * @param pDevIns The device instance.
3868 */
3869 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3870
3871 /**
3872 * Gets the trace buffer handle.
3873 *
3874 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3875 * really inteded for direct usage, thus no inline wrapper function.
3876 *
3877 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3878 * @param pDevIns The device instance.
3879 */
3880 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3881
3882 /** Just a safety precaution. */
3883 uint32_t u32TheEnd;
3884} PDMDEVHLPRC;
3885/** Pointer PDM Device RC API. */
3886typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3887/** Pointer PDM Device RC API. */
3888typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3889
3890/** Current PDMDEVHLP version number. */
3891#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 4, 1)
3892
3893
3894/**
3895 * PDM Device API - R0 Variant.
3896 */
3897typedef struct PDMDEVHLPR0
3898{
3899 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3900 uint32_t u32Version;
3901
3902 /**
3903 * Bus master physical memory read.
3904 *
3905 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3906 * VERR_EM_MEMORY.
3907 * @param pDevIns The device instance.
3908 * @param GCPhys Physical address start reading from.
3909 * @param pvBuf Where to put the read bits.
3910 * @param cbRead How many bytes to read.
3911 * @thread Any thread, but the call may involve the emulation thread.
3912 */
3913 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3914
3915 /**
3916 * Bus master physical memory write.
3917 *
3918 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3919 * VERR_EM_MEMORY.
3920 * @param pDevIns The device instance.
3921 * @param GCPhys Physical address to write to.
3922 * @param pvBuf What to write.
3923 * @param cbWrite How many bytes to write.
3924 * @thread Any thread, but the call may involve the emulation thread.
3925 */
3926 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3927
3928 /**
3929 * Set the IRQ for a PCI device.
3930 *
3931 * @param pDevIns Device instance.
3932 * @param iIrq IRQ number to set.
3933 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3934 * @thread Any thread, but will involve the emulation thread.
3935 */
3936 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3937
3938 /**
3939 * Set ISA IRQ for a device.
3940 *
3941 * @param pDevIns Device instance.
3942 * @param iIrq IRQ number to set.
3943 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3944 * @thread Any thread, but will involve the emulation thread.
3945 */
3946 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3947
3948 /**
3949 * Read physical memory.
3950 *
3951 * @returns VINF_SUCCESS (for now).
3952 * @param pDevIns Device instance.
3953 * @param GCPhys Physical address start reading from.
3954 * @param pvBuf Where to put the read bits.
3955 * @param cbRead How many bytes to read.
3956 */
3957 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3958
3959 /**
3960 * Write to physical memory.
3961 *
3962 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3963 * @param pDevIns Device instance.
3964 * @param GCPhys Physical address to write to.
3965 * @param pvBuf What to write.
3966 * @param cbWrite How many bytes to write.
3967 */
3968 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3969
3970 /**
3971 * Checks if the Gate A20 is enabled or not.
3972 *
3973 * @returns true if A20 is enabled.
3974 * @returns false if A20 is disabled.
3975 * @param pDevIns Device instance.
3976 * @thread The emulation thread.
3977 */
3978 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3979
3980 /**
3981 * Gets the VM state.
3982 *
3983 * @returns VM state.
3984 * @param pDevIns The device instance.
3985 * @thread Any thread (just keep in mind that it's volatile info).
3986 */
3987 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3988
3989 /**
3990 * Set the VM error message
3991 *
3992 * @returns rc.
3993 * @param pDrvIns Driver instance.
3994 * @param rc VBox status code.
3995 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3996 * @param pszFormat Error message format string.
3997 * @param ... Error message arguments.
3998 */
3999 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
4000
4001 /**
4002 * Set the VM error message
4003 *
4004 * @returns rc.
4005 * @param pDrvIns Driver instance.
4006 * @param rc VBox status code.
4007 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4008 * @param pszFormat Error message format string.
4009 * @param va Error message arguments.
4010 */
4011 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
4012
4013 /**
4014 * Set the VM runtime error message
4015 *
4016 * @returns VBox status code.
4017 * @param pDevIns Device instance.
4018 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4019 * @param pszErrorId Error ID string.
4020 * @param pszFormat Error message format string.
4021 * @param ... Error message arguments.
4022 */
4023 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
4024
4025 /**
4026 * Set the VM runtime error message
4027 *
4028 * @returns VBox status code.
4029 * @param pDevIns Device instance.
4030 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4031 * @param pszErrorId Error ID string.
4032 * @param pszFormat Error message format string.
4033 * @param va Error message arguments.
4034 */
4035 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
4036
4037 /**
4038 * Set parameters for pending MMIO patch operation
4039 *
4040 * @returns rc.
4041 * @param pDevIns Device instance.
4042 * @param GCPhys MMIO physical address
4043 * @param pCachedData GC pointer to cached data
4044 */
4045 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4046
4047 /**
4048 * Gets the VM handle. Restricted API.
4049 *
4050 * @returns VM Handle.
4051 * @param pDevIns Device instance.
4052 */
4053 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4054
4055 /**
4056 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4057 *
4058 * @returns true = yes, false = no
4059 * @param pDevIns Device instance.
4060 */
4061 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4062
4063 /**
4064 * Gets the VMCPU handle. Restricted API.
4065 *
4066 * @returns VMCPU Handle.
4067 * @param pDevIns The device instance.
4068 */
4069 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4070
4071 /**
4072 * The the VM CPU ID of the current thread (restricted API).
4073 *
4074 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
4075 * @param pDevIns The device instance.
4076 */
4077 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4078
4079 /**
4080 * Get the current virtual clock time in a VM. The clock frequency must be
4081 * queried separately.
4082 *
4083 * @returns Current clock time.
4084 * @param pDevIns The device instance.
4085 */
4086 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4087
4088 /**
4089 * Get the frequency of the virtual clock.
4090 *
4091 * @returns The clock frequency (not variable at run-time).
4092 * @param pDevIns The device instance.
4093 */
4094 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4095
4096 /**
4097 * Get the current virtual clock time in a VM, in nanoseconds.
4098 *
4099 * @returns Current clock time (in ns).
4100 * @param pDevIns The device instance.
4101 */
4102 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4103
4104 /**
4105 * Gets the trace buffer handle.
4106 *
4107 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4108 * really inteded for direct usage, thus no inline wrapper function.
4109 *
4110 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4111 * @param pDevIns The device instance.
4112 */
4113 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4114
4115 /** Just a safety precaution. */
4116 uint32_t u32TheEnd;
4117} PDMDEVHLPR0;
4118/** Pointer PDM Device R0 API. */
4119typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4120/** Pointer PDM Device GC API. */
4121typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4122
4123/** Current PDMDEVHLP version number. */
4124#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 4, 1)
4125
4126
4127
4128/**
4129 * PDM Device Instance.
4130 */
4131typedef struct PDMDEVINS
4132{
4133 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4134 uint32_t u32Version;
4135 /** Device instance number. */
4136 uint32_t iInstance;
4137
4138 /** Pointer the GC PDM Device API. */
4139 PCPDMDEVHLPRC pHlpRC;
4140 /** Pointer to device instance data. */
4141 RTRCPTR pvInstanceDataRC;
4142 /** The critical section for the device, see pCritSectXR3. */
4143 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4144 /** Alignment padding. */
4145 RTRCPTR pAlignmentRC;
4146
4147 /** Pointer the R0 PDM Device API. */
4148 PCPDMDEVHLPR0 pHlpR0;
4149 /** Pointer to device instance data (R0). */
4150 RTR0PTR pvInstanceDataR0;
4151 /** The critical section for the device, see pCritSectXR3. */
4152 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4153
4154 /** Pointer the HC PDM Device API. */
4155 PCPDMDEVHLPR3 pHlpR3;
4156 /** Pointer to device instance data. */
4157 RTR3PTR pvInstanceDataR3;
4158 /** The critical section for the device.
4159 *
4160 * TM and IOM will enter this critical section before calling into the device
4161 * code. PDM will when doing power on, power off, reset, suspend and resume
4162 * notifications. SSM will currently not, but this will be changed later on.
4163 *
4164 * The device gets a critical section automatically assigned to it before
4165 * the constructor is called. If the constructor wishes to use a different
4166 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4167 * very early on.
4168 */
4169 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4170
4171 /** Pointer to device registration structure. */
4172 R3PTRTYPE(PCPDMDEVREG) pReg;
4173 /** Configuration handle. */
4174 R3PTRTYPE(PCFGMNODE) pCfg;
4175
4176 /** The base interface of the device.
4177 *
4178 * The device constructor initializes this if it has any
4179 * device level interfaces to export. To obtain this interface
4180 * call PDMR3QueryDevice(). */
4181 PDMIBASE IBase;
4182
4183 /** Tracing indicator. */
4184 uint32_t fTracing;
4185 /** The tracing ID of this device. */
4186 uint32_t idTracing;
4187#if HC_ARCH_BITS == 32
4188 /** Align the internal data more naturally. */
4189 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4190#endif
4191
4192 /** Internal data. */
4193 union
4194 {
4195#ifdef PDMDEVINSINT_DECLARED
4196 PDMDEVINSINT s;
4197#endif
4198 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4199 } Internal;
4200
4201 /** Device instance data. The size of this area is defined
4202 * in the PDMDEVREG::cbInstanceData field. */
4203 char achInstanceData[8];
4204} PDMDEVINS;
4205
4206/** Current PDMDEVINS version number. */
4207#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4208
4209/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4210#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4211
4212/**
4213 * Checks the structure versions of the device instance and device helpers,
4214 * returning if they are incompatible.
4215 *
4216 * This is for use in the constructor.
4217 *
4218 * @param pDevIns The device instance pointer.
4219 */
4220#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4221 do \
4222 { \
4223 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4224 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4225 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4226 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4227 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4228 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4229 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4230 } while (0)
4231
4232/**
4233 * Quietly checks the structure versions of the device instance and device
4234 * helpers, returning if they are incompatible.
4235 *
4236 * This is for use in the destructor.
4237 *
4238 * @param pDevIns The device instance pointer.
4239 */
4240#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4241 do \
4242 { \
4243 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4244 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4245 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4246 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4247 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4248 } while (0)
4249
4250/**
4251 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4252 * constructor - returns on failure.
4253 *
4254 * This should be invoked after having initialized the instance data
4255 * sufficiently for the correct operation of the destructor. The destructor is
4256 * always called!
4257 *
4258 * @param pDevIns Pointer to the PDM device instance.
4259 * @param pszValidValues Patterns describing the valid value names. See
4260 * RTStrSimplePatternMultiMatch for details on the
4261 * pattern syntax.
4262 * @param pszValidNodes Patterns describing the valid node (key) names.
4263 * Pass empty string if no valid nodes.
4264 */
4265#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4266 do \
4267 { \
4268 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4269 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4270 if (RT_SUCCESS(rcValCfg)) \
4271 { /* likely */ } else return rcValCfg; \
4272 } while (0)
4273
4274/** @def PDMDEV_ASSERT_EMT
4275 * Assert that the current thread is the emulation thread.
4276 */
4277#ifdef VBOX_STRICT
4278# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4279#else
4280# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4281#endif
4282
4283/** @def PDMDEV_ASSERT_OTHER
4284 * Assert that the current thread is NOT the emulation thread.
4285 */
4286#ifdef VBOX_STRICT
4287# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4288#else
4289# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4290#endif
4291
4292/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4293 * Assert that the current thread is owner of the VM lock.
4294 */
4295#ifdef VBOX_STRICT
4296# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4297#else
4298# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4299#endif
4300
4301/** @def PDMDEV_SET_ERROR
4302 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4303 */
4304#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4305 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4306
4307/** @def PDMDEV_SET_RUNTIME_ERROR
4308 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4309 */
4310#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4311 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4312
4313/** @def PDMDEVINS_2_RCPTR
4314 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4315 */
4316#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4317
4318/** @def PDMDEVINS_2_R3PTR
4319 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4320 */
4321#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4322
4323/** @def PDMDEVINS_2_R0PTR
4324 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4325 */
4326#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4327
4328
4329#ifdef IN_RING3
4330
4331/**
4332 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4333 */
4334DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4335 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4336 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4337{
4338 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4339}
4340
4341/**
4342 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4343 */
4344DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4345 const char *pszOut, const char *pszIn, const char *pszOutStr,
4346 const char *pszInStr, const char *pszDesc)
4347{
4348 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4349}
4350
4351/**
4352 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4353 */
4354DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4355 const char *pszOut, const char *pszIn, const char *pszOutStr,
4356 const char *pszInStr, const char *pszDesc)
4357{
4358 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4359}
4360
4361/**
4362 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4363 */
4364DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4365{
4366 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4367}
4368
4369/**
4370 * Register a Memory Mapped I/O (MMIO) region.
4371 *
4372 * These callbacks are of course for the ring-3 context (R3). Register HC
4373 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4374 * must be a R3 handler for every RC and R0 handler!
4375 *
4376 * @returns VBox status.
4377 * @param pDevIns The device instance to register the MMIO with.
4378 * @param GCPhysStart First physical address in the range.
4379 * @param cbRange The size of the range (in bytes).
4380 * @param pvUser User argument.
4381 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4382 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4383 * @param pfnRead Pointer to function which is gonna handle Read operations.
4384 * @param pszDesc Pointer to description string. This must not be freed.
4385 */
4386DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4387 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4388{
4389 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4390 fFlags, pszDesc);
4391}
4392
4393/**
4394 * Register a Memory Mapped I/O (MMIO) region for GC.
4395 *
4396 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4397 * (R3) handlers before guest context handlers! There must be a R3 handler for
4398 * every RC handler!
4399 *
4400 * @returns VBox status.
4401 * @param pDevIns The device instance to register the MMIO with.
4402 * @param GCPhysStart First physical address in the range.
4403 * @param cbRange The size of the range (in bytes).
4404 * @param pvUser User argument.
4405 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4406 * @param pszRead Name of the RC function which is gonna handle Read operations.
4407 */
4408DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4409 const char *pszWrite, const char *pszRead)
4410{
4411 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4412}
4413
4414/**
4415 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4416 */
4417DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4418 const char *pszWrite, const char *pszRead)
4419{
4420 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4421}
4422
4423/**
4424 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4425 */
4426DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4427 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4428 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4429{
4430 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4431 fFlags, pszDesc);
4432}
4433
4434/**
4435 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4436 */
4437DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4438 const char *pszWrite, const char *pszRead, const char *pszFill)
4439{
4440 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4441}
4442
4443/**
4444 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4445 */
4446DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4447 const char *pszWrite, const char *pszRead, const char *pszFill)
4448{
4449 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4450}
4451
4452/**
4453 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4454 */
4455DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4456{
4457 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4458}
4459
4460/**
4461 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4462 */
4463DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4464{
4465 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4466}
4467
4468/**
4469 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4470 */
4471DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4472{
4473 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4474}
4475
4476/**
4477 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4478 */
4479DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4480{
4481 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4482}
4483
4484/**
4485 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4486 */
4487DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4488{
4489 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4490}
4491
4492/**
4493 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4494 */
4495DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4496 const char *pszDesc, PRTRCPTR pRCPtr)
4497{
4498 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4499}
4500
4501/**
4502 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4503 */
4504DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4505 const char *pszDesc, PRTR0PTR pR0Ptr)
4506{
4507 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4508}
4509
4510/**
4511 * @copydoc PDMDEVHLPR3::pfnROMRegister
4512 */
4513DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4514 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4515{
4516 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4517}
4518
4519/**
4520 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4521 */
4522DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4523{
4524 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4525}
4526
4527/**
4528 * Register a save state data unit.
4529 *
4530 * @returns VBox status.
4531 * @param pDevIns The device instance.
4532 * @param uVersion Data layout version number.
4533 * @param cbGuess The approximate amount of data in the unit.
4534 * Only for progress indicators.
4535 * @param pfnSaveExec Execute save callback, optional.
4536 * @param pfnLoadExec Execute load callback, optional.
4537 */
4538DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4539 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4540{
4541 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4542 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4543 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4544 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4545}
4546
4547/**
4548 * Register a save state data unit with a live save callback as well.
4549 *
4550 * @returns VBox status.
4551 * @param pDevIns The device instance.
4552 * @param uVersion Data layout version number.
4553 * @param cbGuess The approximate amount of data in the unit.
4554 * Only for progress indicators.
4555 * @param pfnLiveExec Execute live callback, optional.
4556 * @param pfnSaveExec Execute save callback, optional.
4557 * @param pfnLoadExec Execute load callback, optional.
4558 */
4559DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4560 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4561{
4562 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4563 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4564 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4565 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4566}
4567
4568/**
4569 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4570 */
4571DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4572 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4573 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4574 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4575{
4576 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4577 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4578 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4579 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4580}
4581
4582/**
4583 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4584 */
4585DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4586 const char *pszDesc, PPTMTIMERR3 ppTimer)
4587{
4588 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4589}
4590
4591/**
4592 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4593 */
4594DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4595{
4596 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4597}
4598
4599#endif /* IN_RING3 */
4600
4601/**
4602 * @copydoc PDMDEVHLPR3::pfnPhysRead
4603 */
4604DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4605{
4606 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4607}
4608
4609/**
4610 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4611 */
4612DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4613{
4614 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4615}
4616
4617#ifdef IN_RING3
4618
4619/**
4620 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4621 */
4622DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4623{
4624 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4625}
4626
4627/**
4628 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4629 */
4630DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4631{
4632 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4633}
4634
4635/**
4636 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4637 */
4638DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4639{
4640 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4641}
4642
4643/**
4644 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4645 */
4646DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4647{
4648 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4649}
4650
4651/**
4652 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4653 */
4654DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4655{
4656 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4657}
4658
4659/**
4660 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4661 */
4662DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4663{
4664 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4665}
4666
4667/**
4668 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4669 */
4670DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4671{
4672 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4673}
4674
4675/**
4676 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4677 */
4678DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4679{
4680 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4681}
4682
4683/**
4684 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4685 */
4686DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4687{
4688 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4689}
4690#endif /* IN_RING3 */
4691
4692/**
4693 * @copydoc PDMDEVHLPR3::pfnVMState
4694 */
4695DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4696{
4697 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4698}
4699
4700#ifdef IN_RING3
4701/**
4702 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4703 */
4704DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4705{
4706 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4707}
4708#endif /* IN_RING3 */
4709
4710/**
4711 * @copydoc PDMDEVHLPR3::pfnVMSetError
4712 */
4713DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4714{
4715 va_list va;
4716 va_start(va, pszFormat);
4717 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4718 va_end(va);
4719 return rc;
4720}
4721
4722/**
4723 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4724 */
4725DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4726{
4727 va_list va;
4728 int rc;
4729 va_start(va, pszFormat);
4730 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4731 va_end(va);
4732 return rc;
4733}
4734
4735/**
4736 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4737 *
4738 * @returns VBox status code which must be passed up to the VMM. This will be
4739 * VINF_SUCCESS in non-strict builds.
4740 * @param pDevIns The device instance.
4741 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4742 * @param pszFormat Message. (optional)
4743 * @param ... Message parameters.
4744 */
4745DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4746{
4747#ifdef VBOX_STRICT
4748# ifdef IN_RING3
4749 int rc;
4750 va_list args;
4751 va_start(args, pszFormat);
4752 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4753 va_end(args);
4754 return rc;
4755# else
4756 NOREF(pDevIns);
4757 NOREF(pszFile);
4758 NOREF(iLine);
4759 NOREF(pszFunction);
4760 NOREF(pszFormat);
4761 return VINF_EM_DBG_STOP;
4762# endif
4763#else
4764 NOREF(pDevIns);
4765 NOREF(pszFile);
4766 NOREF(iLine);
4767 NOREF(pszFunction);
4768 NOREF(pszFormat);
4769 return VINF_SUCCESS;
4770#endif
4771}
4772
4773#ifdef IN_RING3
4774
4775/**
4776 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4777 */
4778DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4779{
4780 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4781}
4782
4783/**
4784 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4785 */
4786DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4787{
4788 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4789}
4790
4791/**
4792 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4793 */
4794DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4795{
4796 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4797}
4798
4799/**
4800 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4801 */
4802DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4803 const char *pszDesc, const char *pszName, ...)
4804{
4805 va_list va;
4806 va_start(va, pszName);
4807 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4808 va_end(va);
4809}
4810
4811/**
4812 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4813 */
4814DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4815{
4816 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4817}
4818
4819/**
4820 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4821 */
4822DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4823{
4824 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4825}
4826
4827/**
4828 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4829 */
4830DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4831{
4832 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4833}
4834
4835/**
4836 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4837 */
4838DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4839 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4840{
4841 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4842}
4843
4844#endif /* IN_RING3 */
4845
4846/**
4847 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4848 */
4849DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4850{
4851 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4852}
4853
4854/**
4855 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4856 */
4857DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4858{
4859 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4860}
4861
4862/**
4863 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4864 */
4865DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4866{
4867 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4868}
4869
4870/**
4871 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4872 */
4873DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4874{
4875 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4876}
4877
4878/**
4879 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4880 */
4881DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4882{
4883 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4884}
4885
4886/**
4887 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4888 */
4889DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4890{
4891 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4892}
4893
4894#ifdef IN_RING3
4895
4896/**
4897 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4898 */
4899DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4900{
4901 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4902}
4903
4904/**
4905 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4906 */
4907DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4908 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4909{
4910 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4911}
4912
4913/**
4914 * Initializes a PDM critical section.
4915 *
4916 * The PDM critical sections are derived from the IPRT critical sections, but
4917 * works in RC and R0 as well.
4918 *
4919 * @returns VBox status code.
4920 * @param pDevIns The device instance.
4921 * @param pCritSect Pointer to the critical section.
4922 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4923 * @param pszNameFmt Format string for naming the critical section.
4924 * For statistics and lock validation.
4925 * @param ... Arguments for the format string.
4926 */
4927DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4928{
4929 int rc;
4930 va_list va;
4931 va_start(va, pszNameFmt);
4932 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4933 va_end(va);
4934 return rc;
4935}
4936
4937/**
4938 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4939 */
4940DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4941{
4942 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4943}
4944
4945/**
4946 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4947 */
4948DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4949{
4950 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4951}
4952
4953/**
4954 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4955 */
4956DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4957{
4958 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4959}
4960
4961/**
4962 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4963 */
4964DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4965{
4966 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4967}
4968
4969/**
4970 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4971 */
4972DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4973 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4974{
4975 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4976}
4977
4978/**
4979 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4980 */
4981DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4982{
4983 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4984}
4985
4986/**
4987 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4988 */
4989DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4990{
4991 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4992}
4993
4994/**
4995 * @copydoc PDMDEVHLPR3::pfnA20Set
4996 */
4997DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4998{
4999 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5000}
5001
5002/**
5003 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5004 */
5005DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5006{
5007 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5008}
5009
5010/**
5011 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5012 */
5013DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
5014{
5015 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
5016}
5017
5018/**
5019 * @copydoc PDMDEVHLPR3::pfnPICRegister
5020 */
5021DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5022{
5023 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5024}
5025
5026/**
5027 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5028 */
5029DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
5030{
5031 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
5032}
5033
5034/**
5035 * @copydoc PDMDEVHLPR3::pfn
5036 */
5037DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5038{
5039 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5040}
5041
5042/**
5043 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5044 */
5045DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5046{
5047 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5048}
5049
5050/**
5051 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5052 */
5053DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5054{
5055 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5056}
5057
5058/**
5059 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5060 */
5061DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5062{
5063 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5064}
5065
5066/**
5067 * @copydoc PDMDEVHLPR3::pfnDMARegister
5068 */
5069DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5070{
5071 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5072}
5073
5074/**
5075 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5076 */
5077DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5078{
5079 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5080}
5081
5082/**
5083 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5084 */
5085DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5086{
5087 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5088}
5089
5090/**
5091 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5092 */
5093DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5094{
5095 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5096}
5097
5098/**
5099 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5100 */
5101DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5102{
5103 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5104}
5105
5106/**
5107 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5108 */
5109DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5110{
5111 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5112}
5113
5114/**
5115 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5116 */
5117DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5118{
5119 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5120}
5121
5122/**
5123 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5124 */
5125DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5126{
5127 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5128}
5129
5130/**
5131 * @copydoc PDMDEVHLP::pfnCallR0
5132 */
5133DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5134{
5135 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5136}
5137
5138/**
5139 * @copydoc PDMDEVHLP::pfnVMGetSuspendReason
5140 */
5141DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5142{
5143 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5144}
5145
5146/**
5147 * @copydoc PDMDEVHLP::pfnVMGetResumeReason
5148 */
5149DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5150{
5151 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5152}
5153
5154/**
5155 * @copydoc PDMDEVHLPR3::pfnGetUVM
5156 */
5157DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5158{
5159 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5160}
5161
5162#endif /* IN_RING3 */
5163
5164/**
5165 * @copydoc PDMDEVHLPR3::pfnGetVM
5166 */
5167DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5168{
5169 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5170}
5171
5172/**
5173 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5174 */
5175DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5176{
5177 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5178}
5179
5180/**
5181 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5182 */
5183DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5184{
5185 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5186}
5187
5188/**
5189 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5190 */
5191DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5192{
5193 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5194}
5195
5196/**
5197 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5198 */
5199DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5200{
5201 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5202}
5203
5204/**
5205 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5206 */
5207DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5208{
5209 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5210}
5211
5212#ifdef IN_RING3
5213
5214/**
5215 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5216 */
5217DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5218{
5219 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5220}
5221
5222/**
5223 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5224 */
5225DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5226{
5227 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5228}
5229
5230/**
5231 * @copydoc PDMDEVHLPR3::pfnVMReset
5232 */
5233DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5234{
5235 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5236}
5237
5238/**
5239 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5240 */
5241DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5242{
5243 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5244}
5245
5246/**
5247 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5248 */
5249DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5250{
5251 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5252}
5253
5254/**
5255 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5256 */
5257DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5258{
5259 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5260}
5261
5262#endif /* IN_RING3 */
5263
5264/**
5265 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5266 */
5267DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5268{
5269 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5270}
5271
5272#ifdef IN_RING3
5273
5274/**
5275 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5276 */
5277DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5278{
5279 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5280}
5281
5282/**
5283 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5284 */
5285DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5286{
5287 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5288}
5289
5290#endif /* IN_RING3 */
5291#ifdef IN_RING0
5292
5293/**
5294 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5295 */
5296DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5297{
5298 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5299}
5300
5301#endif /* IN_RING0 */
5302
5303
5304
5305
5306/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5307typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5308
5309/**
5310 * Callbacks for VBoxDeviceRegister().
5311 */
5312typedef struct PDMDEVREGCB
5313{
5314 /** Interface version.
5315 * This is set to PDM_DEVREG_CB_VERSION. */
5316 uint32_t u32Version;
5317
5318 /**
5319 * Registers a device with the current VM instance.
5320 *
5321 * @returns VBox status code.
5322 * @param pCallbacks Pointer to the callback table.
5323 * @param pReg Pointer to the device registration record.
5324 * This data must be permanent and readonly.
5325 */
5326 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5327} PDMDEVREGCB;
5328
5329/** Current version of the PDMDEVREGCB structure. */
5330#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5331
5332
5333/**
5334 * The VBoxDevicesRegister callback function.
5335 *
5336 * PDM will invoke this function after loading a device module and letting
5337 * the module decide which devices to register and how to handle conflicts.
5338 *
5339 * @returns VBox status code.
5340 * @param pCallbacks Pointer to the callback table.
5341 * @param u32Version VBox version number.
5342 */
5343typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5344
5345/** @} */
5346
5347RT_C_DECLS_END
5348
5349#endif
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