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source: vbox/trunk/include/VBox/vmm/nem.h

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1/** @file
2 * NEM - The Native Execution Manager.
3 */
4
5/*
6 * Copyright (C) 2018-2024 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef VBOX_INCLUDED_vmm_nem_h
37#define VBOX_INCLUDED_vmm_nem_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <VBox/types.h>
43#include <VBox/vmm/vmapi.h>
44#include <VBox/vmm/pgm.h>
45
46
47RT_C_DECLS_BEGIN
48
49/** @defgroup grp_nem The Native Execution Manager API
50 * @ingroup grp_vmm
51 * @{
52 */
53
54/** @defgroup grp_nem_r3 The NEM ring-3 Context API
55 * @{
56 */
57VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM);
58VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced);
59VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM);
60#ifdef IN_RING3
61VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
62#endif
63VMMR3_INT_DECL(int) NEMR3Term(PVM pVM);
64VMMR3DECL(bool) NEMR3IsEnabled(PUVM pVM);
65VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM);
66VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM);
67VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi);
68VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit);
69VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu);
70VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu);
71VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable);
72VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
73
74/**
75 * Checks if dirty page tracking for MMIO2 ranges is supported.
76 *
77 * If it is, PGM will not install a physical write access handler for the MMIO2
78 * region and instead just forward dirty bit queries NEMR3QueryMmio2DirtyBits.
79 * The enable/disable control of the tracking will be ignored, and PGM will
80 * always set NEM_NOTIFY_PHYS_MMIO_EX_F_TRACK_DIRTY_PAGES for such ranges.
81 *
82 * @retval true if supported.
83 * @retval false if not.
84 * @param pVM The cross context VM structure.
85 */
86VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM);
87
88/**
89 * Worker for PGMR3PhysMmio2QueryAndResetDirtyBitmap.
90 *
91 * @returns VBox status code.
92 * @param pVM The cross context VM structure.
93 * @param GCPhys The address of the MMIO2 range.
94 * @param cb The size of the MMIO2 range.
95 * @param uNemRange The NEM internal range number.
96 * @param pvBitmap The output bitmap. Must be 8-byte aligned. Ignored
97 * when @a cbBitmap is zero.
98 * @param cbBitmap The size of the bitmap. Must be the size of the whole
99 * MMIO2 range, rounded up to the nearest 8 bytes.
100 * When zero only a reset is done.
101 */
102VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
103 void *pvBitmap, size_t cbBitmap);
104
105VMMR3_INT_DECL(int) NEMR3NotifyPhysRamRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, void *pvR3,
106 uint8_t *pu2State, uint32_t *puNemRange);
107VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
108 void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange);
109VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapLate(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
110 void *pvRam, void *pvMmio2, uint32_t *puNemRange);
111VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExUnmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
112 void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange);
113/** @name Flags for NEMR3NotifyPhysMmioExMap and NEMR3NotifyPhysMmioExUnmap.
114 * @{ */
115/** Set if the range is replacing RAM rather that unused space. */
116#define NEM_NOTIFY_PHYS_MMIO_EX_F_REPLACE RT_BIT(0)
117/** Set if it's MMIO2 being mapped or unmapped. */
118#define NEM_NOTIFY_PHYS_MMIO_EX_F_MMIO2 RT_BIT(1)
119/** Set if MMIO2 and dirty page tracking is configured. */
120#define NEM_NOTIFY_PHYS_MMIO_EX_F_TRACK_DIRTY_PAGES RT_BIT(2)
121/** @} */
122
123/**
124 * Called very early during ROM registration, basically so an existing RAM range
125 * can be adjusted if desired.
126 *
127 * It will be succeeded by a number of NEMHCNotifyPhysPageProtChanged()
128 * calls and finally a call to NEMR3NotifyPhysRomRegisterLate().
129 *
130 * @returns VBox status code
131 * @param pVM The cross context VM structure.
132 * @param GCPhys The ROM address (page aligned).
133 * @param cb The size (page aligned).
134 * @param pvPages Pointer to the ROM (RAM) pages in simplified mode
135 * when NEM_NOTIFY_PHYS_ROM_F_REPLACE is set, otherwise
136 * NULL.
137 * @param fFlags NEM_NOTIFY_PHYS_ROM_F_XXX.
138 * @param pu2State New page state or UINT8_MAX to leave as-is.
139 * @param puNemRange Access to the relevant PGMRAMRANGE::uNemRange field.
140 */
141VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, void *pvPages,
142 uint32_t fFlags, uint8_t *pu2State, uint32_t *puNemRange);
143
144/**
145 * Called after the ROM range has been fully completed.
146 *
147 * This will be preceeded by a NEMR3NotifyPhysRomRegisterEarly() call as well a
148 * number of NEMHCNotifyPhysPageProtChanged calls.
149 *
150 * @returns VBox status code
151 * @param pVM The cross context VM structure.
152 * @param GCPhys The ROM address (page aligned).
153 * @param cb The size (page aligned).
154 * @param pvPages Pointer to the ROM pages.
155 * @param fFlags NEM_NOTIFY_PHYS_ROM_F_XXX.
156 * @param pu2State Where to return the new NEM page state, UINT8_MAX
157 * for unchanged.
158 * @param puNemRange Access to the relevant PGMRAMRANGE::uNemRange field.
159 */
160VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterLate(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, void *pvPages,
161 uint32_t fFlags, uint8_t *pu2State, uint32_t *puNemRange);
162
163/** @name Flags for NEMR3NotifyPhysRomRegisterEarly and NEMR3NotifyPhysRomRegisterLate.
164 * @{ */
165/** Set if the range is replacing RAM rather that unused space. */
166#define NEM_NOTIFY_PHYS_ROM_F_REPLACE RT_BIT(1)
167/** Set if it's MMIO2 being mapped or unmapped. */
168#define NEM_NOTIFY_PHYS_ROM_F_SHADOW RT_BIT(2)
169/** @} */
170
171/**
172 * Called when the A20 state changes.
173 *
174 * Windows: Hyper-V doesn't seem to offer a simple way of implementing the A20
175 * line features of PCs. So, we do a very minimal emulation of the HMA to make
176 * DOS happy.
177 *
178 * @param pVCpu The CPU the A20 state changed on.
179 * @param fEnabled Whether it was enabled (true) or disabled.
180 */
181VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled);
182VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM);
183VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
184/** @} */
185
186
187/** @defgroup grp_nem_r0 The NEM ring-0 Context API
188 * @{ */
189VMMR0_INT_DECL(int) NEMR0Init(void);
190VMMR0_INT_DECL(void) NEMR0Term(void);
191VMMR0_INT_DECL(int) NEMR0InitVM(PGVM pGVM);
192VMMR0_INT_DECL(int) NEMR0InitVMPart2(PGVM pGVM);
193VMMR0_INT_DECL(void) NEMR0CleanupVM(PGVM pGVM);
194VMMR0_INT_DECL(int) NEMR0MapPages(PGVM pGVM, VMCPUID idCpu);
195VMMR0_INT_DECL(int) NEMR0UnmapPages(PGVM pGVM, VMCPUID idCpu);
196VMMR0_INT_DECL(int) NEMR0ExportState(PGVM pGVM, VMCPUID idCpu);
197VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, VMCPUID idCpu, uint64_t fWhat);
198VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, VMCPUID idCpu);
199VMMR0_INT_DECL(int) NEMR0ResumeCpuTickOnAll(PGVM pGVM, VMCPUID idCpu, uint64_t uPausedTscValue);
200VMMR0_INT_DECL(VBOXSTRICTRC) NEMR0RunGuestCode(PGVM pGVM, VMCPUID idCpu);
201VMMR0_INT_DECL(int) NEMR0UpdateStatistics(PGVM pGVM, VMCPUID idCpu);
202VMMR0_INT_DECL(int) NEMR0DoExperiment(PGVM pGVM, VMCPUID idCpu, uint64_t u64Arg);
203#ifdef RT_OS_WINDOWS
204VMMR0_INT_DECL(int) NEMR0WinGetPartitionId(PGVM pGVM, uintptr_t uHandle);
205#endif
206/** @} */
207
208
209/** @defgroup grp_nem_hc The NEM Host Context API
210 * @{
211 */
212VMM_INT_DECL(bool) NEMHCIsLongModeAllowed(PVMCC pVM);
213VMM_INT_DECL(uint32_t) NEMHCGetFeatures(PVMCC pVM);
214VMM_INT_DECL(int) NEMImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
215
216/** @name NEM_FEAT_F_XXX - Features supported by the NEM backend
217 * @{ */
218/** NEM backend uses nested paging for the guest. */
219#define NEM_FEAT_F_NESTED_PAGING RT_BIT(0)
220/** NEM backend uses full (unrestricted) guest execution. */
221#define NEM_FEAT_F_FULL_GST_EXEC RT_BIT(1)
222/** NEM backend offers an xsave/xrstor interface. */
223#define NEM_FEAT_F_XSAVE_XRSTOR RT_BIT(2)
224/** @} */
225
226VMM_INT_DECL(void) NEMHCNotifyHandlerPhysicalRegister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb);
227VMM_INT_DECL(void) NEMHCNotifyHandlerPhysicalDeregister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb,
228 RTR3PTR pvMemR3, uint8_t *pu2State);
229VMM_INT_DECL(void) NEMHCNotifyHandlerPhysicalModify(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld,
230 RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fRestoreAsRAM);
231
232VMM_INT_DECL(int) NEMHCNotifyPhysPageAllocated(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
233 PGMPAGETYPE enmType, uint8_t *pu2State);
234VMM_INT_DECL(void) NEMHCNotifyPhysPageProtChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, RTR3PTR pvR3, uint32_t fPageProt,
235 PGMPAGETYPE enmType, uint8_t *pu2State);
236VMM_INT_DECL(void) NEMHCNotifyPhysPageChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew,
237 RTR3PTR pvNewR3, uint32_t fPageProt, PGMPAGETYPE enmType, uint8_t *pu2State);
238/** @name NEM_PAGE_PROT_XXX - Page protection
239 * @{ */
240#define NEM_PAGE_PROT_NONE UINT32_C(0) /**< All access causes VM exits. */
241#define NEM_PAGE_PROT_READ RT_BIT(0) /**< Read access. */
242#define NEM_PAGE_PROT_EXECUTE RT_BIT(1) /**< Execute access. */
243#define NEM_PAGE_PROT_WRITE RT_BIT(2) /**< write access. */
244/** @} */
245
246VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPUCC pVCpu, uint64_t *pcTicks, uint32_t *puAux);
247VMM_INT_DECL(int) NEMHCResumeCpuTickOnAll(PVMCC pVM, PVMCPUCC pVCpu, uint64_t uPausedTscValue);
248
249/** @} */
250
251/** @} */
252RT_C_DECLS_END
253
254
255#endif /* !VBOX_INCLUDED_vmm_nem_h */
256
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