VirtualBox

source: vbox/trunk/include/VBox/vmm/hm_vmx.mac@ 52664

Last change on this file since 52664 was 52192, checked in by vboxsync, 10 years ago

HostDrivers/Support, VMM: support CONFIG_PAX_KERNEXEC Linux kernels
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1;; @file
2; HM - VMX Structures and Definitions.
3;
4
5;
6; Copyright (C) 2006-2013 Oracle Corporation
7;
8; This file is part of VirtualBox Open Source Edition (OSE), as
9; available from http://www.virtualbox.org. This file is free software;
10; you can redistribute it and/or modify it under the terms of the GNU
11; General Public License (GPL) as published by the Free Software
12; Foundation, in version 2 as it comes in the "COPYING" file of the
13; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15;
16; The contents of this file may alternatively be used under the terms
17; of the Common Development and Distribution License Version 1.0
18; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19; VirtualBox OSE distribution, in which case the provisions of the
20; CDDL are applicable instead of those of the GPL.
21;
22; You may elect to license modified versions of this file under the
23; terms and conditions of either the GPL or the CDDL or both.
24;
25
26%define VMX_VMCS_GUEST_FIELD_ES 0800h
27%define VMX_VMCS_GUEST_FIELD_CS 0802h
28%define VMX_VMCS_GUEST_FIELD_SS 0804h
29%define VMX_VMCS_GUEST_FIELD_DS 0806h
30%define VMX_VMCS_GUEST_FIELD_FS 0808h
31%define VMX_VMCS_GUEST_FIELD_GS 080Ah
32%define VMX_VMCS_GUEST_FIELD_LDTR 080Ch
33%define VMX_VMCS_GUEST_FIELD_TR 080Eh
34%define VMX_VMCS_HOST_FIELD_ES 0C00h
35%define VMX_VMCS_HOST_FIELD_CS 0C02h
36%define VMX_VMCS_HOST_FIELD_SS 0C04h
37%define VMX_VMCS_HOST_FIELD_DS 0C06h
38%define VMX_VMCS_HOST_FIELD_FS 0C08h
39%define VMX_VMCS_HOST_FIELD_GS 0C0Ah
40%define VMX_VMCS_HOST_FIELD_TR 0C0Ch
41%define VMX_VMCS_CTRL_IO_BITMAP_A_FULL 02000h
42%define VMX_VMCS_CTRL_IO_BITMAP_A_HIGH 02001h
43%define VMX_VMCS_CTRL_IO_BITMAP_B_FULL 02002h
44%define VMX_VMCS_CTRL_IO_BITMAP_B_HIGH 02003h
45%define VMX_VMCS_CTRL_MSR_BITMAP_FULL 02004h
46%define VMX_VMCS_CTRL_MSR_BITMAP_HIGH 02005h
47%define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL 02006h
48%define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_HIGH 02007h
49%define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL 02008h
50%define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH 02009h
51%define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL 0200Ah
52%define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_HIGH 0200Bh
53%define VMX_VMCS_CTRL_EXEC_VMCS_PTR_FULL 0200Ch
54%define VMX_VMCS_CTRL_EXEC_VMCS_PTR_HIGH 0200Dh
55%define VMX_VMCS_CTRL_TSC_OFFSET_FULL 02010h
56%define VMX_VMCS_CTRL_TSC_OFFSET_HIGH 02011h
57%define VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL 02012h
58%define VMX_VMCS_CTRL_VAPIC_PAGEADDR_HIGH 02013h
59%define VMX_VMCS_GUEST_LINK_PTR_FULL 02800h
60%define VMX_VMCS_GUEST_LINK_PTR_HIGH 02801h
61%define VMX_VMCS_GUEST_DEBUGCTL_FULL 02802h
62%define VMX_VMCS_GUEST_DEBUGCTL_HIGH 02803h
63%define VMX_VMCS_CTRL_PIN_EXEC 04000h
64%define VMX_VMCS_CTRL_PROC_EXEC 04002h
65%define VMX_VMCS_CTRL_EXCEPTION_BITMAP 04004h
66%define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MASK 04006h
67%define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MATCH 04008h
68%define VMX_VMCS_CTRL_CR3_TARGET_COUNT 0400Ah
69%define VMX_VMCS_CTRL_EXIT 0400Ch
70%define VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT 0400Eh
71%define VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT 04010h
72%define VMX_VMCS_CTRL_ENTRY 04012h
73%define VMX_VMCS_CTRL_ENTRY_MSR_LOAD_COUNT 04014h
74%define VMX_VMCS_CTRL_ENTRY_IRQ_INFO 04016h
75%define VMX_VMCS_CTRL_ENTRY_EXCEPTION_ERRCODE 04018h
76%define VMX_VMCS_CTRL_ENTRY_INSTR_LENGTH 0401Ah
77%define VMX_VMCS_CTRL_TRP_TRESHOLD 0401Ch
78%define VMX_VMCS_RO_VM_INSTR_ERROR 04400h
79%define VMX_VMCS_RO_EXIT_REASON 04402h
80%define VMX_VMCS_RO_EXIT_INTERRUPTION_INFO 04404h
81%define VMX_VMCS_RO_EXIT_INTERRUPTION_ERRCODE 04406h
82%define VMX_VMCS_RO_IDT_INFO 04408h
83%define VMX_VMCS_RO_IDT_ERRCODE 0440Ah
84%define VMX_VMCS_RO_EXIT_INSTR_LENGTH 0440Ch
85%define VMX_VMCS_RO_EXIT_INSTR_INFO 0440Eh
86%define VMX_VMCS_GUEST_ES_LIMIT 04800h
87%define VMX_VMCS_GUEST_CS_LIMIT 04802h
88%define VMX_VMCS_GUEST_SS_LIMIT 04804h
89%define VMX_VMCS_GUEST_DS_LIMIT 04806h
90%define VMX_VMCS_GUEST_FS_LIMIT 04808h
91%define VMX_VMCS_GUEST_GS_LIMIT 0480Ah
92%define VMX_VMCS_GUEST_LDTR_LIMIT 0480Ch
93%define VMX_VMCS_GUEST_TR_LIMIT 0480Eh
94%define VMX_VMCS_GUEST_GDTR_LIMIT 04810h
95%define VMX_VMCS_GUEST_IDTR_LIMIT 04812h
96%define VMX_VMCS_GUEST_ES_ACCESS_RIGHTS 04814h
97%define VMX_VMCS_GUEST_CS_ACCESS_RIGHTS 04816h
98%define VMX_VMCS_GUEST_SS_ACCESS_RIGHTS 04818h
99%define VMX_VMCS_GUEST_DS_ACCESS_RIGHTS 0481Ah
100%define VMX_VMCS_GUEST_FS_ACCESS_RIGHTS 0481Ch
101%define VMX_VMCS_GUEST_GS_ACCESS_RIGHTS 0481Eh
102%define VMX_VMCS_GUEST_LDTR_ACCESS_RIGHTS 04820h
103%define VMX_VMCS_GUEST_TR_ACCESS_RIGHTS 04822h
104%define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE 04824h
105%define VMX_VMCS_GUEST_ACTIVITY_STATE 04826h
106%define VMX_VMCS_GUEST_SYSENTER_CS 0482Ah
107%define VMX_VMCS_CTRL_CR0_MASK 06000h
108%define VMX_VMCS_CTRL_CR4_MASK 06002h
109%define VMX_VMCS_CTRL_CR0_READ_SHADOW 06004h
110%define VMX_VMCS_CTRL_CR4_READ_SHADOW 06006h
111%define VMX_VMCS_CTRL_CR3_TARGET_VAL0 06008h
112%define VMX_VMCS_CTRL_CR3_TARGET_VAL1 0600Ah
113%define VMX_VMCS_CTRL_CR3_TARGET_VAL2 0600Ch
114%define VMX_VMCS_CTRL_CR3_TARGET_VAL31 0600Eh
115%define VMX_VMCS_RO_EXIT_QUALIFICATION 06400h
116%define VMX_VMCS_RO_IO_RCX 06402h
117%define VMX_VMCS_RO_IO_RSX 06404h
118%define VMX_VMCS_RO_IO_RDI 06406h
119%define VMX_VMCS_RO_IO_RIP 06408h
120%define VMX_VMCS_GUEST_LINEAR_ADDR 0640Ah
121%define VMX_VMCS64_GUEST_CR0 06800h
122%define VMX_VMCS64_GUEST_CR3 06802h
123%define VMX_VMCS64_GUEST_CR4 06804h
124%define VMX_VMCS64_GUEST_ES_BASE 06806h
125%define VMX_VMCS64_GUEST_CS_BASE 06808h
126%define VMX_VMCS64_GUEST_SS_BASE 0680Ah
127%define VMX_VMCS64_GUEST_DS_BASE 0680Ch
128%define VMX_VMCS64_GUEST_FS_BASE 0680Eh
129%define VMX_VMCS64_GUEST_GS_BASE 06810h
130%define VMX_VMCS64_GUEST_LDTR_BASE 06812h
131%define VMX_VMCS64_GUEST_TR_BASE 06814h
132%define VMX_VMCS64_GUEST_GDTR_BASE 06816h
133%define VMX_VMCS64_GUEST_IDTR_BASE 06818h
134%define VMX_VMCS64_GUEST_DR7 0681Ah
135%define VMX_VMCS64_GUEST_RSP 0681Ch
136%define VMX_VMCS64_GUEST_RIP 0681Eh
137%define VMX_VMCS64_GUEST_RFLAGS 06820h
138%define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS 06822h
139%define VMX_VMCS64_GUEST_SYSENTER_ESP 06824h
140%define VMX_VMCS64_GUEST_SYSENTER_EIP 06826h
141%define VMX_VMCS_HOST_CR0 06C00h
142%define VMX_VMCS_HOST_CR3 06C02h
143%define VMX_VMCS_HOST_CR4 06C04h
144%define VMX_VMCS_HOST_FS_BASE 06C06h
145%define VMX_VMCS_HOST_GS_BASE 06C08h
146%define VMX_VMCS_HOST_TR_BASE 06C0Ah
147%define VMX_VMCS_HOST_GDTR_BASE 06C0Ch
148%define VMX_VMCS_HOST_IDTR_BASE 06C0Eh
149%define VMX_VMCS_HOST_SYSENTER_ESP 06C10h
150%define VMX_VMCS_HOST_SYSENTER_EIP 06C12h
151%define VMX_VMCS_HOST_RSP 06C14h
152%define VMX_VMCS_HOST_RIP 06C16h
153
154%define VMX_RESTORE_HOST_SEL_DS 1h ;RT_BIT(0)
155%define VMX_RESTORE_HOST_SEL_ES 2h ;RT_BIT(1)
156%define VMX_RESTORE_HOST_SEL_FS 4h ;RT_BIT(2)
157%define VMX_RESTORE_HOST_SEL_GS 8h ;RT_BIT(3)
158%define VMX_RESTORE_HOST_SEL_TR 10h ;RT_BIT(4)
159%define VMX_RESTORE_HOST_GDTR 20h ;RT_BIT(5)
160%define VMX_RESTORE_HOST_IDTR 40h ;RT_BIT(6)
161%define VMX_RESTORE_HOST_GDT_READ_ONLY 80h ;RT_BIT(7)
162%define VMX_RESTORE_HOST_REQUIRED 100h ;RT_BIT(8)
163
164;; C version hm_vmx.h.
165struc VMXRESTOREHOST
166 .uHostSelDS resw 1
167 .uHostSelES resw 1
168 .uHostSelFS resw 1
169 .uHostSelGS resw 1
170 .uHostSelTR resw 1
171 .abPadding0 resb 4
172 .HostGdtr resb 10
173 .abPadding1 resb 6
174 .HostIdtr resb 10
175 .uHostFSBase resq 1
176 .uHostGSBase resq 1
177endstruc
178AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtr, 16-2)
179AssertCompileMemberOffset(VMXRESTOREHOST, HostIdtr, 32-2)
180AssertCompileMemberOffset(VMXRESTOREHOST, uHostFSBase, 40)
181AssertCompileSize(VMXRESTOREHOST, 56)
182
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