VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 73285

Last change on this file since 73285 was 73266, checked in by vboxsync, 7 years ago

PGM,HM: Made PGMR3ChangeMode work in ring-0 too. This required a kludge for the VT-x real-in-V86-mode stuff, as there are certain limitations on that mode which weren't checked as CR0.PE was cleared. The kludge isn't very smart, but it seems to do the job. Similar kludge for getting out of the mode. bugref:9044

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 10.5 KB
Line 
1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <VBox/vmm/hm_svm.h>
33#include <VBox/vmm/trpm.h>
34#include <iprt/mp.h>
35
36
37/** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
38 * @ingroup grp_vmm
39 * @{
40 */
41
42RT_C_DECLS_BEGIN
43
44/**
45 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
46 *
47 * @retval true if used.
48 * @retval false if software virtualization (raw-mode) or NEM is used.
49 *
50 * @param a_pVM The cross context VM structure.
51 * @deprecated Please use VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED, or
52 * VM_IS_HM_ENABLED instead.
53 * @internal
54 */
55#if defined(VBOX_STRICT) && defined(IN_RING3)
56# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
57#else
58# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
59#endif
60
61/**
62 * Checks whether raw-mode context is required for any purpose.
63 *
64 * @retval true if required either by raw-mode itself or by HM for doing
65 * switching the cpu to 64-bit mode.
66 * @retval false if not required.
67 *
68 * @param a_pVM The cross context VM structure.
69 * @internal
70 */
71#if HC_ARCH_BITS == 64
72# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM))
73#else
74# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM) || (a_pVM)->fHMNeedRawModeCtx)
75#endif
76
77/**
78 * Checks whether we're in the special hardware virtualization context.
79 * @returns true / false.
80 * @param a_pVCpu The caller's cross context virtual CPU structure.
81 * @thread EMT
82 */
83#ifdef IN_RING0
84# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
85#else
86# define HMIsInHwVirtCtx(a_pVCpu) (false)
87#endif
88
89/**
90 * Checks whether we're in the special hardware virtualization context and we
91 * cannot perform long jump without guru meditating and possibly messing up the
92 * host and/or guest state.
93 *
94 * This is after we've turned interrupts off and such.
95 *
96 * @returns true / false.
97 * @param a_pVCpu The caller's cross context virtual CPU structure.
98 * @thread EMT
99 */
100#ifdef IN_RING0
101# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
102#else
103# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
104#endif
105
106/**
107 * 64-bit raw-mode (intermediate memory context) operations.
108 *
109 * These are special hypervisor eip values used when running 64-bit guests on
110 * 32-bit hosts. Each operation corresponds to a routine.
111 *
112 * @note Duplicated in the assembly code!
113 */
114typedef enum HM64ON32OP
115{
116 HM64ON32OP_INVALID = 0,
117 HM64ON32OP_VMXRCStartVM64,
118 HM64ON32OP_SVMRCVMRun64,
119 HM64ON32OP_HMRCSaveGuestFPU64,
120 HM64ON32OP_HMRCSaveGuestDebug64,
121 HM64ON32OP_HMRCTestSwitcher64,
122 HM64ON32OP_END,
123 HM64ON32OP_32BIT_HACK = 0x7fffffff
124} HM64ON32OP;
125
126/** @name All-context HM API.
127 * @{ */
128VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
129VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
130VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
131VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
132VMM_INT_DECL(int) HMAmdIsSubjectToErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
133VMM_INT_DECL(bool) HMSetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable);
134VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM);
135VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM);
136VMM_INT_DECL(void) HMHCPagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
137/** @} */
138
139/** @name All-context SVM helpers.
140 *
141 * These are SVM functions (based on AMD specs.) that may be used by IEM/REM and
142 * not VirtualBox functions that are used for hardware-assisted SVM. Those are
143 * declared below under the !IN_RC section.
144 * @{ */
145VMM_INT_DECL(TRPMEVENT) HMSvmEventToTrpmEventType(PCSVMEVENT pSvmEvent);
146VMM_INT_DECL(int) HMSvmGetMsrpmOffsetAndBit(uint32_t idMsr, uint16_t *pbOffMsrpm, uint8_t *puMsrpmBit);
147VMM_INT_DECL(bool) HMSvmIsIOInterceptActive(void *pvIoBitmap, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg,
148 uint8_t cAddrSizeBits, uint8_t iEffSeg, bool fRep, bool fStrIo,
149 PSVMIOIOEXITINFO pIoExitInfo);
150VMM_INT_DECL(int) HMHCSvmMaybeMovTprHypercall(PVMCPU pVCpu);
151/** @} */
152
153#ifndef IN_RC
154VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
155VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
156VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
157VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
158VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
159VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVM pVM);
160VMM_INT_DECL(bool) HMIsLongModeAllowed(PVM pVM);
161VMM_INT_DECL(bool) HMAreMsrBitmapsAvailable(PVM pVM);
162VMM_INT_DECL(bool) HMSvmIsVGifActive(PVM pVM);
163VMM_INT_DECL(uint64_t) HMSvmNstGstApplyTscOffset(PVMCPU pVCpu, uint64_t uTicks);
164# ifdef VBOX_WITH_NESTED_HWVIRT_SVM
165VMM_INT_DECL(void) HMSvmNstGstVmExitNotify(PVMCPU pVCpu, PCPUMCTX pCtx);
166# endif
167#else /* Nops in RC: */
168# define HMFlushTLB(pVCpu) do { } while (0)
169# define HMIsNestedPagingActive(pVM) false
170# define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
171# define HMIsLongModeAllowed(pVM) false
172# define HMAreMsrBitmapsAvailable(pVM) false
173# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
174# define HMSvmNstGstVmExitNotify(pVCpu, pCtx) do { } while (0)
175# define HMSvmIsVGifActive(pVM) false
176# define HMSvmNstGstApplyTscOffset(pVCpu, uTicks) (uTicks)
177#endif
178
179#ifdef IN_RING0
180/** @defgroup grp_hm_r0 The HM ring-0 Context API
181 * @{
182 */
183VMMR0_INT_DECL(int) HMR0Init(void);
184VMMR0_INT_DECL(int) HMR0Term(void);
185VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
186VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
187VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
188# ifdef VBOX_WITH_RAW_MODE
189VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
190VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
191# endif
192
193VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
194VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
195VMMR0_INT_DECL(int) HMR0Enter(PVMCPU pVCpu);
196VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu);
197VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
198VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPU VCpu);
199VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU VCpu);
200VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
201VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
202VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
203
204# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
205VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
206VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
207VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
208# endif
209
210/** @} */
211#endif /* IN_RING0 */
212
213
214#ifdef IN_RING3
215/** @defgroup grp_hm_r3 The HM ring-3 Context API
216 * @{
217 */
218VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
219VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
220VMMR3DECL(bool) HMR3IsVirtApicRegsEnabled(PUVM pUVM);
221VMMR3DECL(bool) HMR3IsPostedIntrsEnabled(PUVM pUVM);
222VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
223VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
224VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
225VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
226
227VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
228VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
229VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
230VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
231VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
232VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
233VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
234VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
235VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
236VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
237VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
238VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
239VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
240VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
241VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu);
242VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
243VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
244VMMR3DECL(const char *) HMR3GetVmxExitName(uint32_t uExit);
245VMMR3DECL(const char *) HMR3GetSvmExitName(uint32_t uExit);
246
247/** @} */
248#endif /* IN_RING3 */
249
250/** @} */
251RT_C_DECLS_END
252
253
254#endif
255
Note: See TracBrowser for help on using the repository browser.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette