VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 45971

Last change on this file since 45971 was 45971, checked in by vboxsync, 12 years ago

Main, VMM: Added an API seting to disable VT-x unrestricted execution.
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  • Property svn:keywords set to Author Date Id Revision
File size: 8.7 KB
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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <iprt/mp.h>
33
34
35/** @defgroup grp_hm The VM Hardware Manager API
36 * @{
37 */
38
39RT_C_DECLS_BEGIN
40
41/**
42 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
43 *
44 * @retval @c true if used.
45 * @retval @c false if software virtualization (raw-mode) is used.
46 *
47 * @param a_pVM The cross context VM structure.
48 * @sa HMIsEnabledNotMacro, HMR3IsEnabled
49 * @internal
50 */
51#if defined(VBOX_STRICT) && defined(IN_RING3)
52# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
53#else
54# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
55#endif
56
57/**
58 * Checks whether raw-mode context is required for any purpose.
59 *
60 * @retval @c true if required either by raw-mode itself or by HM for doing
61 * switching the cpu to 64-bit mode.
62 * @retval @c false if not required.
63 *
64 * @param a_pVM The cross context VM structure.
65 * @internal
66 */
67#if HC_ARCH_BITS == 64
68# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM))
69#else
70# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM) || (a_pVM)->fHMNeedRawModeCtx)
71#endif
72
73 /**
74 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
75 *
76 * @returns boolean
77 * @param a_pVCpu Pointer to the shared virtual CPU structure.
78 * @internal
79 */
80#define HMCanEmulateIoBlock(a_pVCpu) (!CPUMIsGuestInPagedProtectedMode(a_pVCpu))
81
82 /**
83 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
84 *
85 * @returns boolean
86 * @param a_pCtx Pointer to the CPU context (within PVM).
87 * @internal
88 */
89#define HMCanEmulateIoBlockEx(a_pCtx) (!CPUMIsGuestInPagedProtectedModeEx(a_pCtx))
90
91/**
92 * Checks whether we're in the special hardware virtualization context.
93 * @returns true / false.
94 * @param a_pVCpu The caller's cross context virtual CPU structure.
95 * @thread EMT
96 */
97#ifdef IN_RING0
98# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
99#else
100# define HMIsInHwVirtCtx(a_pVCpu) (false)
101#endif
102
103/**
104 * Checks whether we're in the special hardware virtualization context and we
105 * cannot perform long jump without guru meditating and possibly messing up the
106 * host and/or guest state.
107 *
108 * This is after we've turned interrupts off and such.
109 *
110 * @returns true / false.
111 * @param a_pVCpu The caller's cross context virtual CPU structure.
112 * @thread EMT
113 */
114#ifdef IN_RING0
115# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
116#else
117# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
118#endif
119
120/**
121 * 64-bit raw-mode (intermediate memory context) operations.
122 *
123 * These are special hypervisor eip values used when running 64-bit guests on
124 * 32-bit hosts. Each operation corresponds to a routine.
125 *
126 * @note Duplicated in the assembly code!
127 */
128typedef enum HM64ON32OP
129{
130 HM64ON32OP_INVALID = 0,
131 HM64ON32OP_VMXRCStartVM64,
132 HM64ON32OP_SVMRCVMRun64,
133 HM64ON32OP_HMRCSaveGuestFPU64,
134 HM64ON32OP_HMRCSaveGuestDebug64,
135 HM64ON32OP_HMRCTestSwitcher64,
136 HM64ON32OP_END,
137 HM64ON32OP_32BIT_HACK = 0x7fffffff
138} HM64ON32OP;
139
140VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
141VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
142VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
143VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
144
145#ifndef IN_RC
146VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
147VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
148VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
149VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
150VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
151VMM_INT_DECL(PGMMODE) HMGetShwPagingMode(PVM pVM);
152#else /* Nops in RC: */
153# define HMFlushTLB(pVCpu) do { } while (0)
154# define HMIsNestedPagingActive(pVM) false
155# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
156#endif
157
158#ifdef IN_RING0
159/** @defgroup grp_hm_r0 The VM Hardware Manager API
160 * @ingroup grp_hm
161 * @{
162 */
163VMMR0_INT_DECL(int) HMR0Init(void);
164VMMR0_INT_DECL(int) HMR0Term(void);
165VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
166VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
167VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
168VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
169VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
170
171VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
172 unsigned uPort, unsigned uAndVal, unsigned cbSize);
173VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
174 unsigned uPort, unsigned uAndVal, unsigned cbSize);
175
176/** @} */
177#endif /* IN_RING0 */
178
179
180#ifdef IN_RING3
181/** @defgroup grp_hm_r3 The VM Hardware Manager API
182 * @ingroup grp_hm
183 * @{
184 */
185VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
186VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
187VMMR3DECL(bool) HMR3IsVpidActive(PUVM pVUM);
188VMMR3DECL(bool) HMR3IsUXActive(PUVM pVUM);
189
190VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
191VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
192VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
193VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
194VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
195VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
196VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
197VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
198VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
199VMMR3_INT_DECL(void) HMR3NotifyScheduled(PVMCPU pVCpu);
200VMMR3_INT_DECL(void) HMR3NotifyEmulated(PVMCPU pVCpu);
201VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
202VMMR3_INT_DECL(void) HMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
203VMMR3_INT_DECL(int) HMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
204VMMR3_INT_DECL(VBOXSTRICTRC) HMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
205VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
206VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
207VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
208VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
209VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
210
211/** @} */
212#endif /* IN_RING3 */
213
214#ifdef IN_RING0
215/** @addtogroup grp_hm_r0
216 * @{
217 */
218VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
219VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
220VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu);
221VMMR0_INT_DECL(int) HMR0Leave(PVM pVM, PVMCPU pVCpu);
222VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
223
224# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
225VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
226VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
227VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
228# endif
229
230/** @} */
231#endif /* IN_RING0 */
232
233
234/** @} */
235RT_C_DECLS_END
236
237
238#endif
239
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