VirtualBox

source: vbox/trunk/include/VBox/vmm/cpum.mac@ 97150

Last change on this file since 97150 was 97150, checked in by vboxsync, 2 years ago

VMM/CPUM: Nested VMX: bugref:10092 We access the virtual-APIC page directly from guest's memory. Removed it from CPUMCTX.

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File size: 11.9 KB
Line 
1;; @file
2; CPUM - CPU Monitor, Assembly header file.
3;
4
5;
6; Copyright (C) 2006-2022 Oracle and/or its affiliates.
7;
8; This file is part of VirtualBox base platform packages, as
9; available from https://www.virtualbox.org.
10;
11; This program is free software; you can redistribute it and/or
12; modify it under the terms of the GNU General Public License
13; as published by the Free Software Foundation, in version 3 of the
14; License.
15;
16; This program is distributed in the hope that it will be useful, but
17; WITHOUT ANY WARRANTY; without even the implied warranty of
18; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19; General Public License for more details.
20;
21; You should have received a copy of the GNU General Public License
22; along with this program; if not, see <https://www.gnu.org/licenses>.
23;
24; The contents of this file may alternatively be used under the terms
25; of the Common Development and Distribution License Version 1.0
26; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27; in the VirtualBox distribution, in which case the provisions of the
28; CDDL are applicable instead of those of the GPL.
29;
30; You may elect to license modified versions of this file under the
31; terms and conditions of either the GPL or the CDDL or both.
32;
33; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34;
35
36%ifndef ___VBox_vmm_cpum_mac__
37%define ___VBox_vmm_cpum_mac__
38
39%include "iprt/asmdefs.mac"
40
41
42;;
43; The volatile XSAVE components when VBOX_WITH_KERNEL_USING_XMM is active.
44; @note ASSUMED to be at the most 32-bit in width at the moment.
45%ifdef VBOX_WITH_KERNEL_USING_XMM
46 %define CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS (XSAVE_C_SSE | XSAVE_C_YMM | XSAVE_C_ZMM_HI256 | XSAVE_C_ZMM_16HI)
47%endif
48
49;;
50; CPUID leaf.
51; @remarks This structure is used by the patch manager and can only be extended
52; by adding to the end of it.
53struc CPUMCPUIDLEAF
54 .uLeaf resd 1
55 .uSubLeaf resd 1
56 .fSubLeafMask resd 1
57 .uEax resd 1
58 .uEbx resd 1
59 .uEcx resd 1
60 .uEdx resd 1
61 .fFlags resd 1
62endstruc
63%define CPUMCPUIDLEAF_F_INTEL_TOPOLOGY_SUBLEAVES RT_BIT_32(0)
64%define CPUMCPUIDLEAF_F_CONTAINS_APIC_ID RT_BIT_32(1)
65%define CPUMCPUIDLEAF_F_CONTAINS_OSXSAVE RT_BIT_32(2)
66%define CPUMCPUIDLEAF_F_CONTAINS_APIC RT_BIT_32(3)
67
68
69;;
70; For the default CPUID leaf value.
71; @remarks This is used by the patch manager and cannot be modified in any way.
72struc CPUMCPUID
73 .uEax resd 1
74 .uEbx resd 1
75 .uEcx resd 1
76 .uEdx resd 1
77endstruc
78
79
80;; @name Method used to deal with unknown CPUID leaves.
81;; @{
82%define CPUMUNKNOWNCPUID_DEFAULTS 1
83%define CPUMUNKNOWNCPUID_LAST_STD_LEAF 2
84%define CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX 3
85%define CPUMUNKNOWNCPUID_PASSTHRU 4
86;; @}
87
88
89;;
90; Registers frame.
91; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx
92; and other places.
93struc CPUMCTXCORE
94 .eax resq 1
95 .ecx resq 1
96 .edx resq 1
97 .ebx resq 1
98 .esp resq 1
99 .ebp resq 1
100 .esi resq 1
101 .edi resq 1
102 .r8 resq 1
103 .r9 resq 1
104 .r10 resq 1
105 .r11 resq 1
106 .r12 resq 1
107 .r13 resq 1
108 .r14 resq 1
109 .r15 resq 1
110 .es.Sel resw 1
111 .es.PaddingSel resw 1
112 .es.ValidSel resw 1
113 .es.fFlags resw 1
114 .es.u64Base resq 1
115 .es.u32Limit resd 1
116 .es.Attr resd 1
117 .cs.Sel resw 1
118 .cs.PaddingSel resw 1
119 .cs.ValidSel resw 1
120 .cs.fFlags resw 1
121 .cs.u64Base resq 1
122 .cs.u32Limit resd 1
123 .cs.Attr resd 1
124 .ss.Sel resw 1
125 .ss.PaddingSel resw 1
126 .ss.ValidSel resw 1
127 .ss.fFlags resw 1
128 .ss.u64Base resq 1
129 .ss.u32Limit resd 1
130 .ss.Attr resd 1
131 .ds.Sel resw 1
132 .ds.PaddingSel resw 1
133 .ds.ValidSel resw 1
134 .ds.fFlags resw 1
135 .ds.u64Base resq 1
136 .ds.u32Limit resd 1
137 .ds.Attr resd 1
138 .fs.Sel resw 1
139 .fs.PaddingSel resw 1
140 .fs.ValidSel resw 1
141 .fs.fFlags resw 1
142 .fs.u64Base resq 1
143 .fs.u32Limit resd 1
144 .fs.Attr resd 1
145 .gs.Sel resw 1
146 .gs.PaddingSel resw 1
147 .gs.ValidSel resw 1
148 .gs.fFlags resw 1
149 .gs.u64Base resq 1
150 .gs.u32Limit resd 1
151 .gs.Attr resd 1
152 .eip resq 1
153 .eflags resq 1
154endstruc
155
156
157%define XSTATE_SIZE 8192
158
159;; Note! Updates here must be reflected in CPUMInternal.mac too!
160struc CPUMCTX
161 .eax resq 1
162 .ecx resq 1
163 .edx resq 1
164 .ebx resq 1
165 .esp resq 1
166 .ebp resq 1
167 .esi resq 1
168 .edi resq 1
169 .r8 resq 1
170 .r9 resq 1
171 .r10 resq 1
172 .r11 resq 1
173 .r12 resq 1
174 .r13 resq 1
175 .r14 resq 1
176 .r15 resq 1
177 .es.Sel resw 1
178 .es.PaddingSel resw 1
179 .es.ValidSel resw 1
180 .es.fFlags resw 1
181 .es.u64Base resq 1
182 .es.u32Limit resd 1
183 .es.Attr resd 1
184 .cs.Sel resw 1
185 .cs.PaddingSel resw 1
186 .cs.ValidSel resw 1
187 .cs.fFlags resw 1
188 .cs.u64Base resq 1
189 .cs.u32Limit resd 1
190 .cs.Attr resd 1
191 .ss.Sel resw 1
192 .ss.PaddingSel resw 1
193 .ss.ValidSel resw 1
194 .ss.fFlags resw 1
195 .ss.u64Base resq 1
196 .ss.u32Limit resd 1
197 .ss.Attr resd 1
198 .ds.Sel resw 1
199 .ds.PaddingSel resw 1
200 .ds.ValidSel resw 1
201 .ds.fFlags resw 1
202 .ds.u64Base resq 1
203 .ds.u32Limit resd 1
204 .ds.Attr resd 1
205 .fs.Sel resw 1
206 .fs.PaddingSel resw 1
207 .fs.ValidSel resw 1
208 .fs.fFlags resw 1
209 .fs.u64Base resq 1
210 .fs.u32Limit resd 1
211 .fs.Attr resd 1
212 .gs.Sel resw 1
213 .gs.PaddingSel resw 1
214 .gs.ValidSel resw 1
215 .gs.fFlags resw 1
216 .gs.u64Base resq 1
217 .gs.u32Limit resd 1
218 .gs.Attr resd 1
219 .eip resq 1
220 .eflags resq 1
221 .cr0 resq 1
222 .cr2 resq 1
223 .cr3 resq 1
224 .cr4 resq 1
225 .dr resq 8
226 .gdtrPadding resw 3
227 .gdtr resw 0
228 .gdtr.cbGdt resw 1
229 .gdtr.pGdt resq 1
230 .idtrPadding resw 3
231 .idtr resw 0
232 .idtr.cbIdt resw 1
233 .idtr.pIdt resq 1
234 .ldtr.Sel resw 1
235 .ldtr.PaddingSel resw 1
236 .ldtr.ValidSel resw 1
237 .ldtr.fFlags resw 1
238 .ldtr.u64Base resq 1
239 .ldtr.u32Limit resd 1
240 .ldtr.Attr resd 1
241 .tr.Sel resw 1
242 .tr.PaddingSel resw 1
243 .tr.ValidSel resw 1
244 .tr.fFlags resw 1
245 .tr.u64Base resq 1
246 .tr.u32Limit resd 1
247 .tr.Attr resd 1
248 .SysEnter.cs resb 8
249 .SysEnter.eip resb 8
250 .SysEnter.esp resb 8
251 .msrEFER resb 8
252 .msrSTAR resb 8
253 .msrPAT resb 8
254 .msrLSTAR resb 8
255 .msrCSTAR resb 8
256 .msrSFMASK resb 8
257 .msrKERNELGSBASE resb 8
258 .uMsrPadding0 resb 8
259
260 alignb 8
261 .fExtrn resq 1
262
263 alignb 32
264 .aPaePdpes resq 4
265
266 alignb 8
267 .aXcr resq 2
268 .fXStateMask resq 1
269 .fUsedFpuGuest resb 1
270 alignb 8
271 .aoffXState resw 64
272 alignb 256
273 .abXState resb 0x4000-0x300
274 .XState EQU .abXState
275
276 alignb 4096
277 .hwvirt resb 0
278 .hwvirt.svm resb 0
279 .hwvirt.vmx resb 0
280
281 .hwvirt.svm.Vmcb EQU .hwvirt.svm
282 .hwvirt.svm.abMsrBitmap EQU (.hwvirt.svm.Vmcb + 0x1000)
283 .hwvirt.svm.abIoBitmap EQU (.hwvirt.svm.abMsrBitmap + 0x2000)
284 .hwvirt.svm.uMsrHSavePa EQU (.hwvirt.svm.abIoBitmap + 0x3000) ; resq 1
285 .hwvirt.svm.GCPhysVmcb EQU (.hwvirt.svm.uMsrHSavePa + 8) ; resq 1
286 alignb 8
287 .hwvirt.svm.HostState EQU (.hwvirt.svm.GCPhysVmcb + 8) ; resb 184
288 .hwvirt.svm.uPrevPauseTick EQU (.hwvirt.svm.HostState + 184) ; resq 1
289 .hwvirt.svm.cPauseFilter EQU (.hwvirt.svm.uPrevPauseTick + 8) ; resw 1
290 .hwvirt.svm.cPauseFilterThreshold EQU (.hwvirt.svm.cPauseFilter + 2) ; resw 1
291 .hwvirt.svm.fInterceptEvents EQU (.hwvirt.svm.cPauseFilterThreshold + 2) ; resb 1
292
293 .hwvirt.vmx.Vmcs resb 0x1000
294 .hwvirt.vmx.ShadowVmcs resb 0x1000
295 .hwvirt.vmx.abVmreadBitmap resb 0x1000
296 .hwvirt.vmx.abVmwriteBitmap resb 0x1000
297 .hwvirt.vmx.aEntryMsrLoadArea resb 0x2000
298 .hwvirt.vmx.aExitMsrStoreArea resb 0x2000
299 .hwvirt.vmx.aExitMsrLoadArea resb 0x2000
300 .hwvirt.vmx.abMsrBitmap resb 0x1000
301 .hwvirt.vmx.abIoBitmap resb 0x1000+0x1000
302 alignb 8
303 .hwvirt.vmx.GCPhysVmxon resq 1
304 .hwvirt.vmx.GCPhysVmcs resq 1
305 .hwvirt.vmx.GCPhysShadowVmcs resq 1
306 .hwvirt.vmx.enmDiag resd 1
307 .hwvirt.vmx.enmAbort resd 1
308 .hwvirt.vmx.uDiagAux resq 1
309 .hwvirt.vmx.uAbortAux resd 1
310 .hwvirt.vmx.fInVmxRootMode resb 1
311 .hwvirt.vmx.fInVmxNonRootMode resb 1
312 .hwvirt.vmx.fInterceptEvents resb 1
313 .hwvirt.vmx.fNmiUnblockingIret resb 1
314 .hwvirt.vmx.uFirstPauseLoopTick resq 1
315 .hwvirt.vmx.uPrevPauseTick resq 1
316 .hwvirt.vmx.uEntryTick resq 1
317 .hwvirt.vmx.offVirtApicWrite resw 1
318 .hwvirt.vmx.fVirtNmiBlocking resb 1
319 alignb 8
320 .hwvirt.vmx.Msrs resb 224
321
322 alignb 8
323 .hwvirt.enmHwvirt resd 1
324 .hwvirt.fGif resb 1
325 alignb 8
326 .hwvirt.fLocalForcedActions resd 1
327 alignb 64
328endstruc
329
330
331%define CPUMSELREG_FLAGS_VALID 0x0001
332%define CPUMSELREG_FLAGS_STALE 0x0002
333%define CPUMSELREG_FLAGS_VALID_MASK 0x0003
334
335
336;;
337; Guest MSR state.
338struc CPUMCTXMSRS
339 .au64 resq 64
340endstruc
341
342
343%endif
344
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