VirtualBox

source: vbox/trunk/include/VBox/vmm/cpum.mac@ 74479

Last change on this file since 74479 was 74479, checked in by vboxsync, 6 years ago

VMM/CPUM: Nested VMX: bugref:9180 Rather than dereference pVCpu or pass yet another pVM pointer to all the inline nested hwvirt.
helper functions in cpum.h, we cache the hwvirt type in the CPUMCTX structure itself.
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File size: 9.8 KB
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1;; @file
2; CPUM - CPU Monitor, Assembly header file.
3;
4
5;
6; Copyright (C) 2006-2017 Oracle Corporation
7;
8; This file is part of VirtualBox Open Source Edition (OSE), as
9; available from http://www.virtualbox.org. This file is free software;
10; you can redistribute it and/or modify it under the terms of the GNU
11; General Public License (GPL) as published by the Free Software
12; Foundation, in version 2 as it comes in the "COPYING" file of the
13; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15;
16; The contents of this file may alternatively be used under the terms
17; of the Common Development and Distribution License Version 1.0
18; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19; VirtualBox OSE distribution, in which case the provisions of the
20; CDDL are applicable instead of those of the GPL.
21;
22; You may elect to license modified versions of this file under the
23; terms and conditions of either the GPL or the CDDL or both.
24;
25
26%ifndef ___VBox_vmm_cpum_mac__
27%define ___VBox_vmm_cpum_mac__
28
29%include "iprt/asmdefs.mac"
30
31
32;;
33; The volatile XSAVE components when VBOX_WITH_KERNEL_USING_XMM is active.
34; @note ASSUMED to be at the most 32-bit in width at the moment.
35%ifdef VBOX_WITH_KERNEL_USING_XMM
36 %define CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS (XSAVE_C_SSE | XSAVE_C_YMM | XSAVE_C_ZMM_HI256 | XSAVE_C_ZMM_16HI)
37%endif
38
39;;
40; CPUID leaf.
41; @remarks This structure is used by the patch manager and can only be extended
42; by adding to the end of it.
43struc CPUMCPUIDLEAF
44 .uLeaf resd 1
45 .uSubLeaf resd 1
46 .fSubLeafMask resd 1
47 .uEax resd 1
48 .uEbx resd 1
49 .uEcx resd 1
50 .uEdx resd 1
51 .fFlags resd 1
52endstruc
53%define CPUMCPUIDLEAF_F_INTEL_TOPOLOGY_SUBLEAVES RT_BIT_32(0)
54%define CPUMCPUIDLEAF_F_CONTAINS_APIC_ID RT_BIT_32(1)
55%define CPUMCPUIDLEAF_F_CONTAINS_OSXSAVE RT_BIT_32(2)
56%define CPUMCPUIDLEAF_F_CONTAINS_APIC RT_BIT_32(3)
57
58
59;;
60; For the default CPUID leaf value.
61; @remarks This is used by the patch manager and cannot be modified in any way.
62struc CPUMCPUID
63 .uEax resd 1
64 .uEbx resd 1
65 .uEcx resd 1
66 .uEdx resd 1
67endstruc
68
69
70;; @name Method used to deal with unknown CPUID leaves.
71;; @{
72%define CPUMUNKNOWNCPUID_DEFAULTS 1
73%define CPUMUNKNOWNCPUID_LAST_STD_LEAF 2
74%define CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX 3
75%define CPUMUNKNOWNCPUID_PASSTHRU 4
76;; @}
77
78
79;;
80; Registers frame.
81; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx
82; and other places.
83struc CPUMCTXCORE
84 .eax resq 1
85 .ecx resq 1
86 .edx resq 1
87 .ebx resq 1
88 .esp resq 1
89 .ebp resq 1
90 .esi resq 1
91 .edi resq 1
92 .r8 resq 1
93 .r9 resq 1
94 .r10 resq 1
95 .r11 resq 1
96 .r12 resq 1
97 .r13 resq 1
98 .r14 resq 1
99 .r15 resq 1
100 .es.Sel resw 1
101 .es.PaddingSel resw 1
102 .es.ValidSel resw 1
103 .es.fFlags resw 1
104 .es.u64Base resq 1
105 .es.u32Limit resd 1
106 .es.Attr resd 1
107 .cs.Sel resw 1
108 .cs.PaddingSel resw 1
109 .cs.ValidSel resw 1
110 .cs.fFlags resw 1
111 .cs.u64Base resq 1
112 .cs.u32Limit resd 1
113 .cs.Attr resd 1
114 .ss.Sel resw 1
115 .ss.PaddingSel resw 1
116 .ss.ValidSel resw 1
117 .ss.fFlags resw 1
118 .ss.u64Base resq 1
119 .ss.u32Limit resd 1
120 .ss.Attr resd 1
121 .ds.Sel resw 1
122 .ds.PaddingSel resw 1
123 .ds.ValidSel resw 1
124 .ds.fFlags resw 1
125 .ds.u64Base resq 1
126 .ds.u32Limit resd 1
127 .ds.Attr resd 1
128 .fs.Sel resw 1
129 .fs.PaddingSel resw 1
130 .fs.ValidSel resw 1
131 .fs.fFlags resw 1
132 .fs.u64Base resq 1
133 .fs.u32Limit resd 1
134 .fs.Attr resd 1
135 .gs.Sel resw 1
136 .gs.PaddingSel resw 1
137 .gs.ValidSel resw 1
138 .gs.fFlags resw 1
139 .gs.u64Base resq 1
140 .gs.u32Limit resd 1
141 .gs.Attr resd 1
142 .eip resq 1
143 .eflags resq 1
144endstruc
145
146
147%define XSTATE_SIZE 8192
148
149;; Note! Updates here must be reflected in CPUMInternal.mac too!
150struc CPUMCTX
151 .eax resq 1
152 .ecx resq 1
153 .edx resq 1
154 .ebx resq 1
155 .esp resq 1
156 .ebp resq 1
157 .esi resq 1
158 .edi resq 1
159 .r8 resq 1
160 .r9 resq 1
161 .r10 resq 1
162 .r11 resq 1
163 .r12 resq 1
164 .r13 resq 1
165 .r14 resq 1
166 .r15 resq 1
167 .es.Sel resw 1
168 .es.PaddingSel resw 1
169 .es.ValidSel resw 1
170 .es.fFlags resw 1
171 .es.u64Base resq 1
172 .es.u32Limit resd 1
173 .es.Attr resd 1
174 .cs.Sel resw 1
175 .cs.PaddingSel resw 1
176 .cs.ValidSel resw 1
177 .cs.fFlags resw 1
178 .cs.u64Base resq 1
179 .cs.u32Limit resd 1
180 .cs.Attr resd 1
181 .ss.Sel resw 1
182 .ss.PaddingSel resw 1
183 .ss.ValidSel resw 1
184 .ss.fFlags resw 1
185 .ss.u64Base resq 1
186 .ss.u32Limit resd 1
187 .ss.Attr resd 1
188 .ds.Sel resw 1
189 .ds.PaddingSel resw 1
190 .ds.ValidSel resw 1
191 .ds.fFlags resw 1
192 .ds.u64Base resq 1
193 .ds.u32Limit resd 1
194 .ds.Attr resd 1
195 .fs.Sel resw 1
196 .fs.PaddingSel resw 1
197 .fs.ValidSel resw 1
198 .fs.fFlags resw 1
199 .fs.u64Base resq 1
200 .fs.u32Limit resd 1
201 .fs.Attr resd 1
202 .gs.Sel resw 1
203 .gs.PaddingSel resw 1
204 .gs.ValidSel resw 1
205 .gs.fFlags resw 1
206 .gs.u64Base resq 1
207 .gs.u32Limit resd 1
208 .gs.Attr resd 1
209 .eip resq 1
210 .eflags resq 1
211 .cr0 resq 1
212 .cr2 resq 1
213 .cr3 resq 1
214 .cr4 resq 1
215 .dr resq 8
216 .gdtrPadding resw 3
217 .gdtr resw 0
218 .gdtr.cbGdt resw 1
219 .gdtr.pGdt resq 1
220 .idtrPadding resw 3
221 .idtr resw 0
222 .idtr.cbIdt resw 1
223 .idtr.pIdt resq 1
224 .ldtr.Sel resw 1
225 .ldtr.PaddingSel resw 1
226 .ldtr.ValidSel resw 1
227 .ldtr.fFlags resw 1
228 .ldtr.u64Base resq 1
229 .ldtr.u32Limit resd 1
230 .ldtr.Attr resd 1
231 .tr.Sel resw 1
232 .tr.PaddingSel resw 1
233 .tr.ValidSel resw 1
234 .tr.fFlags resw 1
235 .tr.u64Base resq 1
236 .tr.u32Limit resd 1
237 .tr.Attr resd 1
238 .SysEnter.cs resb 8
239 .SysEnter.eip resb 8
240 .SysEnter.esp resb 8
241 .msrEFER resb 8
242 .msrSTAR resb 8
243 .msrPAT resb 8
244 .msrLSTAR resb 8
245 .msrCSTAR resb 8
246 .msrSFMASK resb 8
247 .msrKERNELGSBASE resb 8
248 .uMsrPadding0 resb 8
249 alignb 8
250 .aXcr resq 2
251 .fXStateMask resq 1
252 .pXStateR0 RTR0PTR_RES 1
253 alignb 8
254 .pXStateR3 RTR3PTR_RES 1
255 alignb 8
256 .pXStateRC RTRCPTR_RES 1
257 .aoffXState resw 64
258 .fWorldSwitcher resd 1
259 .fExtrn resq 1
260 alignb 8
261 .hwvirt.svm.uMsrHSavePa resq 1
262 .hwvirt.svm.GCPhysVmcb resq 1
263 .hwvirt.svm.pVmcbR0 RTR0PTR_RES 1
264 alignb 8
265 .hwvirt.svm.pVmcbR3 RTR3PTR_RES 1
266 alignb 8
267 .hwvirt.svm.HostState resb 184
268 .hwvirt.svm.uPrevPauseTick resq 1
269 .hwvirt.svm.cPauseFilter resw 1
270 .hwvirt.svm.cPauseFilterThreshold resw 1
271 .hwvirt.svm.fInterceptEvents resb 1
272 alignb 8
273 .hwvirt.svm.pvMsrBitmapR0 RTR0PTR_RES 1
274 alignb 8
275 .hwvirt.svm.pvMsrBitmapR3 RTR3PTR_RES 1
276 alignb 8
277 .hwvirt.svm.pvIoBitmapR0 RTR0PTR_RES 1
278 alignb 8
279 .hwvirt.svm.pvIoBitmapR3 RTR3PTR_RES 1
280 alignb 8
281 .hwvirt.svm.HCPhysVmcb RTHCPHYS_RES 1
282 .hwvirt.enmHwvirt resd 1
283 .hwvirt.fLocalForcedActions resd 1
284 .hwvirt.fGif resb 1
285 alignb 64
286endstruc
287
288%define CPUMCTX_WSF_IBPB_EXIT RT_BIT_32(0)
289%define CPUMCTX_WSF_IBPB_ENTRY RT_BIT_32(1)
290
291%define CPUMSELREG_FLAGS_VALID 0x0001
292%define CPUMSELREG_FLAGS_STALE 0x0002
293%define CPUMSELREG_FLAGS_VALID_MASK 0x0003
294
295
296;;
297; Guest MSR state.
298struc CPUMCTXMSRS
299 .au64 resq 64
300endstruc
301
302
303%endif
304
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