vm.h@ 26685

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1	/** @file
2	* VM - The Virtual Machine, data. (VMM)
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a Virtual CPU.
48	*
49	* The basic state indicated here is whether the CPU has been started or not. In
50	* addition, there are sub-states when started for assisting scheduling (GVMM
51	* mostly).
52	*
53	* The transision out of the STOPPED state is done by a vmR3PowerOn.
54	* The transision back to the STOPPED state is done by vmR3PowerOff.
55	*
56	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58	*/
59	typedef enum VMCPUSTATE
60	{
61	/** The customary invalid zero. */
62	VMCPUSTATE_INVALID = 0,
63
64	/** Virtual CPU has not yet been started. */
65	VMCPUSTATE_STOPPED,
66
67	/** CPU started. */
68	VMCPUSTATE_STARTED,
69	/** Executing guest code and can be poked. */
70	VMCPUSTATE_STARTED_EXEC,
71	/** Executing guest code in the recompiler. */
72	VMCPUSTATE_STARTED_EXEC_REM,
73	/** Halted. */
74	VMCPUSTATE_STARTED_HALTED,
75
76	/** The end of valid virtual CPU states. */
77	VMCPUSTATE_END,
78
79	/** Ensure 32-bit type. */
80	VMCPUSTATE_32BIT_HACK = 0x7fffffff
81	} VMCPUSTATE;
82
83
84	/**
85	* Per virtual CPU data.
86	*/
87	typedef struct VMCPU
88	{
89	/** Per CPU forced action.
90	* See the VMCPU_FF_* \#defines. Updated atomically. */
91	uint32_t volatile fLocalForcedActions;
92	/** The CPU state. */
93	VMCPUSTATE volatile enmState;
94
95	/** Pointer to the ring-3 UVMCPU structure. */
96	PUVMCPU pUVCpu;
97	/** Ring-3 Host Context VM Pointer. */
98	PVMR3 pVMR3;
99	/** Ring-0 Host Context VM Pointer. */
100	PVMR0 pVMR0;
101	/** Raw-mode Context VM Pointer. */
102	PVMRC pVMRC;
103	/** The CPU ID.
104	* This is the index into the VM::aCpu array. */
105	VMCPUID idCpu;
106	/** The native thread handle. */
107	RTNATIVETHREAD hNativeThread;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111
112	/** Align the next bit on a 64-byte boundary and make sure it starts at the same
113	* offset in both 64-bit and 32-bit builds.
114	*
115	* @remarks The aligments of the members that are larger than 48 bytes should be
116	* 64-byte for cache line reasons. structs containing small amounts of
117	* data could be lumped together at the end with a < 64 byte padding
118	* following it (to grow into and align the struct size).
119	* */
120	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 28 : 12];
121
122	/** CPUM part. */
123	union
124	{
125	#ifdef ___CPUMInternal_h
126	struct CPUMCPU s;
127	#endif
128	uint8_t padding[3456]; /* multiple of 64 */
129	} cpum;
130
131	/** HWACCM part. */
132	union
133	{
134	#ifdef ___HWACCMInternal_h
135	struct HWACCMCPU s;
136	#endif
137	uint8_t padding[5312]; /* multiple of 64 */
138	} hwaccm;
139
140	/** EM part. */
141	union
142	{
143	#ifdef ___EMInternal_h
144	struct EMCPU s;
145	#endif
146	uint8_t padding[1408]; /* multiple of 64 */
147	} em;
148
149	/** TRPM part. */
150	union
151	{
152	#ifdef ___TRPMInternal_h
153	struct TRPMCPU s;
154	#endif
155	uint8_t padding[128]; /* multiple of 64 */
156	} trpm;
157
158	/** TM part. */
159	union
160	{
161	#ifdef ___TMInternal_h
162	struct TMCPU s;
163	#endif
164	uint8_t padding[64]; /* multiple of 64 */
165	} tm;
166
167	/** VMM part. */
168	union
169	{
170	#ifdef ___VMMInternal_h
171	struct VMMCPU s;
172	#endif
173	uint8_t padding[384]; /* multiple of 64 */
174	} vmm;
175
176	/** PDM part. */
177	union
178	{
179	#ifdef ___PDMInternal_h
180	struct PDMCPU s;
181	#endif
182	uint8_t padding[128]; /* multiple of 64 */
183	} pdm;
184
185	/** IOM part. */
186	union
187	{
188	#ifdef ___IOMInternal_h
189	struct IOMCPU s;
190	#endif
191	uint8_t padding[512]; /* multiple of 64 */
192	} iom;
193
194	/** DBGF part.
195	* @todo Combine this with other tiny structures. */
196	union
197	{
198	#ifdef ___DBGFInternal_h
199	struct DBGFCPU s;
200	#endif
201	uint8_t padding[64]; /* multiple of 64 */
202	} dbgf;
203
204	/** Align the following members on page boundrary. */
205	uint8_t abAlignment2[768];
206
207	/** PGM part. */
208	union
209	{
210	#ifdef ___PGMInternal_h
211	struct PGMCPU s;
212	#endif
213	uint8_t padding[321024]; / multiple of 4096 */
214	} pgm;
215
216	} VMCPU;
217
218
219	/** @name Operations on VMCPU::enmState
220	* @{ */
221	/** Gets the VMCPU state. */
222	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
223	/** Sets the VMCPU state. */
224	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
225	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
226	/** Cmpares and sets the VMCPU state. */
227	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
228	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
229	/** Checks the VMCPU state. */
230	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
231	do { \
232	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
233	AssertMsg(enmState == (enmExpectedState), \
234	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
235	enmState, enmExpectedState, (pVCpu)->idCpu)); \
236	} while (0)
237	/** Tests if the state means that the CPU is started. */
238	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
239	/** Tests if the state means that the CPU is stopped. */
240	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
241	/** @} */
242
243
244	/** The name of the Guest Context VMM Core module. */
245	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
246	/** The name of the Ring 0 Context VMM Core module. */
247	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
248
249	/** VM Forced Action Flags.
250	*
251	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
252	* action mask of a VM.
253	*
254	* @{
255	*/
256	/** The virtual sync clock has been stopped, go to TM until it has been
257	* restarted... */
258	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
259	/** PDM Queues are pending. */
260	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
261	/** The bit number for VM_FF_PDM_QUEUES. */
262	#define VM_FF_PDM_QUEUES_BIT 3
263	/** PDM DMA transfers are pending. */
264	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
265	/** The bit number for VM_FF_PDM_DMA. */
266	#define VM_FF_PDM_DMA_BIT 4
267	/** This action forces the VM to call DBGF so DBGF can service debugger
268	* requests in the emulation thread.
269	* This action flag stays asserted till DBGF clears it.*/
270	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
271	/** The bit number for VM_FF_DBGF. */
272	#define VM_FF_DBGF_BIT 8
273	/** This action forces the VM to service pending requests from other
274	* thread or requests which must be executed in another context. */
275	#define VM_FF_REQUEST RT_BIT_32(9)
276	/** Terminate the VM immediately. */
277	#define VM_FF_TERMINATE RT_BIT_32(10)
278	/** Reset the VM. (postponed) */
279	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
280	/** The bit number for VM_FF_RESET. */
281	#define VM_FF_RESET_BIT 11
282	/** EMT rendezvous in VMM. */
283	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
284	#define VM_FF_EMT_RENDEZVOUS_BIT 12
285
286	/** PGM needs to allocate handy pages. */
287	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
288	/** PGM is out of memory.
289	* Abandon all loops and code paths which can be resumed and get up to the EM
290	* loops. */
291	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
292	/** PGM is about to perform a lightweight pool flush
293	* Guest SMP: all EMT threads should return to ring 3
294	*/
295	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
296	/** REM needs to be informed about handler changes. */
297	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
298	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
299	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
300	/** Suspend the VM - debug only. */
301	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
302
303
304	/** This action forces the VM to check any pending interrups on the APIC. */
305	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
306	/** This action forces the VM to check any pending interrups on the PIC. */
307	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
308	/** This action forces the VM to schedule and run pending timer (TM).
309	* @remarks Don't move - PATM compatability. */
310	#define VMCPU_FF_TIMER RT_BIT_32(2)
311	/** This action forces the VM to check any pending NMIs. */
312	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
313	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
314	/** This action forces the VM to check any pending SMIs. */
315	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
316	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
317	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
318	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
319	/** This action forces the VM to service pending requests from other
320	* thread or requests which must be executed in another context. */
321	#define VMCPU_FF_REQUEST RT_BIT_32(9)
322	/** This action forces the VM to resync the page tables before going
323	* back to execute guest code. (GLOBAL FLUSH) */
324	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
325	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
326	* (NON-GLOBAL FLUSH) */
327	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
328	/** Check for pending TLB shootdown actions. */
329	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
330	/** Check for pending TLB flush action. */
331	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
332	/** The bit number for VMCPU_FF_TLB_FLUSH. */
333	#define VMCPU_FF_TLB_FLUSH_BIT 19
334	/** Check the interupt and trap gates */
335	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
336	/** Check Guest's TSS ring 0 stack */
337	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
338	/** Check Guest's GDT table */
339	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
340	/** Check Guest's LDT table */
341	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
342	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
343	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
344	/** CSAM needs to scan the page that's being executed */
345	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
346	/** CSAM needs to do some homework. */
347	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
348	/** Force return to Ring-3. */
349	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
350
351	/** Externally VM forced actions. Used to quit the idle/wait loop. */
352	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
353	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
354	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
355
356	/** Externally forced VM actions. Used to quit the idle/wait loop. */
357	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
358	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
359	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \| VMCPU_FF_TIMER)
360
361	/** High priority VM pre-execution actions. */
362	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \| VM_FF_DEBUG_SUSPEND \
363	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
364	/** High priority VMCPU pre-execution actions. */
365	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_PGM_SYNC_CR3 \
366	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
367	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
368
369	/** High priority VM pre raw-mode execution mask. */
370	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
371	/** High priority VMCPU pre raw-mode execution mask. */
372	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
373	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
374
375	/** High priority post-execution actions. */
376	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
377	/** High priority post-execution actions. */
378	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
379
380	/** Normal priority VM post-execution actions. */
381	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
382	/** Normal priority VMCPU post-execution actions. */
383	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
384
385	/** Normal priority VM actions. */
386	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
387	/** Normal priority VMCPU actions. */
388	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
389
390	/** Flags to clear before resuming guest execution. */
391	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
392
393	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
394	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
395	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
396	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER)
397
398	/** All the forced VM flags. */
399	#define VM_FF_ALL_MASK (~0U)
400	/** All the forced VMCPU flags. */
401	#define VMCPU_FF_ALL_MASK (~0U)
402
403	/** All the forced VM flags. */
404	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
405	/** All the forced VMCPU flags. */
406	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT))
407
408	/** @} */
409
410	/** @def VM_FF_SET
411	* Sets a force action flag.
412	*
413	* @param pVM VM Handle.
414	* @param fFlag The flag to set.
415	*/
416	#if 1
417	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
418	#else
419	# define VM_FF_SET(pVM, fFlag) \
420	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
421	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
422	} while (0)
423	#endif
424
425	/** @def VMCPU_FF_SET
426	* Sets a force action flag for the given VCPU.
427	*
428	* @param pVCpu VMCPU Handle.
429	* @param fFlag The flag to set.
430	*/
431	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
432
433	/** @def VM_FF_CLEAR
434	* Clears a force action flag.
435	*
436	* @param pVM VM Handle.
437	* @param fFlag The flag to clear.
438	*/
439	#if 1
440	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
441	#else
442	# define VM_FF_CLEAR(pVM, fFlag) \
443	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
444	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
445	} while (0)
446	#endif
447
448	/** @def VMCPU_FF_CLEAR
449	* Clears a force action flag for the given VCPU.
450	*
451	* @param pVCpu VMCPU Handle.
452	* @param fFlag The flag to clear.
453	*/
454	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
455
456	/** @def VM_FF_ISSET
457	* Checks if a force action flag is set.
458	*
459	* @param pVM VM Handle.
460	* @param fFlag The flag to check.
461	*/
462	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
463
464	/** @def VMCPU_FF_ISSET
465	* Checks if a force action flag is set for the given VCPU.
466	*
467	* @param pVCpu VMCPU Handle.
468	* @param fFlag The flag to check.
469	*/
470	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
471
472	/** @def VM_FF_ISPENDING
473	* Checks if one or more force action in the specified set is pending.
474	*
475	* @param pVM VM Handle.
476	* @param fFlags The flags to check for.
477	*/
478	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
479
480	/** @def VM_FF_TESTANDCLEAR
481	* Checks if one (!) force action in the specified set is pending and clears it atomically
482	*
483	* @returns true if the bit was set.
484	* @returns false if the bit was clear.
485	* @param pVM VM Handle.
486	* @param iBit Bit position to check and clear
487	*/
488	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
489
490	/** @def VMCPU_FF_TESTANDCLEAR
491	* Checks if one (!) force action in the specified set is pending and clears it atomically
492	*
493	* @returns true if the bit was set.
494	* @returns false if the bit was clear.
495	* @param pVCpu VMCPU Handle.
496	* @param iBit Bit position to check and clear
497	*/
498	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
499
500	/** @def VMCPU_FF_ISPENDING
501	* Checks if one or more force action in the specified set is pending for the given VCPU.
502	*
503	* @param pVCpu VMCPU Handle.
504	* @param fFlags The flags to check for.
505	*/
506	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
507
508	/** @def VM_FF_ISPENDING
509	* Checks if one or more force action in the specified set is pending while one
510	* or more other ones are not.
511	*
512	* @param pVM VM Handle.
513	* @param fFlags The flags to check for.
514	* @param fExcpt The flags that should not be set.
515	*/
516	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
517
518	/** @def VMCPU_FF_IS_PENDING_EXCEPT
519	* Checks if one or more force action in the specified set is pending for the given
520	* VCPU while one or more other ones are not.
521	*
522	* @param pVCpu VMCPU Handle.
523	* @param fFlags The flags to check for.
524	* @param fExcpt The flags that should not be set.
525	*/
526	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
527
528	/** @def VM_IS_EMT
529	* Checks if the current thread is the emulation thread (EMT).
530	*
531	* @remark The ring-0 variation will need attention if we expand the ring-0
532	* code to let threads other than EMT mess around with the VM.
533	*/
534	#ifdef IN_RC
535	# define VM_IS_EMT(pVM) true
536	#else
537	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
538	#endif
539
540	/** @def VMCPU_IS_EMT
541	* Checks if the current thread is the emulation thread (EMT) for the specified
542	* virtual CPU.
543	*/
544	#ifdef IN_RC
545	# define VMCPU_IS_EMT(pVCpu) true
546	#else
547	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
548	#endif
549
550	/** @def VM_ASSERT_EMT
551	* Asserts that the current thread IS the emulation thread (EMT).
552	*/
553	#ifdef IN_RC
554	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
555	#elif defined(IN_RING0)
556	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
557	#else
558	# define VM_ASSERT_EMT(pVM) \
559	AssertMsg(VM_IS_EMT(pVM), \
560	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
561	#endif
562
563	/** @def VMCPU_ASSERT_EMT
564	* Asserts that the current thread IS the emulation thread (EMT) of the
565	* specified virtual CPU.
566	*/
567	#ifdef IN_RC
568	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
569	#elif defined(IN_RING0)
570	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
571	#else
572	# define VMCPU_ASSERT_EMT(pVCpu) \
573	AssertMsg(VMCPU_IS_EMT(pVCpu), \
574	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
575	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
576	#endif
577
578	/** @def VM_ASSERT_EMT_RETURN
579	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
580	*/
581	#ifdef IN_RC
582	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
583	#elif defined(IN_RING0)
584	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
585	#else
586	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
587	AssertMsgReturn(VM_IS_EMT(pVM), \
588	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
589	(rc))
590	#endif
591
592	/** @def VMCPU_ASSERT_EMT_RETURN
593	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
594	*/
595	#ifdef IN_RC
596	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
597	#elif defined(IN_RING0)
598	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
599	#else
600	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
601	AssertMsg(VMCPU_IS_EMT(pVCpu), \
602	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
603	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
604	(rc))
605	#endif
606
607	/** @def VM_ASSERT_EMT0
608	* Asserts that the current thread IS emulation thread \#0 (EMT0).
609	*/
610	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
611
612	/** @def VM_ASSERT_EMT0_RETURN
613	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
614	* it isn't.
615	*/
616	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
617
618
619	/**
620	* Asserts that the current thread is NOT the emulation thread.
621	*/
622	#define VM_ASSERT_OTHER_THREAD(pVM) \
623	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
624
625
626	/** @def VM_ASSERT_STATE_RETURN
627	* Asserts a certain VM state.
628	*/
629	#define VM_ASSERT_STATE(pVM, _enmState) \
630	AssertMsg((pVM)->enmVMState == (_enmState), \
631	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
632
633	/** @def VM_ASSERT_STATE_RETURN
634	* Asserts a certain VM state and returns if it doesn't match.
635	*/
636	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
637	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
638	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
639	(rc))
640
641	/** @def VM_ASSERT_VALID_EXT_RETURN
642	* Asserts a the VM handle is valid for external access, i.e. not being
643	* destroy or terminated.
644	*/
645	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
646	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
647	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
648	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
649	&& VM_IS_EMT(pVM))), \
650	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
651	? VMGetStateName(pVM->enmVMState) : ""), \
652	(rc))
653
654	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
655	* Asserts a the VMCPU handle is valid for external access, i.e. not being
656	* destroy or terminated.
657	*/
658	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
659	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
660	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
661	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
662	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
663	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
664	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
665	(rc))
666
667
668	/** This is the VM structure.
669	*
670	* It contains (nearly?) all the VM data which have to be available in all
671	* contexts. Even if it contains all the data the idea is to use APIs not
672	* to modify all the members all around the place. Therefore we make use of
673	* unions to hide everything which isn't local to the current source module.
674	* This means we'll have to pay a little bit of attention when adding new
675	* members to structures in the unions and make sure to keep the padding sizes
676	* up to date.
677	*
678	* Run tstVMStructSize after update!
679	*/
680	typedef struct VM
681	{
682	/** The state of the VM.
683	* This field is read only to everyone except the VM and EM. */
684	VMSTATE volatile enmVMState;
685	/** Forced action flags.
686	* See the VM_FF_* \#defines. Updated atomically.
687	*/
688	volatile uint32_t fGlobalForcedActions;
689	/** Pointer to the array of page descriptors for the VM structure allocation. */
690	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
691	/** Session handle. For use when calling SUPR0 APIs. */
692	PSUPDRVSESSION pSession;
693	/** Pointer to the ring-3 VM structure. */
694	PUVM pUVM;
695	/** Ring-3 Host Context VM Pointer. */
696	R3PTRTYPE(struct VM *) pVMR3;
697	/** Ring-0 Host Context VM Pointer. */
698	R0PTRTYPE(struct VM *) pVMR0;
699	/** Raw-mode Context VM Pointer. */
700	RCPTRTYPE(struct VM *) pVMRC;
701
702	/** The GVM VM handle. Only the GVM should modify this field. */
703	uint32_t hSelf;
704	/** Number of virtual CPUs. */
705	uint32_t cCpus;
706
707	/** Size of the VM structure including the VMCPU array. */
708	uint32_t cbSelf;
709
710	/** Offset to the VMCPU array starting from beginning of this structure. */
711	uint32_t offVMCPU;
712
713	/** Reserved; alignment. */
714	uint32_t u32Reserved[6];
715
716	/** @name Public VMM Switcher APIs
717	* @{ */
718	/**
719	* Assembly switch entry point for returning to host context.
720	* This function will clean up the stack frame.
721	*
722	* @param eax The return code, register.
723	* @param Ctx The guest core context.
724	* @remark Assume interrupts disabled.
725	*/
726	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
727
728	/**
729	* Assembly switch entry point for returning to host context.
730	*
731	* This is an alternative entry point which we'll be using when the we have the
732	* hypervisor context and need to save that before going to the host.
733	*
734	* This is typically useful when abandoning the hypervisor because of a trap
735	* and want the trap state to be saved.
736	*
737	* @param eax The return code, register.
738	* @param ecx Pointer to the hypervisor core context, register.
739	* @remark Assume interrupts disabled.
740	*/
741	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
742
743	/**
744	* Assembly switch entry point for returning to host context.
745	*
746	* This is an alternative to the two *Ctx APIs and implies that the context has already
747	* been saved, or that it's just a brief return to HC and that the caller intends to resume
748	* whatever it is doing upon 'return' from this call.
749	*
750	* @param eax The return code, register.
751	* @remark Assume interrupts disabled.
752	*/
753	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
754	/** @} */
755
756
757	/** @name Various VM data owned by VM.
758	* @{ */
759	RTTHREAD uPadding1;
760	/** The native handle of ThreadEMT. Getting the native handle
761	* is generally faster than getting the IPRT one (except on OS/2 :-). */
762	RTNATIVETHREAD uPadding2;
763	/** @} */
764
765
766	/** @name Various items that are frequently accessed.
767	* @{ */
768	/** Raw ring-3 indicator. */
769	bool fRawR3Enabled;
770	/** Raw ring-0 indicator. */
771	bool fRawR0Enabled;
772	/** PATM enabled flag.
773	* This is placed here for performance reasons. */
774	bool fPATMEnabled;
775	/** CSAM enabled flag.
776	* This is placed here for performance reasons. */
777	bool fCSAMEnabled;
778	/** Hardware VM support is available and enabled.
779	* This is placed here for performance reasons. */
780	bool fHWACCMEnabled;
781	/** Hardware VM support is required and non-optional.
782	* This is initialized together with the rest of the VM structure. */
783	bool fHwVirtExtForced;
784	/** PARAV enabled flag. */
785	bool fPARAVEnabled;
786	/** Large page enabled flag. */
787	bool fUseLargePages;
788	/** @} */
789
790
791	/* padding to make gnuc put the StatQemuToGC where msc does. */
792	#if HC_ARCH_BITS == 32
793	uint32_t padding0;
794	#endif
795
796	/** Profiling the total time from Qemu to GC. */
797	STAMPROFILEADV StatTotalQemuToGC;
798	/** Profiling the total time from GC to Qemu. */
799	STAMPROFILEADV StatTotalGCToQemu;
800	/** Profiling the total time spent in GC. */
801	STAMPROFILEADV StatTotalInGC;
802	/** Profiling the total time spent not in Qemu. */
803	STAMPROFILEADV StatTotalInQemu;
804	/** Profiling the VMMSwitcher code for going to GC. */
805	STAMPROFILEADV StatSwitcherToGC;
806	/** Profiling the VMMSwitcher code for going to HC. */
807	STAMPROFILEADV StatSwitcherToHC;
808	STAMPROFILEADV StatSwitcherSaveRegs;
809	STAMPROFILEADV StatSwitcherSysEnter;
810	STAMPROFILEADV StatSwitcherDebug;
811	STAMPROFILEADV StatSwitcherCR0;
812	STAMPROFILEADV StatSwitcherCR4;
813	STAMPROFILEADV StatSwitcherJmpCR3;
814	STAMPROFILEADV StatSwitcherRstrRegs;
815	STAMPROFILEADV StatSwitcherLgdt;
816	STAMPROFILEADV StatSwitcherLidt;
817	STAMPROFILEADV StatSwitcherLldt;
818	STAMPROFILEADV StatSwitcherTSS;
819
820	/** Padding - the unions must be aligned on a 64 bytes boundrary and the unions
821	* must start at the same offset on both 64-bit and 32-bit hosts. */
822	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 48 : 24];
823
824	/** CPUM part. */
825	union
826	{
827	#ifdef ___CPUMInternal_h
828	struct CPUM s;
829	#endif
830	uint8_t padding[1472]; /* multiple of 64 */
831	} cpum;
832
833	/** VMM part. */
834	union
835	{
836	#ifdef ___VMMInternal_h
837	struct VMM s;
838	#endif
839	uint8_t padding[1536]; /* multiple of 64 */
840	} vmm;
841
842	/** PGM part. */
843	union
844	{
845	#ifdef ___PGMInternal_h
846	struct PGM s;
847	#endif
848	uint8_t padding[40962+6080]; / multiple of 64 */
849	} pgm;
850
851	/** HWACCM part. */
852	union
853	{
854	#ifdef ___HWACCMInternal_h
855	struct HWACCM s;
856	#endif
857	uint8_t padding[5376]; /* multiple of 64 */
858	} hwaccm;
859
860	/** TRPM part. */
861	union
862	{
863	#ifdef ___TRPMInternal_h
864	struct TRPM s;
865	#endif
866	uint8_t padding[5184]; /* multiple of 64 */
867	} trpm;
868
869	/** SELM part. */
870	union
871	{
872	#ifdef ___SELMInternal_h
873	struct SELM s;
874	#endif
875	uint8_t padding[576]; /* multiple of 64 */
876	} selm;
877
878	/** MM part. */
879	union
880	{
881	#ifdef ___MMInternal_h
882	struct MM s;
883	#endif
884	uint8_t padding[192]; /* multiple of 64 */
885	} mm;
886
887	/** PDM part. */
888	union
889	{
890	#ifdef ___PDMInternal_h
891	struct PDM s;
892	#endif
893	uint8_t padding[1600]; /* multiple of 64 */
894	} pdm;
895
896	/** IOM part. */
897	union
898	{
899	#ifdef ___IOMInternal_h
900	struct IOM s;
901	#endif
902	uint8_t padding[832]; /* multiple of 64 */
903	} iom;
904
905	/** PATM part. */
906	union
907	{
908	#ifdef ___PATMInternal_h
909	struct PATM s;
910	#endif
911	uint8_t padding[768]; /* multiple of 64 */
912	} patm;
913
914	/** CSAM part. */
915	union
916	{
917	#ifdef ___CSAMInternal_h
918	struct CSAM s;
919	#endif
920	uint8_t padding[1088]; /* multiple of 64 */
921	} csam;
922
923	/** EM part. */
924	union
925	{
926	#ifdef ___EMInternal_h
927	struct EM s;
928	#endif
929	uint8_t padding[256]; /* multiple of 64 */
930	} em;
931
932	/** TM part. */
933	union
934	{
935	#ifdef ___TMInternal_h
936	struct TM s;
937	#endif
938	uint8_t padding[2112]; /* multiple of 64 */
939	} tm;
940
941	/** DBGF part. */
942	union
943	{
944	#ifdef ___DBGFInternal_h
945	struct DBGF s;
946	#endif
947	uint8_t padding[2368]; /* multiple of 64 */
948	} dbgf;
949
950	/** SSM part. */
951	union
952	{
953	#ifdef ___SSMInternal_h
954	struct SSM s;
955	#endif
956	uint8_t padding[128]; /* multiple of 64 */
957	} ssm;
958
959	/** REM part. */
960	union
961	{
962	#ifdef ___REMInternal_h
963	struct REM s;
964	#endif
965	uint8_t padding[0x11100]; /* multiple of 64 */
966	} rem;
967
968	/* ---- begin small stuff ---- */
969
970	/** VM part. */
971	union
972	{
973	#ifdef ___VMInternal_h
974	struct VMINT s;
975	#endif
976	uint8_t padding[24]; /* multiple of 8 */
977	} vm;
978
979	/** CFGM part. */
980	union
981	{
982	#ifdef ___CFGMInternal_h
983	struct CFGM s;
984	#endif
985	uint8_t padding[8]; /* multiple of 8 */
986	} cfgm;
987
988	/** PARAV part. */
989	union
990	{
991	#ifdef ___PARAVInternal_h
992	struct PARAV s;
993	#endif
994	uint8_t padding[24]; /* multiple of 8 */
995	} parav;
996
997	/** Padding for aligning the cpu array on a page boundrary. */
998	uint8_t abAlignment2[2056];
999
1000	/* ---- end small stuff ---- */
1001
1002	/** VMCPU array for the configured number of virtual CPUs.
1003	* Must be aligned on a page boundrary for TLB hit reasons as well as
1004	* alignment of VMCPU members. */
1005	VMCPU aCpus[1];
1006	} VM;
1007
1008
1009	#ifdef IN_RC
1010	RT_C_DECLS_BEGIN
1011
1012	/** The VM structure.
1013	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1014	* of those magic globals which we should avoid using.
1015	*/
1016	extern DECLIMPORT(VM) g_VM;
1017
1018	RT_C_DECLS_END
1019	#endif
1020
1021	/** @} */
1022
1023	#endif

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