VirtualBox

source: vbox/trunk/include/VBox/sup.mac@ 79853

Last change on this file since 79853 was 76553, checked in by vboxsync, 6 years ago

scm --update-copyright-year

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File size: 5.1 KB
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1; $Id: sup.mac 76553 2019-01-01 01:45:53Z vboxsync $
2;; @file
3; SUP - Support Library, assembly definitions.
4;
5
6;
7; Copyright (C) 2006-2019 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___VBox_sup_mac
28%define ___VBox_sup_mac
29
30struc SUPGIPCPU
31 .u32TransactionId resd 1
32 .u32UpdateIntervalTSC resd 1
33 .u64NanoTS resq 1
34 .u64TSC resq 1
35 .u64CpuHz resq 1
36 .i64TSCDelta resq 1
37 .cErrors resd 1
38 .iTSCHistoryHead resd 1
39 .au32TSCHistory resd 8
40 .u32PrevUpdateIntervalNS resd 1
41 .u32Reserved resd 1
42 .u64TSCSample resq 1
43 .au32Reserved1 resd 3
44 .enmState resd 1
45 .idCpu resd 1
46 .iCpuSet resw 1
47 .iCpuGroup resw 1
48 .iCpuGroupMember resw 1
49 .idApic resw 1
50 .iReservedForNumaNode resd 1
51endstruc
52
53%define SUPGIPUSETSCDELTA_NOT_APPLICABLE 0
54%define SUPGIPUSETSCDELTA_ZERO_CLAIMED 1
55%define SUPGIPUSETSCDELTA_PRACTICALLY_ZERO 2
56%define SUPGIPUSETSCDELTA_ROUGHLY_ZERO 3
57%define SUPGIPUSETSCDELTA_NOT_ZERO 4
58
59%define SUPGIPGETCPU_APIC_ID 1
60%define SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS 2
61%define SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS 4
62%define SUPGIPGETCPU_RDTSCP_GROUP_IN_CH_NUMBER_IN_CL 8
63
64
65%define SUPGLOBALINFOPAGE_MAGIC 0x19590106
66struc SUPGLOBALINFOPAGE
67 .u32Magic resd 1
68 .u32Version resd 1
69 .u32Mode resd 1
70 .cCpus resw 1
71 .cPages resw 1
72 .u32UpdateHz resd 1
73 .u32UpdateIntervalNS resd 1
74 .u64NanoTSLastUpdateHz resq 1
75 .u64CpuHz resq 1
76 .OnlineCpuSet resq 4
77 .PresentCpuSet resq 4
78 .PossibleCpuSet resq 4
79 .cOnlineCpus resw 1
80 .cPresentCpus resw 1
81 .cPossibleCpus resw 1
82 .cPossibleCpuGroups resw 1
83 .idCpuMax resd 1
84 .enmUseTscDelta resd 1
85 .fGetGipCpu resd 1
86 .fFlags resd 1
87 .au32Padding1 resd 24
88 .aiCpuFromApicId resw 256
89 .aiCpuFromCpuSetIdx resw 256
90 .aoffCpuGroup resw 256
91 .aCPUs resb SUPGIPCPU_size
92endstruc
93
94struc SUPDRVTRACERUSRCTX32
95 .idProbe resd 1
96 .cBits resb 1
97 .abReserved resb 3
98 .u.X86.uVtgProbeLoc resd 1
99 .u.X86.aArgs resd 20
100 .u.X86.eip resd 1
101 .u.X86.eflags resd 1
102 .u.X86.eax resd 1
103 .u.X86.ecx resd 1
104 .u.X86.edx resd 1
105 .u.X86.ebx resd 1
106 .u.X86.esp resd 1
107 .u.X86.ebp resd 1
108 .u.X86.esi resd 1
109 .u.X86.edi resd 1
110 .u.X86.cs resw 1
111 .u.X86.ss resw 1
112 .u.X86.ds resw 1
113 .u.X86.es resw 1
114 .u.X86.fs resw 1
115 .u.X86.gs resw 1
116endstruc
117
118struc SUPDRVTRACERUSRCTX64
119 .idProbe resd 1
120 .cBits resb 1
121 .abReserved resb 3
122 .u.Amd64.uVtgProbeLoc resq 1
123 .u.Amd64.aArgs resq 10
124 .u.Amd64.rip resq 1
125 .u.Amd64.rflags resq 1
126 .u.Amd64.rax resq 1
127 .u.Amd64.rcx resq 1
128 .u.Amd64.rdx resq 1
129 .u.Amd64.rbx resq 1
130 .u.Amd64.rsp resq 1
131 .u.Amd64.rbp resq 1
132 .u.Amd64.rsi resq 1
133 .u.Amd64.rdi resq 1
134 .u.Amd64.r8 resq 1
135 .u.Amd64.r9 resq 1
136 .u.Amd64.r10 resq 1
137 .u.Amd64.r11 resq 1
138 .u.Amd64.r12 resq 1
139 .u.Amd64.r13 resq 1
140 .u.Amd64.r14 resq 1
141 .u.Amd64.r15 resq 1
142endstruc
143
144%endif
145
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