| [5477] | 1 | ; $Id: sup.mac 98103 2023-01-17 14:15:46Z vboxsync $
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| 2 | ;; @file
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| 3 | ; SUP - Support Library, assembly definitions.
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| 4 | ;
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| 5 |
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| 6 | ;
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| [98103] | 7 | ; Copyright (C) 2006-2023 Oracle and/or its affiliates.
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| [5477] | 8 | ;
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| [96407] | 9 | ; This file is part of VirtualBox base platform packages, as
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| 10 | ; available from https://www.virtualbox.org.
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| [5477] | 11 | ;
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| [96407] | 12 | ; This program is free software; you can redistribute it and/or
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| 13 | ; modify it under the terms of the GNU General Public License
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| 14 | ; as published by the Free Software Foundation, in version 3 of the
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| 15 | ; License.
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| 16 | ;
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| 17 | ; This program is distributed in the hope that it will be useful, but
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| 18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | ; General Public License for more details.
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| 21 | ;
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| 22 | ; You should have received a copy of the GNU General Public License
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| 23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | ;
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| [5999] | 25 | ; The contents of this file may alternatively be used under the terms
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| 26 | ; of the Common Development and Distribution License Version 1.0
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| [96407] | 27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 28 | ; in the VirtualBox distribution, in which case the provisions of the
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| [5999] | 29 | ; CDDL are applicable instead of those of the GPL.
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| [5477] | 30 | ;
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| [5999] | 31 | ; You may elect to license modified versions of this file under the
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| 32 | ; terms and conditions of either the GPL or the CDDL or both.
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| 33 | ;
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| [96407] | 34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 35 | ;
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| [5477] | 36 |
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| 37 | %ifndef ___VBox_sup_mac
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| 38 | %define ___VBox_sup_mac
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| 39 |
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| 40 | struc SUPGIPCPU
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| [25459] | 41 | .u32TransactionId resd 1
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| 42 | .u32UpdateIntervalTSC resd 1
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| 43 | .u64NanoTS resq 1
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| 44 | .u64TSC resq 1
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| 45 | .u64CpuHz resq 1
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| [52618] | 46 | .i64TSCDelta resq 1
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| [25459] | 47 | .cErrors resd 1
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| 48 | .iTSCHistoryHead resd 1
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| 49 | .au32TSCHistory resd 8
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| 50 | .u32PrevUpdateIntervalNS resd 1
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| [64256] | 51 | .u32Reserved resd 1
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| [52618] | 52 | .u64TSCSample resq 1
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| [64256] | 53 | .au32Reserved1 resd 3
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| [36254] | 54 | .enmState resd 1
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| 55 | .idCpu resd 1
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| 56 | .iCpuSet resw 1
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| [64256] | 57 | .iCpuGroup resw 1
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| 58 | .iCpuGroupMember resw 1
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| [36254] | 59 | .idApic resw 1
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| [64256] | 60 | .iReservedForNumaNode resd 1
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| [5477] | 61 | endstruc
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| 62 |
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| [54252] | 63 | %define SUPGIPUSETSCDELTA_NOT_APPLICABLE 0
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| 64 | %define SUPGIPUSETSCDELTA_ZERO_CLAIMED 1
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| 65 | %define SUPGIPUSETSCDELTA_PRACTICALLY_ZERO 2
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| 66 | %define SUPGIPUSETSCDELTA_ROUGHLY_ZERO 3
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| 67 | %define SUPGIPUSETSCDELTA_NOT_ZERO 4
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| 68 |
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| [81071] | 69 | %define SUPGIPGETCPU_APIC_ID 1
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| 70 | %define SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS 2
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| 71 | %define SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS 4
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| 72 | %define SUPGIPGETCPU_RDTSCP_GROUP_IN_CH_NUMBER_IN_CL 8
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| 73 | %define SUPGIPGETCPU_APIC_ID_EXT_0B 16
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| 74 | %define SUPGIPGETCPU_APIC_ID_EXT_8000001E 32
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| [54252] | 75 |
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| 76 |
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| [5477] | 77 | %define SUPGLOBALINFOPAGE_MAGIC 0x19590106
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| 78 | struc SUPGLOBALINFOPAGE
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| [25459] | 79 | .u32Magic resd 1
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| 80 | .u32Version resd 1
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| 81 | .u32Mode resd 1
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| [36254] | 82 | .cCpus resw 1
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| 83 | .cPages resw 1
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| [25459] | 84 | .u32UpdateHz resd 1
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| 85 | .u32UpdateIntervalNS resd 1
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| 86 | .u64NanoTSLastUpdateHz resq 1
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| [53269] | 87 | .u64CpuHz resq 1
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| [36262] | 88 | .cOnlineCpus resw 1
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| 89 | .cPresentCpus resw 1
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| 90 | .cPossibleCpus resw 1
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| [64256] | 91 | .cPossibleCpuGroups resw 1
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| [36254] | 92 | .idCpuMax resd 1
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| [54252] | 93 | .enmUseTscDelta resd 1
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| 94 | .fGetGipCpu resd 1
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| [57218] | 95 | .fFlags resd 1
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| [81096] | 96 | .OnlineCpuSet resq 16
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| 97 | .PresentCpuSet resq 16
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| 98 | .PossibleCpuSet resq 16
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| 99 | .au32Padding1 resd 48
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| [81106] | 100 | .aiCpuFromApicId resw 4096
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| [81071] | 101 | .aiCpuFromCpuSetIdx resw 1024
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| [81106] | 102 | .aoffCpuGroup resd 256
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| [36254] | 103 | .aCPUs resb SUPGIPCPU_size
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| [5477] | 104 | endstruc
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| 105 |
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| [41147] | 106 | struc SUPDRVTRACERUSRCTX32
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| 107 | .idProbe resd 1
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| 108 | .cBits resb 1
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| 109 | .abReserved resb 3
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| 110 | .u.X86.uVtgProbeLoc resd 1
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| 111 | .u.X86.aArgs resd 20
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| 112 | .u.X86.eip resd 1
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| 113 | .u.X86.eflags resd 1
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| 114 | .u.X86.eax resd 1
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| 115 | .u.X86.ecx resd 1
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| 116 | .u.X86.edx resd 1
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| 117 | .u.X86.ebx resd 1
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| 118 | .u.X86.esp resd 1
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| 119 | .u.X86.ebp resd 1
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| 120 | .u.X86.esi resd 1
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| 121 | .u.X86.edi resd 1
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| 122 | .u.X86.cs resw 1
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| 123 | .u.X86.ss resw 1
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| 124 | .u.X86.ds resw 1
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| 125 | .u.X86.es resw 1
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| 126 | .u.X86.fs resw 1
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| 127 | .u.X86.gs resw 1
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| 128 | endstruc
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| [5477] | 129 |
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| [41147] | 130 | struc SUPDRVTRACERUSRCTX64
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| 131 | .idProbe resd 1
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| 132 | .cBits resb 1
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| 133 | .abReserved resb 3
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| 134 | .u.Amd64.uVtgProbeLoc resq 1
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| 135 | .u.Amd64.aArgs resq 10
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| 136 | .u.Amd64.rip resq 1
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| 137 | .u.Amd64.rflags resq 1
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| 138 | .u.Amd64.rax resq 1
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| 139 | .u.Amd64.rcx resq 1
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| 140 | .u.Amd64.rdx resq 1
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| 141 | .u.Amd64.rbx resq 1
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| 142 | .u.Amd64.rsp resq 1
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| 143 | .u.Amd64.rbp resq 1
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| 144 | .u.Amd64.rsi resq 1
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| 145 | .u.Amd64.rdi resq 1
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| 146 | .u.Amd64.r8 resq 1
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| 147 | .u.Amd64.r9 resq 1
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| 148 | .u.Amd64.r10 resq 1
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| 149 | .u.Amd64.r11 resq 1
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| 150 | .u.Amd64.r12 resq 1
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| 151 | .u.Amd64.r13 resq 1
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| 152 | .u.Amd64.r14 resq 1
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| 153 | .u.Amd64.r15 resq 1
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| 154 | endstruc
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| 155 |
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| [5477] | 156 | %endif
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| 157 |
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