VirtualBox

source: vbox/trunk/include/VBox/rawpci.h@ 36254

Last change on this file since 36254 was 36218, checked in by vboxsync, 14 years ago

PCI: interrupts work
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File size: 13.9 KB
Line 
1/** @file
2 * PDM - Pluggable Device Manager, raw PCI Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2010-2011 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_rawpci_h
27#define ___VBox_rawpci_h
28
29#include <iprt/types.h>
30
31
32RT_C_DECLS_BEGIN
33
34/**
35 * Handle for the raw PCI device.
36 */
37typedef RTR0PTR PCIRAWDEVHANDLE;
38
39
40/** Parameters buffer for PCIRAWR0_DO_OPEN_DEVICE call */
41typedef struct
42{
43 /* in */
44 uint32_t PciAddress;
45 uint32_t fFlags;
46 /* out */
47 PCIRAWDEVHANDLE Device;
48} PCIRAWREQOPENDEVICE;
49
50/** Parameters buffer for PCIRAWR0_DO_CLOSE_DEVICE call */
51typedef struct
52{
53 /* in */
54 uint32_t fFlags;
55} PCIRAWREQCLOSEDEVICE;
56
57
58/** Parameters buffer for PCIRAWR0_DO_GET_REGION_INFO call */
59typedef struct
60{
61 /* in */
62 int32_t iRegion;
63 /* out */
64 RTGCPHYS RegionStart;
65 uint64_t u64RegionSize;
66 bool fPresent;
67 uint32_t fFlags;
68} PCIRAWREQGETREGIONINFO;
69
70/** Parameters buffer for PCIRAWR0_DO_MAP_REGION call. */
71typedef struct
72{
73 /* in */
74 RTGCPHYS StartAddress;
75 uint64_t iRegionSize;
76 int32_t iRegion;
77 uint32_t fFlags;
78 /* out */
79 RTR3PTR pvAddressR3;
80 RTR0PTR pvAddressR0;
81} PCIRAWREQMAPREGION;
82
83/** Parameters buffer for PCIRAWR0_DO_UNMAP_REGION call. */
84typedef struct
85{
86 /* in */
87 RTGCPHYS StartAddress;
88 uint64_t iRegionSize;
89 RTR3PTR pvAddressR3;
90 RTR0PTR pvAddressR0;
91 int32_t iRegion;
92} PCIRAWREQUNMAPREGION;
93
94/** Parameters buffer for PCIRAWR0_DO_PIO_WRITE call. */
95typedef struct
96{
97 /* in */
98 uint16_t iPort;
99 uint16_t cb;
100 uint32_t iValue;
101} PCIRAWREQPIOWRITE;
102
103/** Parameters buffer for PCIRAWR0_DO_PIO_READ call. */
104typedef struct
105{
106 /* in */
107 uint16_t iPort;
108 uint16_t cb;
109 /* out */
110 uint32_t iValue;
111} PCIRAWREQPIOREAD;
112
113/** Memory operand. */
114typedef struct
115{
116 union
117 {
118 uint8_t u8;
119 uint16_t u16;
120 uint32_t u32;
121 uint64_t u64;
122 } u;
123 uint8_t cb;
124} PCIRAWMEMLOC;
125
126/** Parameters buffer for PCIRAWR0_DO_MMIO_WRITE call. */
127typedef struct
128{
129 /* in */
130 RTR0PTR Address;
131 PCIRAWMEMLOC Value;
132} PCIRAWREQMMIOWRITE;
133
134/** Parameters buffer for PCIRAWR0_DO_MMIO_READ call. */
135typedef struct
136{
137 /* in */
138 RTR0PTR Address;
139 /* inout (Value.cb is in) */
140 PCIRAWMEMLOC Value;
141} PCIRAWREQMMIOREAD;
142
143/* Parameters buffer for PCIRAWR0_DO_PCICFG_WRITE call. */
144typedef struct
145{
146 /* in */
147 uint32_t iOffset;
148 PCIRAWMEMLOC Value;
149} PCIRAWREQPCICFGWRITE;
150
151/** Parameters buffer for PCIRAWR0_DO_PCICFG_READ call. */
152typedef struct
153{
154 /* in */
155 uint32_t iOffset;
156 /* inout (Value.cb is in) */
157 PCIRAWMEMLOC Value;
158} PCIRAWREQPCICFGREAD;
159
160/** Parameters buffer for PCIRAWR0_DO_REGISTER_R0_IRQ_HANDLER call. */
161typedef struct
162{
163 /* in */
164 int32_t iGuestIrq;
165 RTR0PTR pfnHandler;
166 RTR0PTR pfnHandlerContext;
167 /* out */
168 int32_t iHostIrq;
169} PCIRAWREQREGISTERR0IRQHANDLER;
170
171/** Parameters buffer for PCIRAWR0_DO_UNREGISTER_R0_IRQ_HANDLER call. */
172typedef struct
173{
174 /* in */
175 int32_t iHostIrq;
176} PCIRAWREQUNREGISTERR0IRQHANDLER;
177
178/**
179 * Request buffer use for communication with the driver.
180 */
181typedef struct PCIRAWSENDREQ
182{
183 /** The request header. */
184 SUPVMMR0REQHDR Hdr;
185 /** Alternative to passing the taking the session from the VM handle.
186 * Either use this member or use the VM handle, don't do both.
187 */
188 PSUPDRVSESSION pSession;
189 /** Request type. */
190 int32_t iRequest;
191 /** Host device request targetted to. */
192 PCIRAWDEVHANDLE TargetDevice;
193 /** Call parameters. */
194 union
195 {
196 PCIRAWREQOPENDEVICE aOpenDevice;
197 PCIRAWREQCLOSEDEVICE aCloseDevice;
198 PCIRAWREQGETREGIONINFO aGetRegionInfo;
199 PCIRAWREQMAPREGION aMapRegion;
200 PCIRAWREQUNMAPREGION aUnmapRegion;
201 PCIRAWREQPIOWRITE aPioWrite;
202 PCIRAWREQPIOREAD aPioRead;
203 PCIRAWREQMMIOWRITE aMmioWrite;
204 PCIRAWREQMMIOREAD aMmioRead;
205 PCIRAWREQPCICFGWRITE aPciCfgWrite;
206 PCIRAWREQPCICFGREAD aPciCfgRead;
207 PCIRAWREQREGISTERR0IRQHANDLER aRegisterR0IrqHandler;
208 PCIRAWREQUNREGISTERR0IRQHANDLER aUnregisterR0IrqHandler;
209 } u;
210} PCIRAWSENDREQ;
211typedef PCIRAWSENDREQ *PPCIRAWSENDREQ;
212
213/**
214 * Operations performed by the driver.
215 */
216typedef enum PCIRAWR0OPERATION
217{
218 /* Open device. */
219 PCIRAWR0_DO_OPEN_DEVICE,
220 /* Close device. */
221 PCIRAWR0_DO_CLOSE_DEVICE,
222 /* Get PCI region info. */
223 PCIRAWR0_DO_GET_REGION_INFO,
224 /* Map PCI region into VM address space. */
225 PCIRAWR0_DO_MAP_REGION,
226 /* Unmap PCI region from VM address space. */
227 PCIRAWR0_DO_UNMAP_REGION,
228 /* Perform PIO write. */
229 PCIRAWR0_DO_PIO_WRITE,
230 /* Perform PIO read. */
231 PCIRAWR0_DO_PIO_READ,
232 /* Perform MMIO write. */
233 PCIRAWR0_DO_MMIO_WRITE,
234 /* Perform MMIO read. */
235 PCIRAWR0_DO_MMIO_READ,
236 /* Perform PCI config write. */
237 PCIRAWR0_DO_PCICFG_WRITE,
238 /* Perform PCI config read. */
239 PCIRAWR0_DO_PCICFG_READ,
240 /* Register device IRQ R0 handler. */
241 PCIRAWR0_DO_REGISTER_R0_IRQ_HANDLER,
242 /* Unregister device IRQ R0 handler. */
243 PCIRAWR0_DO_UNREGISTER_R0_IRQ_HANDLER,
244 /** The usual 32-bit type blow up. */
245 PCIRAWR0_DO_32BIT_HACK = 0x7fffffff
246} PCIRAWR0OPERATION;
247
248/** Forward declarations. */
249typedef struct RAWPCIFACTORY *PRAWPCIFACTORY;
250typedef struct RAWPCIDEVPORT *PRAWPCIDEVPORT;
251
252/**
253 * Interrupt service routine callback.
254 *
255 * @param pvContext Opaque user data which to the handler.
256 * @param iIrq Interrupt number.
257 */
258typedef DECLCALLBACK(void) FNRAWPCIISR(void *pvContext, int32_t iIrq);
259typedef FNRAWPCIISR *PFNRAWPCIISR;
260
261/**
262 * This is the port on the device interface, i.e. the driver side which the
263 * host device is connected to.
264 *
265 * This is only used for the in-kernel PCI device connections.
266 */
267typedef struct RAWPCIDEVPORT
268{
269 /** Structure version number. (RAWPCIDEVPORT_VERSION) */
270 uint32_t u32Version;
271
272 /**
273 * Retain the object.
274 *
275 * It will normally be called while owning the internal semaphore.
276 *
277 * @param pPort Pointer to this structure.
278 */
279 DECLR0CALLBACKMEMBER(void, pfnRetain,(PRAWPCIDEVPORT pPort));
280
281 /**
282 * Releases the object.
283 *
284 * This must be called for every pfnRetain call.
285 *
286 *
287 * @param pPort Pointer to this structure.
288 */
289 DECLR0CALLBACKMEMBER(void, pfnRelease,(PRAWPCIDEVPORT pPort));
290
291 /**
292 * Init device.
293 *
294 * @param pPort Pointer to this structure.
295 * @param fFlags Initialization flags.
296 */
297 DECLR0CALLBACKMEMBER(int, pfnInit,(PRAWPCIDEVPORT pPort,
298 uint32_t fFlags));
299
300
301 /**
302 * Deinit device.
303 *
304 * @param pPort Pointer to this structure.
305 * @param fFlags Initialization flags.
306 */
307 DECLR0CALLBACKMEMBER(int, pfnDeinit,(PRAWPCIDEVPORT pPort,
308 uint32_t fFlags));
309
310
311 /**
312 * Get PCI region info.
313 *
314 * @param pPort Pointer to this structure.
315 */
316 DECLR0CALLBACKMEMBER(int, pfnGetRegionInfo,(PRAWPCIDEVPORT pPort,
317 int32_t iRegion,
318 RTHCPHYS *pRegionStart,
319 uint64_t *pu64RegionSize,
320 bool *pfPresent,
321 uint32_t *pfFlags));
322
323
324 /**
325 * Map PCI region.
326 *
327 * @param pPort Pointer to this structure.
328 */
329 DECLR0CALLBACKMEMBER(int, pfnMapRegion,(PRAWPCIDEVPORT pPort,
330 int32_t iRegion,
331 RTHCPHYS RegionStart,
332 uint64_t u64RegionSize,
333 int32_t fFlags,
334 RTR0PTR *pRegionBaseR0));
335
336 /**
337 * Unmap PCI region.
338 *
339 * @param pPort Pointer to this structure.
340 */
341 DECLR0CALLBACKMEMBER(int, pfnUnmapRegion,(PRAWPCIDEVPORT pPort,
342 int32_t iRegion,
343 RTHCPHYS RegionStart,
344 uint64_t u64RegionSize,
345 RTR0PTR RegionBase));
346
347 /**
348 * Read device PCI register.
349 *
350 * @param pPort Pointer to this structure.
351 * @param fFlags Initialization flags.
352 */
353 DECLR0CALLBACKMEMBER(int, pfnPciCfgRead,(PRAWPCIDEVPORT pPort,
354 uint32_t Register,
355 PCIRAWMEMLOC *pValue));
356
357
358 /**
359 * Write device PCI register.
360 *
361 * @param pPort Pointer to this structure.
362 * @param fFlags Initialization flags.
363 */
364 DECLR0CALLBACKMEMBER(int, pfnPciCfgWrite,(PRAWPCIDEVPORT pPort,
365 uint32_t Register,
366 PCIRAWMEMLOC *pValue));
367
368 /**
369 * Request to register interrupt handler.
370 *
371 * @param pPort Pointer to this structure.
372 * @param pfnHandler Pointer to the handler.
373 * @param pIrqContext Context passed to the handler.
374 * @param piHostIrq Which host IRQ is used.
375 */
376 DECLR0CALLBACKMEMBER(int, pfnRegisterIrqHandler,(PRAWPCIDEVPORT pPort,
377 PFNRAWPCIISR pfnHandler,
378 void* pIrqContext,
379 int32_t *piHostIrq));
380
381 /**
382 * Request to unregister interrupt handler.
383 *
384 * @param pPort Pointer to this structure.
385 * @param iHostIrq Which host IRQ was used (retured by earlier pfnRegisterIrqHandler).
386 */
387 DECLR0CALLBACKMEMBER(int, pfnUnregisterIrqHandler,(PRAWPCIDEVPORT pPort,
388 int32_t iHostIrq));
389
390 /** Structure version number. (RAWPCIDEVPORT_VERSION) */
391 uint32_t u32VersionEnd;
392} RAWPCIDEVPORT;
393/** Version number for the RAWPCIDEVPORT::u32Version and RAWPCIIFPORT::u32VersionEnd fields. */
394#define RAWPCIDEVPORT_VERSION UINT32_C(0xAFBDCC01)
395
396/**
397 * The component factory interface for create a raw PCI interfaces.
398 */
399typedef struct RAWPCIFACTORY
400{
401 /**
402 * Release this factory.
403 *
404 * SUPR0ComponentQueryFactory (SUPDRVFACTORY::pfnQueryFactoryInterface to be precise)
405 * will retain a reference to the factory and the caller has to call this method to
406 * release it once the pfnCreateAndConnect call(s) has been done.
407 *
408 * @param pIfFactory Pointer to this structure.
409 */
410 DECLR0CALLBACKMEMBER(void, pfnRelease,(PRAWPCIFACTORY pFactory));
411
412 /**
413 * Create an instance for the specfied host PCI card and connects it
414 * to the driver.
415 *
416 *
417 * @returns VBox status code.
418 *
419 * @param pIfFactory Pointer to this structure.
420 * @param u32HostAddress Address of PCI device on the host.
421 * @param fFlags Creation flags.
422 * @param ppDevPort Where to store the pointer to the device port
423 * on success.
424 *
425 */
426 DECLR0CALLBACKMEMBER(int, pfnCreateAndConnect,(PRAWPCIFACTORY pFactory,
427 uint32_t u32HostAddress,
428 uint32_t fFlags,
429 PRAWPCIDEVPORT *ppDevPort));
430
431
432} RAWPCIFACTORY;
433
434#define RAWPCIFACTORY_UUID_STR "c0268f49-e1e4-402b-b7e0-eb8d09659a9b"
435
436/**
437 * Flags passed to pfnPciDeviceConstructStart(), to notify driver
438 * about options to be used to open device.
439 */
440typedef enum PCIRAWDRIVERFLAGS
441{
442 /** If runtime shall try to detach host driver. */
443 PCIRAWDRIVERRFLAG_DETACH_HOST_DRIVER = (1 << 0),
444 /** The usual 32-bit type blow up. */
445 PCIRAWDRIVERRFLAG_32BIT_HACK = 0x7fffffff
446} PCIRAWDRIVERFLAGS;
447
448/**
449 * Flags used to describe PCI region, matches to PCIADDRESSSPACE
450 * in pci.h.
451 */
452typedef enum PCIRAWADDRESSSPACE
453{
454 /** Memory. */
455 PCIRAW_ADDRESS_SPACE_MEM = 0x00,
456 /** I/O space. */
457 PCIRAW_ADDRESS_SPACE_IO = 0x01,
458 /** 32-bit BAR. */
459 PCIRAW_ADDRESS_SPACE_BAR32 = 0x00,
460 /** 64-bit BAR. */
461 PCIRAW_ADDRESS_SPACE_BAR64 = 0x04,
462 /** Prefetch memory. */
463 PCIRAW_ADDRESS_SPACE_MEM_PREFETCH = 0x08,
464 /** The usual 32-bit type blow up. */
465 PCIRAW_ADDRESS_SPACE_32BIT_HACK = 0x7fffffff
466} PCIRAWADDRESSSPACE;
467
468RT_C_DECLS_END
469
470#endif
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