[35920] | 1 | /** @file
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[36441] | 2 | * Raw PCI Devices (aka PCI pass-through). (VMM)
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[35920] | 3 | */
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| 4 |
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| 5 | /*
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[98103] | 6 | * Copyright (C) 2010-2023 Oracle and/or its affiliates.
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[35920] | 7 | *
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[96407] | 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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[35920] | 10 | *
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[96407] | 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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[35920] | 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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[96407] | 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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[35920] | 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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[96407] | 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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[35920] | 34 | */
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| 35 |
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[76558] | 36 | #ifndef VBOX_INCLUDED_rawpci_h
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| 37 | #define VBOX_INCLUDED_rawpci_h
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[76507] | 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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[35920] | 41 |
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[36400] | 42 | #include <VBox/types.h>
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| 43 | #include <VBox/sup.h>
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[35920] | 44 |
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| 45 | RT_C_DECLS_BEGIN
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| 46 |
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[35986] | 47 | /**
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| 48 | * Handle for the raw PCI device.
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| 49 | */
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[36260] | 50 | typedef uint32_t PCIRAWDEVHANDLE;
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[35986] | 51 |
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[36400] | 52 | /**
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[36485] | 53 | * Handle for the ISR.
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| 54 | */
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| 55 | typedef uint32_t PCIRAWISRHANDLE;
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| 56 |
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| 57 | /**
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[36400] | 58 | * Physical memory action enumeration.
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| 59 | */
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| 60 | typedef enum PCIRAWMEMINFOACTION
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| 61 | {
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[36441] | 62 | /** Pages mapped. */
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[36400] | 63 | PCIRAW_MEMINFO_MAP,
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[36441] | 64 | /** Pages unmapped. */
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[36400] | 65 | PCIRAW_MEMINFO_UNMAP,
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| 66 | /** The usual 32-bit type blow up. */
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| 67 | PCIRAW_MEMINFO_32BIT_HACK = 0x7fffffff
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| 68 | } PCIRAWMEMINFOACTION;
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| 69 |
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[36448] | 70 | /**
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| 71 | * Per-VM capability flag bits.
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| 72 | */
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| 73 | typedef enum PCIRAWVMFLAGS
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| 74 | {
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| 75 | /** If we can use IOMMU in this VM. */
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| 76 | PCIRAW_VMFLAGS_HAS_IOMMU = (1 << 0),
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| 77 | PCIRAW_VMFLAGS_32BIT_HACK = 0x7fffffff
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| 78 | } PCIRAWVMFLAGS;
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| 79 |
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[36436] | 80 | /* Forward declaration. */
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[36448] | 81 | struct RAWPCIPERVM;
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[36436] | 82 |
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[36400] | 83 | /**
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| 84 | * Callback to notify raw PCI subsystem about mapping/unmapping of
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| 85 | * host pages to the guest. Typical usecase is to register physical
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| 86 | * RAM pages with IOMMU, so that it could allow DMA for PCI devices
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| 87 | * directly from the guest RAM.
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[36436] | 88 | * Region shall be one or more contigous (both host and guest) pages
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| 89 | * of physical memory.
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| 90 | *
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| 91 | * @returns VBox status code.
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| 92 | *
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[90833] | 93 | * @param pVmData The per VM data.
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[58124] | 94 | * @param HCPhysStart Physical address of region start on the host.
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| 95 | * @param GCPhysStart Physical address of region start on the guest.
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| 96 | * @param cbMem Region size in bytes.
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| 97 | * @param enmAction Action performed (i.e. if page was mapped
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| 98 | * or unmapped).
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[36400] | 99 | */
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[85121] | 100 | typedef DECLCALLBACKTYPE(int, FNRAWPCICONTIGPHYSMEMINFO,(struct RAWPCIPERVM *pVmData, RTHCPHYS HCPhysStart,
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| 101 | RTGCPHYS GCPhysStart, uint64_t cbMem, PCIRAWMEMINFOACTION enmAction));
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[36400] | 102 | typedef FNRAWPCICONTIGPHYSMEMINFO *PFNRAWPCICONTIGPHYSMEMINFO;
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| 103 |
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[36329] | 104 | /** Data being part of the VM structure. */
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[36448] | 105 | typedef struct RAWPCIPERVM
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[36329] | 106 | {
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[36441] | 107 | /** Shall only be interpreted by the host PCI driver. */
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[36400] | 108 | RTR0PTR pDriverData;
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[36441] | 109 | /** Callback called when mapping of host pages to the guest changes. */
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[36400] | 110 | PFNRAWPCICONTIGPHYSMEMINFO pfnContigMemInfo;
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[36448] | 111 | /** Flags describing VM capabilities (such as IOMMU presence). */
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| 112 | uint32_t fVmCaps;
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| 113 | } RAWPCIPERVM;
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| 114 | typedef RAWPCIPERVM *PRAWPCIPERVM;
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[35986] | 115 |
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| 116 | /** Parameters buffer for PCIRAWR0_DO_OPEN_DEVICE call */
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| 117 | typedef struct
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| 118 | {
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| 119 | /* in */
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[36485] | 120 | uint32_t PciAddress;
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| 121 | uint32_t fFlags;
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[35986] | 122 | /* out */
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| 123 | PCIRAWDEVHANDLE Device;
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[36448] | 124 | uint32_t fDevFlags;
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[35986] | 125 | } PCIRAWREQOPENDEVICE;
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| 126 |
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| 127 | /** Parameters buffer for PCIRAWR0_DO_CLOSE_DEVICE call */
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| 128 | typedef struct
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| 129 | {
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| 130 | /* in */
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| 131 | uint32_t fFlags;
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| 132 | } PCIRAWREQCLOSEDEVICE;
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| 133 |
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[35920] | 134 | /** Parameters buffer for PCIRAWR0_DO_GET_REGION_INFO call */
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| 135 | typedef struct
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| 136 | {
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| 137 | /* in */
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| 138 | int32_t iRegion;
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| 139 | /* out */
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[36028] | 140 | RTGCPHYS RegionStart;
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[35920] | 141 | uint64_t u64RegionSize;
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| 142 | bool fPresent;
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[36138] | 143 | uint32_t fFlags;
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[35920] | 144 | } PCIRAWREQGETREGIONINFO;
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| 145 |
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| 146 | /** Parameters buffer for PCIRAWR0_DO_MAP_REGION call. */
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| 147 | typedef struct
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| 148 | {
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| 149 | /* in */
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[35959] | 150 | RTGCPHYS StartAddress;
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[35920] | 151 | uint64_t iRegionSize;
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[36153] | 152 | int32_t iRegion;
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[35920] | 153 | uint32_t fFlags;
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| 154 | /* out */
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| 155 | RTR3PTR pvAddressR3;
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| 156 | RTR0PTR pvAddressR0;
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| 157 | } PCIRAWREQMAPREGION;
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| 158 |
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| 159 | /** Parameters buffer for PCIRAWR0_DO_UNMAP_REGION call. */
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| 160 | typedef struct
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| 161 | {
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| 162 | /* in */
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[36055] | 163 | RTGCPHYS StartAddress;
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| 164 | uint64_t iRegionSize;
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[35920] | 165 | RTR3PTR pvAddressR3;
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[36079] | 166 | RTR0PTR pvAddressR0;
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[36153] | 167 | int32_t iRegion;
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[35920] | 168 | } PCIRAWREQUNMAPREGION;
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| 169 |
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| 170 | /** Parameters buffer for PCIRAWR0_DO_PIO_WRITE call. */
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| 171 | typedef struct
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| 172 | {
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| 173 | /* in */
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| 174 | uint16_t iPort;
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| 175 | uint16_t cb;
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| 176 | uint32_t iValue;
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| 177 | } PCIRAWREQPIOWRITE;
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| 178 |
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| 179 | /** Parameters buffer for PCIRAWR0_DO_PIO_READ call. */
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| 180 | typedef struct
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| 181 | {
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| 182 | /* in */
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| 183 | uint16_t iPort;
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| 184 | uint16_t cb;
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| 185 | /* out */
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| 186 | uint32_t iValue;
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| 187 | } PCIRAWREQPIOREAD;
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| 188 |
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| 189 | /** Memory operand. */
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| 190 | typedef struct
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| 191 | {
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| 192 | union
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| 193 | {
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| 194 | uint8_t u8;
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| 195 | uint16_t u16;
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| 196 | uint32_t u32;
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| 197 | uint64_t u64;
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| 198 | } u;
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| 199 | uint8_t cb;
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| 200 | } PCIRAWMEMLOC;
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| 201 |
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| 202 | /** Parameters buffer for PCIRAWR0_DO_MMIO_WRITE call. */
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| 203 | typedef struct
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| 204 | {
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| 205 | /* in */
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[36079] | 206 | RTR0PTR Address;
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[35920] | 207 | PCIRAWMEMLOC Value;
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| 208 | } PCIRAWREQMMIOWRITE;
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| 209 |
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| 210 | /** Parameters buffer for PCIRAWR0_DO_MMIO_READ call. */
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| 211 | typedef struct
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| 212 | {
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| 213 | /* in */
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[36079] | 214 | RTR0PTR Address;
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[35920] | 215 | /* inout (Value.cb is in) */
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| 216 | PCIRAWMEMLOC Value;
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| 217 | } PCIRAWREQMMIOREAD;
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| 218 |
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| 219 | /* Parameters buffer for PCIRAWR0_DO_PCICFG_WRITE call. */
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| 220 | typedef struct
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| 221 | {
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| 222 | /* in */
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| 223 | uint32_t iOffset;
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| 224 | PCIRAWMEMLOC Value;
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| 225 | } PCIRAWREQPCICFGWRITE;
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| 226 |
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| 227 | /** Parameters buffer for PCIRAWR0_DO_PCICFG_READ call. */
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| 228 | typedef struct
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| 229 | {
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| 230 | /* in */
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| 231 | uint32_t iOffset;
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| 232 | /* inout (Value.cb is in) */
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| 233 | PCIRAWMEMLOC Value;
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| 234 | } PCIRAWREQPCICFGREAD;
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| 235 |
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[36498] | 236 | /** Parameters buffer for PCIRAWR0_DO_GET_IRQ call. */
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| 237 | typedef struct PCIRAWREQGETIRQ
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[36218] | 238 | {
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| 239 | /* in */
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[36498] | 240 | int64_t iTimeout;
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[36218] | 241 | /* out */
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[36498] | 242 | int32_t iIrq;
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| 243 | } PCIRAWREQGETIRQ;
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[36218] | 244 |
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[36340] | 245 | /** Parameters buffer for PCIRAWR0_DO_POWER_STATE_CHANGE call. */
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| 246 | typedef struct PCIRAWREQPOWERSTATECHANGE
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| 247 | {
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| 248 | /* in */
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| 249 | uint32_t iState;
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[36460] | 250 | /* in/out */
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| 251 | uint64_t u64Param;
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[36340] | 252 | } PCIRAWREQPOWERSTATECHANGE;
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| 253 |
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[35920] | 254 | /**
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| 255 | * Request buffer use for communication with the driver.
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| 256 | */
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| 257 | typedef struct PCIRAWSENDREQ
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| 258 | {
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| 259 | /** The request header. */
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| 260 | SUPVMMR0REQHDR Hdr;
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| 261 | /** Alternative to passing the taking the session from the VM handle.
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| 262 | * Either use this member or use the VM handle, don't do both.
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| 263 | */
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| 264 | PSUPDRVSESSION pSession;
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| 265 | /** Request type. */
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| 266 | int32_t iRequest;
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| 267 | /** Host device request targetted to. */
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[35959] | 268 | PCIRAWDEVHANDLE TargetDevice;
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[35920] | 269 | /** Call parameters. */
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| 270 | union
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| 271 | {
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[36498] | 272 | PCIRAWREQOPENDEVICE aOpenDevice;
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| 273 | PCIRAWREQCLOSEDEVICE aCloseDevice;
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| 274 | PCIRAWREQGETREGIONINFO aGetRegionInfo;
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| 275 | PCIRAWREQMAPREGION aMapRegion;
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| 276 | PCIRAWREQUNMAPREGION aUnmapRegion;
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| 277 | PCIRAWREQPIOWRITE aPioWrite;
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| 278 | PCIRAWREQPIOREAD aPioRead;
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| 279 | PCIRAWREQMMIOWRITE aMmioWrite;
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| 280 | PCIRAWREQMMIOREAD aMmioRead;
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| 281 | PCIRAWREQPCICFGWRITE aPciCfgWrite;
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| 282 | PCIRAWREQPCICFGREAD aPciCfgRead;
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| 283 | PCIRAWREQGETIRQ aGetIrq;
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[36340] | 284 | PCIRAWREQPOWERSTATECHANGE aPowerStateChange;
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[35920] | 285 | } u;
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| 286 | } PCIRAWSENDREQ;
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| 287 | typedef PCIRAWSENDREQ *PPCIRAWSENDREQ;
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| 288 |
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| 289 | /**
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| 290 | * Operations performed by the driver.
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| 291 | */
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| 292 | typedef enum PCIRAWR0OPERATION
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| 293 | {
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[35986] | 294 | /* Open device. */
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| 295 | PCIRAWR0_DO_OPEN_DEVICE,
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| 296 | /* Close device. */
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| 297 | PCIRAWR0_DO_CLOSE_DEVICE,
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[35920] | 298 | /* Get PCI region info. */
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| 299 | PCIRAWR0_DO_GET_REGION_INFO,
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| 300 | /* Map PCI region into VM address space. */
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| 301 | PCIRAWR0_DO_MAP_REGION,
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| 302 | /* Unmap PCI region from VM address space. */
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| 303 | PCIRAWR0_DO_UNMAP_REGION,
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| 304 | /* Perform PIO write. */
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| 305 | PCIRAWR0_DO_PIO_WRITE,
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| 306 | /* Perform PIO read. */
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| 307 | PCIRAWR0_DO_PIO_READ,
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| 308 | /* Perform MMIO write. */
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| 309 | PCIRAWR0_DO_MMIO_WRITE,
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| 310 | /* Perform MMIO read. */
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| 311 | PCIRAWR0_DO_MMIO_READ,
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| 312 | /* Perform PCI config write. */
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| 313 | PCIRAWR0_DO_PCICFG_WRITE,
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| 314 | /* Perform PCI config read. */
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| 315 | PCIRAWR0_DO_PCICFG_READ,
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[36498] | 316 | /* Get next IRQ for the device. */
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| 317 | PCIRAWR0_DO_GET_IRQ,
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[36528] | 318 | /* Enable getting IRQs for the device. */
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| 319 | PCIRAWR0_DO_ENABLE_IRQ,
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| 320 | /* Disable getting IRQs for the device. */
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| 321 | PCIRAWR0_DO_DISABLE_IRQ,
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[36340] | 322 | /* Notify driver about guest power state change. */
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| 323 | PCIRAWR0_DO_POWER_STATE_CHANGE,
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[35920] | 324 | /** The usual 32-bit type blow up. */
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| 325 | PCIRAWR0_DO_32BIT_HACK = 0x7fffffff
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| 326 | } PCIRAWR0OPERATION;
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| 327 |
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[36340] | 328 | /**
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| 329 | * Power state enumeration.
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| 330 | */
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| 331 | typedef enum PCIRAWPOWERSTATE
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| 332 | {
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| 333 | /* Power on. */
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| 334 | PCIRAW_POWER_ON,
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| 335 | /* Power off. */
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| 336 | PCIRAW_POWER_OFF,
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| 337 | /* Suspend. */
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| 338 | PCIRAW_POWER_SUSPEND,
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| 339 | /* Resume. */
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[36436] | 340 | PCIRAW_POWER_RESUME,
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[36552] | 341 | /* Reset. */
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| 342 | PCIRAW_POWER_RESET,
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[36340] | 343 | /** The usual 32-bit type blow up. */
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| 344 | PCIRAW_POWER_32BIT_HACK = 0x7fffffff
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| 345 | } PCIRAWPOWERSTATE;
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| 346 |
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| 347 |
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[35946] | 348 | /** Forward declarations. */
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| 349 | typedef struct RAWPCIFACTORY *PRAWPCIFACTORY;
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| 350 | typedef struct RAWPCIDEVPORT *PRAWPCIDEVPORT;
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| 351 |
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| 352 | /**
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[36218] | 353 | * Interrupt service routine callback.
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| 354 | *
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[36717] | 355 | * @returns if interrupt was processed.
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| 356 | *
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[36485] | 357 | * @param pvContext Opaque user data passed to the handler.
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[36218] | 358 | * @param iIrq Interrupt number.
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| 359 | */
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[85121] | 360 | typedef DECLCALLBACKTYPE(bool, FNRAWPCIISR,(void *pvContext, int32_t iIrq));
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[36218] | 361 | typedef FNRAWPCIISR *PFNRAWPCIISR;
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| 362 |
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| 363 | /**
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[35946] | 364 | * This is the port on the device interface, i.e. the driver side which the
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| 365 | * host device is connected to.
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| 366 | *
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| 367 | * This is only used for the in-kernel PCI device connections.
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| 368 | */
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| 369 | typedef struct RAWPCIDEVPORT
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| 370 | {
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| 371 | /** Structure version number. (RAWPCIDEVPORT_VERSION) */
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| 372 | uint32_t u32Version;
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| 373 |
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| 374 | /**
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[35959] | 375 | * Init device.
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| 376 | *
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| 377 | * @param pPort Pointer to this structure.
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| 378 | * @param fFlags Initialization flags.
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| 379 | */
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[36028] | 380 | DECLR0CALLBACKMEMBER(int, pfnInit,(PRAWPCIDEVPORT pPort,
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[35959] | 381 | uint32_t fFlags));
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| 382 |
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[36028] | 383 |
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| 384 | /**
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| 385 | * Deinit device.
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| 386 | *
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| 387 | * @param pPort Pointer to this structure.
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| 388 | * @param fFlags Initialization flags.
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| 389 | */
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| 390 | DECLR0CALLBACKMEMBER(int, pfnDeinit,(PRAWPCIDEVPORT pPort,
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| 391 | uint32_t fFlags));
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| 392 |
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| 393 |
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| 394 | /**
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[36260] | 395 | * Destroy device.
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| 396 | *
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| 397 | * @param pPort Pointer to this structure.
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| 398 | */
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| 399 | DECLR0CALLBACKMEMBER(int, pfnDestroy,(PRAWPCIDEVPORT pPort));
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| 400 |
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| 401 | /**
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[36028] | 402 | * Get PCI region info.
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| 403 | *
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| 404 | * @param pPort Pointer to this structure.
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[65117] | 405 | * @param iRegion Region number.
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| 406 | * @param pRegionStart Where to start the region address.
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| 407 | * @param pu64RegionSize Where to store the region size.
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| 408 | * @param pfPresent Where to store if the region is present.
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| 409 | * @param pfFlags Where to store the flags.
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[36028] | 410 | */
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| 411 | DECLR0CALLBACKMEMBER(int, pfnGetRegionInfo,(PRAWPCIDEVPORT pPort,
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| 412 | int32_t iRegion,
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| 413 | RTHCPHYS *pRegionStart,
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| 414 | uint64_t *pu64RegionSize,
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| 415 | bool *pfPresent,
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[36138] | 416 | uint32_t *pfFlags));
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[36028] | 417 |
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| 418 |
|
---|
| 419 | /**
|
---|
| 420 | * Map PCI region.
|
---|
| 421 | *
|
---|
| 422 | * @param pPort Pointer to this structure.
|
---|
[65117] | 423 | * @param iRegion Region number.
|
---|
| 424 | * @param RegionStart Region start.
|
---|
| 425 | * @param u64RegionSize Region size.
|
---|
| 426 | * @param fFlags Flags.
|
---|
| 427 | * @param pRegionBaseR0 Where to store the R0 address.
|
---|
[36028] | 428 | */
|
---|
| 429 | DECLR0CALLBACKMEMBER(int, pfnMapRegion,(PRAWPCIDEVPORT pPort,
|
---|
| 430 | int32_t iRegion,
|
---|
[36055] | 431 | RTHCPHYS RegionStart,
|
---|
[36028] | 432 | uint64_t u64RegionSize,
|
---|
[36153] | 433 | int32_t fFlags,
|
---|
[36079] | 434 | RTR0PTR *pRegionBaseR0));
|
---|
[36028] | 435 |
|
---|
| 436 | /**
|
---|
[36055] | 437 | * Unmap PCI region.
|
---|
| 438 | *
|
---|
| 439 | * @param pPort Pointer to this structure.
|
---|
[65117] | 440 | * @param iRegion Region number.
|
---|
| 441 | * @param RegionStart Region start.
|
---|
| 442 | * @param u64RegionSize Region size.
|
---|
| 443 | * @param RegionBase Base address.
|
---|
[36055] | 444 | */
|
---|
| 445 | DECLR0CALLBACKMEMBER(int, pfnUnmapRegion,(PRAWPCIDEVPORT pPort,
|
---|
[36153] | 446 | int32_t iRegion,
|
---|
[36055] | 447 | RTHCPHYS RegionStart,
|
---|
| 448 | uint64_t u64RegionSize,
|
---|
| 449 | RTR0PTR RegionBase));
|
---|
| 450 |
|
---|
| 451 | /**
|
---|
[36028] | 452 | * Read device PCI register.
|
---|
| 453 | *
|
---|
| 454 | * @param pPort Pointer to this structure.
|
---|
[36460] | 455 | * @param Register PCI register.
|
---|
| 456 | * @param pValue Read value (with desired read width).
|
---|
[36028] | 457 | */
|
---|
| 458 | DECLR0CALLBACKMEMBER(int, pfnPciCfgRead,(PRAWPCIDEVPORT pPort,
|
---|
[36460] | 459 | uint32_t Register,
|
---|
| 460 | PCIRAWMEMLOC *pValue));
|
---|
[36028] | 461 |
|
---|
| 462 |
|
---|
| 463 | /**
|
---|
| 464 | * Write device PCI register.
|
---|
| 465 | *
|
---|
| 466 | * @param pPort Pointer to this structure.
|
---|
[36460] | 467 | * @param Register PCI register.
|
---|
| 468 | * @param pValue Write value (with desired write width).
|
---|
[36028] | 469 | */
|
---|
[36460] | 470 | DECLR0CALLBACKMEMBER(int, pfnPciCfgWrite,(PRAWPCIDEVPORT pPort,
|
---|
[36028] | 471 | uint32_t Register,
|
---|
| 472 | PCIRAWMEMLOC *pValue));
|
---|
| 473 |
|
---|
[36218] | 474 | /**
|
---|
| 475 | * Request to register interrupt handler.
|
---|
| 476 | *
|
---|
| 477 | * @param pPort Pointer to this structure.
|
---|
| 478 | * @param pfnHandler Pointer to the handler.
|
---|
| 479 | * @param pIrqContext Context passed to the handler.
|
---|
[36485] | 480 | * @param phIsr Handle for the ISR, .
|
---|
[36218] | 481 | */
|
---|
[36485] | 482 | DECLR0CALLBACKMEMBER(int, pfnRegisterIrqHandler,(PRAWPCIDEVPORT pPort,
|
---|
| 483 | PFNRAWPCIISR pfnHandler,
|
---|
| 484 | void* pIrqContext,
|
---|
| 485 | PCIRAWISRHANDLE *phIsr));
|
---|
[36218] | 486 |
|
---|
| 487 | /**
|
---|
| 488 | * Request to unregister interrupt handler.
|
---|
| 489 | *
|
---|
| 490 | * @param pPort Pointer to this structure.
|
---|
[36485] | 491 | * @param hIsr Handle of ISR to unregister (retured by earlier pfnRegisterIrqHandler).
|
---|
[36218] | 492 | */
|
---|
[36485] | 493 | DECLR0CALLBACKMEMBER(int, pfnUnregisterIrqHandler,(PRAWPCIDEVPORT pPort,
|
---|
| 494 | PCIRAWISRHANDLE hIsr));
|
---|
[36218] | 495 |
|
---|
[36340] | 496 | /**
|
---|
| 497 | * Power state change notification.
|
---|
| 498 | *
|
---|
| 499 | * @param pPort Pointer to this structure.
|
---|
| 500 | * @param aState New power state.
|
---|
[36460] | 501 | * @param pu64Param State-specific in/out parameter.
|
---|
[36340] | 502 | */
|
---|
[36460] | 503 | DECLR0CALLBACKMEMBER(int, pfnPowerStateChange,(PRAWPCIDEVPORT pPort,
|
---|
| 504 | PCIRAWPOWERSTATE aState,
|
---|
| 505 | uint64_t *pu64Param));
|
---|
[36340] | 506 |
|
---|
[35946] | 507 | /** Structure version number. (RAWPCIDEVPORT_VERSION) */
|
---|
| 508 | uint32_t u32VersionEnd;
|
---|
| 509 | } RAWPCIDEVPORT;
|
---|
| 510 | /** Version number for the RAWPCIDEVPORT::u32Version and RAWPCIIFPORT::u32VersionEnd fields. */
|
---|
[36485] | 511 | #define RAWPCIDEVPORT_VERSION UINT32_C(0xAFBDCC02)
|
---|
[35946] | 512 |
|
---|
| 513 | /**
|
---|
| 514 | * The component factory interface for create a raw PCI interfaces.
|
---|
| 515 | */
|
---|
| 516 | typedef struct RAWPCIFACTORY
|
---|
| 517 | {
|
---|
| 518 | /**
|
---|
| 519 | * Release this factory.
|
---|
| 520 | *
|
---|
| 521 | * SUPR0ComponentQueryFactory (SUPDRVFACTORY::pfnQueryFactoryInterface to be precise)
|
---|
| 522 | * will retain a reference to the factory and the caller has to call this method to
|
---|
| 523 | * release it once the pfnCreateAndConnect call(s) has been done.
|
---|
| 524 | *
|
---|
[65117] | 525 | * @param pFactory Pointer to this structure.
|
---|
[35946] | 526 | */
|
---|
| 527 | DECLR0CALLBACKMEMBER(void, pfnRelease,(PRAWPCIFACTORY pFactory));
|
---|
| 528 |
|
---|
| 529 | /**
|
---|
| 530 | * Create an instance for the specfied host PCI card and connects it
|
---|
| 531 | * to the driver.
|
---|
| 532 | *
|
---|
| 533 | *
|
---|
| 534 | * @returns VBox status code.
|
---|
| 535 | *
|
---|
[65117] | 536 | * @param pFactory Pointer to this structure.
|
---|
[35946] | 537 | * @param u32HostAddress Address of PCI device on the host.
|
---|
| 538 | * @param fFlags Creation flags.
|
---|
[36340] | 539 | * @param pVmCtx Context of VM where device is created.
|
---|
[35946] | 540 | * @param ppDevPort Where to store the pointer to the device port
|
---|
| 541 | * on success.
|
---|
[65117] | 542 | * @param pfDevFlags Where to store the device flags.
|
---|
[35946] | 543 | *
|
---|
| 544 | */
|
---|
[36028] | 545 | DECLR0CALLBACKMEMBER(int, pfnCreateAndConnect,(PRAWPCIFACTORY pFactory,
|
---|
| 546 | uint32_t u32HostAddress,
|
---|
[35946] | 547 | uint32_t fFlags,
|
---|
[36448] | 548 | PRAWPCIPERVM pVmCtx,
|
---|
| 549 | PRAWPCIDEVPORT *ppDevPort,
|
---|
| 550 | uint32_t *pfDevFlags));
|
---|
[35946] | 551 |
|
---|
| 552 |
|
---|
[36329] | 553 | /**
|
---|
| 554 | * Initialize per-VM data related to PCI passthrough.
|
---|
| 555 | *
|
---|
| 556 | * @returns VBox status code.
|
---|
| 557 | *
|
---|
[65117] | 558 | * @param pFactory Pointer to this structure.
|
---|
[58124] | 559 | * @param pVM The cross context VM structure.
|
---|
[65117] | 560 | * @param pVmData Pointer to PCI data.
|
---|
[36329] | 561 | */
|
---|
| 562 | DECLR0CALLBACKMEMBER(int, pfnInitVm,(PRAWPCIFACTORY pFactory,
|
---|
| 563 | PVM pVM,
|
---|
[65117] | 564 | PRAWPCIPERVM pVmData));
|
---|
[36329] | 565 |
|
---|
| 566 | /**
|
---|
| 567 | * Deinitialize per-VM data related to PCI passthrough.
|
---|
| 568 | *
|
---|
[65117] | 569 | * @param pFactory Pointer to this structure.
|
---|
[58124] | 570 | * @param pVM The cross context VM structure.
|
---|
[65117] | 571 | * @param pVmData Pointer to PCI data.
|
---|
[36329] | 572 | */
|
---|
| 573 | DECLR0CALLBACKMEMBER(void, pfnDeinitVm,(PRAWPCIFACTORY pFactory,
|
---|
| 574 | PVM pVM,
|
---|
[65117] | 575 | PRAWPCIPERVM pVmData));
|
---|
[35946] | 576 | } RAWPCIFACTORY;
|
---|
| 577 |
|
---|
[36340] | 578 | #define RAWPCIFACTORY_UUID_STR "ea089839-4171-476f-adfb-9e7ab1cbd0fb"
|
---|
[35946] | 579 |
|
---|
[36124] | 580 | /**
|
---|
| 581 | * Flags passed to pfnPciDeviceConstructStart(), to notify driver
|
---|
| 582 | * about options to be used to open device.
|
---|
| 583 | */
|
---|
| 584 | typedef enum PCIRAWDRIVERFLAGS
|
---|
| 585 | {
|
---|
| 586 | /** If runtime shall try to detach host driver. */
|
---|
| 587 | PCIRAWDRIVERRFLAG_DETACH_HOST_DRIVER = (1 << 0),
|
---|
| 588 | /** The usual 32-bit type blow up. */
|
---|
| 589 | PCIRAWDRIVERRFLAG_32BIT_HACK = 0x7fffffff
|
---|
| 590 | } PCIRAWDRIVERFLAGS;
|
---|
| 591 |
|
---|
[36138] | 592 | /**
|
---|
| 593 | * Flags used to describe PCI region, matches to PCIADDRESSSPACE
|
---|
| 594 | * in pci.h.
|
---|
| 595 | */
|
---|
| 596 | typedef enum PCIRAWADDRESSSPACE
|
---|
| 597 | {
|
---|
| 598 | /** Memory. */
|
---|
| 599 | PCIRAW_ADDRESS_SPACE_MEM = 0x00,
|
---|
| 600 | /** I/O space. */
|
---|
| 601 | PCIRAW_ADDRESS_SPACE_IO = 0x01,
|
---|
| 602 | /** 32-bit BAR. */
|
---|
| 603 | PCIRAW_ADDRESS_SPACE_BAR32 = 0x00,
|
---|
| 604 | /** 64-bit BAR. */
|
---|
| 605 | PCIRAW_ADDRESS_SPACE_BAR64 = 0x04,
|
---|
| 606 | /** Prefetch memory. */
|
---|
| 607 | PCIRAW_ADDRESS_SPACE_MEM_PREFETCH = 0x08,
|
---|
| 608 | /** The usual 32-bit type blow up. */
|
---|
| 609 | PCIRAW_ADDRESS_SPACE_32BIT_HACK = 0x7fffffff
|
---|
| 610 | } PCIRAWADDRESSSPACE;
|
---|
[36124] | 611 |
|
---|
[35920] | 612 | RT_C_DECLS_END
|
---|
| 613 |
|
---|
[36717] | 614 | /* #define VBOX_WITH_SHARED_PCI_INTERRUPTS */
|
---|
| 615 |
|
---|
[76585] | 616 | #endif /* !VBOX_INCLUDED_rawpci_h */
|
---|