VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 4015

Last change on this file since 4015 was 4014, checked in by vboxsync, 17 years ago

Use pdmdrv.h and pdmdev.h where appropirate.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License as published by the Free Software Foundation,
12 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13 * distribution. VirtualBox OSE is distributed in the hope that it will
14 * be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * If you received this file as part of a commercial VirtualBox
17 * distribution, then only the terms of your commercial VirtualBox
18 * license agreement apply instead of the previous paragraph.
19 */
20
21#ifndef ___VBox_pdmdev_h
22#define ___VBox_pdmdev_h
23
24#include <VBox/pdmqueue.h>
25#include <VBox/pdmcritsect.h>
26#include <VBox/pdmthread.h>
27#include <VBox/pdmifs.h>
28#include <VBox/pdmins.h>
29#include <VBox/iom.h>
30#include <VBox/tm.h>
31#include <VBox/ssm.h>
32#include <VBox/cfgm.h>
33#include <VBox/dbgf.h>
34#include <VBox/mm.h>
35#include <VBox/err.h>
36#include <VBox/pci.h>
37#include <iprt/stdarg.h>
38
39__BEGIN_DECLS
40
41/** @defgroup grp_pdm_device Devices
42 * @ingroup grp_pdm
43 * @{
44 */
45
46/**
47 * Construct a device instance for a VM.
48 *
49 * @returns VBox status.
50 * @param pDevIns The device instance data.
51 * If the registration structure is needed, pDevIns->pDevReg points to it.
52 * @param iInstance Instance number. Use this to figure out which registers and such to use.
53 * The instance number is also found in pDevIns->iInstance, but since it's
54 * likely to be freqently used PDM passes it as parameter.
55 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
56 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
57 * primary usage will in this function it's passed as a parameter.
58 */
59typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
60/** Pointer to a FNPDMDEVCONSTRUCT() function. */
61typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
62
63/**
64 * Destruct a device instance.
65 *
66 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
67 * resources can be freed correctly.
68 *
69 * @returns VBox status.
70 * @param pDevIns The device instance data.
71 */
72typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
73/** Pointer to a FNPDMDEVDESTRUCT() function. */
74typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
75
76/**
77 * Device relocation callback.
78 *
79 * When this callback is called the device instance data, and if the
80 * device have a GC component, is being relocated, or/and the selectors
81 * have been changed. The device must use the chance to perform the
82 * necessary pointer relocations and data updates.
83 *
84 * Before the GC code is executed the first time, this function will be
85 * called with a 0 delta so GC pointer calculations can be one in one place.
86 *
87 * @param pDevIns Pointer to the device instance.
88 * @param offDelta The relocation delta relative to the old location.
89 *
90 * @remark A relocation CANNOT fail.
91 */
92typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
93/** Pointer to a FNPDMDEVRELOCATE() function. */
94typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
95
96
97/**
98 * Device I/O Control interface.
99 *
100 * This is used by external components, such as the COM interface, to
101 * communicate with devices using a class wide interface or a device
102 * specific interface.
103 *
104 * @returns VBox status code.
105 * @param pDevIns Pointer to the device instance.
106 * @param uFunction Function to perform.
107 * @param pvIn Pointer to input data.
108 * @param cbIn Size of input data.
109 * @param pvOut Pointer to output data.
110 * @param cbOut Size of output data.
111 * @param pcbOut Where to store the actual size of the output data.
112 */
113typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
114 void *pvIn, RTUINT cbIn,
115 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
116/** Pointer to a FNPDMDEVIOCTL() function. */
117typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
118
119/**
120 * Power On notification.
121 *
122 * @returns VBox status.
123 * @param pDevIns The device instance data.
124 */
125typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
126/** Pointer to a FNPDMDEVPOWERON() function. */
127typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
128
129/**
130 * Reset notification.
131 *
132 * @returns VBox status.
133 * @param pDevIns The device instance data.
134 */
135typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
136/** Pointer to a FNPDMDEVRESET() function. */
137typedef FNPDMDEVRESET *PFNPDMDEVRESET;
138
139/**
140 * Suspend notification.
141 *
142 * @returns VBox status.
143 * @param pDevIns The device instance data.
144 */
145typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
146/** Pointer to a FNPDMDEVSUSPEND() function. */
147typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
148
149/**
150 * Resume notification.
151 *
152 * @returns VBox status.
153 * @param pDevIns The device instance data.
154 */
155typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
156/** Pointer to a FNPDMDEVRESUME() function. */
157typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
158
159/**
160 * Power Off notification.
161 *
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVPOWEROFF() function. */
166typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
167
168/**
169 * Attach command.
170 *
171 * This is called to let the device attach to a driver for a specified LUN
172 * at runtime. This is not called during VM construction, the device
173 * constructor have to attach to all the available drivers.
174 *
175 * This is like plugging in the keyboard or mouse after turning on the PC.
176 *
177 * @returns VBox status code.
178 * @param pDevIns The device instance.
179 * @param iLUN The logical unit which is being detached.
180 */
181typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
182/** Pointer to a FNPDMDEVATTACH() function. */
183typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
184
185/**
186 * Detach notification.
187 *
188 * This is called when a driver is detaching itself from a LUN of the device.
189 * The device should adjust it's state to reflect this.
190 *
191 * This is like unplugging the network cable to use it for the laptop or
192 * something while the PC is still running.
193 *
194 * @param pDevIns The device instance.
195 * @param iLUN The logical unit which is being detached.
196 */
197typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
198/** Pointer to a FNPDMDEVDETACH() function. */
199typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
200
201/**
202 * Query the base interface of a logical unit.
203 *
204 * @returns VBOX status code.
205 * @param pDevIns The device instance.
206 * @param iLUN The logicial unit to query.
207 * @param ppBase Where to store the pointer to the base interface of the LUN.
208 */
209typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
210/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
211typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
212
213/**
214 * Init complete notification.
215 * This can be done to do communication with other devices and other
216 * initialization which requires everything to be in place.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 */
221typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
222/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
223typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
224
225
226
227/** PDM Device Registration Structure,
228 * This structure is used when registering a device from
229 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
230 * the VM is terminated.
231 */
232typedef struct PDMDEVREG
233{
234 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
235 uint32_t u32Version;
236 /** Device name. */
237 char szDeviceName[32];
238 /** Name of guest context module (no path).
239 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
240 char szGCMod[32];
241 /** Name of guest context module (no path).
242 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
243 char szR0Mod[32];
244 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
245 * remain unchanged from registration till VM destruction. */
246 const char *pszDescription;
247
248 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
249 RTUINT fFlags;
250 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
251 RTUINT fClass;
252 /** Maximum number of instances (per VM). */
253 RTUINT cMaxInstances;
254 /** Size of the instance data. */
255 RTUINT cbInstance;
256
257 /** Construct instance - required. */
258 PFNPDMDEVCONSTRUCT pfnConstruct;
259 /** Destruct instance - optional. */
260 PFNPDMDEVDESTRUCT pfnDestruct;
261 /** Relocation command - optional. */
262 PFNPDMDEVRELOCATE pfnRelocate;
263 /** I/O Control interface - optional. */
264 PFNPDMDEVIOCTL pfnIOCtl;
265 /** Power on notification - optional. */
266 PFNPDMDEVPOWERON pfnPowerOn;
267 /** Reset notification - optional. */
268 PFNPDMDEVRESET pfnReset;
269 /** Suspend notification - optional. */
270 PFNPDMDEVSUSPEND pfnSuspend;
271 /** Resume notification - optional. */
272 PFNPDMDEVRESUME pfnResume;
273 /** Attach command - optional. */
274 PFNPDMDEVATTACH pfnAttach;
275 /** Detach notification - optional. */
276 PFNPDMDEVDETACH pfnDetach;
277 /** Query a LUN base interface - optional. */
278 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
279 /** Init complete notification - optional. */
280 PFNPDMDEVINITCOMPLETE pfnInitComplete;
281 /** Power off notification - optional. */
282 PFNPDMDEVPOWEROFF pfnPowerOff;
283} PDMDEVREG;
284/** Pointer to a PDM Device Structure. */
285typedef PDMDEVREG *PPDMDEVREG;
286/** Const pointer to a PDM Device Structure. */
287typedef PDMDEVREG const *PCPDMDEVREG;
288
289/** Current DEVREG version number. */
290#define PDM_DEVREG_VERSION 0xc0010000
291
292/** PDM Device Flags.
293 * @{ */
294/** This flag is used to indicate that the device has a GC component. */
295#define PDM_DEVREG_FLAGS_GC 0x00000001
296/** This flag is used to indicate that the device has a R0 component. */
297#define PDM_DEVREG_FLAGS_R0 0x00010000
298
299/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
300 * The bit count for the current host. */
301#if HC_ARCH_BITS == 32
302# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
303#elif HC_ARCH_BITS == 64
304# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
305#else
306# error Unsupported HC_ARCH_BITS value.
307#endif
308/** The host bit count mask. */
309#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
310
311/** The device support only 32-bit guests. */
312#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
313/** The device support only 64-bit guests. */
314#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
315/** The device support both 32-bit & 64-bit guests. */
316#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
317/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
318 * The guest bit count for the current compilation. */
319#if GC_ARCH_BITS == 32
320# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
321#elif GC_ARCH_BITS == 64
322# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
323#else
324# error Unsupported GC_ARCH_BITS value.
325#endif
326/** The guest bit count mask. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
328
329/** Indicates that the devices support PAE36 on a 32-bit guest. */
330#define PDM_DEVREG_FLAGS_PAE36 0x00000020
331/** @} */
332
333
334/** PDM Device Classes.
335 * The order is important, lower bit earlier instantiation.
336 * @{ */
337/** Architecture device. */
338#define PDM_DEVREG_CLASS_ARCH BIT(0)
339/** Architecture BIOS device. */
340#define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)
341/** PCI bus brigde. */
342#define PDM_DEVREG_CLASS_BUS_PCI BIT(2)
343/** ISA bus brigde. */
344#define PDM_DEVREG_CLASS_BUS_ISA BIT(3)
345/** Input device (mouse, keyboard, joystick,..). */
346#define PDM_DEVREG_CLASS_INPUT BIT(4)
347/** Interrupt controller (PIC). */
348#define PDM_DEVREG_CLASS_PIC BIT(5)
349/** Interval controoler (PIT). */
350#define PDM_DEVREG_CLASS_PIT BIT(6)
351/** RTC/CMOS. */
352#define PDM_DEVREG_CLASS_RTC BIT(7)
353/** DMA controller. */
354#define PDM_DEVREG_CLASS_DMA BIT(8)
355/** VMM Device. */
356#define PDM_DEVREG_CLASS_VMM_DEV BIT(9)
357/** Graphics device, like VGA. */
358#define PDM_DEVREG_CLASS_GRAPHICS BIT(10)
359/** Storage controller device. */
360#define PDM_DEVREG_CLASS_STORAGE BIT(11)
361/** Network interface controller. */
362#define PDM_DEVREG_CLASS_NETWORK BIT(12)
363/** Audio. */
364#define PDM_DEVREG_CLASS_AUDIO BIT(13)
365/** USB HIC. */
366#define PDM_DEVREG_CLASS_BUS_USB BIT(14)
367/** ACPI. */
368#define PDM_DEVREG_CLASS_ACPI BIT(15)
369/** Serial controller device. */
370#define PDM_DEVREG_CLASS_SERIAL BIT(16)
371/** Parallel controller device */
372#define PDM_DEVREG_CLASS_PARALLEL BIT(17)
373/** Misc devices (always last). */
374#define PDM_DEVREG_CLASS_MISC BIT(31)
375/** @} */
376
377
378/** @name IRQ Level for use with the *SetIrq APIs.
379 * @{
380 */
381/** Assert the IRQ (can assume value 1). */
382#define PDM_IRQ_LEVEL_HIGH BIT(0)
383/** Deassert the IRQ (can assume value 0). */
384#define PDM_IRQ_LEVEL_LOW 0
385/** flip-flop - assert and then deassert it again immediately. */
386#define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)
387/** @} */
388
389
390/**
391 * PCI Bus registaration structure.
392 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
393 */
394typedef struct PDMPCIBUSREG
395{
396 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
397 uint32_t u32Version;
398
399 /**
400 * Registers the device with the default PCI bus.
401 *
402 * @returns VBox status code.
403 * @param pDevIns Device instance of the PCI Bus.
404 * @param pPciDev The PCI device structure.
405 * Any PCI enabled device must keep this in it's instance data!
406 * Fill in the PCI data config before registration, please.
407 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
408 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
409 * If negative, the pci bus device will assign one.
410 */
411 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
412
413 /**
414 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
415 *
416 * @returns VBox status code.
417 * @param pDevIns Device instance of the PCI Bus.
418 * @param pPciDev The PCI device structure.
419 * @param iRegion The region number.
420 * @param cbRegion Size of the region.
421 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
422 * @param pfnCallback Callback for doing the mapping.
423 */
424 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
425
426 /**
427 * Register PCI configuration space read/write callbacks.
428 *
429 * @param pDevIns Device instance of the PCI Bus.
430 * @param pPciDev The PCI device structure.
431 * @param pfnRead Pointer to the user defined PCI config read function.
432 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
433 * PCI config read function. This way, user can decide when (and if)
434 * to call default PCI config read function. Can be NULL.
435 * @param pfnWrite Pointer to the user defined PCI config write function.
436 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
437 * PCI config write function. This way, user can decide when (and if)
438 * to call default PCI config write function. Can be NULL.
439 * @thread EMT
440 */
441 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
442 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
443
444 /**
445 * Set the IRQ for a PCI device.
446 *
447 * @param pDevIns Device instance of the PCI Bus.
448 * @param pPciDev The PCI device structure.
449 * @param iIrq IRQ number to set.
450 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
451 */
452 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
453
454 /**
455 * Saves a state of the PCI device.
456 *
457 * @returns VBox status code.
458 * @param pDevIns Device instance of the PCI Bus.
459 * @param pPciDev Pointer to PCI device.
460 * @param pSSMHandle The handle to save the state to.
461 */
462 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
463
464 /**
465 * Loads a saved PCI device state.
466 *
467 * @returns VBox status code.
468 * @param pDevIns Device instance of the PCI Bus.
469 * @param pPciDev Pointer to PCI device.
470 * @param pSSMHandle The handle to the saved state.
471 */
472 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
473
474 /**
475 * Called to perform the job of the bios.
476 * This is only called for the first PCI Bus - it is expected to
477 * service all the PCI buses.
478 *
479 * @returns VBox status.
480 * @param pDevIns Device instance of the first bus.
481 */
482 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
483
484 /** The name of the SetIrq GC entry point. */
485 const char *pszSetIrqGC;
486
487 /** The name of the SetIrq R0 entry point. */
488 const char *pszSetIrqR0;
489
490} PDMPCIBUSREG;
491/** Pointer to a PCI bus registration structure. */
492typedef PDMPCIBUSREG *PPDMPCIBUSREG;
493
494/** Current PDMPCIBUSREG version number. */
495#define PDM_PCIBUSREG_VERSION 0xd0020000
496
497/**
498 * PCI Bus GC helpers.
499 */
500typedef struct PDMPCIHLPGC
501{
502 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
503 uint32_t u32Version;
504
505 /**
506 * Set an ISA IRQ.
507 *
508 * @param pDevIns PCI device instance.
509 * @param iIrq IRQ number to set.
510 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
511 * @thread EMT only.
512 */
513 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
514
515 /**
516 * Set an I/O-APIC IRQ.
517 *
518 * @param pDevIns PCI device instance.
519 * @param iIrq IRQ number to set.
520 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
521 * @thread EMT only.
522 */
523 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
524
525#ifdef VBOX_WITH_PDM_LOCK
526 /**
527 * Acquires the PDM lock.
528 *
529 * @returns VINF_SUCCESS on success.
530 * @returns rc if we failed to acquire the lock.
531 * @param pDevIns The PCI device instance.
532 * @param rc What to return if we fail to acquire the lock.
533 */
534 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
535
536 /**
537 * Releases the PDM lock.
538 *
539 * @param pDevIns The PCI device instance.
540 */
541 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
542#endif
543 /** Just a safety precaution. */
544 uint32_t u32TheEnd;
545} PDMPCIHLPGC;
546/** Pointer to PCI helpers. */
547typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
548/** Pointer to const PCI helpers. */
549typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
550
551/** Current PDMPCIHLPR3 version number. */
552#define PDM_PCIHLPGC_VERSION 0xe1010000
553
554
555/**
556 * PCI Bus R0 helpers.
557 */
558typedef struct PDMPCIHLPR0
559{
560 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
561 uint32_t u32Version;
562
563 /**
564 * Set an ISA IRQ.
565 *
566 * @param pDevIns PCI device instance.
567 * @param iIrq IRQ number to set.
568 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
569 * @thread EMT only.
570 */
571 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
572
573 /**
574 * Set an I/O-APIC IRQ.
575 *
576 * @param pDevIns PCI device instance.
577 * @param iIrq IRQ number to set.
578 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
579 * @thread EMT only.
580 */
581 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
582
583#ifdef VBOX_WITH_PDM_LOCK
584 /**
585 * Acquires the PDM lock.
586 *
587 * @returns VINF_SUCCESS on success.
588 * @returns rc if we failed to acquire the lock.
589 * @param pDevIns The PCI device instance.
590 * @param rc What to return if we fail to acquire the lock.
591 */
592 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
593
594 /**
595 * Releases the PDM lock.
596 *
597 * @param pDevIns The PCI device instance.
598 */
599 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
600#endif
601
602 /** Just a safety precaution. */
603 uint32_t u32TheEnd;
604} PDMPCIHLPR0;
605/** Pointer to PCI helpers. */
606typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
607/** Pointer to const PCI helpers. */
608typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
609
610/** Current PDMPCIHLPR0 version number. */
611#define PDM_PCIHLPR0_VERSION 0xe1010000
612
613/**
614 * PCI device helpers.
615 */
616typedef struct PDMPCIHLPR3
617{
618 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
619 uint32_t u32Version;
620
621 /**
622 * Set an ISA IRQ.
623 *
624 * @param pDevIns The PCI device instance.
625 * @param iIrq IRQ number to set.
626 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
627 * @thread EMT only.
628 */
629 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
630
631 /**
632 * Set an I/O-APIC IRQ.
633 *
634 * @param pDevIns The PCI device instance.
635 * @param iIrq IRQ number to set.
636 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
637 * @thread EMT only.
638 */
639 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
640
641#ifdef VBOX_WITH_PDM_LOCK
642 /**
643 * Acquires the PDM lock.
644 *
645 * @returns VINF_SUCCESS on success.
646 * @returns Fatal error on failure.
647 * @param pDevIns The PCI device instance.
648 * @param rc Dummy for making the interface identical to the GC and R0 versions.
649 */
650 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
651
652 /**
653 * Releases the PDM lock.
654 *
655 * @param pDevIns The PCI device instance.
656 */
657 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
658#endif
659
660 /**
661 * Gets the address of the GC PCI Bus helpers.
662 *
663 * This should be called at both construction and relocation time
664 * to obtain the correct address of the GC helpers.
665 *
666 * @returns GC pointer to the PCI Bus helpers.
667 * @param pDevIns Device instance of the PCI Bus.
668 * @thread EMT only.
669 */
670 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
671
672 /**
673 * Gets the address of the R0 PCI Bus helpers.
674 *
675 * This should be called at both construction and relocation time
676 * to obtain the correct address of the GC helpers.
677 *
678 * @returns R0 pointer to the PCI Bus helpers.
679 * @param pDevIns Device instance of the PCI Bus.
680 * @thread EMT only.
681 */
682 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
683
684 /** Just a safety precaution. */
685 uint32_t u32TheEnd;
686} PDMPCIHLPR3;
687/** Pointer to PCI helpers. */
688typedef HCPTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
689/** Pointer to const PCI helpers. */
690typedef HCPTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
691
692/** Current PDMPCIHLPR3 version number. */
693#define PDM_PCIHLPR3_VERSION 0xf1010000
694
695
696/**
697 * Programmable Interrupt Controller registration structure.
698 */
699typedef struct PDMPICREG
700{
701 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
702 uint32_t u32Version;
703
704 /**
705 * Set the an IRQ.
706 *
707 * @param pDevIns Device instance of the PIC.
708 * @param iIrq IRQ number to set.
709 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
710 */
711 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
712
713 /**
714 * Get a pending interrupt.
715 *
716 * @returns Pending interrupt number.
717 * @param pDevIns Device instance of the PIC.
718 */
719 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
720
721 /** The name of the GC SetIrq entry point. */
722 const char *pszSetIrqGC;
723 /** The name of the GC GetInterrupt entry point. */
724 const char *pszGetInterruptGC;
725
726 /** The name of the R0 SetIrq entry point. */
727 const char *pszSetIrqR0;
728 /** The name of the R0 GetInterrupt entry point. */
729 const char *pszGetInterruptR0;
730} PDMPICREG;
731/** Pointer to a PIC registration structure. */
732typedef PDMPICREG *PPDMPICREG;
733
734/** Current PDMPICREG version number. */
735#define PDM_PICREG_VERSION 0xe0020000
736
737/**
738 * PIC GC helpers.
739 */
740typedef struct PDMPICHLPGC
741{
742 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
743 uint32_t u32Version;
744
745 /**
746 * Set the interrupt force action flag.
747 *
748 * @param pDevIns Device instance of the PIC.
749 */
750 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
751
752 /**
753 * Clear the interrupt force action flag.
754 *
755 * @param pDevIns Device instance of the PIC.
756 */
757 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
758
759#ifdef VBOX_WITH_PDM_LOCK
760 /**
761 * Acquires the PDM lock.
762 *
763 * @returns VINF_SUCCESS on success.
764 * @returns rc if we failed to acquire the lock.
765 * @param pDevIns The PIC device instance.
766 * @param rc What to return if we fail to acquire the lock.
767 */
768 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
769
770 /**
771 * Releases the PDM lock.
772 *
773 * @param pDevIns The PIC device instance.
774 */
775 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
776#endif
777 /** Just a safety precaution. */
778 uint32_t u32TheEnd;
779} PDMPICHLPGC;
780
781/** Pointer to PIC GC helpers. */
782typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
783/** Pointer to const PIC GC helpers. */
784typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
785
786/** Current PDMPICHLPGC version number. */
787#define PDM_PICHLPGC_VERSION 0xfc010000
788
789
790/**
791 * PIC R0 helpers.
792 */
793typedef struct PDMPICHLPR0
794{
795 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
796 uint32_t u32Version;
797
798 /**
799 * Set the interrupt force action flag.
800 *
801 * @param pDevIns Device instance of the PIC.
802 */
803 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
804
805 /**
806 * Clear the interrupt force action flag.
807 *
808 * @param pDevIns Device instance of the PIC.
809 */
810 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
811
812#ifdef VBOX_WITH_PDM_LOCK
813 /**
814 * Acquires the PDM lock.
815 *
816 * @returns VINF_SUCCESS on success.
817 * @returns rc if we failed to acquire the lock.
818 * @param pDevIns The PIC device instance.
819 * @param rc What to return if we fail to acquire the lock.
820 */
821 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
822
823 /**
824 * Releases the PDM lock.
825 *
826 * @param pDevIns The PCI device instance.
827 */
828 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
829#endif
830
831 /** Just a safety precaution. */
832 uint32_t u32TheEnd;
833} PDMPICHLPR0;
834
835/** Pointer to PIC R0 helpers. */
836typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
837/** Pointer to const PIC R0 helpers. */
838typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
839
840/** Current PDMPICHLPR0 version number. */
841#define PDM_PICHLPR0_VERSION 0xfc010000
842
843/**
844 * PIC HC helpers.
845 */
846typedef struct PDMPICHLPR3
847{
848 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
849 uint32_t u32Version;
850
851 /**
852 * Set the interrupt force action flag.
853 *
854 * @param pDevIns Device instance of the PIC.
855 */
856 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
857
858 /**
859 * Clear the interrupt force action flag.
860 *
861 * @param pDevIns Device instance of the PIC.
862 */
863 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
864
865#ifdef VBOX_WITH_PDM_LOCK
866 /**
867 * Acquires the PDM lock.
868 *
869 * @returns VINF_SUCCESS on success.
870 * @returns Fatal error on failure.
871 * @param pDevIns The PIC device instance.
872 * @param rc Dummy for making the interface identical to the GC and R0 versions.
873 */
874 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
875
876 /**
877 * Releases the PDM lock.
878 *
879 * @param pDevIns The PIC device instance.
880 */
881 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
882#endif
883
884 /**
885 * Gets the address of the GC PIC helpers.
886 *
887 * This should be called at both construction and relocation time
888 * to obtain the correct address of the GC helpers.
889 *
890 * @returns GC pointer to the PIC helpers.
891 * @param pDevIns Device instance of the PIC.
892 */
893 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
894
895 /**
896 * Gets the address of the R0 PIC helpers.
897 *
898 * This should be called at both construction and relocation time
899 * to obtain the correct address of the GC helpers.
900 *
901 * @returns R0 pointer to the PIC helpers.
902 * @param pDevIns Device instance of the PIC.
903 */
904 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
905
906 /** Just a safety precaution. */
907 uint32_t u32TheEnd;
908} PDMPICHLPR3;
909
910/** Pointer to PIC HC helpers. */
911typedef HCPTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
912/** Pointer to const PIC HC helpers. */
913typedef HCPTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
914
915/** Current PDMPICHLPR3 version number. */
916#define PDM_PICHLPR3_VERSION 0xf0010000
917
918
919
920/**
921 * Advanced Programmable Interrupt Controller registration structure.
922 */
923typedef struct PDMAPICREG
924{
925 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
926 uint32_t u32Version;
927
928 /**
929 * Get a pending interrupt.
930 *
931 * @returns Pending interrupt number.
932 * @param pDevIns Device instance of the APIC.
933 */
934 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
935
936 /**
937 * Set the APIC base.
938 *
939 * @param pDevIns Device instance of the APIC.
940 * @param u64Base The new base.
941 */
942 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
943
944 /**
945 * Get the APIC base.
946 *
947 * @returns Current base.
948 * @param pDevIns Device instance of the APIC.
949 */
950 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
951
952 /**
953 * Set the TPR (task priority register?).
954 *
955 * @param pDevIns Device instance of the APIC.
956 * @param u8TPR The new TPR.
957 */
958 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
959
960 /**
961 * Get the TPR (task priority register?).
962 *
963 * @returns The current TPR.
964 * @param pDevIns Device instance of the APIC.
965 */
966 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
967
968 /**
969 * Private interface between the IOAPIC and APIC.
970 *
971 * This is a low-level, APIC/IOAPIC implementation specific interface
972 * which is registered with PDM only because it makes life so much
973 * simpler right now (GC bits). This is a bad bad hack! The correct
974 * way of doing this would involve some way of querying GC interfaces
975 * and relocating them. Perhaps doing some kind of device init in GC...
976 *
977 * @returns The current TPR.
978 * @param pDevIns Device instance of the APIC.
979 * @param u8Dest See APIC implementation.
980 * @param u8DestMode See APIC implementation.
981 * @param u8DeliveryMode See APIC implementation.
982 * @param iVector See APIC implementation.
983 * @param u8Polarity See APIC implementation.
984 * @param u8TriggerMode See APIC implementation.
985 */
986 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
987 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
988
989 /** The name of the GC GetInterrupt entry point. */
990 const char *pszGetInterruptGC;
991 /** The name of the GC SetBase entry point. */
992 const char *pszSetBaseGC;
993 /** The name of the GC GetBase entry point. */
994 const char *pszGetBaseGC;
995 /** The name of the GC SetTPR entry point. */
996 const char *pszSetTPRGC;
997 /** The name of the GC GetTPR entry point. */
998 const char *pszGetTPRGC;
999 /** The name of the GC BusDeliver entry point. */
1000 const char *pszBusDeliverGC;
1001
1002 /** The name of the R0 GetInterrupt entry point. */
1003 const char *pszGetInterruptR0;
1004 /** The name of the R0 SetBase entry point. */
1005 const char *pszSetBaseR0;
1006 /** The name of the R0 GetBase entry point. */
1007 const char *pszGetBaseR0;
1008 /** The name of the R0 SetTPR entry point. */
1009 const char *pszSetTPRR0;
1010 /** The name of the R0 GetTPR entry point. */
1011 const char *pszGetTPRR0;
1012 /** The name of the R0 BusDeliver entry point. */
1013 const char *pszBusDeliverR0;
1014
1015} PDMAPICREG;
1016/** Pointer to an APIC registration structure. */
1017typedef PDMAPICREG *PPDMAPICREG;
1018
1019/** Current PDMAPICREG version number. */
1020#define PDM_APICREG_VERSION 0x70010000
1021
1022
1023/**
1024 * APIC GC helpers.
1025 */
1026typedef struct PDMAPICHLPGC
1027{
1028 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1029 uint32_t u32Version;
1030
1031 /**
1032 * Set the interrupt force action flag.
1033 *
1034 * @param pDevIns Device instance of the APIC.
1035 */
1036 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1037
1038 /**
1039 * Clear the interrupt force action flag.
1040 *
1041 * @param pDevIns Device instance of the APIC.
1042 */
1043 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1044
1045 /**
1046 * Sets or clears the APIC bit in the CPUID feature masks.
1047 *
1048 * @param pDevIns Device instance of the APIC.
1049 * @param fEnabled If true the bit is set, else cleared.
1050 */
1051 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1052
1053#ifdef VBOX_WITH_PDM_LOCK
1054 /**
1055 * Acquires the PDM lock.
1056 *
1057 * @returns VINF_SUCCESS on success.
1058 * @returns rc if we failed to acquire the lock.
1059 * @param pDevIns The APIC device instance.
1060 * @param rc What to return if we fail to acquire the lock.
1061 */
1062 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1063
1064 /**
1065 * Releases the PDM lock.
1066 *
1067 * @param pDevIns The APIC device instance.
1068 */
1069 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1070#endif
1071 /** Just a safety precaution. */
1072 uint32_t u32TheEnd;
1073} PDMAPICHLPGC;
1074/** Pointer to APIC GC helpers. */
1075typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1076/** Pointer to const APIC helpers. */
1077typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1078
1079/** Current PDMAPICHLPGC version number. */
1080#define PDM_APICHLPGC_VERSION 0x60010000
1081
1082
1083/**
1084 * APIC R0 helpers.
1085 */
1086typedef struct PDMAPICHLPR0
1087{
1088 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1089 uint32_t u32Version;
1090
1091 /**
1092 * Set the interrupt force action flag.
1093 *
1094 * @param pDevIns Device instance of the APIC.
1095 */
1096 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1097
1098 /**
1099 * Clear the interrupt force action flag.
1100 *
1101 * @param pDevIns Device instance of the APIC.
1102 */
1103 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1104
1105 /**
1106 * Sets or clears the APIC bit in the CPUID feature masks.
1107 *
1108 * @param pDevIns Device instance of the APIC.
1109 * @param fEnabled If true the bit is set, else cleared.
1110 */
1111 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1112
1113#ifdef VBOX_WITH_PDM_LOCK
1114 /**
1115 * Acquires the PDM lock.
1116 *
1117 * @returns VINF_SUCCESS on success.
1118 * @returns rc if we failed to acquire the lock.
1119 * @param pDevIns The APIC device instance.
1120 * @param rc What to return if we fail to acquire the lock.
1121 */
1122 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1123
1124 /**
1125 * Releases the PDM lock.
1126 *
1127 * @param pDevIns The APIC device instance.
1128 */
1129 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1130#endif
1131
1132 /** Just a safety precaution. */
1133 uint32_t u32TheEnd;
1134} PDMAPICHLPR0;
1135/** Pointer to APIC GC helpers. */
1136typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1137/** Pointer to const APIC helpers. */
1138typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1139
1140/** Current PDMAPICHLPR0 version number. */
1141#define PDM_APICHLPR0_VERSION 0x60010000
1142
1143/**
1144 * APIC HC helpers.
1145 */
1146typedef struct PDMAPICHLPR3
1147{
1148 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1149 uint32_t u32Version;
1150
1151 /**
1152 * Set the interrupt force action flag.
1153 *
1154 * @param pDevIns Device instance of the APIC.
1155 */
1156 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1157
1158 /**
1159 * Clear the interrupt force action flag.
1160 *
1161 * @param pDevIns Device instance of the APIC.
1162 */
1163 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1164
1165 /**
1166 * Sets or clears the APIC bit in the CPUID feature masks.
1167 *
1168 * @param pDevIns Device instance of the APIC.
1169 * @param fEnabled If true the bit is set, else cleared.
1170 */
1171 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1172
1173#ifdef VBOX_WITH_PDM_LOCK
1174 /**
1175 * Acquires the PDM lock.
1176 *
1177 * @returns VINF_SUCCESS on success.
1178 * @returns Fatal error on failure.
1179 * @param pDevIns The APIC device instance.
1180 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1181 */
1182 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1183
1184 /**
1185 * Releases the PDM lock.
1186 *
1187 * @param pDevIns The APIC device instance.
1188 */
1189 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1190#endif
1191
1192 /**
1193 * Gets the address of the GC APIC helpers.
1194 *
1195 * This should be called at both construction and relocation time
1196 * to obtain the correct address of the GC helpers.
1197 *
1198 * @returns GC pointer to the APIC helpers.
1199 * @param pDevIns Device instance of the APIC.
1200 */
1201 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1202
1203 /**
1204 * Gets the address of the R0 APIC helpers.
1205 *
1206 * This should be called at both construction and relocation time
1207 * to obtain the correct address of the R0 helpers.
1208 *
1209 * @returns R0 pointer to the APIC helpers.
1210 * @param pDevIns Device instance of the APIC.
1211 */
1212 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1213
1214 /** Just a safety precaution. */
1215 uint32_t u32TheEnd;
1216} PDMAPICHLPR3;
1217/** Pointer to APIC helpers. */
1218typedef HCPTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1219/** Pointer to const APIC helpers. */
1220typedef HCPTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1221
1222/** Current PDMAPICHLP version number. */
1223#define PDM_APICHLPR3_VERSION 0xfd010000
1224
1225
1226/**
1227 * I/O APIC registration structure.
1228 */
1229typedef struct PDMIOAPICREG
1230{
1231 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1232 uint32_t u32Version;
1233
1234 /**
1235 * Set the an IRQ.
1236 *
1237 * @param pDevIns Device instance of the I/O APIC.
1238 * @param iIrq IRQ number to set.
1239 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1240 */
1241 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1242
1243 /** The name of the GC SetIrq entry point. */
1244 const char *pszSetIrqGC;
1245
1246 /** The name of the R0 SetIrq entry point. */
1247 const char *pszSetIrqR0;
1248} PDMIOAPICREG;
1249/** Pointer to an APIC registration structure. */
1250typedef PDMIOAPICREG *PPDMIOAPICREG;
1251
1252/** Current PDMAPICREG version number. */
1253#define PDM_IOAPICREG_VERSION 0x50010000
1254
1255
1256/**
1257 * IOAPIC GC helpers.
1258 */
1259typedef struct PDMIOAPICHLPGC
1260{
1261 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1262 uint32_t u32Version;
1263
1264 /**
1265 * Private interface between the IOAPIC and APIC.
1266 *
1267 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1268 *
1269 * @returns The current TPR.
1270 * @param pDevIns Device instance of the IOAPIC.
1271 * @param u8Dest See APIC implementation.
1272 * @param u8DestMode See APIC implementation.
1273 * @param u8DeliveryMode See APIC implementation.
1274 * @param iVector See APIC implementation.
1275 * @param u8Polarity See APIC implementation.
1276 * @param u8TriggerMode See APIC implementation.
1277 */
1278 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1279 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1280
1281#ifdef VBOX_WITH_PDM_LOCK
1282 /**
1283 * Acquires the PDM lock.
1284 *
1285 * @returns VINF_SUCCESS on success.
1286 * @returns rc if we failed to acquire the lock.
1287 * @param pDevIns The IOAPIC device instance.
1288 * @param rc What to return if we fail to acquire the lock.
1289 */
1290 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1291
1292 /**
1293 * Releases the PDM lock.
1294 *
1295 * @param pDevIns The IOAPIC device instance.
1296 */
1297 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1298#endif
1299
1300 /** Just a safety precaution. */
1301 uint32_t u32TheEnd;
1302} PDMIOAPICHLPGC;
1303/** Pointer to IOAPIC GC helpers. */
1304typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1305/** Pointer to const IOAPIC helpers. */
1306typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1307
1308/** Current PDMIOAPICHLPGC version number. */
1309#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1310
1311
1312/**
1313 * IOAPIC R0 helpers.
1314 */
1315typedef struct PDMIOAPICHLPR0
1316{
1317 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1318 uint32_t u32Version;
1319
1320 /**
1321 * Private interface between the IOAPIC and APIC.
1322 *
1323 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1324 *
1325 * @returns The current TPR.
1326 * @param pDevIns Device instance of the IOAPIC.
1327 * @param u8Dest See APIC implementation.
1328 * @param u8DestMode See APIC implementation.
1329 * @param u8DeliveryMode See APIC implementation.
1330 * @param iVector See APIC implementation.
1331 * @param u8Polarity See APIC implementation.
1332 * @param u8TriggerMode See APIC implementation.
1333 */
1334 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1335 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1336
1337#ifdef VBOX_WITH_PDM_LOCK
1338 /**
1339 * Acquires the PDM lock.
1340 *
1341 * @returns VINF_SUCCESS on success.
1342 * @returns rc if we failed to acquire the lock.
1343 * @param pDevIns The IOAPIC device instance.
1344 * @param rc What to return if we fail to acquire the lock.
1345 */
1346 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1347
1348 /**
1349 * Releases the PDM lock.
1350 *
1351 * @param pDevIns The IOAPIC device instance.
1352 */
1353 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1354#endif
1355
1356 /** Just a safety precaution. */
1357 uint32_t u32TheEnd;
1358} PDMIOAPICHLPR0;
1359/** Pointer to IOAPIC R0 helpers. */
1360typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1361/** Pointer to const IOAPIC helpers. */
1362typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1363
1364/** Current PDMIOAPICHLPR0 version number. */
1365#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1366
1367/**
1368 * IOAPIC HC helpers.
1369 */
1370typedef struct PDMIOAPICHLPR3
1371{
1372 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1373 uint32_t u32Version;
1374
1375 /**
1376 * Private interface between the IOAPIC and APIC.
1377 *
1378 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1379 *
1380 * @returns The current TPR.
1381 * @param pDevIns Device instance of the IOAPIC.
1382 * @param u8Dest See APIC implementation.
1383 * @param u8DestMode See APIC implementation.
1384 * @param u8DeliveryMode See APIC implementation.
1385 * @param iVector See APIC implementation.
1386 * @param u8Polarity See APIC implementation.
1387 * @param u8TriggerMode See APIC implementation.
1388 */
1389 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1390 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1391
1392#ifdef VBOX_WITH_PDM_LOCK
1393 /**
1394 * Acquires the PDM lock.
1395 *
1396 * @returns VINF_SUCCESS on success.
1397 * @returns Fatal error on failure.
1398 * @param pDevIns The IOAPIC device instance.
1399 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1400 */
1401 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1402
1403 /**
1404 * Releases the PDM lock.
1405 *
1406 * @param pDevIns The IOAPIC device instance.
1407 */
1408 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1409#endif
1410
1411 /**
1412 * Gets the address of the GC IOAPIC helpers.
1413 *
1414 * This should be called at both construction and relocation time
1415 * to obtain the correct address of the GC helpers.
1416 *
1417 * @returns GC pointer to the IOAPIC helpers.
1418 * @param pDevIns Device instance of the IOAPIC.
1419 */
1420 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1421
1422 /**
1423 * Gets the address of the R0 IOAPIC helpers.
1424 *
1425 * This should be called at both construction and relocation time
1426 * to obtain the correct address of the R0 helpers.
1427 *
1428 * @returns R0 pointer to the IOAPIC helpers.
1429 * @param pDevIns Device instance of the IOAPIC.
1430 */
1431 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1432
1433 /** Just a safety precaution. */
1434 uint32_t u32TheEnd;
1435} PDMIOAPICHLPR3;
1436/** Pointer to IOAPIC HC helpers. */
1437typedef HCPTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1438/** Pointer to const IOAPIC helpers. */
1439typedef HCPTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1440
1441/** Current PDMIOAPICHLPR3 version number. */
1442#define PDM_IOAPICHLPR3_VERSION 0xff010000
1443
1444
1445
1446#ifdef IN_RING3
1447
1448/**
1449 * DMA Transfer Handler.
1450 *
1451 * @returns Number of bytes transferred.
1452 * @param pDevIns Device instance of the DMA.
1453 * @param pvUser User pointer.
1454 * @param uChannel Channel number.
1455 * @param off DMA position.
1456 * @param cb Block size.
1457 */
1458typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1459/** Pointer to a FNDMATRANSFERHANDLER(). */
1460typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1461
1462/**
1463 * DMA Controller registration structure.
1464 */
1465typedef struct PDMDMAREG
1466{
1467 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1468 uint32_t u32Version;
1469
1470 /**
1471 * Execute pending transfers.
1472 *
1473 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1474 * @param pDevIns Device instance of the DMAC.
1475 */
1476 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1477
1478 /**
1479 * Register transfer function for DMA channel.
1480 *
1481 * @param pDevIns Device instance of the DMAC.
1482 * @param uChannel Channel number.
1483 * @param pfnTransferHandler Device specific transfer function.
1484 * @param pvUSer User pointer to be passed to the callback.
1485 */
1486 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1487
1488 /**
1489 * Read memory
1490 *
1491 * @returns Number of bytes read.
1492 * @param pDevIns Device instance of the DMAC.
1493 * @param pvBuffer Pointer to target buffer.
1494 * @param off DMA position.
1495 * @param cbBlock Block size.
1496 */
1497 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1498
1499 /**
1500 * Write memory
1501 *
1502 * @returns Number of bytes written.
1503 * @param pDevIns Device instance of the DMAC.
1504 * @param pvBuffer Memory to write.
1505 * @param off DMA position.
1506 * @param cbBlock Block size.
1507 */
1508 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1509
1510 /**
1511 * Set the DREQ line.
1512 *
1513 * @param pDevIns Device instance of the DMAC.
1514 * @param uChannel Channel number.
1515 * @param uLevel Level of the line.
1516 */
1517 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1518
1519 /**
1520 * Get channel mode
1521 *
1522 * @returns Channel mode.
1523 * @param pDevIns Device instance of the DMAC.
1524 * @param uChannel Channel number.
1525 */
1526 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1527
1528} PDMDMACREG;
1529/** Pointer to a DMAC registration structure. */
1530typedef PDMDMACREG *PPDMDMACREG;
1531
1532/** Current PDMDMACREG version number. */
1533#define PDM_DMACREG_VERSION 0xf5010000
1534
1535
1536/**
1537 * DMA Controller device helpers.
1538 */
1539typedef struct PDMDMACHLP
1540{
1541 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1542 uint32_t u32Version;
1543
1544 /* to-be-defined */
1545
1546} PDMDMACHLP;
1547/** Pointer to DMAC helpers. */
1548typedef PDMDMACHLP *PPDMDMACHLP;
1549/** Pointer to const DMAC helpers. */
1550typedef const PDMDMACHLP *PCPDMDMACHLP;
1551
1552/** Current PDMDMACHLP version number. */
1553#define PDM_DMACHLP_VERSION 0xf6010000
1554
1555#endif /* IN_RING3 */
1556
1557
1558
1559/**
1560 * RTC registration structure.
1561 */
1562typedef struct PDMRTCREG
1563{
1564 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1565 uint32_t u32Version;
1566 uint32_t u32Alignment; /**< structure size alignment. */
1567
1568 /**
1569 * Write to a CMOS register and update the checksum if necessary.
1570 *
1571 * @returns VBox status code.
1572 * @param pDevIns Device instance of the RTC.
1573 * @param iReg The CMOS register index.
1574 * @param u8Value The CMOS register value.
1575 */
1576 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1577
1578 /**
1579 * Read a CMOS register.
1580 *
1581 * @returns VBox status code.
1582 * @param pDevIns Device instance of the RTC.
1583 * @param iReg The CMOS register index.
1584 * @param pu8Value Where to store the CMOS register value.
1585 */
1586 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1587
1588} PDMRTCREG;
1589/** Pointer to a RTC registration structure. */
1590typedef PDMRTCREG *PPDMRTCREG;
1591/** Pointer to a const RTC registration structure. */
1592typedef const PDMRTCREG *PCPDMRTCREG;
1593
1594/** Current PDMRTCREG version number. */
1595#define PDM_RTCREG_VERSION 0xfa010000
1596
1597
1598/**
1599 * RTC device helpers.
1600 */
1601typedef struct PDMRTCHLP
1602{
1603 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1604 uint32_t u32Version;
1605
1606 /* to-be-defined */
1607
1608} PDMRTCHLP;
1609/** Pointer to RTC helpers. */
1610typedef PDMRTCHLP *PPDMRTCHLP;
1611/** Pointer to const RTC helpers. */
1612typedef const PDMRTCHLP *PCPDMRTCHLP;
1613
1614/** Current PDMRTCHLP version number. */
1615#define PDM_RTCHLP_VERSION 0xf6010000
1616
1617
1618
1619#ifdef IN_RING3
1620
1621/**
1622 * PDM Device API.
1623 */
1624typedef struct PDMDEVHLP
1625{
1626 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1627 uint32_t u32Version;
1628
1629 /**
1630 * Register a number of I/O ports with a device.
1631 *
1632 * These callbacks are of course for the host context (HC).
1633 * Register HC handlers before guest context (GC) handlers! There must be a
1634 * HC handler for every GC handler!
1635 *
1636 * @returns VBox status.
1637 * @param pDevIns The device instance to register the ports with.
1638 * @param Port First port number in the range.
1639 * @param cPorts Number of ports to register.
1640 * @param pvUser User argument.
1641 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1642 * @param pfnIn Pointer to function which is gonna handle IN operations.
1643 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1644 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1645 * @param pszDesc Pointer to description string. This must not be freed.
1646 */
1647 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1648 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1649 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1650
1651 /**
1652 * Register a number of I/O ports with a device for GC.
1653 *
1654 * These callbacks are for the host context (GC).
1655 * Register host context (HC) handlers before guest context handlers! There must be a
1656 * HC handler for every GC handler!
1657 *
1658 * @returns VBox status.
1659 * @param pDevIns The device instance to register the ports with and which GC module
1660 * to resolve the names against.
1661 * @param Port First port number in the range.
1662 * @param cPorts Number of ports to register.
1663 * @param pvUser User argument.
1664 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1665 * @param pszIn Name of the GC function which is gonna handle IN operations.
1666 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1667 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1668 * @param pszDesc Pointer to description string. This must not be freed.
1669 */
1670 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1671 const char *pszOut, const char *pszIn,
1672 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1673
1674 /**
1675 * Register a number of I/O ports with a device.
1676 *
1677 * These callbacks are of course for the ring-0 host context (R0).
1678 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1679 *
1680 * @returns VBox status.
1681 * @param pDevIns The device instance to register the ports with.
1682 * @param Port First port number in the range.
1683 * @param cPorts Number of ports to register.
1684 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1685 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1686 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1687 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1688 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1689 * @param pszDesc Pointer to description string. This must not be freed.
1690 */
1691 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1692 const char *pszOut, const char *pszIn,
1693 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1694
1695 /**
1696 * Deregister I/O ports.
1697 *
1698 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1699 *
1700 * @returns VBox status.
1701 * @param pDevIns The device instance owning the ports.
1702 * @param Port First port number in the range.
1703 * @param cPorts Number of ports to deregister.
1704 */
1705 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1706
1707
1708 /**
1709 * Register a Memory Mapped I/O (MMIO) region.
1710 *
1711 * These callbacks are of course for the host context (HC).
1712 * Register HC handlers before guest context (GC) handlers! There must be a
1713 * HC handler for every GC handler!
1714 *
1715 * @returns VBox status.
1716 * @param pDevIns The device instance to register the MMIO with.
1717 * @param GCPhysStart First physical address in the range.
1718 * @param cbRange The size of the range (in bytes).
1719 * @param pvUser User argument.
1720 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1721 * @param pfnRead Pointer to function which is gonna handle Read operations.
1722 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1723 * @param pszDesc Pointer to description string. This must not be freed.
1724 */
1725 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1726 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1727 const char *pszDesc));
1728
1729 /**
1730 * Register a Memory Mapped I/O (MMIO) region for GC.
1731 *
1732 * These callbacks are for the guest context (GC).
1733 * Register host context (HC) handlers before guest context handlers! There must be a
1734 * HC handler for every GC handler!
1735 *
1736 * @returns VBox status.
1737 * @param pDevIns The device instance to register the MMIO with.
1738 * @param GCPhysStart First physical address in the range.
1739 * @param cbRange The size of the range (in bytes).
1740 * @param pvUser User argument.
1741 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1742 * @param pszRead Name of the GC function which is gonna handle Read operations.
1743 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1744 * @param pszDesc Pointer to description string. This must not be freed.
1745 */
1746 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1747 const char *pszWrite, const char *pszRead, const char *pszFill,
1748 const char *pszDesc));
1749
1750 /**
1751 * Register a Memory Mapped I/O (MMIO) region for R0.
1752 *
1753 * These callbacks are for the ring-0 host context (R0).
1754 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1755 *
1756 * @returns VBox status.
1757 * @param pDevIns The device instance to register the MMIO with.
1758 * @param GCPhysStart First physical address in the range.
1759 * @param cbRange The size of the range (in bytes).
1760 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1761 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1762 * @param pszRead Name of the GC function which is gonna handle Read operations.
1763 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1764 * @param pszDesc Pointer to description string. This must not be freed.
1765 */
1766 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1767 const char *pszWrite, const char *pszRead, const char *pszFill,
1768 const char *pszDesc));
1769
1770 /**
1771 * Deregister a Memory Mapped I/O (MMIO) region.
1772 *
1773 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1774 *
1775 * @returns VBox status.
1776 * @param pDevIns The device instance owning the MMIO region(s).
1777 * @param GCPhysStart First physical address in the range.
1778 * @param cbRange The size of the range (in bytes).
1779 */
1780 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1781
1782 /**
1783 * Register a ROM (BIOS) region.
1784 *
1785 * It goes without saying that this is read-only memory. The memory region must be
1786 * in unassigned memory. I.e. from the top of the address space or on the PC in
1787 * the 0xa0000-0xfffff range.
1788 *
1789 * @returns VBox status.
1790 * @param pDevIns The device instance owning the ROM region.
1791 * @param GCPhysStart First physical address in the range.
1792 * Must be page aligned!
1793 * @param cbRange The size of the range (in bytes).
1794 * Must be page aligned!
1795 * @param pvBinary Pointer to the binary data backing the ROM image.
1796 * This must be cbRange bytes big.
1797 * It will be copied and doesn't have to stick around.
1798 * @param pszDesc Pointer to description string. This must not be freed.
1799 * @remark There is no way to remove the rom, automatically on device cleanup or
1800 * manually from the device yet. At present I doubt we need such features...
1801 */
1802 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc));
1803
1804 /**
1805 * Register a save state data unit.
1806 *
1807 * @returns VBox status.
1808 * @param pDevIns Device instance.
1809 * @param pszName Data unit name.
1810 * @param u32Instance The instance identifier of the data unit.
1811 * This must together with the name be unique.
1812 * @param u32Version Data layout version number.
1813 * @param cbGuess The approximate amount of data in the unit.
1814 * Only for progress indicators.
1815 * @param pfnSavePrep Prepare save callback, optional.
1816 * @param pfnSaveExec Execute save callback, optional.
1817 * @param pfnSaveDone Done save callback, optional.
1818 * @param pfnLoadPrep Prepare load callback, optional.
1819 * @param pfnLoadExec Execute load callback, optional.
1820 * @param pfnLoadDone Done load callback, optional.
1821 */
1822 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1823 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1824 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1825
1826 /**
1827 * Creates a timer.
1828 *
1829 * @returns VBox status.
1830 * @param pDevIns Device instance.
1831 * @param enmClock The clock to use on this timer.
1832 * @param pfnCallback Callback function.
1833 * @param pszDesc Pointer to description string which must stay around
1834 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1835 * @param ppTimer Where to store the timer on success.
1836 */
1837 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer));
1838
1839 /**
1840 * Creates an external timer.
1841 *
1842 * @returns timer pointer
1843 * @param pDevIns Device instance.
1844 * @param enmClock The clock to use on this timer.
1845 * @param pfnCallback Callback function.
1846 * @param pvUser User pointer
1847 * @param pszDesc Pointer to description string which must stay around
1848 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1849 */
1850 DECLR3CALLBACKMEMBER(PTMTIMERHC, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1851
1852 /**
1853 * Registers the device with the default PCI bus.
1854 *
1855 * @returns VBox status code.
1856 * @param pDevIns Device instance.
1857 * @param pPciDev The PCI device structure.
1858 * Any PCI enabled device must keep this in it's instance data!
1859 * Fill in the PCI data config before registration, please.
1860 * @remark This is the simple interface, a Ex interface will be created if
1861 * more features are needed later.
1862 */
1863 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1864
1865 /**
1866 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1867 *
1868 * @returns VBox status code.
1869 * @param pDevIns Device instance.
1870 * @param iRegion The region number.
1871 * @param cbRegion Size of the region.
1872 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1873 * @param pfnCallback Callback for doing the mapping.
1874 */
1875 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1876
1877 /**
1878 * Register PCI configuration space read/write callbacks.
1879 *
1880 * @param pDevIns Device instance.
1881 * @param pPciDev The PCI device structure.
1882 * If NULL the default PCI device for this device instance is used.
1883 * @param pfnRead Pointer to the user defined PCI config read function.
1884 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1885 * PCI config read function. This way, user can decide when (and if)
1886 * to call default PCI config read function. Can be NULL.
1887 * @param pfnWrite Pointer to the user defined PCI config write function.
1888 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1889 * PCI config write function. This way, user can decide when (and if)
1890 * to call default PCI config write function. Can be NULL.
1891 * @thread EMT
1892 */
1893 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1894 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1895
1896 /**
1897 * Set the IRQ for a PCI device.
1898 *
1899 * @param pDevIns Device instance.
1900 * @param iIrq IRQ number to set.
1901 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1902 * @thread Any thread, but will involve the emulation thread.
1903 */
1904 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1905
1906 /**
1907 * Set the IRQ for a PCI device, but don't wait for EMT to process
1908 * the request when not called from EMT.
1909 *
1910 * @param pDevIns Device instance.
1911 * @param iIrq IRQ number to set.
1912 * @param iLevel IRQ level.
1913 * @thread Any thread, but will involve the emulation thread.
1914 */
1915 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1916
1917 /**
1918 * Set ISA IRQ for a device.
1919 *
1920 * @param pDevIns Device instance.
1921 * @param iIrq IRQ number to set.
1922 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1923 * @thread Any thread, but will involve the emulation thread.
1924 */
1925 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1926
1927 /**
1928 * Set the ISA IRQ for a device, but don't wait for EMT to process
1929 * the request when not called from EMT.
1930 *
1931 * @param pDevIns Device instance.
1932 * @param iIrq IRQ number to set.
1933 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1934 * @thread Any thread, but will involve the emulation thread.
1935 */
1936 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1937
1938 /**
1939 * Attaches a driver (chain) to the device.
1940 *
1941 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1942 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1943 *
1944 * @returns VBox status code.
1945 * @param pDevIns Device instance.
1946 * @param iLun The logical unit to attach.
1947 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1948 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1949 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1950 * for the live of the device instance.
1951 */
1952 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1953
1954 /**
1955 * Allocate memory which is associated with current VM instance
1956 * and automatically freed on it's destruction.
1957 *
1958 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1959 * @param pDevIns Device instance.
1960 * @param cb Number of bytes to allocate.
1961 */
1962 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1963
1964 /**
1965 * Allocate memory which is associated with current VM instance
1966 * and automatically freed on it's destruction. The memory is ZEROed.
1967 *
1968 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1969 * @param pDevIns Device instance.
1970 * @param cb Number of bytes to allocate.
1971 */
1972 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1973
1974 /**
1975 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1976 *
1977 * @param pDevIns Device instance.
1978 * @param pv Pointer to the memory to free.
1979 */
1980 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1981
1982 /**
1983 * Set the VM error message
1984 *
1985 * @returns rc.
1986 * @param pDevIns Device instance.
1987 * @param rc VBox status code.
1988 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1989 * @param pszFormat Error message format string.
1990 * @param ... Error message arguments.
1991 */
1992 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
1993
1994 /**
1995 * Set the VM error message
1996 *
1997 * @returns rc.
1998 * @param pDevIns Device instance.
1999 * @param rc VBox status code.
2000 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2001 * @param pszFormat Error message format string.
2002 * @param va Error message arguments.
2003 */
2004 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2005
2006 /**
2007 * Set the VM runtime error message
2008 *
2009 * @returns VBox status code.
2010 * @param pDevIns Device instance.
2011 * @param fFatal Whether it is a fatal error or not.
2012 * @param pszErrorID Error ID string.
2013 * @param pszFormat Error message format string.
2014 * @param ... Error message arguments.
2015 */
2016 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2017
2018 /**
2019 * Set the VM runtime error message
2020 *
2021 * @returns VBox status code.
2022 * @param pDevIns Device instance.
2023 * @param fFatal Whether it is a fatal error or not.
2024 * @param pszErrorID Error ID string.
2025 * @param pszFormat Error message format string.
2026 * @param va Error message arguments.
2027 */
2028 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2029
2030 /**
2031 * Assert that the current thread is the emulation thread.
2032 *
2033 * @returns True if correct.
2034 * @returns False if wrong.
2035 * @param pDevIns Device instance.
2036 * @param pszFile Filename of the assertion location.
2037 * @param iLine The linenumber of the assertion location.
2038 * @param pszFunction Function of the assertion location.
2039 */
2040 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2041
2042 /**
2043 * Assert that the current thread is NOT the emulation thread.
2044 *
2045 * @returns True if correct.
2046 * @returns False if wrong.
2047 * @param pDevIns Device instance.
2048 * @param pszFile Filename of the assertion location.
2049 * @param iLine The linenumber of the assertion location.
2050 * @param pszFunction Function of the assertion location.
2051 */
2052 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2053
2054 /**
2055 * Stops the VM and enters the debugger to look at the guest state.
2056 *
2057 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2058 * invoking this function directly.
2059 *
2060 * @returns VBox status code which must be passed up to the VMM.
2061 * @param pDevIns Device instance.
2062 * @param pszFile Filename of the assertion location.
2063 * @param iLine The linenumber of the assertion location.
2064 * @param pszFunction Function of the assertion location.
2065 * @param pszFormat Message. (optional)
2066 * @param args Message parameters.
2067 */
2068 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2069
2070 /**
2071 * Register a info handler with DBGF,
2072 *
2073 * @returns VBox status code.
2074 * @param pDevIns Device instance.
2075 * @param pszName The identifier of the info.
2076 * @param pszDesc The description of the info and any arguments the handler may take.
2077 * @param pfnHandler The handler function to be called to display the info.
2078 */
2079 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2080
2081 /**
2082 * Registers a statistics sample if statistics are enabled.
2083 *
2084 * @param pDevIns Device instance of the DMA.
2085 * @param pvSample Pointer to the sample.
2086 * @param enmType Sample type. This indicates what pvSample is pointing at.
2087 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2088 * Further nesting is possible.
2089 * @param enmUnit Sample unit.
2090 * @param pszDesc Sample description.
2091 */
2092 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2093
2094 /**
2095 * Same as pfnSTAMRegister except that the name is specified in a
2096 * RTStrPrintf like fashion.
2097 *
2098 * @returns VBox status.
2099 * @param pDevIns Device instance of the DMA.
2100 * @param pvSample Pointer to the sample.
2101 * @param enmType Sample type. This indicates what pvSample is pointing at.
2102 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2103 * @param enmUnit Sample unit.
2104 * @param pszDesc Sample description.
2105 * @param pszName The sample name format string.
2106 * @param ... Arguments to the format string.
2107 */
2108 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2109 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2110
2111 /**
2112 * Same as pfnSTAMRegister except that the name is specified in a
2113 * RTStrPrintfV like fashion.
2114 *
2115 * @returns VBox status.
2116 * @param pDevIns Device instance of the DMA.
2117 * @param pvSample Pointer to the sample.
2118 * @param enmType Sample type. This indicates what pvSample is pointing at.
2119 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2120 * @param enmUnit Sample unit.
2121 * @param pszDesc Sample description.
2122 * @param pszName The sample name format string.
2123 * @param args Arguments to the format string.
2124 */
2125 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2126 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2127
2128 /**
2129 * Register the RTC device.
2130 *
2131 * @returns VBox status code.
2132 * @param pDevIns Device instance.
2133 * @param pRtcReg Pointer to a RTC registration structure.
2134 * @param ppRtcHlp Where to store the pointer to the helper functions.
2135 */
2136 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2137
2138 /**
2139 * Create a queue.
2140 *
2141 * @returns VBox status code.
2142 * @param pDevIns The device instance.
2143 * @param cbItem The size of a queue item.
2144 * @param cItems The number of items in the queue.
2145 * @param cMilliesInterval The number of milliseconds between polling the queue.
2146 * If 0 then the emulation thread will be notified whenever an item arrives.
2147 * @param pfnCallback The consumer function.
2148 * @param fGCEnabled Set if the queue should work in GC too.
2149 * @param ppQueue Where to store the queue handle on success.
2150 * @thread The emulation thread.
2151 */
2152 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2153 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2154
2155 /**
2156 * Initializes a PDM critical section.
2157 *
2158 * The PDM critical sections are derived from the IPRT critical sections, but
2159 * works in GC as well.
2160 *
2161 * @returns VBox status code.
2162 * @param pDevIns Device instance.
2163 * @param pCritSect Pointer to the critical section.
2164 * @param pszName The name of the critical section (for statistics).
2165 */
2166 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2167
2168 /**
2169 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2170 *
2171 * @returns pTime.
2172 * @param pDevIns Device instance.
2173 * @param pTime Where to store the time.
2174 */
2175 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2176
2177 /**
2178 * Creates a PDM thread.
2179 *
2180 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2181 * resuming, and destroying the thread as the VM state changes.
2182 *
2183 * @returns VBox status code.
2184 * @param pDevIns The device instance.
2185 * @param ppThread Where to store the thread 'handle'.
2186 * @param pvUser The user argument to the thread function.
2187 * @param pfnThread The thread function.
2188 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2189 * a state change is pending.
2190 * @param cbStack See RTThreadCreate.
2191 * @param enmType See RTThreadCreate.
2192 * @param pszName See RTThreadCreate.
2193 */
2194 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2195 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2196
2197
2198 /** Space reserved for future members.
2199 * @{ */
2200 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2201 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2202 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2203 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2204 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2205 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2206 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2207 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2208 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2209 /** @} */
2210
2211
2212 /** API available to trusted devices only.
2213 *
2214 * These APIs are providing unrestricted access to the guest and the VM,
2215 * or they are interacting intimately with PDM.
2216 *
2217 * @{
2218 */
2219 /**
2220 * Gets the VM handle. Restricted API.
2221 *
2222 * @returns VM Handle.
2223 * @param pDevIns Device instance.
2224 */
2225 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2226
2227 /**
2228 * Register the PCI Bus.
2229 *
2230 * @returns VBox status code.
2231 * @param pDevIns Device instance.
2232 * @param pPciBusReg Pointer to PCI bus registration structure.
2233 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2234 */
2235 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2236
2237 /**
2238 * Register the PIC device.
2239 *
2240 * @returns VBox status code.
2241 * @param pDevIns Device instance.
2242 * @param pPicReg Pointer to a PIC registration structure.
2243 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2244 */
2245 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2246
2247 /**
2248 * Register the APIC device.
2249 *
2250 * @returns VBox status code.
2251 * @param pDevIns Device instance.
2252 * @param pApicReg Pointer to a APIC registration structure.
2253 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2254 */
2255 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2256
2257 /**
2258 * Register the I/O APIC device.
2259 *
2260 * @returns VBox status code.
2261 * @param pDevIns Device instance.
2262 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2263 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2266
2267 /**
2268 * Register the DMA device.
2269 *
2270 * @returns VBox status code.
2271 * @param pDevIns Device instance.
2272 * @param pDmacReg Pointer to a DMAC registration structure.
2273 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2274 */
2275 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2276
2277 /**
2278 * Read physical memory.
2279 *
2280 * @param pDevIns Device instance.
2281 * @param GCPhys Physical address start reading from.
2282 * @param pvBuf Where to put the read bits.
2283 * @param cbRead How many bytes to read.
2284 * @thread Any thread, but the call may involve the emulation thread.
2285 */
2286 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2287
2288 /**
2289 * Write to physical memory.
2290 *
2291 * @param pDevIns Device instance.
2292 * @param GCPhys Physical address to write to.
2293 * @param pvBuf What to write.
2294 * @param cbWrite How many bytes to write.
2295 * @thread Any thread, but the call may involve the emulation thread.
2296 */
2297 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2298
2299 /**
2300 * Read guest physical memory by virtual address.
2301 *
2302 * @param pDevIns Device instance.
2303 * @param pvDst Where to put the read bits.
2304 * @param GCVirtSrc Guest virtual address to start reading from.
2305 * @param cb How many bytes to read.
2306 * @thread The emulation thread.
2307 */
2308 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2309
2310 /**
2311 * Write to guest physical memory by virtual address.
2312 *
2313 * @param pDevIns Device instance.
2314 * @param GCVirtDst Guest virtual address to write to.
2315 * @param pvSrc What to write.
2316 * @param cb How many bytes to write.
2317 * @thread The emulation thread.
2318 */
2319 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2320
2321 /**
2322 * Reserve physical address space for ROM and MMIO ranges.
2323 *
2324 * @returns VBox status code.
2325 * @param pDevIns Device instance.
2326 * @param GCPhys Start physical address.
2327 * @param cbRange The size of the range.
2328 * @param pszDesc Description string.
2329 * @thread The emulation thread.
2330 */
2331 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2332
2333 /**
2334 * Convert a guest physical address to a host virtual address.
2335 *
2336 * @returns VBox status code.
2337 * @param pDevIns Device instance.
2338 * @param GCPhys Start physical address.
2339 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2340 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2341 * @thread Any thread.
2342 */
2343 DECLR3CALLBACKMEMBER(int, pfnPhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2344
2345 /**
2346 * Convert a guest virtual address to a host virtual address.
2347 *
2348 * @returns VBox status code.
2349 * @param pDevIns Device instance.
2350 * @param GCPtr Guest virtual address.
2351 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2352 * @thread The emulation thread.
2353 * @remark Careful with page boundraries.
2354 */
2355 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2356
2357 /**
2358 * Checks if the Gate A20 is enabled or not.
2359 *
2360 * @returns true if A20 is enabled.
2361 * @returns false if A20 is disabled.
2362 * @param pDevIns Device instance.
2363 * @thread The emulation thread.
2364 */
2365 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2366
2367 /**
2368 * Enables or disables the Gate A20.
2369 *
2370 * @param pDevIns Device instance.
2371 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2372 * @thread The emulation thread.
2373 */
2374 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2375
2376 /**
2377 * Resets the VM.
2378 *
2379 * @returns The appropriate VBox status code to pass around on reset.
2380 * @param pDevIns Device instance.
2381 * @thread The emulation thread.
2382 */
2383 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2384
2385 /**
2386 * Suspends the VM.
2387 *
2388 * @returns The appropriate VBox status code to pass around on suspend.
2389 * @param pDevIns Device instance.
2390 * @thread The emulation thread.
2391 */
2392 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2393
2394 /**
2395 * Power off the VM.
2396 *
2397 * @returns The appropriate VBox status code to pass around on power off.
2398 * @param pDevIns Device instance.
2399 * @thread The emulation thread.
2400 */
2401 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2402
2403 /**
2404 * Acquire global VM lock
2405 *
2406 * @returns VBox status code
2407 * @param pDevIns Device instance.
2408 */
2409 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2410
2411 /**
2412 * Release global VM lock
2413 *
2414 * @returns VBox status code
2415 * @param pDevIns Device instance.
2416 */
2417 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2418
2419 /**
2420 * Check that the current thread owns the global VM lock.
2421 *
2422 * @returns boolean
2423 * @param pDevIns Device instance.
2424 * @param pszFile Filename of the assertion location.
2425 * @param iLine Linenumber of the assertion location.
2426 * @param pszFunction Function of the assertion location.
2427 */
2428 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2429
2430 /**
2431 * Register transfer function for DMA channel.
2432 *
2433 * @returns VBox status code.
2434 * @param pDevIns Device instance.
2435 * @param uChannel Channel number.
2436 * @param pfnTransferHandler Device specific transfer callback function.
2437 * @param pvUser User pointer to pass to the callback.
2438 * @thread EMT
2439 */
2440 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2441
2442 /**
2443 * Read memory.
2444 *
2445 * @returns VBox status code.
2446 * @param pDevIns Device instance.
2447 * @param uChannel Channel number.
2448 * @param pvBuffer Pointer to target buffer.
2449 * @param off DMA position.
2450 * @param cbBlock Block size.
2451 * @param pcbRead Where to store the number of bytes which was read. optional.
2452 * @thread EMT
2453 */
2454 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2455
2456 /**
2457 * Write memory.
2458 *
2459 * @returns VBox status code.
2460 * @param pDevIns Device instance.
2461 * @param uChannel Channel number.
2462 * @param pvBuffer Memory to write.
2463 * @param off DMA position.
2464 * @param cbBlock Block size.
2465 * @param pcbWritten Where to store the number of bytes which was written. optional.
2466 * @thread EMT
2467 */
2468 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2469
2470 /**
2471 * Set the DREQ line.
2472 *
2473 * @returns VBox status code.
2474 * @param pDevIns Device instance.
2475 * @param uChannel Channel number.
2476 * @param uLevel Level of the line.
2477 * @thread EMT
2478 */
2479 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2480
2481 /**
2482 * Get channel mode.
2483 *
2484 * @returns Channel mode. See specs.
2485 * @param pDevIns Device instance.
2486 * @param uChannel Channel number.
2487 * @thread EMT
2488 */
2489 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2490
2491 /**
2492 * Schedule DMA execution.
2493 *
2494 * @param pDevIns Device instance.
2495 * @thread Any thread.
2496 */
2497 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2498
2499 /**
2500 * Write CMOS value and update the checksum(s).
2501 *
2502 * @returns VBox status code.
2503 * @param pDevIns Device instance.
2504 * @param iReg The CMOS register index.
2505 * @param u8Value The CMOS register value.
2506 * @thread EMT
2507 */
2508 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2509
2510 /**
2511 * Read CMOS value.
2512 *
2513 * @returns VBox status code.
2514 * @param pDevIns Device instance.
2515 * @param iReg The CMOS register index.
2516 * @param pu8Value Where to store the CMOS register value.
2517 * @thread EMT
2518 */
2519 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2520
2521 /**
2522 * Query CPUID.
2523 *
2524 * @param pDevIns Device instance.
2525 * @param iLeaf The CPUID leaf to get.
2526 * @param pEax Where to store the EAX value.
2527 * @param pEbx Where to store the EBX value.
2528 * @param pEcx Where to store the ECX value.
2529 * @param pEdx Where to store the EDX value.
2530 */
2531 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2532
2533 /** @} */
2534
2535 /** Just a safety precaution. (The value is 0.) */
2536 uint32_t u32TheEnd;
2537} PDMDEVHLP;
2538#endif /* !IN_RING3 */
2539/** Pointer PDM Device API. */
2540typedef HCPTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2541/** Pointer PDM Device API. */
2542typedef HCPTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2543
2544/** Current PDMDEVHLP version number. */
2545#define PDM_DEVHLP_VERSION 0xf2040000
2546
2547
2548/**
2549 * PDM Device API - GC Variant.
2550 */
2551typedef struct PDMDEVHLPGC
2552{
2553 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2554 uint32_t u32Version;
2555
2556 /**
2557 * Set the IRQ for a PCI device.
2558 *
2559 * @param pDevIns Device instance.
2560 * @param iIrq IRQ number to set.
2561 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2562 * @thread Any thread, but will involve the emulation thread.
2563 */
2564 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2565
2566 /**
2567 * Set ISA IRQ for a device.
2568 *
2569 * @param pDevIns Device instance.
2570 * @param iIrq IRQ number to set.
2571 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2572 * @thread Any thread, but will involve the emulation thread.
2573 */
2574 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2575
2576 /**
2577 * Read physical memory.
2578 *
2579 * @param pDevIns Device instance.
2580 * @param GCPhys Physical address start reading from.
2581 * @param pvBuf Where to put the read bits.
2582 * @param cbRead How many bytes to read.
2583 */
2584 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2585
2586 /**
2587 * Write to physical memory.
2588 *
2589 * @param pDevIns Device instance.
2590 * @param GCPhys Physical address to write to.
2591 * @param pvBuf What to write.
2592 * @param cbWrite How many bytes to write.
2593 */
2594 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2595
2596 /**
2597 * Checks if the Gate A20 is enabled or not.
2598 *
2599 * @returns true if A20 is enabled.
2600 * @returns false if A20 is disabled.
2601 * @param pDevIns Device instance.
2602 * @thread The emulation thread.
2603 */
2604 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2605
2606 /**
2607 * Set the VM error message
2608 *
2609 * @returns rc.
2610 * @param pDrvIns Driver instance.
2611 * @param rc VBox status code.
2612 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2613 * @param pszFormat Error message format string.
2614 * @param ... Error message arguments.
2615 */
2616 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2617
2618 /**
2619 * Set the VM error message
2620 *
2621 * @returns rc.
2622 * @param pDrvIns Driver instance.
2623 * @param rc VBox status code.
2624 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2625 * @param pszFormat Error message format string.
2626 * @param va Error message arguments.
2627 */
2628 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2629
2630 /**
2631 * Set the VM runtime error message
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns Device instance.
2635 * @param fFatal Whether it is a fatal error or not.
2636 * @param pszErrorID Error ID string.
2637 * @param pszFormat Error message format string.
2638 * @param ... Error message arguments.
2639 */
2640 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2641
2642 /**
2643 * Set the VM runtime error message
2644 *
2645 * @returns VBox status code.
2646 * @param pDevIns Device instance.
2647 * @param fFatal Whether it is a fatal error or not.
2648 * @param pszErrorID Error ID string.
2649 * @param pszFormat Error message format string.
2650 * @param va Error message arguments.
2651 */
2652 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2653
2654 /**
2655 * Set parameters for pending MMIO patch operation
2656 *
2657 * @returns VBox status code.
2658 * @param pDevIns Device instance.
2659 * @param GCPhys MMIO physical address
2660 * @param pCachedData GC pointer to cached data
2661 */
2662 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2663
2664 /** Just a safety precaution. */
2665 uint32_t u32TheEnd;
2666} PDMDEVHLPGC;
2667/** Pointer PDM Device GC API. */
2668typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2669/** Pointer PDM Device GC API. */
2670typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2671
2672/** Current PDMDEVHLP version number. */
2673#define PDM_DEVHLPGC_VERSION 0xfb010000
2674
2675
2676/**
2677 * PDM Device API - R0 Variant.
2678 */
2679typedef struct PDMDEVHLPR0
2680{
2681 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2682 uint32_t u32Version;
2683
2684 /**
2685 * Set the IRQ for a PCI device.
2686 *
2687 * @param pDevIns Device instance.
2688 * @param iIrq IRQ number to set.
2689 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2690 * @thread Any thread, but will involve the emulation thread.
2691 */
2692 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2693
2694 /**
2695 * Set ISA IRQ for a device.
2696 *
2697 * @param pDevIns Device instance.
2698 * @param iIrq IRQ number to set.
2699 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2700 * @thread Any thread, but will involve the emulation thread.
2701 */
2702 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2703
2704 /**
2705 * Read physical memory.
2706 *
2707 * @param pDevIns Device instance.
2708 * @param GCPhys Physical address start reading from.
2709 * @param pvBuf Where to put the read bits.
2710 * @param cbRead How many bytes to read.
2711 */
2712 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2713
2714 /**
2715 * Write to physical memory.
2716 *
2717 * @param pDevIns Device instance.
2718 * @param GCPhys Physical address to write to.
2719 * @param pvBuf What to write.
2720 * @param cbWrite How many bytes to write.
2721 */
2722 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2723
2724 /**
2725 * Checks if the Gate A20 is enabled or not.
2726 *
2727 * @returns true if A20 is enabled.
2728 * @returns false if A20 is disabled.
2729 * @param pDevIns Device instance.
2730 * @thread The emulation thread.
2731 */
2732 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2733
2734 /**
2735 * Set the VM error message
2736 *
2737 * @returns rc.
2738 * @param pDrvIns Driver instance.
2739 * @param rc VBox status code.
2740 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2741 * @param pszFormat Error message format string.
2742 * @param ... Error message arguments.
2743 */
2744 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2745
2746 /**
2747 * Set the VM error message
2748 *
2749 * @returns rc.
2750 * @param pDrvIns Driver instance.
2751 * @param rc VBox status code.
2752 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2753 * @param pszFormat Error message format string.
2754 * @param va Error message arguments.
2755 */
2756 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2757
2758 /**
2759 * Set the VM runtime error message
2760 *
2761 * @returns VBox status code.
2762 * @param pDevIns Device instance.
2763 * @param fFatal Whether it is a fatal error or not.
2764 * @param pszErrorID Error ID string.
2765 * @param pszFormat Error message format string.
2766 * @param ... Error message arguments.
2767 */
2768 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2769
2770 /**
2771 * Set the VM runtime error message
2772 *
2773 * @returns VBox status code.
2774 * @param pDevIns Device instance.
2775 * @param fFatal Whether it is a fatal error or not.
2776 * @param pszErrorID Error ID string.
2777 * @param pszFormat Error message format string.
2778 * @param va Error message arguments.
2779 */
2780 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2781
2782 /**
2783 * Set parameters for pending MMIO patch operation
2784 *
2785 * @returns rc.
2786 * @param pDevIns Device instance.
2787 * @param GCPhys MMIO physical address
2788 * @param pCachedData GC pointer to cached data
2789 */
2790 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2791
2792 /** Just a safety precaution. */
2793 uint32_t u32TheEnd;
2794} PDMDEVHLPR0;
2795/** Pointer PDM Device R0 API. */
2796typedef HCPTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2797/** Pointer PDM Device GC API. */
2798typedef HCPTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2799
2800/** Current PDMDEVHLP version number. */
2801#define PDM_DEVHLPR0_VERSION 0xfb010000
2802
2803
2804
2805/**
2806 * PDM Device Instance.
2807 */
2808typedef struct PDMDEVINS
2809{
2810 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2811 uint32_t u32Version;
2812 /** Device instance number. */
2813 RTUINT iInstance;
2814 /** The base interface of the device.
2815 * The device constructor initializes this if it has any
2816 * device level interfaces to export. To obtain this interface
2817 * call PDMR3QueryDevice(). */
2818 PDMIBASE IBase;
2819
2820 /** Internal data. */
2821 union
2822 {
2823#ifdef PDMDEVINSINT_DECLARED
2824 PDMDEVINSINT s;
2825#endif
2826 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2827 } Internal;
2828
2829 /** Pointer the HC PDM Device API. */
2830 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2831 /** Pointer the R0 PDM Device API. */
2832 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2833 /** Pointer to device registration structure. */
2834 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2835 /** Configuration handle. */
2836 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2837 /** Pointer to device instance data. */
2838 R3PTRTYPE(void *) pvInstanceDataR3;
2839 /** Pointer to device instance data. */
2840 R0PTRTYPE(void *) pvInstanceDataR0;
2841 /** Pointer the GC PDM Device API. */
2842 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2843 /** Pointer to device instance data. */
2844 GCPTRTYPE(void *) pvInstanceDataGC;
2845 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2846 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2847 /** Device instance data. The size of this area is defined
2848 * in the PDMDEVREG::cbInstanceData field. */
2849 char achInstanceData[8];
2850} PDMDEVINS;
2851
2852/** Current DEVREG version number. */
2853#define PDM_DEVINS_VERSION 0xf3010000
2854
2855/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2856#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2857
2858
2859/** @def PDMDEV_ASSERT_EMT
2860 * Assert that the current thread is the emulation thread.
2861 */
2862#ifdef VBOX_STRICT
2863# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2864#else
2865# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2866#endif
2867
2868/** @def PDMDEV_ASSERT_OTHER
2869 * Assert that the current thread is NOT the emulation thread.
2870 */
2871#ifdef VBOX_STRICT
2872# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2873#else
2874# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2875#endif
2876
2877/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2878 * Assert that the current thread is owner of the VM lock.
2879 */
2880#ifdef VBOX_STRICT
2881# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2882#else
2883# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
2884#endif
2885
2886/** @def PDMDEV_SET_ERROR
2887 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
2888 */
2889#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
2890 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
2891
2892/** @def PDMDEV_SET_RUNTIME_ERROR
2893 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
2894 */
2895#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
2896 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
2897
2898/** @def PDMDEVINS_2_GCPTR
2899 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
2900 */
2901#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2902
2903/** @def PDMDEVINS_2_R3PTR
2904 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
2905 */
2906#define PDMDEVINS_2_R3PTR(pDevIns) ( (HCPTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2907
2908/** @def PDMDEVINS_2_R0PTR
2909 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
2910 */
2911#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2912
2913
2914/**
2915 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
2916 *
2917 * @returns VBox status code which must be passed up to the VMM.
2918 * @param pDevIns Device instance.
2919 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2920 * @param pszFormat Message. (optional)
2921 * @param ... Message parameters.
2922 */
2923DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
2924{
2925#ifdef VBOX_STRICT
2926# ifdef IN_RING3
2927 int rc;
2928 va_list args;
2929 va_start(args, pszFormat);
2930 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
2931 va_end(args);
2932 return rc;
2933# else
2934 return VINF_EM_DBG_STOP;
2935# endif
2936#else
2937 return VINF_SUCCESS;
2938#endif
2939}
2940
2941
2942#ifdef IN_RING3
2943/**
2944 * @copydoc PDMDEVHLP::pfnIOPortRegister
2945 */
2946DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2947 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2948 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
2949{
2950 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
2951}
2952
2953/**
2954 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
2955 */
2956DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
2957 const char *pszOut, const char *pszIn, const char *pszOutStr,
2958 const char *pszInStr, const char *pszDesc)
2959{
2960 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2961}
2962
2963/**
2964 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
2965 */
2966DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2967 const char *pszOut, const char *pszIn, const char *pszOutStr,
2968 const char *pszInStr, const char *pszDesc)
2969{
2970 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2971}
2972
2973/**
2974 * @copydoc PDMDEVHLP::pfnMMIORegister
2975 */
2976DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2977 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2978 const char *pszDesc)
2979{
2980 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
2981}
2982
2983/**
2984 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
2985 */
2986DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2987 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2988{
2989 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2990}
2991
2992/**
2993 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
2994 */
2995DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2996 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2997{
2998 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2999}
3000
3001/**
3002 * @copydoc PDMDEVHLP::pfnROMRegister
3003 */
3004DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
3005{
3006 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
3007}
3008
3009/**
3010 * @copydoc PDMDEVHLP::pfnSSMRegister
3011 */
3012DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3013 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3014 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3015{
3016 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3017 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3018 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3019}
3020
3021/**
3022 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3023 */
3024DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
3025{
3026 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3027}
3028
3029/**
3030 * @copydoc PDMDEVHLP::pfnPCIRegister
3031 */
3032DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3033{
3034 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3035}
3036
3037/**
3038 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3039 */
3040DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3041{
3042 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3043}
3044
3045/**
3046 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3047 */
3048DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3049 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3050{
3051 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3052}
3053
3054/**
3055 * @copydoc PDMDEVHLP::pfnDriverAttach
3056 */
3057DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3058{
3059 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3060}
3061
3062/**
3063 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3064 */
3065DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3066{
3067 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3068}
3069
3070/**
3071 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3072 */
3073DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3074{
3075 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3076}
3077
3078/**
3079 * @copydoc PDMDEVHLP::pfnMMHeapFree
3080 */
3081DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3082{
3083 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3084}
3085
3086/**
3087 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3088 */
3089DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3090{
3091 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3092}
3093
3094/**
3095 * @copydoc PDMDEVHLP::pfnSTAMRegister
3096 */
3097DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3098{
3099 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3100}
3101
3102/**
3103 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3104 */
3105DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3106 const char *pszDesc, const char *pszName, ...)
3107{
3108 va_list va;
3109 va_start(va, pszName);
3110 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3111 va_end(va);
3112}
3113
3114/**
3115 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3116 */
3117DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3118 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3119{
3120 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3121}
3122
3123/**
3124 * @copydoc PDMDEVHLP::pfnCritSectInit
3125 */
3126DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3127{
3128 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3129}
3130
3131/**
3132 * @copydoc PDMDEVHLP::pfnUTCNow
3133 */
3134DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3135{
3136 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3137}
3138
3139/**
3140 * @copydoc PDMDEVHLP::pfnGetVM
3141 */
3142DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3143{
3144 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3145}
3146
3147/**
3148 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3149 */
3150DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3151{
3152 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3153}
3154
3155/**
3156 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3157 */
3158DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3159{
3160 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3161}
3162
3163/**
3164 * @copydoc PDMDEVHLP::pfnPhysReserve
3165 */
3166DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3167{
3168 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3169}
3170
3171/**
3172 * @copydoc PDMDEVHLP::pfnPhys2HCVirt
3173 */
3174DECLINLINE(int) PDMDevHlpPhys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3175{
3176 return pDevIns->pDevHlp->pfnPhys2HCVirt(pDevIns, GCPhys, cbRange, ppvHC);
3177}
3178
3179/**
3180 * @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr
3181 */
3182DECLINLINE(int) PDMDevHlpPhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3183{
3184 return pDevIns->pDevHlp->pfnPhysGCPtr2HCPtr(pDevIns, GCPtr, pHCPtr);
3185}
3186
3187/**
3188 * @copydoc PDMDEVHLP::pfnA20Set
3189 */
3190DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3191{
3192 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3193}
3194
3195/**
3196 * @copydoc PDMDEVHLP::pfnVMReset
3197 */
3198DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3199{
3200 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3201}
3202
3203/**
3204 * @copydoc PDMDEVHLP::pfnVMSuspend
3205 */
3206DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3207{
3208 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3209}
3210
3211/**
3212 * @copydoc PDMDEVHLP::pfnVMPowerOff
3213 */
3214DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3215{
3216 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3217}
3218
3219/**
3220 * @copydoc PDMDEVHLP::pfnDMARegister
3221 */
3222DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3223{
3224 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3225}
3226
3227/**
3228 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3229 */
3230DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3231{
3232 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3233}
3234
3235/**
3236 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3237 */
3238DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3239{
3240 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3241}
3242
3243/**
3244 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3245 */
3246DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3247{
3248 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3249}
3250
3251/**
3252 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3253 */
3254DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3255{
3256 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3257}
3258
3259/**
3260 * @copydoc PDMDEVHLP::pfnDMASchedule
3261 */
3262DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3263{
3264 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3265}
3266
3267/**
3268 * @copydoc PDMDEVHLP::pfnCMOSWrite
3269 */
3270DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3271{
3272 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3273}
3274
3275/**
3276 * @copydoc PDMDEVHLP::pfnCMOSRead
3277 */
3278DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3279{
3280 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3281}
3282
3283/**
3284 * @copydoc PDMDEVHLP::pfnGetCpuId
3285 */
3286DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3287{
3288 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3289}
3290
3291/**
3292 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3293 */
3294DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3295 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3296{
3297 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3298}
3299#endif /* IN_RING3 */
3300
3301
3302/**
3303 * @copydoc PDMDEVHLP::pfnPCISetIrq
3304 */
3305DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3306{
3307#ifdef IN_GC
3308 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3309#elif defined(IN_RING0)
3310 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3311#else
3312 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3313#endif
3314}
3315
3316/**
3317 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3318 */
3319DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3320{
3321#ifdef IN_GC
3322 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3323#elif defined(IN_RING0)
3324 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3325#else
3326 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3327#endif
3328}
3329
3330/**
3331 * @copydoc PDMDEVHLP::pfnISASetIrq
3332 */
3333DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3334{
3335#ifdef IN_GC
3336 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3337#elif defined(IN_RING0)
3338 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3339#else
3340 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3341#endif
3342}
3343
3344/**
3345 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3346 */
3347DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3348{
3349#ifdef IN_GC
3350 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3351#elif defined(IN_RING0)
3352 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3353#else
3354 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3355#endif
3356}
3357
3358/**
3359 * @copydoc PDMDEVHLP::pfnPhysRead
3360 */
3361DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3362{
3363#ifdef IN_GC
3364 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3365#elif defined(IN_RING0)
3366 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3367#else
3368 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3369#endif
3370}
3371
3372/**
3373 * @copydoc PDMDEVHLP::pfnPhysWrite
3374 */
3375DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3376{
3377#ifdef IN_GC
3378 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3379#elif defined(IN_RING0)
3380 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3381#else
3382 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3383#endif
3384}
3385
3386/**
3387 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3388 */
3389DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3390{
3391#ifdef IN_GC
3392 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3393#elif defined(IN_RING0)
3394 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3395#else
3396 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3397#endif
3398}
3399
3400/**
3401 * @copydoc PDMDEVHLP::pfnVMSetError
3402 */
3403DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3404{
3405 va_list va;
3406 va_start(va, pszFormat);
3407#ifdef IN_GC
3408 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3409#elif defined(IN_RING0)
3410 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3411#else
3412 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3413#endif
3414 va_end(va);
3415 return rc;
3416}
3417
3418/**
3419 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3420 */
3421DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3422{
3423 va_list va;
3424 int rc;
3425 va_start(va, pszFormat);
3426#ifdef IN_GC
3427 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3428#elif defined(IN_RING0)
3429 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3430#else
3431 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3432#endif
3433 va_end(va);
3434 return rc;
3435}
3436
3437
3438
3439/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3440typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3441
3442/**
3443 * Callbacks for VBoxDeviceRegister().
3444 */
3445typedef struct PDMDEVREGCB
3446{
3447 /** Interface version.
3448 * This is set to PDM_DEVREG_CB_VERSION. */
3449 uint32_t u32Version;
3450
3451 /**
3452 * Registers a device with the current VM instance.
3453 *
3454 * @returns VBox status code.
3455 * @param pCallbacks Pointer to the callback table.
3456 * @param pDevReg Pointer to the device registration record.
3457 * This data must be permanent and readonly.
3458 */
3459 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3460
3461 /**
3462 * Allocate memory which is associated with current VM instance
3463 * and automatically freed on it's destruction.
3464 *
3465 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3466 * @param pCallbacks Pointer to the callback table.
3467 * @param cb Number of bytes to allocate.
3468 */
3469 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3470} PDMDEVREGCB;
3471
3472/** Current version of the PDMDEVREGCB structure. */
3473#define PDM_DEVREG_CB_VERSION 0xf4010000
3474
3475
3476/**
3477 * The VBoxDevicesRegister callback function.
3478 *
3479 * PDM will invoke this function after loading a device module and letting
3480 * the module decide which devices to register and how to handle conflicts.
3481 *
3482 * @returns VBox status code.
3483 * @param pCallbacks Pointer to the callback table.
3484 * @param u32Version VBox version number.
3485 */
3486typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3487
3488/** @} */
3489
3490__END_DECLS
3491
3492#endif
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