VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 33012

Last change on this file since 33012 was 32935, checked in by vboxsync, 14 years ago

PDM, VMM, PCI: reworked MSI API: now MSIs delivered via IOAPIC API, not with MMIO access, LSI logic now can work in MSI mode

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File size: 171.8 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/pdmcommon.h>
35#include <VBox/iom.h>
36#include <VBox/tm.h>
37#include <VBox/ssm.h>
38#include <VBox/cfgm.h>
39#include <VBox/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44RT_C_DECLS_BEGIN
45
46/** @defgroup grp_pdm_device The PDM Devices API
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data. If the registration structure
56 * is needed, it can be accessed thru pDevIns->pReg.
57 * @param iInstance Instance number. Use this to figure out which registers
58 * and such to use. The instance number is also found in
59 * pDevIns->iInstance, but since it's likely to be
60 * freqently used PDM passes it as parameter.
61 * @param pCfg Configuration node handle for the driver. This is
62 * expected to be in high demand in the constructor and is
63 * therefore passed as an argument. When using it at other
64 * times, it can be found in pDrvIns->pCfg.
65 */
66typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
67/** Pointer to a FNPDMDEVCONSTRUCT() function. */
68typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
69
70/**
71 * Destruct a device instance.
72 *
73 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
74 * resources can be freed correctly.
75 *
76 * @returns VBox status.
77 * @param pDevIns The device instance data.
78 */
79typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
80/** Pointer to a FNPDMDEVDESTRUCT() function. */
81typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
82
83/**
84 * Device relocation callback.
85 *
86 * This is called when the instance data has been relocated in raw-mode context
87 * (RC). It is also called when the RC hypervisor selects changes. The device
88 * must fixup all necessary pointers and re-query all interfaces to other RC
89 * devices and drivers.
90 *
91 * Before the RC code is executed the first time, this function will be called
92 * with a 0 delta so RC pointer calculations can be one in one place.
93 *
94 * @param pDevIns Pointer to the device instance.
95 * @param offDelta The relocation delta relative to the old location.
96 *
97 * @remark A relocation CANNOT fail.
98 */
99typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
100/** Pointer to a FNPDMDEVRELOCATE() function. */
101typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
102
103/**
104 * Device I/O Control interface.
105 *
106 * This is used by external components, such as the COM interface, to
107 * communicate with devices using a class wide interface or a device
108 * specific interface.
109 *
110 * @returns VBox status code.
111 * @param pDevIns Pointer to the device instance.
112 * @param uFunction Function to perform.
113 * @param pvIn Pointer to input data.
114 * @param cbIn Size of input data.
115 * @param pvOut Pointer to output data.
116 * @param cbOut Size of output data.
117 * @param pcbOut Where to store the actual size of the output data.
118 */
119typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
120 void *pvIn, RTUINT cbIn,
121 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
122/** Pointer to a FNPDMDEVIOCTL() function. */
123typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
124
125/**
126 * Power On notification.
127 *
128 * @returns VBox status.
129 * @param pDevIns The device instance data.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVPOWERON() function. */
133typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
134
135/**
136 * Reset notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 */
141typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
142/** Pointer to a FNPDMDEVRESET() function. */
143typedef FNPDMDEVRESET *PFNPDMDEVRESET;
144
145/**
146 * Suspend notification.
147 *
148 * @returns VBox status.
149 * @param pDevIns The device instance data.
150 * @thread EMT(0)
151 */
152typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
153/** Pointer to a FNPDMDEVSUSPEND() function. */
154typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
155
156/**
157 * Resume notification.
158 *
159 * @returns VBox status.
160 * @param pDevIns The device instance data.
161 */
162typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
163/** Pointer to a FNPDMDEVRESUME() function. */
164typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
165
166/**
167 * Power Off notification.
168 *
169 * This is only called when the VMR3PowerOff call is made on a running VM. This
170 * means that there is no notification if the VM was suspended before being
171 * powered of. There will also be no callback when hot plugging devices.
172 *
173 * @param pDevIns The device instance data.
174 * @thread EMT(0)
175 */
176typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
177/** Pointer to a FNPDMDEVPOWEROFF() function. */
178typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
179
180/**
181 * Attach command.
182 *
183 * This is called to let the device attach to a driver for a specified LUN
184 * at runtime. This is not called during VM construction, the device
185 * constructor have to attach to all the available drivers.
186 *
187 * This is like plugging in the keyboard or mouse after turning on the PC.
188 *
189 * @returns VBox status code.
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
193 */
194typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
195/** Pointer to a FNPDMDEVATTACH() function. */
196typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
197
198/**
199 * Detach notification.
200 *
201 * This is called when a driver is detaching itself from a LUN of the device.
202 * The device should adjust it's state to reflect this.
203 *
204 * This is like unplugging the network cable to use it for the laptop or
205 * something while the PC is still running.
206 *
207 * @param pDevIns The device instance.
208 * @param iLUN The logical unit which is being detached.
209 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 */
223typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
224/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
225typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
226
227/**
228 * Init complete notification.
229 * This can be done to do communication with other devices and other
230 * initialization which requires everything to be in place.
231 *
232 * @returns VBOX status code.
233 * @param pDevIns The device instance.
234 */
235typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
236/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
237typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
238
239
240
241/**
242 * PDM Device Registration Structure.
243 *
244 * This structure is used when registering a device from VBoxInitDevices() in HC
245 * Ring-3. PDM will continue use till the VM is terminated.
246 */
247typedef struct PDMDEVREG
248{
249 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
250 uint32_t u32Version;
251 /** Device name. */
252 char szName[32];
253 /** Name of the raw-mode context module (no path).
254 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
255 char szRCMod[32];
256 /** Name of the ring-0 module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
258 char szR0Mod[32];
259 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
260 * remain unchanged from registration till VM destruction. */
261 const char *pszDescription;
262
263 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
264 uint32_t fFlags;
265 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
266 uint32_t fClass;
267 /** Maximum number of instances (per VM). */
268 uint32_t cMaxInstances;
269 /** Size of the instance data. */
270 uint32_t cbInstance;
271
272 /** Construct instance - required. */
273 PFNPDMDEVCONSTRUCT pfnConstruct;
274 /** Destruct instance - optional. */
275 PFNPDMDEVDESTRUCT pfnDestruct;
276 /** Relocation command - optional. */
277 PFNPDMDEVRELOCATE pfnRelocate;
278 /** I/O Control interface - optional. */
279 PFNPDMDEVIOCTL pfnIOCtl;
280 /** Power on notification - optional. */
281 PFNPDMDEVPOWERON pfnPowerOn;
282 /** Reset notification - optional. */
283 PFNPDMDEVRESET pfnReset;
284 /** Suspend notification - optional. */
285 PFNPDMDEVSUSPEND pfnSuspend;
286 /** Resume notification - optional. */
287 PFNPDMDEVRESUME pfnResume;
288 /** Attach command - optional. */
289 PFNPDMDEVATTACH pfnAttach;
290 /** Detach notification - optional. */
291 PFNPDMDEVDETACH pfnDetach;
292 /** Query a LUN base interface - optional. */
293 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
294 /** Init complete notification - optional. */
295 PFNPDMDEVINITCOMPLETE pfnInitComplete;
296 /** Power off notification - optional. */
297 PFNPDMDEVPOWEROFF pfnPowerOff;
298 /** @todo */
299 PFNRT pfnSoftReset;
300 /** Initialization safty marker. */
301 uint32_t u32VersionEnd;
302} PDMDEVREG;
303/** Pointer to a PDM Device Structure. */
304typedef PDMDEVREG *PPDMDEVREG;
305/** Const pointer to a PDM Device Structure. */
306typedef PDMDEVREG const *PCPDMDEVREG;
307
308/** Current DEVREG version number. */
309#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
310
311/** PDM Device Flags.
312 * @{ */
313/** This flag is used to indicate that the device has a RC component. */
314#define PDM_DEVREG_FLAGS_RC 0x00000001
315/** This flag is used to indicate that the device has a R0 component. */
316#define PDM_DEVREG_FLAGS_R0 0x00000002
317
318/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
319 * The bit count for the current host. */
320#if HC_ARCH_BITS == 32
321# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
322#elif HC_ARCH_BITS == 64
323# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
324#else
325# error Unsupported HC_ARCH_BITS value.
326#endif
327/** The host bit count mask. */
328#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
329
330/** The device support only 32-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
332/** The device support only 64-bit guests. */
333#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
334/** The device support both 32-bit & 64-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
336/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
337 * The guest bit count for the current compilation. */
338#if GC_ARCH_BITS == 32
339# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
340#elif GC_ARCH_BITS == 64
341# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
342#else
343# error Unsupported GC_ARCH_BITS value.
344#endif
345/** The guest bit count mask. */
346#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
347
348/** A convenience. */
349#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
350
351/** Indicates that the devices support PAE36 on a 32-bit guest. */
352#define PDM_DEVREG_FLAGS_PAE36 0x00001000
353
354/** Indicates that the device needs to be notified before the drivers when suspending. */
355#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
356
357/** Indicates that the device needs to be notified before the drivers when powering off. */
358#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
359/** @} */
360
361
362/** PDM Device Classes.
363 * The order is important, lower bit earlier instantiation.
364 * @{ */
365/** Architecture device. */
366#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
367/** Architecture BIOS device. */
368#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
369/** PCI bus brigde. */
370#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
371/** ISA bus brigde. */
372#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
373/** Input device (mouse, keyboard, joystick, HID, ...). */
374#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
375/** Interrupt controller (PIC). */
376#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
377/** Interval controoler (PIT). */
378#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
379/** RTC/CMOS. */
380#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
381/** DMA controller. */
382#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
383/** VMM Device. */
384#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
385/** Graphics device, like VGA. */
386#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
387/** Storage controller device. */
388#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
389/** Network interface controller. */
390#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
391/** Audio. */
392#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
393/** USB HIC. */
394#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
395/** ACPI. */
396#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
397/** Serial controller device. */
398#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
399/** Parallel controller device */
400#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
401/** Host PCI pass-through device */
402#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
403/** Misc devices (always last). */
404#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
405/** @} */
406
407
408/** @name IRQ Level for use with the *SetIrq APIs.
409 * @{
410 */
411/** Assert the IRQ (can assume value 1). */
412#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
413/** Deassert the IRQ (can assume value 0). */
414#define PDM_IRQ_LEVEL_LOW 0
415/** flip-flop - assert and then deassert it again immediately. */
416#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
417/** @} */
418
419/**
420 * Registration record for MSI.
421 */
422typedef struct PDMMSIREG
423{
424 /** Number of interrupt vectors */
425 uint16_t cVectors;
426 /** Offset of MSI capability */
427 uint8_t iCapOffset;
428 /** Offset of next capability */
429 uint8_t iNextOffset;
430 /** Value to initialize message control register */
431 uint16_t iMsiFlags;
432} PDMMSIREG;
433typedef PDMMSIREG *PPDMMSIREG;
434
435/**
436 * PCI Bus registration structure.
437 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
438 */
439typedef struct PDMPCIBUSREG
440{
441 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
442 uint32_t u32Version;
443
444 /**
445 * Registers the device with the default PCI bus.
446 *
447 * @returns VBox status code.
448 * @param pDevIns Device instance of the PCI Bus.
449 * @param pPciDev The PCI device structure.
450 * Any PCI enabled device must keep this in it's instance data!
451 * Fill in the PCI data config before registration, please.
452 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
453 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
454 * If negative, the pci bus device will assign one.
455 */
456 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
457
458 /**
459 * Initialize MSI support in a PCI device.
460 *
461 * @returns VBox status code.
462 * @param pDevIns Device instance of the PCI Bus.
463 * @param pPciDev The PCI device structure.
464 * @param pMsiReg MSI registration structure
465 */
466 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
467
468 /**
469 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
470 *
471 * @returns VBox status code.
472 * @param pDevIns Device instance of the PCI Bus.
473 * @param pPciDev The PCI device structure.
474 * @param iRegion The region number.
475 * @param cbRegion Size of the region.
476 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
477 * @param pfnCallback Callback for doing the mapping.
478 */
479 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
480
481 /**
482 * Register PCI configuration space read/write callbacks.
483 *
484 * @param pDevIns Device instance of the PCI Bus.
485 * @param pPciDev The PCI device structure.
486 * @param pfnRead Pointer to the user defined PCI config read function.
487 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
488 * PCI config read function. This way, user can decide when (and if)
489 * to call default PCI config read function. Can be NULL.
490 * @param pfnWrite Pointer to the user defined PCI config write function.
491 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
492 * PCI config write function. This way, user can decide when (and if)
493 * to call default PCI config write function. Can be NULL.
494 * @thread EMT
495 */
496 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
497 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
498
499 /**
500 * Set the IRQ for a PCI device.
501 *
502 * @param pDevIns Device instance of the PCI Bus.
503 * @param pPciDev The PCI device structure.
504 * @param iIrq IRQ number to set.
505 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
506 */
507 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
508
509 /**
510 * Saves a state of the PCI device.
511 *
512 * @returns VBox status code.
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev Pointer to PCI device.
515 * @param pSSMHandle The handle to save the state to.
516 */
517 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
518
519 /**
520 * Loads a saved PCI device state.
521 *
522 * @returns VBox status code.
523 * @param pDevIns Device instance of the PCI Bus.
524 * @param pPciDev Pointer to PCI device.
525 * @param pSSMHandle The handle to the saved state.
526 */
527 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
528
529 /**
530 * Called to perform the job of the bios.
531 * This is only called for the first PCI Bus - it is expected to
532 * service all the PCI buses.
533 *
534 * @returns VBox status.
535 * @param pDevIns Device instance of the first bus.
536 */
537 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
538
539 /** The name of the SetIrq RC entry point. */
540 const char *pszSetIrqRC;
541
542 /** The name of the SetIrq R0 entry point. */
543 const char *pszSetIrqR0;
544
545} PDMPCIBUSREG;
546/** Pointer to a PCI bus registration structure. */
547typedef PDMPCIBUSREG *PPDMPCIBUSREG;
548
549/** Current PDMPCIBUSREG version number. */
550#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)
551
552/**
553 * PCI Bus RC helpers.
554 */
555typedef struct PDMPCIHLPRC
556{
557 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
558 uint32_t u32Version;
559
560 /**
561 * Set an ISA IRQ.
562 *
563 * @param pDevIns PCI device instance.
564 * @param iIrq IRQ number to set.
565 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
566 * @thread EMT only.
567 */
568 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
569
570 /**
571 * Set an I/O-APIC IRQ.
572 *
573 * @param pDevIns PCI device instance.
574 * @param iIrq IRQ number to set.
575 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
576 * @thread EMT only.
577 */
578 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
579
580 /**
581 * Send an MSI.
582 *
583 * @param pDevIns PCI device instance.
584 * @param GCAddr Physical address MSI request was written.
585 * @param uValue Value written.
586 * @thread EMT only.
587 */
588 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
589
590
591 /**
592 * Acquires the PDM lock.
593 *
594 * @returns VINF_SUCCESS on success.
595 * @returns rc if we failed to acquire the lock.
596 * @param pDevIns The PCI device instance.
597 * @param rc What to return if we fail to acquire the lock.
598 */
599 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
600
601 /**
602 * Releases the PDM lock.
603 *
604 * @param pDevIns The PCI device instance.
605 */
606 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
607
608 /** Just a safety precaution. */
609 uint32_t u32TheEnd;
610} PDMPCIHLPRC;
611/** Pointer to PCI helpers. */
612typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
613/** Pointer to const PCI helpers. */
614typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
615
616/** Current PDMPCIHLPRC version number. */
617#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 2, 0)
618
619
620/**
621 * PCI Bus R0 helpers.
622 */
623typedef struct PDMPCIHLPR0
624{
625 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
626 uint32_t u32Version;
627
628 /**
629 * Set an ISA IRQ.
630 *
631 * @param pDevIns PCI device instance.
632 * @param iIrq IRQ number to set.
633 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
634 * @thread EMT only.
635 */
636 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
637
638 /**
639 * Set an I/O-APIC IRQ.
640 *
641 * @param pDevIns PCI device instance.
642 * @param iIrq IRQ number to set.
643 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
644 * @thread EMT only.
645 */
646 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
647
648 /**
649 * Send an MSI.
650 *
651 * @param pDevIns PCI device instance.
652 * @param GCAddr Physical address MSI request was written.
653 * @param uValue Value written.
654 * @thread EMT only.
655 */
656 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
657
658
659 /**
660 * Acquires the PDM lock.
661 *
662 * @returns VINF_SUCCESS on success.
663 * @returns rc if we failed to acquire the lock.
664 * @param pDevIns The PCI device instance.
665 * @param rc What to return if we fail to acquire the lock.
666 */
667 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
668
669 /**
670 * Releases the PDM lock.
671 *
672 * @param pDevIns The PCI device instance.
673 */
674 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
675
676 /** Just a safety precaution. */
677 uint32_t u32TheEnd;
678} PDMPCIHLPR0;
679/** Pointer to PCI helpers. */
680typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
681/** Pointer to const PCI helpers. */
682typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
683
684/** Current PDMPCIHLPR0 version number. */
685#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 2, 0)
686
687/**
688 * PCI device helpers.
689 */
690typedef struct PDMPCIHLPR3
691{
692 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
693 uint32_t u32Version;
694
695 /**
696 * Set an ISA IRQ.
697 *
698 * @param pDevIns The PCI device instance.
699 * @param iIrq IRQ number to set.
700 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
701 * @thread EMT only.
702 */
703 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
704
705 /**
706 * Set an I/O-APIC IRQ.
707 *
708 * @param pDevIns The PCI device instance.
709 * @param iIrq IRQ number to set.
710 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
711 * @thread EMT only.
712 */
713 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
714
715 /**
716 * Send an MSI.
717 *
718 * @param pDevIns PCI device instance.
719 * @param GCAddr Physical address MSI request was written.
720 * @param uValue Value written.
721 * @thread EMT only.
722 */
723 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
724
725 /**
726 * Checks if the given address is an MMIO2 base address or not.
727 *
728 * @returns true/false accordingly.
729 * @param pDevIns The PCI device instance.
730 * @param pOwner The owner of the memory, optional.
731 * @param GCPhys The address to check.
732 */
733 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
734
735 /**
736 * Gets the address of the RC PCI Bus helpers.
737 *
738 * This should be called at both construction and relocation time
739 * to obtain the correct address of the RC helpers.
740 *
741 * @returns RC pointer to the PCI Bus helpers.
742 * @param pDevIns Device instance of the PCI Bus.
743 * @thread EMT only.
744 */
745 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
746
747 /**
748 * Gets the address of the R0 PCI Bus helpers.
749 *
750 * This should be called at both construction and relocation time
751 * to obtain the correct address of the R0 helpers.
752 *
753 * @returns R0 pointer to the PCI Bus helpers.
754 * @param pDevIns Device instance of the PCI Bus.
755 * @thread EMT only.
756 */
757 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
758
759 /**
760 * Acquires the PDM lock.
761 *
762 * @returns VINF_SUCCESS on success.
763 * @returns Fatal error on failure.
764 * @param pDevIns The PCI device instance.
765 * @param rc Dummy for making the interface identical to the RC and R0 versions.
766 */
767 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
768
769 /**
770 * Releases the PDM lock.
771 *
772 * @param pDevIns The PCI device instance.
773 */
774 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
775
776 /** Just a safety precaution. */
777 uint32_t u32TheEnd;
778} PDMPCIHLPR3;
779/** Pointer to PCI helpers. */
780typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
781/** Pointer to const PCI helpers. */
782typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
783
784/** Current PDMPCIHLPR3 version number. */
785#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 2, 0)
786
787
788/**
789 * Programmable Interrupt Controller registration structure.
790 */
791typedef struct PDMPICREG
792{
793 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
794 uint32_t u32Version;
795
796 /**
797 * Set the an IRQ.
798 *
799 * @param pDevIns Device instance of the PIC.
800 * @param iIrq IRQ number to set.
801 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
802 */
803 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
804
805 /**
806 * Get a pending interrupt.
807 *
808 * @returns Pending interrupt number.
809 * @param pDevIns Device instance of the PIC.
810 */
811 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
812
813 /** The name of the RC SetIrq entry point. */
814 const char *pszSetIrqRC;
815 /** The name of the RC GetInterrupt entry point. */
816 const char *pszGetInterruptRC;
817
818 /** The name of the R0 SetIrq entry point. */
819 const char *pszSetIrqR0;
820 /** The name of the R0 GetInterrupt entry point. */
821 const char *pszGetInterruptR0;
822} PDMPICREG;
823/** Pointer to a PIC registration structure. */
824typedef PDMPICREG *PPDMPICREG;
825
826/** Current PDMPICREG version number. */
827#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
828
829/**
830 * PIC RC helpers.
831 */
832typedef struct PDMPICHLPRC
833{
834 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
835 uint32_t u32Version;
836
837 /**
838 * Set the interrupt force action flag.
839 *
840 * @param pDevIns Device instance of the PIC.
841 */
842 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
843
844 /**
845 * Clear the interrupt force action flag.
846 *
847 * @param pDevIns Device instance of the PIC.
848 */
849 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
850
851 /**
852 * Acquires the PDM lock.
853 *
854 * @returns VINF_SUCCESS on success.
855 * @returns rc if we failed to acquire the lock.
856 * @param pDevIns The PIC device instance.
857 * @param rc What to return if we fail to acquire the lock.
858 */
859 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
860
861 /**
862 * Releases the PDM lock.
863 *
864 * @param pDevIns The PIC device instance.
865 */
866 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
867
868 /** Just a safety precaution. */
869 uint32_t u32TheEnd;
870} PDMPICHLPRC;
871
872/** Pointer to PIC RC helpers. */
873typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
874/** Pointer to const PIC RC helpers. */
875typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
876
877/** Current PDMPICHLPRC version number. */
878#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
879
880
881/**
882 * PIC R0 helpers.
883 */
884typedef struct PDMPICHLPR0
885{
886 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
887 uint32_t u32Version;
888
889 /**
890 * Set the interrupt force action flag.
891 *
892 * @param pDevIns Device instance of the PIC.
893 */
894 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
895
896 /**
897 * Clear the interrupt force action flag.
898 *
899 * @param pDevIns Device instance of the PIC.
900 */
901 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
902
903 /**
904 * Acquires the PDM lock.
905 *
906 * @returns VINF_SUCCESS on success.
907 * @returns rc if we failed to acquire the lock.
908 * @param pDevIns The PIC device instance.
909 * @param rc What to return if we fail to acquire the lock.
910 */
911 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
912
913 /**
914 * Releases the PDM lock.
915 *
916 * @param pDevIns The PCI device instance.
917 */
918 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
919
920 /** Just a safety precaution. */
921 uint32_t u32TheEnd;
922} PDMPICHLPR0;
923
924/** Pointer to PIC R0 helpers. */
925typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
926/** Pointer to const PIC R0 helpers. */
927typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
928
929/** Current PDMPICHLPR0 version number. */
930#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
931
932/**
933 * PIC R3 helpers.
934 */
935typedef struct PDMPICHLPR3
936{
937 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
938 uint32_t u32Version;
939
940 /**
941 * Set the interrupt force action flag.
942 *
943 * @param pDevIns Device instance of the PIC.
944 */
945 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
946
947 /**
948 * Clear the interrupt force action flag.
949 *
950 * @param pDevIns Device instance of the PIC.
951 */
952 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
953
954 /**
955 * Acquires the PDM lock.
956 *
957 * @returns VINF_SUCCESS on success.
958 * @returns Fatal error on failure.
959 * @param pDevIns The PIC device instance.
960 * @param rc Dummy for making the interface identical to the RC and R0 versions.
961 */
962 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
963
964 /**
965 * Releases the PDM lock.
966 *
967 * @param pDevIns The PIC device instance.
968 */
969 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
970
971 /**
972 * Gets the address of the RC PIC helpers.
973 *
974 * This should be called at both construction and relocation time
975 * to obtain the correct address of the RC helpers.
976 *
977 * @returns RC pointer to the PIC helpers.
978 * @param pDevIns Device instance of the PIC.
979 */
980 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
981
982 /**
983 * Gets the address of the R0 PIC helpers.
984 *
985 * This should be called at both construction and relocation time
986 * to obtain the correct address of the R0 helpers.
987 *
988 * @returns R0 pointer to the PIC helpers.
989 * @param pDevIns Device instance of the PIC.
990 */
991 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
992
993 /** Just a safety precaution. */
994 uint32_t u32TheEnd;
995} PDMPICHLPR3;
996
997/** Pointer to PIC R3 helpers. */
998typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
999/** Pointer to const PIC R3 helpers. */
1000typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1001
1002/** Current PDMPICHLPR3 version number. */
1003#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1004
1005
1006
1007/**
1008 * Advanced Programmable Interrupt Controller registration structure.
1009 */
1010typedef struct PDMAPICREG
1011{
1012 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1013 uint32_t u32Version;
1014
1015 /**
1016 * Get a pending interrupt.
1017 *
1018 * @returns Pending interrupt number.
1019 * @param pDevIns Device instance of the APIC.
1020 */
1021 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
1022
1023 /**
1024 * Check if the APIC has a pending interrupt/if a TPR change would active one
1025 *
1026 * @returns Pending interrupt yes/no
1027 * @param pDevIns Device instance of the APIC.
1028 */
1029 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
1030
1031 /**
1032 * Set the APIC base.
1033 *
1034 * @param pDevIns Device instance of the APIC.
1035 * @param u64Base The new base.
1036 */
1037 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
1038
1039 /**
1040 * Get the APIC base.
1041 *
1042 * @returns Current base.
1043 * @param pDevIns Device instance of the APIC.
1044 */
1045 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
1046
1047 /**
1048 * Set the TPR (task priority register).
1049 *
1050 * @param pDevIns Device instance of the APIC.
1051 * @param idCpu VCPU id
1052 * @param u8TPR The new TPR.
1053 */
1054 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1055
1056 /**
1057 * Get the TPR (task priority register).
1058 *
1059 * @returns The current TPR.
1060 * @param pDevIns Device instance of the APIC.
1061 * @param idCpu VCPU id
1062 */
1063 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1064
1065 /**
1066 * Write MSR in APIC range.
1067 *
1068 * @returns VBox status code.
1069 * @param pDevIns Device instance of the APIC.
1070 * @param idCpu Target CPU.
1071 * @param u32Reg MSR to write.
1072 * @param u64Value Value to write.
1073 */
1074 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1075
1076 /**
1077 * Read MSR in APIC range.
1078 *
1079 * @returns VBox status code.
1080 * @param pDevIns Device instance of the APIC.
1081 * @param idCpu Target CPU.
1082 * @param u32Reg MSR to read.
1083 * @param pu64Value Value read.
1084 */
1085 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1086
1087 /**
1088 * Private interface between the IOAPIC and APIC.
1089 *
1090 * This is a low-level, APIC/IOAPIC implementation specific interface
1091 * which is registered with PDM only because it makes life so much
1092 * simpler right now (GC bits). This is a bad bad hack! The correct
1093 * way of doing this would involve some way of querying GC interfaces
1094 * and relocating them. Perhaps doing some kind of device init in GC...
1095 *
1096 * @returns status code.
1097 * @param pDevIns Device instance of the APIC.
1098 * @param u8Dest See APIC implementation.
1099 * @param u8DestMode See APIC implementation.
1100 * @param u8DeliveryMode See APIC implementation.
1101 * @param iVector See APIC implementation.
1102 * @param u8Polarity See APIC implementation.
1103 * @param u8TriggerMode See APIC implementation.
1104 */
1105 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1106 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1107
1108 /**
1109 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1110 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1111 *
1112 * @returns status code.
1113 * @param pDevIns Device instance of the APIC.
1114 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1115 */
1116 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1117
1118 /** The name of the RC GetInterrupt entry point. */
1119 const char *pszGetInterruptRC;
1120 /** The name of the RC HasPendingIrq entry point. */
1121 const char *pszHasPendingIrqRC;
1122 /** The name of the RC SetBase entry point. */
1123 const char *pszSetBaseRC;
1124 /** The name of the RC GetBase entry point. */
1125 const char *pszGetBaseRC;
1126 /** The name of the RC SetTPR entry point. */
1127 const char *pszSetTPRRC;
1128 /** The name of the RC GetTPR entry point. */
1129 const char *pszGetTPRRC;
1130 /** The name of the RC WriteMSR entry point. */
1131 const char *pszWriteMSRRC;
1132 /** The name of the RC ReadMSR entry point. */
1133 const char *pszReadMSRRC;
1134 /** The name of the RC BusDeliver entry point. */
1135 const char *pszBusDeliverRC;
1136 /** The name of the RC LocalInterrupt entry point. */
1137 const char *pszLocalInterruptRC;
1138
1139 /** The name of the R0 GetInterrupt entry point. */
1140 const char *pszGetInterruptR0;
1141 /** The name of the R0 HasPendingIrq entry point. */
1142 const char *pszHasPendingIrqR0;
1143 /** The name of the R0 SetBase entry point. */
1144 const char *pszSetBaseR0;
1145 /** The name of the R0 GetBase entry point. */
1146 const char *pszGetBaseR0;
1147 /** The name of the R0 SetTPR entry point. */
1148 const char *pszSetTPRR0;
1149 /** The name of the R0 GetTPR entry point. */
1150 const char *pszGetTPRR0;
1151 /** The name of the R0 WriteMSR entry point. */
1152 const char *pszWriteMSRR0;
1153 /** The name of the R0 ReadMSR entry point. */
1154 const char *pszReadMSRR0;
1155 /** The name of the R0 BusDeliver entry point. */
1156 const char *pszBusDeliverR0;
1157 /** The name of the R0 LocalInterrupt entry point. */
1158 const char *pszLocalInterruptR0;
1159
1160} PDMAPICREG;
1161/** Pointer to an APIC registration structure. */
1162typedef PDMAPICREG *PPDMAPICREG;
1163
1164/** Current PDMAPICREG version number. */
1165#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1166
1167
1168/**
1169 * APIC version argument for pfnChangeFeature.
1170 */
1171typedef enum PDMAPICVERSION
1172{
1173 /** Invalid 0 entry. */
1174 PDMAPICVERSION_INVALID = 0,
1175 /** No APIC. */
1176 PDMAPICVERSION_NONE,
1177 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1178 PDMAPICVERSION_APIC,
1179 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1180 PDMAPICVERSION_X2APIC,
1181 /** The usual 32-bit paranoia. */
1182 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1183} PDMAPICVERSION;
1184
1185/**
1186 * APIC irq argument for SetInterruptFF.
1187 */
1188typedef enum PDMAPICIRQ
1189{
1190 /** Invalid 0 entry. */
1191 PDMAPICIRQ_INVALID = 0,
1192 /** Normal hardware interrupt. */
1193 PDMAPICIRQ_HARDWARE,
1194 /** NMI. */
1195 PDMAPICIRQ_NMI,
1196 /** SMI. */
1197 PDMAPICIRQ_SMI,
1198 /** ExtINT (HW interrupt via PIC). */
1199 PDMAPICIRQ_EXTINT,
1200 /** The usual 32-bit paranoia. */
1201 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1202} PDMAPICIRQ;
1203
1204
1205/**
1206 * APIC RC helpers.
1207 */
1208typedef struct PDMAPICHLPRC
1209{
1210 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1211 uint32_t u32Version;
1212
1213 /**
1214 * Set the interrupt force action flag.
1215 *
1216 * @param pDevIns Device instance of the APIC.
1217 * @param enmType IRQ type.
1218 * @param idCpu Virtual CPU to set flag upon.
1219 */
1220 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1221
1222 /**
1223 * Clear the interrupt force action flag.
1224 *
1225 * @param pDevIns Device instance of the APIC.
1226 * @param enmType IRQ type.
1227 * @param idCpu Virtual CPU to clear flag upon.
1228 */
1229 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1230
1231 /**
1232 * Modifies APIC-related bits in the CPUID feature mask.
1233 *
1234 * @param pDevIns Device instance of the APIC.
1235 * @param enmVersion Supported APIC version.
1236 */
1237 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1238
1239 /**
1240 * Acquires the PDM lock.
1241 *
1242 * @returns VINF_SUCCESS on success.
1243 * @returns rc if we failed to acquire the lock.
1244 * @param pDevIns The APIC device instance.
1245 * @param rc What to return if we fail to acquire the lock.
1246 */
1247 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1248
1249 /**
1250 * Releases the PDM lock.
1251 *
1252 * @param pDevIns The APIC device instance.
1253 */
1254 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1255
1256 /**
1257 * Get the virtual CPU id corresponding to the current EMT.
1258 *
1259 * @param pDevIns The APIC device instance.
1260 */
1261 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1262
1263 /** Just a safety precaution. */
1264 uint32_t u32TheEnd;
1265} PDMAPICHLPRC;
1266/** Pointer to APIC GC helpers. */
1267typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1268/** Pointer to const APIC helpers. */
1269typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1270
1271/** Current PDMAPICHLPRC version number. */
1272#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1273
1274
1275/**
1276 * APIC R0 helpers.
1277 */
1278typedef struct PDMAPICHLPR0
1279{
1280 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1281 uint32_t u32Version;
1282
1283 /**
1284 * Set the interrupt force action flag.
1285 *
1286 * @param pDevIns Device instance of the APIC.
1287 * @param enmType IRQ type.
1288 * @param idCpu Virtual CPU to set flag upon.
1289 */
1290 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1291
1292 /**
1293 * Clear the interrupt force action flag.
1294 *
1295 * @param pDevIns Device instance of the APIC.
1296 * @param enmType IRQ type.
1297 * @param idCpu Virtual CPU to clear flag upon.
1298 */
1299 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1300
1301 /**
1302 * Modifies APIC-related bits in the CPUID feature mask.
1303 *
1304 * @param pDevIns Device instance of the APIC.
1305 * @param enmVersion Supported APIC version.
1306 */
1307 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1308
1309 /**
1310 * Acquires the PDM lock.
1311 *
1312 * @returns VINF_SUCCESS on success.
1313 * @returns rc if we failed to acquire the lock.
1314 * @param pDevIns The APIC device instance.
1315 * @param rc What to return if we fail to acquire the lock.
1316 */
1317 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1318
1319 /**
1320 * Releases the PDM lock.
1321 *
1322 * @param pDevIns The APIC device instance.
1323 */
1324 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1325
1326 /**
1327 * Get the virtual CPU id corresponding to the current EMT.
1328 *
1329 * @param pDevIns The APIC device instance.
1330 */
1331 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1332
1333 /** Just a safety precaution. */
1334 uint32_t u32TheEnd;
1335} PDMAPICHLPR0;
1336/** Pointer to APIC GC helpers. */
1337typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1338/** Pointer to const APIC helpers. */
1339typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1340
1341/** Current PDMAPICHLPR0 version number. */
1342#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1343
1344/**
1345 * APIC R3 helpers.
1346 */
1347typedef struct PDMAPICHLPR3
1348{
1349 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1350 uint32_t u32Version;
1351
1352 /**
1353 * Set the interrupt force action flag.
1354 *
1355 * @param pDevIns Device instance of the APIC.
1356 * @param enmType IRQ type.
1357 * @param idCpu Virtual CPU to set flag upon.
1358 */
1359 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1360
1361 /**
1362 * Clear the interrupt force action flag.
1363 *
1364 * @param pDevIns Device instance of the APIC.
1365 * @param enmType IRQ type.
1366 * @param idCpu Virtual CPU to clear flag upon.
1367 */
1368 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1369
1370 /**
1371 * Modifies APIC-related bits in the CPUID feature mask.
1372 *
1373 * @param pDevIns Device instance of the APIC.
1374 * @param enmVersion Supported APIC version.
1375 */
1376 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1377
1378 /**
1379 * Get the virtual CPU id corresponding to the current EMT.
1380 *
1381 * @param pDevIns The APIC device instance.
1382 */
1383 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1384
1385 /**
1386 * Sends SIPI to given virtual CPU.
1387 *
1388 * @param pDevIns The APIC device instance.
1389 * @param idCpu Virtual CPU to perform SIPI on
1390 * @param iVector SIPI vector
1391 */
1392 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1393
1394 /**
1395 * Sends init IPI to given virtual CPU, should result in reset and
1396 * halting till SIPI.
1397 *
1398 * @param pDevIns The APIC device instance.
1399 * @param idCpu Virtual CPU to perform SIPI on
1400 */
1401 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1402
1403 /**
1404 * Gets the address of the RC APIC helpers.
1405 *
1406 * This should be called at both construction and relocation time
1407 * to obtain the correct address of the RC helpers.
1408 *
1409 * @returns GC pointer to the APIC helpers.
1410 * @param pDevIns Device instance of the APIC.
1411 */
1412 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1413
1414 /**
1415 * Gets the address of the R0 APIC helpers.
1416 *
1417 * This should be called at both construction and relocation time
1418 * to obtain the correct address of the R0 helpers.
1419 *
1420 * @returns R0 pointer to the APIC helpers.
1421 * @param pDevIns Device instance of the APIC.
1422 */
1423 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1424
1425 /**
1426 * Get the critical section used to synchronize the PICs, PCI and stuff.
1427 *
1428 * @returns Ring-3 pointer to the critical section.
1429 * @param pDevIns The APIC device instance.
1430 */
1431 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1432
1433 /**
1434 * Get the critical section used to synchronize the PICs, PCI and stuff.
1435 *
1436 * @returns Raw-mode context pointer to the critical section.
1437 * @param pDevIns The APIC device instance.
1438 */
1439 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1440
1441 /**
1442 * Get the critical section used to synchronize the PICs, PCI and stuff.
1443 *
1444 * @returns Ring-0 pointer to the critical section.
1445 * @param pDevIns The APIC device instance.
1446 */
1447 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1448
1449 /** Just a safety precaution. */
1450 uint32_t u32TheEnd;
1451} PDMAPICHLPR3;
1452/** Pointer to APIC helpers. */
1453typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1454/** Pointer to const APIC helpers. */
1455typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1456
1457/** Current PDMAPICHLP version number. */
1458#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1459
1460
1461/**
1462 * I/O APIC registration structure.
1463 */
1464typedef struct PDMIOAPICREG
1465{
1466 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1467 uint32_t u32Version;
1468
1469 /**
1470 * Set the an IRQ.
1471 *
1472 * @param pDevIns Device instance of the I/O APIC.
1473 * @param iIrq IRQ number to set.
1474 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1475 */
1476 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1477
1478 /** The name of the GC SetIrq entry point. */
1479 const char *pszSetIrqRC;
1480
1481 /** The name of the R0 SetIrq entry point. */
1482 const char *pszSetIrqR0;
1483
1484 /**
1485 * Send a MSI.
1486 *
1487 * @param pDevIns Device instance of the I/O APIC.
1488 * @param GCPhys Request address.
1489 * @param uValue Request value.
1490 */
1491 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
1492
1493 /** The name of the GC SendMsi entry point. */
1494 const char *pszSendMsiRC;
1495
1496 /** The name of the R0 SendMsi entry point. */
1497 const char *pszSendMsiR0;
1498} PDMIOAPICREG;
1499/** Pointer to an APIC registration structure. */
1500typedef PDMIOAPICREG *PPDMIOAPICREG;
1501
1502/** Current PDMAPICREG version number. */
1503#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 2, 0)
1504
1505
1506/**
1507 * IOAPIC RC helpers.
1508 */
1509typedef struct PDMIOAPICHLPRC
1510{
1511 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1512 uint32_t u32Version;
1513
1514 /**
1515 * Private interface between the IOAPIC and APIC.
1516 *
1517 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1518 *
1519 * @returns status code.
1520 * @param pDevIns Device instance of the IOAPIC.
1521 * @param u8Dest See APIC implementation.
1522 * @param u8DestMode See APIC implementation.
1523 * @param u8DeliveryMode See APIC implementation.
1524 * @param iVector See APIC implementation.
1525 * @param u8Polarity See APIC implementation.
1526 * @param u8TriggerMode See APIC implementation.
1527 */
1528 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1529 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1530
1531 /**
1532 * Acquires the PDM lock.
1533 *
1534 * @returns VINF_SUCCESS on success.
1535 * @returns rc if we failed to acquire the lock.
1536 * @param pDevIns The IOAPIC device instance.
1537 * @param rc What to return if we fail to acquire the lock.
1538 */
1539 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1540
1541 /**
1542 * Releases the PDM lock.
1543 *
1544 * @param pDevIns The IOAPIC device instance.
1545 */
1546 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1547
1548 /** Just a safety precaution. */
1549 uint32_t u32TheEnd;
1550} PDMIOAPICHLPRC;
1551/** Pointer to IOAPIC RC helpers. */
1552typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1553/** Pointer to const IOAPIC helpers. */
1554typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1555
1556/** Current PDMIOAPICHLPRC version number. */
1557#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1558
1559
1560/**
1561 * IOAPIC R0 helpers.
1562 */
1563typedef struct PDMIOAPICHLPR0
1564{
1565 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1566 uint32_t u32Version;
1567
1568 /**
1569 * Private interface between the IOAPIC and APIC.
1570 *
1571 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1572 *
1573 * @returns status code.
1574 * @param pDevIns Device instance of the IOAPIC.
1575 * @param u8Dest See APIC implementation.
1576 * @param u8DestMode See APIC implementation.
1577 * @param u8DeliveryMode See APIC implementation.
1578 * @param iVector See APIC implementation.
1579 * @param u8Polarity See APIC implementation.
1580 * @param u8TriggerMode See APIC implementation.
1581 */
1582 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1583 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1584
1585 /**
1586 * Acquires the PDM lock.
1587 *
1588 * @returns VINF_SUCCESS on success.
1589 * @returns rc if we failed to acquire the lock.
1590 * @param pDevIns The IOAPIC device instance.
1591 * @param rc What to return if we fail to acquire the lock.
1592 */
1593 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1594
1595 /**
1596 * Releases the PDM lock.
1597 *
1598 * @param pDevIns The IOAPIC device instance.
1599 */
1600 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1601
1602 /** Just a safety precaution. */
1603 uint32_t u32TheEnd;
1604} PDMIOAPICHLPR0;
1605/** Pointer to IOAPIC R0 helpers. */
1606typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1607/** Pointer to const IOAPIC helpers. */
1608typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1609
1610/** Current PDMIOAPICHLPR0 version number. */
1611#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1612
1613/**
1614 * IOAPIC R3 helpers.
1615 */
1616typedef struct PDMIOAPICHLPR3
1617{
1618 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1619 uint32_t u32Version;
1620
1621 /**
1622 * Private interface between the IOAPIC and APIC.
1623 *
1624 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1625 *
1626 * @returns status code
1627 * @param pDevIns Device instance of the IOAPIC.
1628 * @param u8Dest See APIC implementation.
1629 * @param u8DestMode See APIC implementation.
1630 * @param u8DeliveryMode See APIC implementation.
1631 * @param iVector See APIC implementation.
1632 * @param u8Polarity See APIC implementation.
1633 * @param u8TriggerMode See APIC implementation.
1634 */
1635 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1636 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1637
1638 /**
1639 * Acquires the PDM lock.
1640 *
1641 * @returns VINF_SUCCESS on success.
1642 * @returns Fatal error on failure.
1643 * @param pDevIns The IOAPIC device instance.
1644 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1645 */
1646 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1647
1648 /**
1649 * Releases the PDM lock.
1650 *
1651 * @param pDevIns The IOAPIC device instance.
1652 */
1653 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1654
1655 /**
1656 * Gets the address of the RC IOAPIC helpers.
1657 *
1658 * This should be called at both construction and relocation time
1659 * to obtain the correct address of the RC helpers.
1660 *
1661 * @returns RC pointer to the IOAPIC helpers.
1662 * @param pDevIns Device instance of the IOAPIC.
1663 */
1664 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1665
1666 /**
1667 * Gets the address of the R0 IOAPIC helpers.
1668 *
1669 * This should be called at both construction and relocation time
1670 * to obtain the correct address of the R0 helpers.
1671 *
1672 * @returns R0 pointer to the IOAPIC helpers.
1673 * @param pDevIns Device instance of the IOAPIC.
1674 */
1675 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1676
1677 /** Just a safety precaution. */
1678 uint32_t u32TheEnd;
1679} PDMIOAPICHLPR3;
1680/** Pointer to IOAPIC R3 helpers. */
1681typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1682/** Pointer to const IOAPIC helpers. */
1683typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1684
1685/** Current PDMIOAPICHLPR3 version number. */
1686#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1687
1688
1689/**
1690 * HPET registration structure.
1691 */
1692typedef struct PDMHPETREG
1693{
1694 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1695 uint32_t u32Version;
1696
1697} PDMHPETREG;
1698/** Pointer to an HPET registration structure. */
1699typedef PDMHPETREG *PPDMHPETREG;
1700
1701/** Current PDMHPETREG version number. */
1702#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1703
1704/**
1705 * HPET RC helpers.
1706 *
1707 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1708 * at some later point.
1709 */
1710typedef struct PDMHPETHLPRC
1711{
1712 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1713 uint32_t u32Version;
1714
1715 /** Just a safety precaution. */
1716 uint32_t u32TheEnd;
1717} PDMHPETHLPRC;
1718
1719/** Pointer to HPET RC helpers. */
1720typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1721/** Pointer to const HPET RC helpers. */
1722typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1723
1724/** Current PDMHPETHLPRC version number. */
1725#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1726
1727
1728/**
1729 * HPET R0 helpers.
1730 *
1731 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1732 * at some later point.
1733 */
1734typedef struct PDMHPETHLPR0
1735{
1736 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1737 uint32_t u32Version;
1738
1739 /** Just a safety precaution. */
1740 uint32_t u32TheEnd;
1741} PDMHPETHLPR0;
1742
1743/** Pointer to HPET R0 helpers. */
1744typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1745/** Pointer to const HPET R0 helpers. */
1746typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1747
1748/** Current PDMHPETHLPR0 version number. */
1749#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1750
1751/**
1752 * HPET R3 helpers.
1753 */
1754typedef struct PDMHPETHLPR3
1755{
1756 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1757 uint32_t u32Version;
1758
1759 /**
1760 * Gets the address of the RC HPET helpers.
1761 *
1762 * This should be called at both construction and relocation time
1763 * to obtain the correct address of the RC helpers.
1764 *
1765 * @returns RC pointer to the HPET helpers.
1766 * @param pDevIns Device instance of the HPET.
1767 */
1768 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1769
1770 /**
1771 * Gets the address of the R0 HPET helpers.
1772 *
1773 * This should be called at both construction and relocation time
1774 * to obtain the correct address of the R0 helpers.
1775 *
1776 * @returns R0 pointer to the HPET helpers.
1777 * @param pDevIns Device instance of the HPET.
1778 */
1779 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1780
1781 /**
1782 * Set legacy mode on PIT and RTC.
1783 *
1784 * @returns VINF_SUCCESS on success.
1785 * @returns rc if we failed to set legacy mode.
1786 * @param pDevIns Device instance of the HPET.
1787 * @param fActivated Whether legacy mode is activated or deactivated.
1788 */
1789 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1790
1791
1792 /**
1793 * Set IRQ, bypassing ISA bus override rules.
1794 *
1795 * @returns VINF_SUCCESS on success.
1796 * @returns rc if we failed to set legacy mode.
1797 * @param pDevIns Device instance of the HPET.
1798 * @param fActivate Activate or deactivate legacy mode.
1799 */
1800 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1801
1802 /** Just a safety precaution. */
1803 uint32_t u32TheEnd;
1804} PDMHPETHLPR3;
1805
1806/** Pointer to HPET R3 helpers. */
1807typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1808/** Pointer to const HPET R3 helpers. */
1809typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1810
1811/** Current PDMHPETHLPR3 version number. */
1812#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1813
1814
1815
1816#ifdef IN_RING3
1817
1818/**
1819 * DMA Transfer Handler.
1820 *
1821 * @returns Number of bytes transferred.
1822 * @param pDevIns Device instance of the DMA.
1823 * @param pvUser User pointer.
1824 * @param uChannel Channel number.
1825 * @param off DMA position.
1826 * @param cb Block size.
1827 */
1828typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1829/** Pointer to a FNDMATRANSFERHANDLER(). */
1830typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1831
1832/**
1833 * DMA Controller registration structure.
1834 */
1835typedef struct PDMDMAREG
1836{
1837 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1838 uint32_t u32Version;
1839
1840 /**
1841 * Execute pending transfers.
1842 *
1843 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1844 * @param pDevIns Device instance of the DMAC.
1845 */
1846 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1847
1848 /**
1849 * Register transfer function for DMA channel.
1850 *
1851 * @param pDevIns Device instance of the DMAC.
1852 * @param uChannel Channel number.
1853 * @param pfnTransferHandler Device specific transfer function.
1854 * @param pvUSer User pointer to be passed to the callback.
1855 */
1856 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1857
1858 /**
1859 * Read memory
1860 *
1861 * @returns Number of bytes read.
1862 * @param pDevIns Device instance of the DMAC.
1863 * @param pvBuffer Pointer to target buffer.
1864 * @param off DMA position.
1865 * @param cbBlock Block size.
1866 */
1867 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1868
1869 /**
1870 * Write memory
1871 *
1872 * @returns Number of bytes written.
1873 * @param pDevIns Device instance of the DMAC.
1874 * @param pvBuffer Memory to write.
1875 * @param off DMA position.
1876 * @param cbBlock Block size.
1877 */
1878 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1879
1880 /**
1881 * Set the DREQ line.
1882 *
1883 * @param pDevIns Device instance of the DMAC.
1884 * @param uChannel Channel number.
1885 * @param uLevel Level of the line.
1886 */
1887 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1888
1889 /**
1890 * Get channel mode
1891 *
1892 * @returns Channel mode.
1893 * @param pDevIns Device instance of the DMAC.
1894 * @param uChannel Channel number.
1895 */
1896 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1897
1898} PDMDMACREG;
1899/** Pointer to a DMAC registration structure. */
1900typedef PDMDMACREG *PPDMDMACREG;
1901
1902/** Current PDMDMACREG version number. */
1903#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1904
1905
1906/**
1907 * DMA Controller device helpers.
1908 */
1909typedef struct PDMDMACHLP
1910{
1911 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1912 uint32_t u32Version;
1913
1914 /* to-be-defined */
1915
1916} PDMDMACHLP;
1917/** Pointer to DMAC helpers. */
1918typedef PDMDMACHLP *PPDMDMACHLP;
1919/** Pointer to const DMAC helpers. */
1920typedef const PDMDMACHLP *PCPDMDMACHLP;
1921
1922/** Current PDMDMACHLP version number. */
1923#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1924
1925#endif /* IN_RING3 */
1926
1927
1928
1929/**
1930 * RTC registration structure.
1931 */
1932typedef struct PDMRTCREG
1933{
1934 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1935 uint32_t u32Version;
1936 uint32_t u32Alignment; /**< structure size alignment. */
1937
1938 /**
1939 * Write to a CMOS register and update the checksum if necessary.
1940 *
1941 * @returns VBox status code.
1942 * @param pDevIns Device instance of the RTC.
1943 * @param iReg The CMOS register index.
1944 * @param u8Value The CMOS register value.
1945 */
1946 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1947
1948 /**
1949 * Read a CMOS register.
1950 *
1951 * @returns VBox status code.
1952 * @param pDevIns Device instance of the RTC.
1953 * @param iReg The CMOS register index.
1954 * @param pu8Value Where to store the CMOS register value.
1955 */
1956 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1957
1958} PDMRTCREG;
1959/** Pointer to a RTC registration structure. */
1960typedef PDMRTCREG *PPDMRTCREG;
1961/** Pointer to a const RTC registration structure. */
1962typedef const PDMRTCREG *PCPDMRTCREG;
1963
1964/** Current PDMRTCREG version number. */
1965#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1966
1967
1968/**
1969 * RTC device helpers.
1970 */
1971typedef struct PDMRTCHLP
1972{
1973 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1974 uint32_t u32Version;
1975
1976 /* to-be-defined */
1977
1978} PDMRTCHLP;
1979/** Pointer to RTC helpers. */
1980typedef PDMRTCHLP *PPDMRTCHLP;
1981/** Pointer to const RTC helpers. */
1982typedef const PDMRTCHLP *PCPDMRTCHLP;
1983
1984/** Current PDMRTCHLP version number. */
1985#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1986
1987
1988
1989#ifdef IN_RING3
1990
1991/**
1992 * PDM Device API.
1993 */
1994typedef struct PDMDEVHLPR3
1995{
1996 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1997 uint32_t u32Version;
1998
1999 /**
2000 * Register a number of I/O ports with a device.
2001 *
2002 * These callbacks are of course for the host context (HC).
2003 * Register HC handlers before guest context (GC) handlers! There must be a
2004 * HC handler for every GC handler!
2005 *
2006 * @returns VBox status.
2007 * @param pDevIns The device instance to register the ports with.
2008 * @param Port First port number in the range.
2009 * @param cPorts Number of ports to register.
2010 * @param pvUser User argument.
2011 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2012 * @param pfnIn Pointer to function which is gonna handle IN operations.
2013 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2014 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2015 * @param pszDesc Pointer to description string. This must not be freed.
2016 */
2017 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2018 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2019 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2020
2021 /**
2022 * Register a number of I/O ports with a device for RC.
2023 *
2024 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2025 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2026 * for every RC handler!
2027 *
2028 * @returns VBox status.
2029 * @param pDevIns The device instance to register the ports with
2030 * and which RC module to resolve the names
2031 * against.
2032 * @param Port First port number in the range.
2033 * @param cPorts Number of ports to register.
2034 * @param pvUser User argument.
2035 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2036 * @param pszIn Name of the RC function which is gonna handle IN operations.
2037 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2038 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2039 * @param pszDesc Pointer to description string. This must not be freed.
2040 */
2041 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
2042 const char *pszOut, const char *pszIn,
2043 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2044
2045 /**
2046 * Register a number of I/O ports with a device.
2047 *
2048 * These callbacks are of course for the ring-0 host context (R0).
2049 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2050 *
2051 * @returns VBox status.
2052 * @param pDevIns The device instance to register the ports with.
2053 * @param Port First port number in the range.
2054 * @param cPorts Number of ports to register.
2055 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2056 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2057 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2058 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2059 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2060 * @param pszDesc Pointer to description string. This must not be freed.
2061 */
2062 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2063 const char *pszOut, const char *pszIn,
2064 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2065
2066 /**
2067 * Deregister I/O ports.
2068 *
2069 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2070 *
2071 * @returns VBox status.
2072 * @param pDevIns The device instance owning the ports.
2073 * @param Port First port number in the range.
2074 * @param cPorts Number of ports to deregister.
2075 */
2076 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2077
2078 /**
2079 * Register a Memory Mapped I/O (MMIO) region.
2080 *
2081 * These callbacks are of course for the ring-3 context (R3). Register HC
2082 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2083 * must be a R3 handler for every RC and R0 handler!
2084 *
2085 * @returns VBox status.
2086 * @param pDevIns The device instance to register the MMIO with.
2087 * @param GCPhysStart First physical address in the range.
2088 * @param cbRange The size of the range (in bytes).
2089 * @param pvUser User argument.
2090 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2091 * @param pfnRead Pointer to function which is gonna handle Read operations.
2092 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2093 * @param pszDesc Pointer to description string. This must not be freed.
2094 */
2095 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2096 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2097 const char *pszDesc));
2098
2099 /**
2100 * Register a Memory Mapped I/O (MMIO) region for GC.
2101 *
2102 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2103 * (R3) handlers before guest context handlers! There must be a R3 handler for
2104 * every RC handler!
2105 *
2106 * @returns VBox status.
2107 * @param pDevIns The device instance to register the MMIO with.
2108 * @param GCPhysStart First physical address in the range.
2109 * @param cbRange The size of the range (in bytes).
2110 * @param pvUser User argument.
2111 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2112 * @param pszRead Name of the RC function which is gonna handle Read operations.
2113 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2114 * @param pszDesc Obsolete. NULL is fine.
2115 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2116 */
2117 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2118 const char *pszWrite, const char *pszRead, const char *pszFill,
2119 const char *pszDesc));
2120
2121 /**
2122 * Register a Memory Mapped I/O (MMIO) region for R0.
2123 *
2124 * These callbacks are for the ring-0 host context (R0). Register ring-3
2125 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2126 * every R0 handler!
2127 *
2128 * @returns VBox status.
2129 * @param pDevIns The device instance to register the MMIO with.
2130 * @param GCPhysStart First physical address in the range.
2131 * @param cbRange The size of the range (in bytes).
2132 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2133 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2134 * @param pszRead Name of the RC function which is gonna handle Read operations.
2135 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2136 * @param pszDesc Obsolete. NULL is fine.
2137 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2138 */
2139 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2140 const char *pszWrite, const char *pszRead, const char *pszFill,
2141 const char *pszDesc));
2142
2143 /**
2144 * Deregister a Memory Mapped I/O (MMIO) region.
2145 *
2146 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2147 *
2148 * @returns VBox status.
2149 * @param pDevIns The device instance owning the MMIO region(s).
2150 * @param GCPhysStart First physical address in the range.
2151 * @param cbRange The size of the range (in bytes).
2152 */
2153 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2154
2155 /**
2156 * Allocate and register a MMIO2 region.
2157 *
2158 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2159 * RAM associated with a device. It is also non-shared memory with a
2160 * permanent ring-3 mapping and page backing (presently).
2161 *
2162 * @returns VBox status.
2163 * @param pDevIns The device instance.
2164 * @param iRegion The region number. Use the PCI region number as
2165 * this must be known to the PCI bus device too. If
2166 * it's not associated with the PCI device, then
2167 * any number up to UINT8_MAX is fine.
2168 * @param cb The size (in bytes) of the region.
2169 * @param fFlags Reserved for future use, must be zero.
2170 * @param ppv Where to store the address of the ring-3 mapping
2171 * of the memory.
2172 * @param pszDesc Pointer to description string. This must not be
2173 * freed.
2174 * @thread EMT.
2175 */
2176 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2177
2178 /**
2179 * Deregisters and frees a MMIO2 region.
2180 *
2181 * Any physical (and virtual) access handlers registered for the region must
2182 * be deregistered before calling this function.
2183 *
2184 * @returns VBox status code.
2185 * @param pDevIns The device instance.
2186 * @param iRegion The region number used during registration.
2187 * @thread EMT.
2188 */
2189 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2190
2191 /**
2192 * Maps a MMIO2 region into the physical memory space.
2193 *
2194 * A MMIO2 range may overlap with base memory if a lot of RAM
2195 * is configured for the VM, in which case we'll drop the base
2196 * memory pages. Presently we will make no attempt to preserve
2197 * anything that happens to be present in the base memory that
2198 * is replaced, this is of course incorrectly but it's too much
2199 * effort.
2200 *
2201 * @returns VBox status code.
2202 * @param pDevIns The device instance.
2203 * @param iRegion The region number used during registration.
2204 * @param GCPhys The physical address to map it at.
2205 * @thread EMT.
2206 */
2207 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2208
2209 /**
2210 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2211 *
2212 * @returns VBox status code.
2213 * @param pDevIns The device instance.
2214 * @param iRegion The region number used during registration.
2215 * @param GCPhys The physical address it's currently mapped at.
2216 * @thread EMT.
2217 */
2218 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2219
2220 /**
2221 * Maps a portion of an MMIO2 region into the hypervisor region.
2222 *
2223 * Callers of this API must never deregister the MMIO2 region before the
2224 * VM is powered off.
2225 *
2226 * @return VBox status code.
2227 * @param pDevIns The device owning the MMIO2 memory.
2228 * @param iRegion The region.
2229 * @param off The offset into the region. Will be rounded down
2230 * to closest page boundrary.
2231 * @param cb The number of bytes to map. Will be rounded up
2232 * to the closest page boundrary.
2233 * @param pszDesc Mapping description.
2234 * @param pRCPtr Where to store the RC address.
2235 */
2236 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2237 const char *pszDesc, PRTRCPTR pRCPtr));
2238
2239 /**
2240 * Maps a portion of an MMIO2 region into kernel space (host).
2241 *
2242 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2243 * or the VM is terminated.
2244 *
2245 * @return VBox status code.
2246 * @param pDevIns The device owning the MMIO2 memory.
2247 * @param iRegion The region.
2248 * @param off The offset into the region. Must be page
2249 * aligned.
2250 * @param cb The number of bytes to map. Must be page
2251 * aligned.
2252 * @param pszDesc Mapping description.
2253 * @param pR0Ptr Where to store the R0 address.
2254 */
2255 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2256 const char *pszDesc, PRTR0PTR pR0Ptr));
2257
2258 /**
2259 * Register a ROM (BIOS) region.
2260 *
2261 * It goes without saying that this is read-only memory. The memory region must be
2262 * in unassigned memory. I.e. from the top of the address space or on the PC in
2263 * the 0xa0000-0xfffff range.
2264 *
2265 * @returns VBox status.
2266 * @param pDevIns The device instance owning the ROM region.
2267 * @param GCPhysStart First physical address in the range.
2268 * Must be page aligned!
2269 * @param cbRange The size of the range (in bytes).
2270 * Must be page aligned!
2271 * @param pvBinary Pointer to the binary data backing the ROM image.
2272 * This must be cbRange bytes big.
2273 * It will be copied and doesn't have to stick around if fShadow is clear.
2274 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2275 * @param pszDesc Pointer to description string. This must not be freed.
2276 *
2277 * @remark There is no way to remove the rom, automatically on device cleanup or
2278 * manually from the device yet. At present I doubt we need such features...
2279 */
2280 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2281
2282 /**
2283 * Changes the protection of shadowed ROM mapping.
2284 *
2285 * This is intented for use by the system BIOS, chipset or device in question to
2286 * change the protection of shadowed ROM code after init and on reset.
2287 *
2288 * @param pDevIns The device instance.
2289 * @param GCPhysStart Where the mapping starts.
2290 * @param cbRange The size of the mapping.
2291 * @param enmProt The new protection type.
2292 */
2293 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2294
2295 /**
2296 * Register a save state data unit.
2297 *
2298 * @returns VBox status.
2299 * @param pDevIns The device instance.
2300 * @param pszName Data unit name.
2301 * @param uInstance The instance identifier of the data unit.
2302 * This must together with the name be unique.
2303 * @param uVersion Data layout version number.
2304 * @param cbGuess The approximate amount of data in the unit.
2305 * Only for progress indicators.
2306 * @param pszBefore Name of data unit which we should be put in
2307 * front of. Optional (NULL).
2308 *
2309 * @param pfnLivePrep Prepare live save callback, optional.
2310 * @param pfnLiveExec Execute live save callback, optional.
2311 * @param pfnLiveVote Vote live save callback, optional.
2312 *
2313 * @param pfnSavePrep Prepare save callback, optional.
2314 * @param pfnSaveExec Execute save callback, optional.
2315 * @param pfnSaveDone Done save callback, optional.
2316 *
2317 * @param pfnLoadPrep Prepare load callback, optional.
2318 * @param pfnLoadExec Execute load callback, optional.
2319 * @param pfnLoadDone Done load callback, optional.
2320 */
2321 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2322 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2323 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2324 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2325
2326 /**
2327 * Creates a timer.
2328 *
2329 * @returns VBox status.
2330 * @param pDevIns The device instance.
2331 * @param enmClock The clock to use on this timer.
2332 * @param pfnCallback Callback function.
2333 * @param pvUser User argument for the callback.
2334 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2335 * @param pszDesc Pointer to description string which must stay around
2336 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2337 * @param ppTimer Where to store the timer on success.
2338 */
2339 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2340
2341 /**
2342 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2343 *
2344 * @returns pTime.
2345 * @param pDevIns The device instance.
2346 * @param pTime Where to store the time.
2347 */
2348 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2349
2350 /**
2351 * Read physical memory.
2352 *
2353 * @returns VINF_SUCCESS (for now).
2354 * @param pDevIns The device instance.
2355 * @param GCPhys Physical address start reading from.
2356 * @param pvBuf Where to put the read bits.
2357 * @param cbRead How many bytes to read.
2358 * @thread Any thread, but the call may involve the emulation thread.
2359 */
2360 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2361
2362 /**
2363 * Write to physical memory.
2364 *
2365 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2366 * @param pDevIns The device instance.
2367 * @param GCPhys Physical address to write to.
2368 * @param pvBuf What to write.
2369 * @param cbWrite How many bytes to write.
2370 * @thread Any thread, but the call may involve the emulation thread.
2371 */
2372 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2373
2374 /**
2375 * Requests the mapping of a guest page into ring-3.
2376 *
2377 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2378 * release it.
2379 *
2380 * This API will assume your intention is to write to the page, and will
2381 * therefore replace shared and zero pages. If you do not intend to modify the
2382 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2383 *
2384 * @returns VBox status code.
2385 * @retval VINF_SUCCESS on success.
2386 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2387 * backing or if the page has any active access handlers. The caller
2388 * must fall back on using PGMR3PhysWriteExternal.
2389 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2390 *
2391 * @param pVM The VM handle.
2392 * @param GCPhys The guest physical address of the page that
2393 * should be mapped.
2394 * @param fFlags Flags reserved for future use, MBZ.
2395 * @param ppv Where to store the address corresponding to
2396 * GCPhys.
2397 * @param pLock Where to store the lock information that
2398 * pfnPhysReleasePageMappingLock needs.
2399 *
2400 * @remark Avoid calling this API from within critical sections (other than the
2401 * PGM one) because of the deadlock risk when we have to delegating the
2402 * task to an EMT.
2403 * @thread Any.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2406
2407 /**
2408 * Requests the mapping of a guest page into ring-3, external threads.
2409 *
2410 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2411 * release it.
2412 *
2413 * @returns VBox status code.
2414 * @retval VINF_SUCCESS on success.
2415 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2416 * backing or if the page as an active ALL access handler. The caller
2417 * must fall back on using PGMPhysRead.
2418 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2419 *
2420 * @param pDevIns The device instance.
2421 * @param GCPhys The guest physical address of the page that
2422 * should be mapped.
2423 * @param fFlags Flags reserved for future use, MBZ.
2424 * @param ppv Where to store the address corresponding to
2425 * GCPhys.
2426 * @param pLock Where to store the lock information that
2427 * pfnPhysReleasePageMappingLock needs.
2428 *
2429 * @remark Avoid calling this API from within critical sections.
2430 * @thread Any.
2431 */
2432 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2433
2434 /**
2435 * Release the mapping of a guest page.
2436 *
2437 * This is the counter part of pfnPhysGCPhys2CCPtr and
2438 * pfnPhysGCPhys2CCPtrReadOnly.
2439 *
2440 * @param pDevIns The device instance.
2441 * @param pLock The lock structure initialized by the mapping
2442 * function.
2443 */
2444 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2445
2446 /**
2447 * Read guest physical memory by virtual address.
2448 *
2449 * @param pDevIns The device instance.
2450 * @param pvDst Where to put the read bits.
2451 * @param GCVirtSrc Guest virtual address to start reading from.
2452 * @param cb How many bytes to read.
2453 * @thread The emulation thread.
2454 */
2455 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2456
2457 /**
2458 * Write to guest physical memory by virtual address.
2459 *
2460 * @param pDevIns The device instance.
2461 * @param GCVirtDst Guest virtual address to write to.
2462 * @param pvSrc What to write.
2463 * @param cb How many bytes to write.
2464 * @thread The emulation thread.
2465 */
2466 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2467
2468 /**
2469 * Convert a guest virtual address to a guest physical address.
2470 *
2471 * @returns VBox status code.
2472 * @param pDevIns The device instance.
2473 * @param GCPtr Guest virtual address.
2474 * @param pGCPhys Where to store the GC physical address
2475 * corresponding to GCPtr.
2476 * @thread The emulation thread.
2477 * @remark Careful with page boundraries.
2478 */
2479 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2480
2481 /**
2482 * Allocate memory which is associated with current VM instance
2483 * and automatically freed on it's destruction.
2484 *
2485 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2486 * @param pDevIns The device instance.
2487 * @param cb Number of bytes to allocate.
2488 */
2489 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2490
2491 /**
2492 * Allocate memory which is associated with current VM instance
2493 * and automatically freed on it's destruction. The memory is ZEROed.
2494 *
2495 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2496 * @param pDevIns The device instance.
2497 * @param cb Number of bytes to allocate.
2498 */
2499 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2500
2501 /**
2502 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2503 *
2504 * @param pDevIns The device instance.
2505 * @param pv Pointer to the memory to free.
2506 */
2507 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2508
2509 /**
2510 * Gets the VM state.
2511 *
2512 * @returns VM state.
2513 * @param pDevIns The device instance.
2514 * @thread Any thread (just keep in mind that it's volatile info).
2515 */
2516 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2517
2518 /**
2519 * Checks if the VM was teleported and hasn't been fully resumed yet.
2520 *
2521 * @returns true / false.
2522 * @param pDevIns The device instance.
2523 * @thread Any thread.
2524 */
2525 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2526
2527 /**
2528 * Set the VM error message
2529 *
2530 * @returns rc.
2531 * @param pDevIns The device instance.
2532 * @param rc VBox status code.
2533 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2534 * @param pszFormat Error message format string.
2535 * @param ... Error message arguments.
2536 */
2537 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2538
2539 /**
2540 * Set the VM error message
2541 *
2542 * @returns rc.
2543 * @param pDevIns The device instance.
2544 * @param rc VBox status code.
2545 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2546 * @param pszFormat Error message format string.
2547 * @param va Error message arguments.
2548 */
2549 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2550
2551 /**
2552 * Set the VM runtime error message
2553 *
2554 * @returns VBox status code.
2555 * @param pDevIns The device instance.
2556 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2557 * @param pszErrorId Error ID string.
2558 * @param pszFormat Error message format string.
2559 * @param ... Error message arguments.
2560 */
2561 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2562
2563 /**
2564 * Set the VM runtime error message
2565 *
2566 * @returns VBox status code.
2567 * @param pDevIns The device instance.
2568 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2569 * @param pszErrorId Error ID string.
2570 * @param pszFormat Error message format string.
2571 * @param va Error message arguments.
2572 */
2573 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2574
2575 /**
2576 * Stops the VM and enters the debugger to look at the guest state.
2577 *
2578 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2579 * invoking this function directly.
2580 *
2581 * @returns VBox status code which must be passed up to the VMM.
2582 * @param pDevIns The device instance.
2583 * @param pszFile Filename of the assertion location.
2584 * @param iLine The linenumber of the assertion location.
2585 * @param pszFunction Function of the assertion location.
2586 * @param pszFormat Message. (optional)
2587 * @param args Message parameters.
2588 */
2589 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2590
2591 /**
2592 * Register a info handler with DBGF,
2593 *
2594 * @returns VBox status code.
2595 * @param pDevIns The device instance.
2596 * @param pszName The identifier of the info.
2597 * @param pszDesc The description of the info and any arguments
2598 * the handler may take.
2599 * @param pfnHandler The handler function to be called to display the
2600 * info.
2601 */
2602 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2603
2604 /**
2605 * Registers a statistics sample if statistics are enabled.
2606 *
2607 * @param pDevIns Device instance of the DMA.
2608 * @param pvSample Pointer to the sample.
2609 * @param enmType Sample type. This indicates what pvSample is
2610 * pointing at.
2611 * @param pszName Sample name. The name is on this form
2612 * "/<component>/<sample>". Further nesting is
2613 * possible.
2614 * @param enmUnit Sample unit.
2615 * @param pszDesc Sample description.
2616 */
2617 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2618
2619 /**
2620 * Same as pfnSTAMRegister except that the name is specified in a
2621 * RTStrPrintf like fashion.
2622 *
2623 * @returns VBox status.
2624 * @param pDevIns Device instance of the DMA.
2625 * @param pvSample Pointer to the sample.
2626 * @param enmType Sample type. This indicates what pvSample is
2627 * pointing at.
2628 * @param enmVisibility Visibility type specifying whether unused
2629 * statistics should be visible or not.
2630 * @param enmUnit Sample unit.
2631 * @param pszDesc Sample description.
2632 * @param pszName The sample name format string.
2633 * @param ... Arguments to the format string.
2634 */
2635 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2636 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2637
2638 /**
2639 * Same as pfnSTAMRegister except that the name is specified in a
2640 * RTStrPrintfV like fashion.
2641 *
2642 * @returns VBox status.
2643 * @param pDevIns Device instance of the DMA.
2644 * @param pvSample Pointer to the sample.
2645 * @param enmType Sample type. This indicates what pvSample is
2646 * pointing at.
2647 * @param enmVisibility Visibility type specifying whether unused
2648 * statistics should be visible or not.
2649 * @param enmUnit Sample unit.
2650 * @param pszDesc Sample description.
2651 * @param pszName The sample name format string.
2652 * @param args Arguments to the format string.
2653 */
2654 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2655 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2656
2657 /**
2658 * Registers the device with the default PCI bus.
2659 *
2660 * @returns VBox status code.
2661 * @param pDevIns The device instance.
2662 * @param pPciDev The PCI device structure.
2663 * Any PCI enabled device must keep this in it's instance data!
2664 * Fill in the PCI data config before registration, please.
2665 * @remark This is the simple interface, a Ex interface will be created if
2666 * more features are needed later.
2667 */
2668 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2669
2670 /**
2671 * Initialize MSI support in a PCI device.
2672 *
2673 * @returns VBox status code.
2674 * @param pDevIns The device instance.
2675 * @param pMsiReg MSI registartion structure.
2676 */
2677 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2678
2679 /**
2680 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2681 *
2682 * @returns VBox status code.
2683 * @param pDevIns The device instance.
2684 * @param iRegion The region number.
2685 * @param cbRegion Size of the region.
2686 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2687 * @param pfnCallback Callback for doing the mapping.
2688 */
2689 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2690
2691 /**
2692 * Register PCI configuration space read/write callbacks.
2693 *
2694 * @param pDevIns The device instance.
2695 * @param pPciDev The PCI device structure.
2696 * If NULL the default PCI device for this device instance is used.
2697 * @param pfnRead Pointer to the user defined PCI config read function.
2698 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2699 * PCI config read function. This way, user can decide when (and if)
2700 * to call default PCI config read function. Can be NULL.
2701 * @param pfnWrite Pointer to the user defined PCI config write function.
2702 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2703 * PCI config write function. This way, user can decide when (and if)
2704 * to call default PCI config write function. Can be NULL.
2705 * @thread EMT
2706 */
2707 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2708 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2709
2710 /**
2711 * Set the IRQ for a PCI device.
2712 *
2713 * @param pDevIns The device instance.
2714 * @param iIrq IRQ number to set.
2715 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2716 * @thread Any thread, but will involve the emulation thread.
2717 */
2718 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2719
2720 /**
2721 * Set the IRQ for a PCI device, but don't wait for EMT to process
2722 * the request when not called from EMT.
2723 *
2724 * @param pDevIns The device instance.
2725 * @param iIrq IRQ number to set.
2726 * @param iLevel IRQ level.
2727 * @thread Any thread, but will involve the emulation thread.
2728 */
2729 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2730
2731 /**
2732 * Set ISA IRQ for a device.
2733 *
2734 * @param pDevIns The device instance.
2735 * @param iIrq IRQ number to set.
2736 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2737 * @thread Any thread, but will involve the emulation thread.
2738 */
2739 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2740
2741 /**
2742 * Set the ISA IRQ for a device, but don't wait for EMT to process
2743 * the request when not called from EMT.
2744 *
2745 * @param pDevIns The device instance.
2746 * @param iIrq IRQ number to set.
2747 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2748 * @thread Any thread, but will involve the emulation thread.
2749 */
2750 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2751
2752 /**
2753 * Attaches a driver (chain) to the device.
2754 *
2755 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2756 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2757 *
2758 * @returns VBox status code.
2759 * @param pDevIns The device instance.
2760 * @param iLun The logical unit to attach.
2761 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2762 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2763 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2764 * for the live of the device instance.
2765 */
2766 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2767
2768 /**
2769 * Create a queue.
2770 *
2771 * @returns VBox status code.
2772 * @param pDevIns The device instance.
2773 * @param cbItem The size of a queue item.
2774 * @param cItems The number of items in the queue.
2775 * @param cMilliesInterval The number of milliseconds between polling the queue.
2776 * If 0 then the emulation thread will be notified whenever an item arrives.
2777 * @param pfnCallback The consumer function.
2778 * @param fRZEnabled Set if the queue should work in RC and R0.
2779 * @param pszName The queue base name. The instance number will be
2780 * appended automatically.
2781 * @param ppQueue Where to store the queue handle on success.
2782 * @thread The emulation thread.
2783 */
2784 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2785 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2786
2787 /**
2788 * Initializes a PDM critical section.
2789 *
2790 * The PDM critical sections are derived from the IPRT critical sections, but
2791 * works in RC and R0 as well.
2792 *
2793 * @returns VBox status code.
2794 * @param pDevIns The device instance.
2795 * @param pCritSect Pointer to the critical section.
2796 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2797 * @param pszNameFmt Format string for namging the critical section.
2798 * For statistics and lock validation.
2799 * @param va Arguments for the format string.
2800 */
2801 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2802 const char *pszNameFmt, va_list va));
2803
2804 /**
2805 * Creates a PDM thread.
2806 *
2807 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2808 * resuming, and destroying the thread as the VM state changes.
2809 *
2810 * @returns VBox status code.
2811 * @param pDevIns The device instance.
2812 * @param ppThread Where to store the thread 'handle'.
2813 * @param pvUser The user argument to the thread function.
2814 * @param pfnThread The thread function.
2815 * @param pfnWakeup The wakup callback. This is called on the EMT
2816 * thread when a state change is pending.
2817 * @param cbStack See RTThreadCreate.
2818 * @param enmType See RTThreadCreate.
2819 * @param pszName See RTThreadCreate.
2820 */
2821 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2822 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2823
2824 /**
2825 * Set up asynchronous handling of a suspend, reset or power off notification.
2826 *
2827 * This shall only be called when getting the notification. It must be called
2828 * for each one.
2829 *
2830 * @returns VBox status code.
2831 * @param pDevIns The device instance.
2832 * @param pfnAsyncNotify The callback.
2833 * @thread EMT(0)
2834 */
2835 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2836
2837 /**
2838 * Notify EMT(0) that the device has completed the asynchronous notification
2839 * handling.
2840 *
2841 * This can be called at any time, spurious calls will simply be ignored.
2842 *
2843 * @param pDevIns The device instance.
2844 * @thread Any
2845 */
2846 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2847
2848 /**
2849 * Register the RTC device.
2850 *
2851 * @returns VBox status code.
2852 * @param pDevIns The device instance.
2853 * @param pRtcReg Pointer to a RTC registration structure.
2854 * @param ppRtcHlp Where to store the pointer to the helper
2855 * functions.
2856 */
2857 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2858
2859 /**
2860 * Register the PCI Bus.
2861 *
2862 * @returns VBox status code.
2863 * @param pDevIns The device instance.
2864 * @param pPciBusReg Pointer to PCI bus registration structure.
2865 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2866 * helpers.
2867 */
2868 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2869
2870 /**
2871 * Register the PIC device.
2872 *
2873 * @returns VBox status code.
2874 * @param pDevIns The device instance.
2875 * @param pPicReg Pointer to a PIC registration structure.
2876 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2877 * helpers.
2878 */
2879 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2880
2881 /**
2882 * Register the APIC device.
2883 *
2884 * @returns VBox status code.
2885 * @param pDevIns The device instance.
2886 * @param pApicReg Pointer to a APIC registration structure.
2887 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2888 */
2889 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2890
2891 /**
2892 * Register the I/O APIC device.
2893 *
2894 * @returns VBox status code.
2895 * @param pDevIns The device instance.
2896 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2897 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2898 * helpers.
2899 */
2900 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2901
2902 /**
2903 * Register the HPET device.
2904 *
2905 * @returns VBox status code.
2906 * @param pDevIns The device instance.
2907 * @param pHpetReg Pointer to a HPET registration structure.
2908 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2909 * helpers.
2910 */
2911 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2912
2913 /**
2914 * Register the DMA device.
2915 *
2916 * @returns VBox status code.
2917 * @param pDevIns The device instance.
2918 * @param pDmacReg Pointer to a DMAC registration structure.
2919 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2920 */
2921 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2922
2923 /**
2924 * Register transfer function for DMA channel.
2925 *
2926 * @returns VBox status code.
2927 * @param pDevIns The device instance.
2928 * @param uChannel Channel number.
2929 * @param pfnTransferHandler Device specific transfer callback function.
2930 * @param pvUser User pointer to pass to the callback.
2931 * @thread EMT
2932 */
2933 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2934
2935 /**
2936 * Read memory.
2937 *
2938 * @returns VBox status code.
2939 * @param pDevIns The device instance.
2940 * @param uChannel Channel number.
2941 * @param pvBuffer Pointer to target buffer.
2942 * @param off DMA position.
2943 * @param cbBlock Block size.
2944 * @param pcbRead Where to store the number of bytes which was
2945 * read. optional.
2946 * @thread EMT
2947 */
2948 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2949
2950 /**
2951 * Write memory.
2952 *
2953 * @returns VBox status code.
2954 * @param pDevIns The device instance.
2955 * @param uChannel Channel number.
2956 * @param pvBuffer Memory to write.
2957 * @param off DMA position.
2958 * @param cbBlock Block size.
2959 * @param pcbWritten Where to store the number of bytes which was
2960 * written. optional.
2961 * @thread EMT
2962 */
2963 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2964
2965 /**
2966 * Set the DREQ line.
2967 *
2968 * @returns VBox status code.
2969 * @param pDevIns Device instance.
2970 * @param uChannel Channel number.
2971 * @param uLevel Level of the line.
2972 * @thread EMT
2973 */
2974 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2975
2976 /**
2977 * Get channel mode.
2978 *
2979 * @returns Channel mode. See specs.
2980 * @param pDevIns The device instance.
2981 * @param uChannel Channel number.
2982 * @thread EMT
2983 */
2984 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2985
2986 /**
2987 * Schedule DMA execution.
2988 *
2989 * @param pDevIns The device instance.
2990 * @thread Any thread.
2991 */
2992 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2993
2994 /**
2995 * Write CMOS value and update the checksum(s).
2996 *
2997 * @returns VBox status code.
2998 * @param pDevIns The device instance.
2999 * @param iReg The CMOS register index.
3000 * @param u8Value The CMOS register value.
3001 * @thread EMT
3002 */
3003 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3004
3005 /**
3006 * Read CMOS value.
3007 *
3008 * @returns VBox status code.
3009 * @param pDevIns The device instance.
3010 * @param iReg The CMOS register index.
3011 * @param pu8Value Where to store the CMOS register value.
3012 * @thread EMT
3013 */
3014 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3015
3016 /**
3017 * Assert that the current thread is the emulation thread.
3018 *
3019 * @returns True if correct.
3020 * @returns False if wrong.
3021 * @param pDevIns The device instance.
3022 * @param pszFile Filename of the assertion location.
3023 * @param iLine The linenumber of the assertion location.
3024 * @param pszFunction Function of the assertion location.
3025 */
3026 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3027
3028 /**
3029 * Assert that the current thread is NOT the emulation thread.
3030 *
3031 * @returns True if correct.
3032 * @returns False if wrong.
3033 * @param pDevIns The device instance.
3034 * @param pszFile Filename of the assertion location.
3035 * @param iLine The linenumber of the assertion location.
3036 * @param pszFunction Function of the assertion location.
3037 */
3038 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3039
3040 /**
3041 * Resolves the symbol for a raw-mode context interface.
3042 *
3043 * @returns VBox status code.
3044 * @param pDevIns The device instance.
3045 * @param pvInterface The interface structure.
3046 * @param cbInterface The size of the interface structure.
3047 * @param pszSymPrefix What to prefix the symbols in the list with
3048 * before resolving them. This must start with
3049 * 'dev' and contain the driver name.
3050 * @param pszSymList List of symbols corresponding to the interface.
3051 * There is generally a there is generally a define
3052 * holding this list associated with the interface
3053 * definition (INTERFACE_SYM_LIST). For more
3054 * details see PDMR3LdrGetInterfaceSymbols.
3055 * @thread EMT
3056 */
3057 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3058 const char *pszSymPrefix, const char *pszSymList));
3059
3060 /**
3061 * Resolves the symbol for a ring-0 context interface.
3062 *
3063 * @returns VBox status code.
3064 * @param pDevIns The device instance.
3065 * @param pvInterface The interface structure.
3066 * @param cbInterface The size of the interface structure.
3067 * @param pszSymPrefix What to prefix the symbols in the list with
3068 * before resolving them. This must start with
3069 * 'dev' and contain the driver name.
3070 * @param pszSymList List of symbols corresponding to the interface.
3071 * There is generally a there is generally a define
3072 * holding this list associated with the interface
3073 * definition (INTERFACE_SYM_LIST). For more
3074 * details see PDMR3LdrGetInterfaceSymbols.
3075 * @thread EMT
3076 */
3077 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3078 const char *pszSymPrefix, const char *pszSymList));
3079
3080 /**
3081 * Call the ring-0 request handler routine of the device.
3082 *
3083 * For this to work, the device must be ring-0 enabled and export a request
3084 * handler function. The name of the function must be the device name in
3085 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3086 * 'ReqHandler'. The device name will be captialized. It shall take the
3087 * exact same arguments as this function and be declared using
3088 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3089 *
3090 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3091 * or two as the handler address will be resolved on each invocation. This
3092 * is the reason for the EMT only restriction as well.
3093 *
3094 * @returns VBox status code.
3095 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3096 * handler function.
3097 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3098 *
3099 * @param pDevIns The device instance.
3100 * @param uOperation The operation to perform.
3101 * @param u64Arg 64-bit integer argument.
3102 * @thread EMT
3103 */
3104 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3105
3106 /** Space reserved for future members.
3107 * @{ */
3108 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3109 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3110 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3111 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3112 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3113 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3114 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3115 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3116 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3117 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3118 /** @} */
3119
3120
3121 /** API available to trusted devices only.
3122 *
3123 * These APIs are providing unrestricted access to the guest and the VM,
3124 * or they are interacting intimately with PDM.
3125 *
3126 * @{
3127 */
3128 /**
3129 * Gets the VM handle. Restricted API.
3130 *
3131 * @returns VM Handle.
3132 * @param pDevIns The device instance.
3133 */
3134 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3135
3136 /**
3137 * Gets the VMCPU handle. Restricted API.
3138 *
3139 * @returns VMCPU Handle.
3140 * @param pDevIns The device instance.
3141 */
3142 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3143
3144 /**
3145 * Registers the VMM device heap
3146 *
3147 * @returns VBox status code.
3148 * @param pDevIns The device instance.
3149 * @param GCPhys The physical address.
3150 * @param pvHeap Ring 3 heap pointer.
3151 * @param cbSize Size of the heap.
3152 * @thread EMT.
3153 */
3154 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3155
3156 /**
3157 * Unregisters the VMM device heap
3158 *
3159 * @returns VBox status code.
3160 * @param pDevIns The device instance.
3161 * @param GCPhys The physical address.
3162 * @thread EMT.
3163 */
3164 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3165
3166 /**
3167 * Resets the VM.
3168 *
3169 * @returns The appropriate VBox status code to pass around on reset.
3170 * @param pDevIns The device instance.
3171 * @thread The emulation thread.
3172 */
3173 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3174
3175 /**
3176 * Suspends the VM.
3177 *
3178 * @returns The appropriate VBox status code to pass around on suspend.
3179 * @param pDevIns The device instance.
3180 * @thread The emulation thread.
3181 */
3182 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3183
3184 /**
3185 * Suspends, saves and powers off the VM.
3186 *
3187 * @returns The appropriate VBox status code to pass around.
3188 * @param pDevIns The device instance.
3189 * @thread An emulation thread.
3190 */
3191 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3192
3193 /**
3194 * Power off the VM.
3195 *
3196 * @returns The appropriate VBox status code to pass around on power off.
3197 * @param pDevIns The device instance.
3198 * @thread The emulation thread.
3199 */
3200 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3201
3202 /**
3203 * Checks if the Gate A20 is enabled or not.
3204 *
3205 * @returns true if A20 is enabled.
3206 * @returns false if A20 is disabled.
3207 * @param pDevIns The device instance.
3208 * @thread The emulation thread.
3209 */
3210 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3211
3212 /**
3213 * Enables or disables the Gate A20.
3214 *
3215 * @param pDevIns The device instance.
3216 * @param fEnable Set this flag to enable the Gate A20; clear it
3217 * to disable.
3218 * @thread The emulation thread.
3219 */
3220 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3221
3222 /**
3223 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3224 * thread.
3225 *
3226 * @param pDevIns The device instance.
3227 * @param iLeaf The CPUID leaf to get.
3228 * @param pEax Where to store the EAX value.
3229 * @param pEbx Where to store the EBX value.
3230 * @param pEcx Where to store the ECX value.
3231 * @param pEdx Where to store the EDX value.
3232 * @thread EMT.
3233 */
3234 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3235
3236 /** @} */
3237
3238 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3239 uint32_t u32TheEnd;
3240} PDMDEVHLPR3;
3241#endif /* !IN_RING3 */
3242/** Pointer to the R3 PDM Device API. */
3243typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3244/** Pointer to the R3 PDM Device API, const variant. */
3245typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3246
3247/** Current PDMDEVHLPR3 version number. */
3248#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 3, 0)
3249
3250
3251/**
3252 * PDM Device API - RC Variant.
3253 */
3254typedef struct PDMDEVHLPRC
3255{
3256 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3257 uint32_t u32Version;
3258
3259 /**
3260 * Set the IRQ for a PCI device.
3261 *
3262 * @param pDevIns Device instance.
3263 * @param iIrq IRQ number to set.
3264 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3265 * @thread Any thread, but will involve the emulation thread.
3266 */
3267 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3268
3269 /**
3270 * Set ISA IRQ for a device.
3271 *
3272 * @param pDevIns Device instance.
3273 * @param iIrq IRQ number to set.
3274 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3275 * @thread Any thread, but will involve the emulation thread.
3276 */
3277 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3278
3279 /**
3280 * Read physical memory.
3281 *
3282 * @returns VINF_SUCCESS (for now).
3283 * @param pDevIns Device instance.
3284 * @param GCPhys Physical address start reading from.
3285 * @param pvBuf Where to put the read bits.
3286 * @param cbRead How many bytes to read.
3287 */
3288 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3289
3290 /**
3291 * Write to physical memory.
3292 *
3293 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3294 * @param pDevIns Device instance.
3295 * @param GCPhys Physical address to write to.
3296 * @param pvBuf What to write.
3297 * @param cbWrite How many bytes to write.
3298 */
3299 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3300
3301 /**
3302 * Checks if the Gate A20 is enabled or not.
3303 *
3304 * @returns true if A20 is enabled.
3305 * @returns false if A20 is disabled.
3306 * @param pDevIns Device instance.
3307 * @thread The emulation thread.
3308 */
3309 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3310
3311 /**
3312 * Gets the VM state.
3313 *
3314 * @returns VM state.
3315 * @param pDevIns The device instance.
3316 * @thread Any thread (just keep in mind that it's volatile info).
3317 */
3318 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3319
3320 /**
3321 * Set the VM error message
3322 *
3323 * @returns rc.
3324 * @param pDrvIns Driver instance.
3325 * @param rc VBox status code.
3326 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3327 * @param pszFormat Error message format string.
3328 * @param ... Error message arguments.
3329 */
3330 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3331
3332 /**
3333 * Set the VM error message
3334 *
3335 * @returns rc.
3336 * @param pDrvIns Driver instance.
3337 * @param rc VBox status code.
3338 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3339 * @param pszFormat Error message format string.
3340 * @param va Error message arguments.
3341 */
3342 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3343
3344 /**
3345 * Set the VM runtime error message
3346 *
3347 * @returns VBox status code.
3348 * @param pDevIns Device instance.
3349 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3350 * @param pszErrorId Error ID string.
3351 * @param pszFormat Error message format string.
3352 * @param ... Error message arguments.
3353 */
3354 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3355
3356 /**
3357 * Set the VM runtime error message
3358 *
3359 * @returns VBox status code.
3360 * @param pDevIns Device instance.
3361 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3362 * @param pszErrorId Error ID string.
3363 * @param pszFormat Error message format string.
3364 * @param va Error message arguments.
3365 */
3366 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3367
3368 /**
3369 * Set parameters for pending MMIO patch operation
3370 *
3371 * @returns VBox status code.
3372 * @param pDevIns Device instance.
3373 * @param GCPhys MMIO physical address
3374 * @param pCachedData GC pointer to cached data
3375 */
3376 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3377
3378 /**
3379 * Gets the VM handle. Restricted API.
3380 *
3381 * @returns VM Handle.
3382 * @param pDevIns Device instance.
3383 */
3384 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3385
3386 /**
3387 * Gets the VMCPU handle. Restricted API.
3388 *
3389 * @returns VMCPU Handle.
3390 * @param pDevIns The device instance.
3391 */
3392 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3393
3394 /** Just a safety precaution. */
3395 uint32_t u32TheEnd;
3396} PDMDEVHLPRC;
3397/** Pointer PDM Device RC API. */
3398typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3399/** Pointer PDM Device RC API. */
3400typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3401
3402/** Current PDMDEVHLP version number. */
3403#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3404
3405
3406/**
3407 * PDM Device API - R0 Variant.
3408 */
3409typedef struct PDMDEVHLPR0
3410{
3411 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3412 uint32_t u32Version;
3413
3414 /**
3415 * Set the IRQ for a PCI device.
3416 *
3417 * @param pDevIns Device instance.
3418 * @param iIrq IRQ number to set.
3419 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3420 * @thread Any thread, but will involve the emulation thread.
3421 */
3422 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3423
3424 /**
3425 * Set ISA IRQ for a device.
3426 *
3427 * @param pDevIns Device instance.
3428 * @param iIrq IRQ number to set.
3429 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3430 * @thread Any thread, but will involve the emulation thread.
3431 */
3432 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3433
3434 /**
3435 * Read physical memory.
3436 *
3437 * @returns VINF_SUCCESS (for now).
3438 * @param pDevIns Device instance.
3439 * @param GCPhys Physical address start reading from.
3440 * @param pvBuf Where to put the read bits.
3441 * @param cbRead How many bytes to read.
3442 */
3443 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3444
3445 /**
3446 * Write to physical memory.
3447 *
3448 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3449 * @param pDevIns Device instance.
3450 * @param GCPhys Physical address to write to.
3451 * @param pvBuf What to write.
3452 * @param cbWrite How many bytes to write.
3453 */
3454 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3455
3456 /**
3457 * Checks if the Gate A20 is enabled or not.
3458 *
3459 * @returns true if A20 is enabled.
3460 * @returns false if A20 is disabled.
3461 * @param pDevIns Device instance.
3462 * @thread The emulation thread.
3463 */
3464 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3465
3466 /**
3467 * Gets the VM state.
3468 *
3469 * @returns VM state.
3470 * @param pDevIns The device instance.
3471 * @thread Any thread (just keep in mind that it's volatile info).
3472 */
3473 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3474
3475 /**
3476 * Set the VM error message
3477 *
3478 * @returns rc.
3479 * @param pDrvIns Driver instance.
3480 * @param rc VBox status code.
3481 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3482 * @param pszFormat Error message format string.
3483 * @param ... Error message arguments.
3484 */
3485 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3486
3487 /**
3488 * Set the VM error message
3489 *
3490 * @returns rc.
3491 * @param pDrvIns Driver instance.
3492 * @param rc VBox status code.
3493 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3494 * @param pszFormat Error message format string.
3495 * @param va Error message arguments.
3496 */
3497 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3498
3499 /**
3500 * Set the VM runtime error message
3501 *
3502 * @returns VBox status code.
3503 * @param pDevIns Device instance.
3504 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3505 * @param pszErrorId Error ID string.
3506 * @param pszFormat Error message format string.
3507 * @param ... Error message arguments.
3508 */
3509 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3510
3511 /**
3512 * Set the VM runtime error message
3513 *
3514 * @returns VBox status code.
3515 * @param pDevIns Device instance.
3516 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3517 * @param pszErrorId Error ID string.
3518 * @param pszFormat Error message format string.
3519 * @param va Error message arguments.
3520 */
3521 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3522
3523 /**
3524 * Set parameters for pending MMIO patch operation
3525 *
3526 * @returns rc.
3527 * @param pDevIns Device instance.
3528 * @param GCPhys MMIO physical address
3529 * @param pCachedData GC pointer to cached data
3530 */
3531 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3532
3533 /**
3534 * Gets the VM handle. Restricted API.
3535 *
3536 * @returns VM Handle.
3537 * @param pDevIns Device instance.
3538 */
3539 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3540
3541 /**
3542 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3543 *
3544 * @returns true = yes, false = no
3545 * @param pDevIns Device instance.
3546 */
3547 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3548
3549 /**
3550 * Gets the VMCPU handle. Restricted API.
3551 *
3552 * @returns VMCPU Handle.
3553 * @param pDevIns The device instance.
3554 */
3555 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3556
3557 /** Just a safety precaution. */
3558 uint32_t u32TheEnd;
3559} PDMDEVHLPR0;
3560/** Pointer PDM Device R0 API. */
3561typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3562/** Pointer PDM Device GC API. */
3563typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3564
3565/** Current PDMDEVHLP version number. */
3566#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3567
3568
3569
3570/**
3571 * PDM Device Instance.
3572 */
3573typedef struct PDMDEVINS
3574{
3575 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3576 uint32_t u32Version;
3577 /** Device instance number. */
3578 uint32_t iInstance;
3579
3580 /** Pointer the GC PDM Device API. */
3581 PCPDMDEVHLPRC pHlpRC;
3582 /** Pointer to device instance data. */
3583 RTRCPTR pvInstanceDataRC;
3584 /** The critical section for the device, see pCritSectR3.
3585 * This is automatically resolved by PDM when pCritSectR3 is set by the
3586 * constructor. */
3587 RCPTRTYPE(PPDMCRITSECT) pCritSectRC;
3588 /** Alignment padding. */
3589 RTRCPTR pAlignmentRC;
3590
3591 /** Pointer the R0 PDM Device API. */
3592 PCPDMDEVHLPR0 pHlpR0;
3593 /** Pointer to device instance data (R0). */
3594 RTR0PTR pvInstanceDataR0;
3595 /** The critical section for the device, see pCritSectR3.
3596 * This is automatically resolved by PDM when pCritSectR3 is set by the
3597 * constructor. */
3598 R0PTRTYPE(PPDMCRITSECT) pCritSectR0;
3599
3600 /** Pointer the HC PDM Device API. */
3601 PCPDMDEVHLPR3 pHlpR3;
3602 /** Pointer to device instance data. */
3603 RTR3PTR pvInstanceDataR3;
3604 /** The critical section for the device. (Optional)
3605 *
3606 * The device constructor initializes this if it has a critical section for
3607 * the device and desires it to be taken automatically by MMIO, I/O port
3608 * and timer callbacks to the device. The advantages using this locking
3609 * approach is both less code and avoiding the global IOM lock.
3610 *
3611 * @remarks Will not yet be taken by SSM.
3612 */
3613 R3PTRTYPE(PPDMCRITSECT) pCritSectR3;
3614
3615 /** Pointer to device registration structure. */
3616 R3PTRTYPE(PCPDMDEVREG) pReg;
3617 /** Configuration handle. */
3618 R3PTRTYPE(PCFGMNODE) pCfg;
3619
3620 /** The base interface of the device.
3621 *
3622 * The device constructor initializes this if it has any
3623 * device level interfaces to export. To obtain this interface
3624 * call PDMR3QueryDevice(). */
3625 PDMIBASE IBase;
3626 /** Align the internal data more naturally. */
3627 RTR3PTR R3PtrPadding;
3628
3629 /** Internal data. */
3630 union
3631 {
3632#ifdef PDMDEVINSINT_DECLARED
3633 PDMDEVINSINT s;
3634#endif
3635 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3636 } Internal;
3637
3638 /** Device instance data. The size of this area is defined
3639 * in the PDMDEVREG::cbInstanceData field. */
3640 char achInstanceData[8];
3641} PDMDEVINS;
3642
3643/** Current PDMDEVINS version number. */
3644#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3645
3646/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3647#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3648
3649/**
3650 * Checks the structure versions of the device instance and device helpers,
3651 * returning if they are incompatible.
3652 *
3653 * This is for use in the constructor.
3654 *
3655 * @param pDevIns The device instance pointer.
3656 */
3657#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3658 do \
3659 { \
3660 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3661 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3662 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3663 VERR_VERSION_MISMATCH); \
3664 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3665 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3666 VERR_VERSION_MISMATCH); \
3667 } while (0)
3668
3669/**
3670 * Quietly checks the structure versions of the device instance and device
3671 * helpers, returning if they are incompatible.
3672 *
3673 * This is for use in the destructor.
3674 *
3675 * @param pDevIns The device instance pointer.
3676 */
3677#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3678 do \
3679 { \
3680 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3681 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3682 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3683 return VERR_VERSION_MISMATCH; \
3684 } while (0)
3685
3686/**
3687 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
3688 * constructor - returns on failure.
3689 *
3690 * This should be invoked after having initialized the instance data
3691 * sufficiently for the correct operation of the destructor. The destructor is
3692 * always called!
3693 *
3694 * @param pDevIns Pointer to the PDM device instance.
3695 * @param pszValidValues Patterns describing the valid value names. See
3696 * RTStrSimplePatternMultiMatch for details on the
3697 * pattern syntax.
3698 * @param pszValidNodes Patterns describing the valid node (key) names.
3699 * Pass empty string if no valid nodess.
3700 */
3701#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
3702 do \
3703 { \
3704 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
3705 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
3706 if (RT_FAILURE(rcValCfg)) \
3707 return rcValCfg; \
3708 } while (0)
3709
3710/** @def PDMDEV_ASSERT_EMT
3711 * Assert that the current thread is the emulation thread.
3712 */
3713#ifdef VBOX_STRICT
3714# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3715#else
3716# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3717#endif
3718
3719/** @def PDMDEV_ASSERT_OTHER
3720 * Assert that the current thread is NOT the emulation thread.
3721 */
3722#ifdef VBOX_STRICT
3723# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3724#else
3725# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3726#endif
3727
3728/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3729 * Assert that the current thread is owner of the VM lock.
3730 */
3731#ifdef VBOX_STRICT
3732# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3733#else
3734# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3735#endif
3736
3737/** @def PDMDEV_SET_ERROR
3738 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3739 */
3740#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3741 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3742
3743/** @def PDMDEV_SET_RUNTIME_ERROR
3744 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3745 */
3746#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3747 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3748
3749/** @def PDMDEVINS_2_RCPTR
3750 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3751 */
3752#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3753
3754/** @def PDMDEVINS_2_R3PTR
3755 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3756 */
3757#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3758
3759/** @def PDMDEVINS_2_R0PTR
3760 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3761 */
3762#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3763
3764
3765#ifdef IN_RING3
3766
3767/**
3768 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3769 */
3770DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3771 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3772 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3773{
3774 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3775}
3776
3777/**
3778 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3779 */
3780DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3781 const char *pszOut, const char *pszIn, const char *pszOutStr,
3782 const char *pszInStr, const char *pszDesc)
3783{
3784 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3785}
3786
3787/**
3788 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3789 */
3790DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3791 const char *pszOut, const char *pszIn, const char *pszOutStr,
3792 const char *pszInStr, const char *pszDesc)
3793{
3794 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3795}
3796
3797/**
3798 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3799 */
3800DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3801{
3802 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3803}
3804
3805/**
3806 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3807 */
3808DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3809 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3810 const char *pszDesc)
3811{
3812 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3813}
3814
3815/**
3816 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3817 */
3818DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3819 const char *pszWrite, const char *pszRead, const char *pszFill)
3820{
3821 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3822}
3823
3824/**
3825 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3826 */
3827DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3828 const char *pszWrite, const char *pszRead, const char *pszFill)
3829{
3830 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3831}
3832
3833/**
3834 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3835 */
3836DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3837{
3838 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3839}
3840
3841/**
3842 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3843 */
3844DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3845{
3846 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3847}
3848
3849/**
3850 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3851 */
3852DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3853{
3854 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3855}
3856
3857/**
3858 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3859 */
3860DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3861{
3862 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3863}
3864
3865/**
3866 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3867 */
3868DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3869{
3870 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3871}
3872
3873/**
3874 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3875 */
3876DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3877 const char *pszDesc, PRTRCPTR pRCPtr)
3878{
3879 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3880}
3881
3882/**
3883 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3884 */
3885DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3886 const char *pszDesc, PRTR0PTR pR0Ptr)
3887{
3888 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3889}
3890
3891/**
3892 * @copydoc PDMDEVHLPR3::pfnROMRegister
3893 */
3894DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3895{
3896 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3897}
3898
3899/**
3900 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3901 */
3902DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3903{
3904 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3905}
3906
3907/**
3908 * Register a save state data unit.
3909 *
3910 * @returns VBox status.
3911 * @param pDevIns The device instance.
3912 * @param uVersion Data layout version number.
3913 * @param cbGuess The approximate amount of data in the unit.
3914 * Only for progress indicators.
3915 * @param pfnSaveExec Execute save callback, optional.
3916 * @param pfnLoadExec Execute load callback, optional.
3917 */
3918DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3919 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3920{
3921 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3922 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3923 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3924 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3925}
3926
3927/**
3928 * Register a save state data unit with a live save callback as well.
3929 *
3930 * @returns VBox status.
3931 * @param pDevIns The device instance.
3932 * @param uVersion Data layout version number.
3933 * @param cbGuess The approximate amount of data in the unit.
3934 * Only for progress indicators.
3935 * @param pfnLiveExec Execute live callback, optional.
3936 * @param pfnSaveExec Execute save callback, optional.
3937 * @param pfnLoadExec Execute load callback, optional.
3938 */
3939DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3940 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3941{
3942 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3943 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3944 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3945 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3946}
3947
3948/**
3949 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3950 */
3951DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3952 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3953 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3954 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3955{
3956 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3957 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3958 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3959 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3960}
3961
3962/**
3963 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3964 */
3965DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3966 const char *pszDesc, PPTMTIMERR3 ppTimer)
3967{
3968 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3969}
3970
3971/**
3972 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3973 */
3974DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3975{
3976 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3977}
3978
3979#endif /* IN_RING3 */
3980
3981/**
3982 * @copydoc PDMDEVHLPR3::pfnPhysRead
3983 */
3984DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3985{
3986 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3987}
3988
3989/**
3990 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3991 */
3992DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3993{
3994 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3995}
3996
3997#ifdef IN_RING3
3998
3999/**
4000 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4001 */
4002DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4003{
4004 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4005}
4006
4007/**
4008 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4009 */
4010DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4011{
4012 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4013}
4014
4015/**
4016 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4017 */
4018DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4019{
4020 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4021}
4022
4023/**
4024 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4025 */
4026DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4027{
4028 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4029}
4030
4031/**
4032 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4033 */
4034DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4035{
4036 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4037}
4038
4039/**
4040 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4041 */
4042DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4043{
4044 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4045}
4046
4047/**
4048 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4049 */
4050DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4051{
4052 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4053}
4054
4055/**
4056 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4057 */
4058DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4059{
4060 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4061}
4062
4063/**
4064 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4065 */
4066DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4067{
4068 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4069}
4070#endif /* IN_RING3 */
4071
4072/**
4073 * @copydoc PDMDEVHLPR3::pfnVMState
4074 */
4075DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4076{
4077 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4078}
4079
4080#ifdef IN_RING3
4081/**
4082 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4083 */
4084DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4085{
4086 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4087}
4088#endif /* IN_RING3 */
4089
4090/**
4091 * @copydoc PDMDEVHLPR3::pfnVMSetError
4092 */
4093DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4094{
4095 va_list va;
4096 va_start(va, pszFormat);
4097 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4098 va_end(va);
4099 return rc;
4100}
4101
4102/**
4103 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4104 */
4105DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4106{
4107 va_list va;
4108 int rc;
4109 va_start(va, pszFormat);
4110 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4111 va_end(va);
4112 return rc;
4113}
4114
4115/**
4116 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4117 *
4118 * @returns VBox status code which must be passed up to the VMM. This will be
4119 * VINF_SUCCESS in non-strict builds.
4120 * @param pDevIns The device instance.
4121 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4122 * @param pszFormat Message. (optional)
4123 * @param ... Message parameters.
4124 */
4125DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4126{
4127#ifdef VBOX_STRICT
4128# ifdef IN_RING3
4129 int rc;
4130 va_list args;
4131 va_start(args, pszFormat);
4132 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4133 va_end(args);
4134 return rc;
4135# else
4136 return VINF_EM_DBG_STOP;
4137# endif
4138#else
4139 NOREF(pDevIns);
4140 NOREF(pszFile);
4141 NOREF(iLine);
4142 NOREF(pszFunction);
4143 NOREF(pszFormat);
4144 return VINF_SUCCESS;
4145#endif
4146}
4147
4148#ifdef IN_RING3
4149
4150/**
4151 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4152 */
4153DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4154{
4155 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4156}
4157
4158/**
4159 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4160 */
4161DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4162{
4163 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4164}
4165
4166/**
4167 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4168 */
4169DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4170 const char *pszDesc, const char *pszName, ...)
4171{
4172 va_list va;
4173 va_start(va, pszName);
4174 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4175 va_end(va);
4176}
4177
4178/**
4179 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4180 */
4181DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4182{
4183 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4184}
4185
4186/**
4187 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4188 */
4189DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4190{
4191 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4192}
4193
4194/**
4195 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4196 */
4197DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4198{
4199 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4200}
4201
4202
4203/**
4204 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4205 */
4206DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4207 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4208{
4209 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4210}
4211
4212#endif /* IN_RING3 */
4213
4214/**
4215 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4216 */
4217DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4218{
4219 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4220}
4221
4222/**
4223 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4224 */
4225DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4226{
4227 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4228}
4229
4230/**
4231 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4232 */
4233DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4234{
4235 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4236}
4237
4238/**
4239 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4240 */
4241DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4242{
4243 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4244}
4245
4246#ifdef IN_RING3
4247
4248/**
4249 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4250 */
4251DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4252{
4253 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4254}
4255
4256/**
4257 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4258 */
4259DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4260 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4261{
4262 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4263}
4264
4265/**
4266 * Initializes a PDM critical section.
4267 *
4268 * The PDM critical sections are derived from the IPRT critical sections, but
4269 * works in RC and R0 as well.
4270 *
4271 * @returns VBox status code.
4272 * @param pDevIns The device instance.
4273 * @param pCritSect Pointer to the critical section.
4274 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4275 * @param pszNameFmt Format string for namging the critical section.
4276 * For statistics and lock validation.
4277 * @param ... Arguments for the format string.
4278 */
4279DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4280{
4281 int rc;
4282 va_list va;
4283 va_start(va, pszNameFmt);
4284 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4285 va_end(va);
4286 return rc;
4287}
4288
4289/**
4290 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4291 */
4292DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4293 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4294{
4295 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4296}
4297
4298/**
4299 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4300 */
4301DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4302{
4303 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4304}
4305
4306/**
4307 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4308 */
4309DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4310{
4311 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4312}
4313
4314/**
4315 * @copydoc PDMDEVHLPR3::pfnA20Set
4316 */
4317DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4318{
4319 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4320}
4321
4322/**
4323 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4324 */
4325DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4326{
4327 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4328}
4329
4330/**
4331 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4332 */
4333DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4334{
4335 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4336}
4337
4338/**
4339 * @copydoc PDMDEVHLPR3::pfnPICRegister
4340 */
4341DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4342{
4343 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4344}
4345
4346/**
4347 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4348 */
4349DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4350{
4351 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4352}
4353
4354/**
4355 * @copydoc PDMDEVHLPR3::pfn
4356 */
4357DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4358{
4359 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4360}
4361
4362/**
4363 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4364 */
4365DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4366{
4367 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4368}
4369
4370/**
4371 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4372 */
4373DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4374{
4375 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4376}
4377
4378/**
4379 * @copydoc PDMDEVHLPR3::pfnDMARegister
4380 */
4381DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4382{
4383 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4384}
4385
4386/**
4387 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4388 */
4389DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4390{
4391 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4392}
4393
4394/**
4395 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4396 */
4397DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4398{
4399 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4400}
4401
4402/**
4403 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4404 */
4405DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4406{
4407 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4408}
4409
4410/**
4411 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4412 */
4413DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4414{
4415 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4416}
4417
4418/**
4419 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4420 */
4421DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4422{
4423 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4424}
4425
4426/**
4427 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4428 */
4429DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4430{
4431 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4432}
4433
4434/**
4435 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4436 */
4437DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4438{
4439 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4440}
4441
4442/**
4443 * @copydoc PDMDEVHLP::pfnCallR0
4444 */
4445DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4446{
4447 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4448}
4449
4450#endif /* IN_RING3 */
4451
4452/**
4453 * @copydoc PDMDEVHLPR3::pfnGetVM
4454 */
4455DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4456{
4457 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4458}
4459
4460/**
4461 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4462 */
4463DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4464{
4465 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4466}
4467
4468#ifdef IN_RING3
4469
4470/**
4471 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4472 */
4473DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4474{
4475 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4476}
4477
4478/**
4479 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4480 */
4481DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4482{
4483 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4484}
4485
4486/**
4487 * @copydoc PDMDEVHLPR3::pfnVMReset
4488 */
4489DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4490{
4491 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4492}
4493
4494/**
4495 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4496 */
4497DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4498{
4499 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4500}
4501
4502/**
4503 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
4504 */
4505DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
4506{
4507 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
4508}
4509
4510/**
4511 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4512 */
4513DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4514{
4515 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4516}
4517
4518#endif /* IN_RING3 */
4519
4520/**
4521 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4522 */
4523DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4524{
4525 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4526}
4527
4528#ifdef IN_RING3
4529
4530/**
4531 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4532 */
4533DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4534{
4535 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4536}
4537
4538#endif /* IN_RING3 */
4539#ifdef IN_RING0
4540
4541/**
4542 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4543 */
4544DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4545{
4546 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4547}
4548
4549#endif /* IN_RING0 */
4550
4551
4552
4553
4554/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4555typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4556
4557/**
4558 * Callbacks for VBoxDeviceRegister().
4559 */
4560typedef struct PDMDEVREGCB
4561{
4562 /** Interface version.
4563 * This is set to PDM_DEVREG_CB_VERSION. */
4564 uint32_t u32Version;
4565
4566 /**
4567 * Registers a device with the current VM instance.
4568 *
4569 * @returns VBox status code.
4570 * @param pCallbacks Pointer to the callback table.
4571 * @param pReg Pointer to the device registration record.
4572 * This data must be permanent and readonly.
4573 */
4574 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4575} PDMDEVREGCB;
4576
4577/** Current version of the PDMDEVREGCB structure. */
4578#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4579
4580
4581/**
4582 * The VBoxDevicesRegister callback function.
4583 *
4584 * PDM will invoke this function after loading a device module and letting
4585 * the module decide which devices to register and how to handle conflicts.
4586 *
4587 * @returns VBox status code.
4588 * @param pCallbacks Pointer to the callback table.
4589 * @param u32Version VBox version number.
4590 */
4591typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4592
4593/** @} */
4594
4595RT_C_DECLS_END
4596
4597#endif
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