VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 26526

Last change on this file since 26526 was 26399, checked in by vboxsync, 15 years ago

pdmdev.h: Increase the major version when making incomaptible change (nit2 as it's all internal stuff anyways). Converted PDM_HPETREG_VERSION to PDM_VERSION_MAKE.

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File size: 163.9 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/pdmcommon.h>
39#include <VBox/iom.h>
40#include <VBox/tm.h>
41#include <VBox/ssm.h>
42#include <VBox/cfgm.h>
43#include <VBox/dbgf.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48RT_C_DECLS_BEGIN
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data. If the registration structure
60 * is needed, it can be accessed thru pDevIns->pReg.
61 * @param iInstance Instance number. Use this to figure out which registers
62 * and such to use. The instance number is also found in
63 * pDevIns->iInstance, but since it's likely to be
64 * freqently used PDM passes it as parameter.
65 * @param pCfg Configuration node handle for the driver. This is
66 * expected to be in high demand in the constructor and is
67 * therefore passed as an argument. When using it at other
68 * times, it can be found in pDrvIns->pCfg.
69 */
70typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
71/** Pointer to a FNPDMDEVCONSTRUCT() function. */
72typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
73
74/**
75 * Destruct a device instance.
76 *
77 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
78 * resources can be freed correctly.
79 *
80 * @returns VBox status.
81 * @param pDevIns The device instance data.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remark A relocation CANNOT fail.
102 */
103typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
104/** Pointer to a FNPDMDEVRELOCATE() function. */
105typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
106
107/**
108 * Device I/O Control interface.
109 *
110 * This is used by external components, such as the COM interface, to
111 * communicate with devices using a class wide interface or a device
112 * specific interface.
113 *
114 * @returns VBox status code.
115 * @param pDevIns Pointer to the device instance.
116 * @param uFunction Function to perform.
117 * @param pvIn Pointer to input data.
118 * @param cbIn Size of input data.
119 * @param pvOut Pointer to output data.
120 * @param cbOut Size of output data.
121 * @param pcbOut Where to store the actual size of the output data.
122 */
123typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
124 void *pvIn, RTUINT cbIn,
125 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
126/** Pointer to a FNPDMDEVIOCTL() function. */
127typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
128
129/**
130 * Power On notification.
131 *
132 * @returns VBox status.
133 * @param pDevIns The device instance data.
134 */
135typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
136/** Pointer to a FNPDMDEVPOWERON() function. */
137typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
138
139/**
140 * Reset notification.
141 *
142 * @returns VBox status.
143 * @param pDevIns The device instance data.
144 */
145typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
146/** Pointer to a FNPDMDEVRESET() function. */
147typedef FNPDMDEVRESET *PFNPDMDEVRESET;
148
149/**
150 * Suspend notification.
151 *
152 * @returns VBox status.
153 * @param pDevIns The device instance data.
154 * @thread EMT(0)
155 */
156typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVSUSPEND() function. */
158typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
159
160/**
161 * Resume notification.
162 *
163 * @returns VBox status.
164 * @param pDevIns The device instance data.
165 */
166typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
167/** Pointer to a FNPDMDEVRESUME() function. */
168typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
169
170/**
171 * Power Off notification.
172 *
173 * @param pDevIns The device instance data.
174 * @thread EMT(0)
175 */
176typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
177/** Pointer to a FNPDMDEVPOWEROFF() function. */
178typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
179
180/**
181 * Attach command.
182 *
183 * This is called to let the device attach to a driver for a specified LUN
184 * at runtime. This is not called during VM construction, the device
185 * constructor have to attach to all the available drivers.
186 *
187 * This is like plugging in the keyboard or mouse after turning on the PC.
188 *
189 * @returns VBox status code.
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
193 */
194typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
195/** Pointer to a FNPDMDEVATTACH() function. */
196typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
197
198/**
199 * Detach notification.
200 *
201 * This is called when a driver is detaching itself from a LUN of the device.
202 * The device should adjust it's state to reflect this.
203 *
204 * This is like unplugging the network cable to use it for the laptop or
205 * something while the PC is still running.
206 *
207 * @param pDevIns The device instance.
208 * @param iLUN The logical unit which is being detached.
209 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 */
223typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
224/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
225typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
226
227/**
228 * Init complete notification.
229 * This can be done to do communication with other devices and other
230 * initialization which requires everything to be in place.
231 *
232 * @returns VBOX status code.
233 * @param pDevIns The device instance.
234 */
235typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
236/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
237typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
238
239
240
241/**
242 * PDM Device Registration Structure.
243 *
244 * This structure is used when registering a device from VBoxInitDevices() in HC
245 * Ring-3. PDM will continue use till the VM is terminated.
246 */
247typedef struct PDMDEVREG
248{
249 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
250 uint32_t u32Version;
251 /** Device name. */
252 char szName[32];
253 /** Name of the raw-mode context module (no path).
254 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
255 char szRCMod[32];
256 /** Name of the ring-0 module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
258 char szR0Mod[32];
259 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
260 * remain unchanged from registration till VM destruction. */
261 const char *pszDescription;
262
263 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
264 uint32_t fFlags;
265 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
266 uint32_t fClass;
267 /** Maximum number of instances (per VM). */
268 uint32_t cMaxInstances;
269 /** Size of the instance data. */
270 uint32_t cbInstance;
271
272 /** Construct instance - required. */
273 PFNPDMDEVCONSTRUCT pfnConstruct;
274 /** Destruct instance - optional. */
275 PFNPDMDEVDESTRUCT pfnDestruct;
276 /** Relocation command - optional. */
277 PFNPDMDEVRELOCATE pfnRelocate;
278 /** I/O Control interface - optional. */
279 PFNPDMDEVIOCTL pfnIOCtl;
280 /** Power on notification - optional. */
281 PFNPDMDEVPOWERON pfnPowerOn;
282 /** Reset notification - optional. */
283 PFNPDMDEVRESET pfnReset;
284 /** Suspend notification - optional. */
285 PFNPDMDEVSUSPEND pfnSuspend;
286 /** Resume notification - optional. */
287 PFNPDMDEVRESUME pfnResume;
288 /** Attach command - optional. */
289 PFNPDMDEVATTACH pfnAttach;
290 /** Detach notification - optional. */
291 PFNPDMDEVDETACH pfnDetach;
292 /** Query a LUN base interface - optional. */
293 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
294 /** Init complete notification - optional. */
295 PFNPDMDEVINITCOMPLETE pfnInitComplete;
296 /** Power off notification - optional. */
297 PFNPDMDEVPOWEROFF pfnPowerOff;
298 /** @todo */
299 PFNRT pfnSoftReset;
300 /** Initialization safty marker. */
301 uint32_t u32VersionEnd;
302} PDMDEVREG;
303/** Pointer to a PDM Device Structure. */
304typedef PDMDEVREG *PPDMDEVREG;
305/** Const pointer to a PDM Device Structure. */
306typedef PDMDEVREG const *PCPDMDEVREG;
307
308/** Current DEVREG version number. */
309#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
310
311/** PDM Device Flags.
312 * @{ */
313/** This flag is used to indicate that the device has a RC component. */
314#define PDM_DEVREG_FLAGS_RC 0x00000001
315/** This flag is used to indicate that the device has a R0 component. */
316#define PDM_DEVREG_FLAGS_R0 0x00000002
317
318/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
319 * The bit count for the current host. */
320#if HC_ARCH_BITS == 32
321# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
322#elif HC_ARCH_BITS == 64
323# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
324#else
325# error Unsupported HC_ARCH_BITS value.
326#endif
327/** The host bit count mask. */
328#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
329
330/** The device support only 32-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
332/** The device support only 64-bit guests. */
333#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
334/** The device support both 32-bit & 64-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
336/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
337 * The guest bit count for the current compilation. */
338#if GC_ARCH_BITS == 32
339# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
340#elif GC_ARCH_BITS == 64
341# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
342#else
343# error Unsupported GC_ARCH_BITS value.
344#endif
345/** The guest bit count mask. */
346#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
347
348/** A convenience. */
349#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
350
351/** Indicates that the devices support PAE36 on a 32-bit guest. */
352#define PDM_DEVREG_FLAGS_PAE36 0x00001000
353
354/** Indicates that the device needs to be notified before the drivers when suspending. */
355#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
356
357/** Indicates that the device needs to be notified before the drivers when powering off. */
358#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
359/** @} */
360
361
362/** PDM Device Classes.
363 * The order is important, lower bit earlier instantiation.
364 * @{ */
365/** Architecture device. */
366#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
367/** Architecture BIOS device. */
368#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
369/** PCI bus brigde. */
370#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
371/** ISA bus brigde. */
372#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
373/** Input device (mouse, keyboard, joystick, HID, ...). */
374#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
375/** Interrupt controller (PIC). */
376#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
377/** Interval controoler (PIT). */
378#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
379/** RTC/CMOS. */
380#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
381/** DMA controller. */
382#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
383/** VMM Device. */
384#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
385/** Graphics device, like VGA. */
386#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
387/** Storage controller device. */
388#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
389/** Network interface controller. */
390#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
391/** Audio. */
392#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
393/** USB HIC. */
394#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
395/** ACPI. */
396#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
397/** Serial controller device. */
398#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
399/** Parallel controller device */
400#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
401/** Misc devices (always last). */
402#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
403/** @} */
404
405
406/** @name IRQ Level for use with the *SetIrq APIs.
407 * @{
408 */
409/** Assert the IRQ (can assume value 1). */
410#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
411/** Deassert the IRQ (can assume value 0). */
412#define PDM_IRQ_LEVEL_LOW 0
413/** flip-flop - assert and then deassert it again immediately. */
414#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
415/** @} */
416
417
418/**
419 * PCI Bus registration structure.
420 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
421 */
422typedef struct PDMPCIBUSREG
423{
424 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
425 uint32_t u32Version;
426
427 /**
428 * Registers the device with the default PCI bus.
429 *
430 * @returns VBox status code.
431 * @param pDevIns Device instance of the PCI Bus.
432 * @param pPciDev The PCI device structure.
433 * Any PCI enabled device must keep this in it's instance data!
434 * Fill in the PCI data config before registration, please.
435 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
436 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
437 * If negative, the pci bus device will assign one.
438 */
439 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
440
441 /**
442 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
443 *
444 * @returns VBox status code.
445 * @param pDevIns Device instance of the PCI Bus.
446 * @param pPciDev The PCI device structure.
447 * @param iRegion The region number.
448 * @param cbRegion Size of the region.
449 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
450 * @param pfnCallback Callback for doing the mapping.
451 */
452 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
453
454 /**
455 * Register PCI configuration space read/write callbacks.
456 *
457 * @param pDevIns Device instance of the PCI Bus.
458 * @param pPciDev The PCI device structure.
459 * @param pfnRead Pointer to the user defined PCI config read function.
460 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
461 * PCI config read function. This way, user can decide when (and if)
462 * to call default PCI config read function. Can be NULL.
463 * @param pfnWrite Pointer to the user defined PCI config write function.
464 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
465 * PCI config write function. This way, user can decide when (and if)
466 * to call default PCI config write function. Can be NULL.
467 * @thread EMT
468 */
469 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
470 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
471
472 /**
473 * Set the IRQ for a PCI device.
474 *
475 * @param pDevIns Device instance of the PCI Bus.
476 * @param pPciDev The PCI device structure.
477 * @param iIrq IRQ number to set.
478 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
479 */
480 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
481
482 /**
483 * Saves a state of the PCI device.
484 *
485 * @returns VBox status code.
486 * @param pDevIns Device instance of the PCI Bus.
487 * @param pPciDev Pointer to PCI device.
488 * @param pSSMHandle The handle to save the state to.
489 */
490 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
491
492 /**
493 * Loads a saved PCI device state.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev Pointer to PCI device.
498 * @param pSSMHandle The handle to the saved state.
499 */
500 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
501
502 /**
503 * Called to perform the job of the bios.
504 * This is only called for the first PCI Bus - it is expected to
505 * service all the PCI buses.
506 *
507 * @returns VBox status.
508 * @param pDevIns Device instance of the first bus.
509 */
510 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
511
512 /** The name of the SetIrq RC entry point. */
513 const char *pszSetIrqRC;
514
515 /** The name of the SetIrq R0 entry point. */
516 const char *pszSetIrqR0;
517
518} PDMPCIBUSREG;
519/** Pointer to a PCI bus registration structure. */
520typedef PDMPCIBUSREG *PPDMPCIBUSREG;
521
522/** Current PDMPCIBUSREG version number. */
523#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 1, 0)
524
525/**
526 * PCI Bus RC helpers.
527 */
528typedef struct PDMPCIHLPRC
529{
530 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
531 uint32_t u32Version;
532
533 /**
534 * Set an ISA IRQ.
535 *
536 * @param pDevIns PCI device instance.
537 * @param iIrq IRQ number to set.
538 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
539 * @thread EMT only.
540 */
541 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
542
543 /**
544 * Set an I/O-APIC IRQ.
545 *
546 * @param pDevIns PCI device instance.
547 * @param iIrq IRQ number to set.
548 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
549 * @thread EMT only.
550 */
551 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
552
553 /**
554 * Acquires the PDM lock.
555 *
556 * @returns VINF_SUCCESS on success.
557 * @returns rc if we failed to acquire the lock.
558 * @param pDevIns The PCI device instance.
559 * @param rc What to return if we fail to acquire the lock.
560 */
561 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
562
563 /**
564 * Releases the PDM lock.
565 *
566 * @param pDevIns The PCI device instance.
567 */
568 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
569
570 /** Just a safety precaution. */
571 uint32_t u32TheEnd;
572} PDMPCIHLPRC;
573/** Pointer to PCI helpers. */
574typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
575/** Pointer to const PCI helpers. */
576typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
577
578/** Current PDMPCIHLPR3 version number. */
579#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 1, 0)
580
581
582/**
583 * PCI Bus R0 helpers.
584 */
585typedef struct PDMPCIHLPR0
586{
587 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
588 uint32_t u32Version;
589
590 /**
591 * Set an ISA IRQ.
592 *
593 * @param pDevIns PCI device instance.
594 * @param iIrq IRQ number to set.
595 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
596 * @thread EMT only.
597 */
598 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
599
600 /**
601 * Set an I/O-APIC IRQ.
602 *
603 * @param pDevIns PCI device instance.
604 * @param iIrq IRQ number to set.
605 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
606 * @thread EMT only.
607 */
608 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
609
610 /**
611 * Acquires the PDM lock.
612 *
613 * @returns VINF_SUCCESS on success.
614 * @returns rc if we failed to acquire the lock.
615 * @param pDevIns The PCI device instance.
616 * @param rc What to return if we fail to acquire the lock.
617 */
618 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
619
620 /**
621 * Releases the PDM lock.
622 *
623 * @param pDevIns The PCI device instance.
624 */
625 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
626
627 /** Just a safety precaution. */
628 uint32_t u32TheEnd;
629} PDMPCIHLPR0;
630/** Pointer to PCI helpers. */
631typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
632/** Pointer to const PCI helpers. */
633typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
634
635/** Current PDMPCIHLPR0 version number. */
636#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 1, 0)
637
638/**
639 * PCI device helpers.
640 */
641typedef struct PDMPCIHLPR3
642{
643 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
644 uint32_t u32Version;
645
646 /**
647 * Set an ISA IRQ.
648 *
649 * @param pDevIns The PCI device instance.
650 * @param iIrq IRQ number to set.
651 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
652 * @thread EMT only.
653 */
654 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
655
656 /**
657 * Set an I/O-APIC IRQ.
658 *
659 * @param pDevIns The PCI device instance.
660 * @param iIrq IRQ number to set.
661 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
662 * @thread EMT only.
663 */
664 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
665
666 /**
667 * Checks if the given address is an MMIO2 base address or not.
668 *
669 * @returns true/false accordingly.
670 * @param pDevIns The PCI device instance.
671 * @param pOwner The owner of the memory, optional.
672 * @param GCPhys The address to check.
673 */
674 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
675
676 /**
677 * Gets the address of the RC PCI Bus helpers.
678 *
679 * This should be called at both construction and relocation time
680 * to obtain the correct address of the RC helpers.
681 *
682 * @returns RC pointer to the PCI Bus helpers.
683 * @param pDevIns Device instance of the PCI Bus.
684 * @thread EMT only.
685 */
686 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
687
688 /**
689 * Gets the address of the R0 PCI Bus helpers.
690 *
691 * This should be called at both construction and relocation time
692 * to obtain the correct address of the R0 helpers.
693 *
694 * @returns R0 pointer to the PCI Bus helpers.
695 * @param pDevIns Device instance of the PCI Bus.
696 * @thread EMT only.
697 */
698 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
699
700 /**
701 * Acquires the PDM lock.
702 *
703 * @returns VINF_SUCCESS on success.
704 * @returns Fatal error on failure.
705 * @param pDevIns The PCI device instance.
706 * @param rc Dummy for making the interface identical to the RC and R0 versions.
707 */
708 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
709
710 /**
711 * Releases the PDM lock.
712 *
713 * @param pDevIns The PCI device instance.
714 */
715 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
716
717 /** Just a safety precaution. */
718 uint32_t u32TheEnd;
719} PDMPCIHLPR3;
720/** Pointer to PCI helpers. */
721typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
722/** Pointer to const PCI helpers. */
723typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
724
725/** Current PDMPCIHLPR3 version number. */
726#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 1, 0)
727
728
729/**
730 * Programmable Interrupt Controller registration structure.
731 */
732typedef struct PDMPICREG
733{
734 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set the an IRQ.
739 *
740 * @param pDevIns Device instance of the PIC.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 */
744 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
745
746 /**
747 * Get a pending interrupt.
748 *
749 * @returns Pending interrupt number.
750 * @param pDevIns Device instance of the PIC.
751 */
752 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
753
754 /** The name of the RC SetIrq entry point. */
755 const char *pszSetIrqRC;
756 /** The name of the RC GetInterrupt entry point. */
757 const char *pszGetInterruptRC;
758
759 /** The name of the R0 SetIrq entry point. */
760 const char *pszSetIrqR0;
761 /** The name of the R0 GetInterrupt entry point. */
762 const char *pszGetInterruptR0;
763} PDMPICREG;
764/** Pointer to a PIC registration structure. */
765typedef PDMPICREG *PPDMPICREG;
766
767/** Current PDMPICREG version number. */
768#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
769
770/**
771 * PIC RC helpers.
772 */
773typedef struct PDMPICHLPRC
774{
775 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
776 uint32_t u32Version;
777
778 /**
779 * Set the interrupt force action flag.
780 *
781 * @param pDevIns Device instance of the PIC.
782 */
783 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
784
785 /**
786 * Clear the interrupt force action flag.
787 *
788 * @param pDevIns Device instance of the PIC.
789 */
790 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
791
792 /**
793 * Acquires the PDM lock.
794 *
795 * @returns VINF_SUCCESS on success.
796 * @returns rc if we failed to acquire the lock.
797 * @param pDevIns The PIC device instance.
798 * @param rc What to return if we fail to acquire the lock.
799 */
800 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
801
802 /**
803 * Releases the PDM lock.
804 *
805 * @param pDevIns The PIC device instance.
806 */
807 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
808
809 /** Just a safety precaution. */
810 uint32_t u32TheEnd;
811} PDMPICHLPRC;
812
813/** Pointer to PIC RC helpers. */
814typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
815/** Pointer to const PIC RC helpers. */
816typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
817
818/** Current PDMPICHLPRC version number. */
819#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
820
821
822/**
823 * PIC R0 helpers.
824 */
825typedef struct PDMPICHLPR0
826{
827 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
828 uint32_t u32Version;
829
830 /**
831 * Set the interrupt force action flag.
832 *
833 * @param pDevIns Device instance of the PIC.
834 */
835 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
836
837 /**
838 * Clear the interrupt force action flag.
839 *
840 * @param pDevIns Device instance of the PIC.
841 */
842 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
843
844 /**
845 * Acquires the PDM lock.
846 *
847 * @returns VINF_SUCCESS on success.
848 * @returns rc if we failed to acquire the lock.
849 * @param pDevIns The PIC device instance.
850 * @param rc What to return if we fail to acquire the lock.
851 */
852 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
853
854 /**
855 * Releases the PDM lock.
856 *
857 * @param pDevIns The PCI device instance.
858 */
859 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
860
861 /** Just a safety precaution. */
862 uint32_t u32TheEnd;
863} PDMPICHLPR0;
864
865/** Pointer to PIC R0 helpers. */
866typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
867/** Pointer to const PIC R0 helpers. */
868typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
869
870/** Current PDMPICHLPR0 version number. */
871#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
872
873/**
874 * PIC R3 helpers.
875 */
876typedef struct PDMPICHLPR3
877{
878 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
879 uint32_t u32Version;
880
881 /**
882 * Set the interrupt force action flag.
883 *
884 * @param pDevIns Device instance of the PIC.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
887
888 /**
889 * Clear the interrupt force action flag.
890 *
891 * @param pDevIns Device instance of the PIC.
892 */
893 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
894
895 /**
896 * Acquires the PDM lock.
897 *
898 * @returns VINF_SUCCESS on success.
899 * @returns Fatal error on failure.
900 * @param pDevIns The PIC device instance.
901 * @param rc Dummy for making the interface identical to the RC and R0 versions.
902 */
903 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
904
905 /**
906 * Releases the PDM lock.
907 *
908 * @param pDevIns The PIC device instance.
909 */
910 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
911
912 /**
913 * Gets the address of the RC PIC helpers.
914 *
915 * This should be called at both construction and relocation time
916 * to obtain the correct address of the RC helpers.
917 *
918 * @returns RC pointer to the PIC helpers.
919 * @param pDevIns Device instance of the PIC.
920 */
921 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
922
923 /**
924 * Gets the address of the R0 PIC helpers.
925 *
926 * This should be called at both construction and relocation time
927 * to obtain the correct address of the R0 helpers.
928 *
929 * @returns R0 pointer to the PIC helpers.
930 * @param pDevIns Device instance of the PIC.
931 */
932 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
933
934 /** Just a safety precaution. */
935 uint32_t u32TheEnd;
936} PDMPICHLPR3;
937
938/** Pointer to PIC R3 helpers. */
939typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
940/** Pointer to const PIC R3 helpers. */
941typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
942
943/** Current PDMPICHLPR3 version number. */
944#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
945
946
947
948/**
949 * Advanced Programmable Interrupt Controller registration structure.
950 */
951typedef struct PDMAPICREG
952{
953 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
954 uint32_t u32Version;
955
956 /**
957 * Get a pending interrupt.
958 *
959 * @returns Pending interrupt number.
960 * @param pDevIns Device instance of the APIC.
961 */
962 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
963
964 /**
965 * Check if the APIC has a pending interrupt/if a TPR change would active one
966 *
967 * @returns Pending interrupt yes/no
968 * @param pDevIns Device instance of the APIC.
969 */
970 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
971
972 /**
973 * Set the APIC base.
974 *
975 * @param pDevIns Device instance of the APIC.
976 * @param u64Base The new base.
977 */
978 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
979
980 /**
981 * Get the APIC base.
982 *
983 * @returns Current base.
984 * @param pDevIns Device instance of the APIC.
985 */
986 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
987
988 /**
989 * Set the TPR (task priority register).
990 *
991 * @param pDevIns Device instance of the APIC.
992 * @param idCpu VCPU id
993 * @param u8TPR The new TPR.
994 */
995 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
996
997 /**
998 * Get the TPR (task priority register).
999 *
1000 * @returns The current TPR.
1001 * @param pDevIns Device instance of the APIC.
1002 * @param idCpu VCPU id
1003 */
1004 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1005
1006 /**
1007 * Write MSR in APIC range.
1008 *
1009 * @returns VBox status code.
1010 * @param pDevIns Device instance of the APIC.
1011 * @param idCpu Target CPU.
1012 * @param u32Reg MSR to write.
1013 * @param u64Value Value to write.
1014 */
1015 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1016
1017 /**
1018 * Read MSR in APIC range.
1019 *
1020 * @returns VBox status code.
1021 * @param pDevIns Device instance of the APIC.
1022 * @param idCpu Target CPU.
1023 * @param u32Reg MSR to read.
1024 * @param pu64Value Value read.
1025 */
1026 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1027
1028 /**
1029 * Private interface between the IOAPIC and APIC.
1030 *
1031 * This is a low-level, APIC/IOAPIC implementation specific interface
1032 * which is registered with PDM only because it makes life so much
1033 * simpler right now (GC bits). This is a bad bad hack! The correct
1034 * way of doing this would involve some way of querying GC interfaces
1035 * and relocating them. Perhaps doing some kind of device init in GC...
1036 *
1037 * @returns status code.
1038 * @param pDevIns Device instance of the APIC.
1039 * @param u8Dest See APIC implementation.
1040 * @param u8DestMode See APIC implementation.
1041 * @param u8DeliveryMode See APIC implementation.
1042 * @param iVector See APIC implementation.
1043 * @param u8Polarity See APIC implementation.
1044 * @param u8TriggerMode See APIC implementation.
1045 */
1046 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1047 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1048
1049 /**
1050 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1051 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1052 *
1053 * @returns status code.
1054 * @param pDevIns Device instance of the APIC.
1055 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1056 */
1057 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1058
1059 /** The name of the RC GetInterrupt entry point. */
1060 const char *pszGetInterruptRC;
1061 /** The name of the RC HasPendingIrq entry point. */
1062 const char *pszHasPendingIrqRC;
1063 /** The name of the RC SetBase entry point. */
1064 const char *pszSetBaseRC;
1065 /** The name of the RC GetBase entry point. */
1066 const char *pszGetBaseRC;
1067 /** The name of the RC SetTPR entry point. */
1068 const char *pszSetTPRRC;
1069 /** The name of the RC GetTPR entry point. */
1070 const char *pszGetTPRRC;
1071 /** The name of the RC WriteMSR entry point. */
1072 const char *pszWriteMSRRC;
1073 /** The name of the RC ReadMSR entry point. */
1074 const char *pszReadMSRRC;
1075 /** The name of the RC BusDeliver entry point. */
1076 const char *pszBusDeliverRC;
1077 /** The name of the RC LocalInterrupt entry point. */
1078 const char *pszLocalInterruptRC;
1079
1080 /** The name of the R0 GetInterrupt entry point. */
1081 const char *pszGetInterruptR0;
1082 /** The name of the R0 HasPendingIrq entry point. */
1083 const char *pszHasPendingIrqR0;
1084 /** The name of the R0 SetBase entry point. */
1085 const char *pszSetBaseR0;
1086 /** The name of the R0 GetBase entry point. */
1087 const char *pszGetBaseR0;
1088 /** The name of the R0 SetTPR entry point. */
1089 const char *pszSetTPRR0;
1090 /** The name of the R0 GetTPR entry point. */
1091 const char *pszGetTPRR0;
1092 /** The name of the R0 WriteMSR entry point. */
1093 const char *pszWriteMSRR0;
1094 /** The name of the R0 ReadMSR entry point. */
1095 const char *pszReadMSRR0;
1096 /** The name of the R0 BusDeliver entry point. */
1097 const char *pszBusDeliverR0;
1098 /** The name of the R0 LocalInterrupt entry point. */
1099 const char *pszLocalInterruptR0;
1100
1101} PDMAPICREG;
1102/** Pointer to an APIC registration structure. */
1103typedef PDMAPICREG *PPDMAPICREG;
1104
1105/** Current PDMAPICREG version number. */
1106#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1107
1108
1109/**
1110 * APIC version argument for pfnChangeFeature.
1111 */
1112typedef enum PDMAPICVERSION
1113{
1114 /** Invalid 0 entry. */
1115 PDMAPICVERSION_INVALID = 0,
1116 /** No APIC. */
1117 PDMAPICVERSION_NONE,
1118 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1119 PDMAPICVERSION_APIC,
1120 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1121 PDMAPICVERSION_X2APIC,
1122 /** The usual 32-bit paranoia. */
1123 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1124} PDMAPICVERSION;
1125
1126/**
1127 * APIC irq argument for SetInterruptFF.
1128 */
1129typedef enum PDMAPICIRQ
1130{
1131 /** Invalid 0 entry. */
1132 PDMAPICIRQ_INVALID = 0,
1133 /** Normal hardware interrupt. */
1134 PDMAPICIRQ_HARDWARE,
1135 /** NMI. */
1136 PDMAPICIRQ_NMI,
1137 /** SMI. */
1138 PDMAPICIRQ_SMI,
1139 /** ExtINT (HW interrupt via PIC). */
1140 PDMAPICIRQ_EXTINT,
1141 /** The usual 32-bit paranoia. */
1142 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1143} PDMAPICIRQ;
1144
1145
1146/**
1147 * APIC RC helpers.
1148 */
1149typedef struct PDMAPICHLPRC
1150{
1151 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1152 uint32_t u32Version;
1153
1154 /**
1155 * Set the interrupt force action flag.
1156 *
1157 * @param pDevIns Device instance of the APIC.
1158 * @param enmType IRQ type.
1159 * @param idCpu Virtual CPU to set flag upon.
1160 */
1161 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1162
1163 /**
1164 * Clear the interrupt force action flag.
1165 *
1166 * @param pDevIns Device instance of the APIC.
1167 * @param enmType IRQ type.
1168 * @param idCpu Virtual CPU to clear flag upon.
1169 */
1170 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1171
1172 /**
1173 * Modifies APIC-related bits in the CPUID feature mask.
1174 *
1175 * @param pDevIns Device instance of the APIC.
1176 * @param enmVersion Supported APIC version.
1177 */
1178 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1179
1180 /**
1181 * Acquires the PDM lock.
1182 *
1183 * @returns VINF_SUCCESS on success.
1184 * @returns rc if we failed to acquire the lock.
1185 * @param pDevIns The APIC device instance.
1186 * @param rc What to return if we fail to acquire the lock.
1187 */
1188 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1189
1190 /**
1191 * Releases the PDM lock.
1192 *
1193 * @param pDevIns The APIC device instance.
1194 */
1195 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1196
1197 /**
1198 * Get the virtual CPU id corresponding to the current EMT.
1199 *
1200 * @param pDevIns The APIC device instance.
1201 */
1202 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1203
1204 /** Just a safety precaution. */
1205 uint32_t u32TheEnd;
1206} PDMAPICHLPRC;
1207/** Pointer to APIC GC helpers. */
1208typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1209/** Pointer to const APIC helpers. */
1210typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1211
1212/** Current PDMAPICHLPRC version number. */
1213#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1214
1215
1216/**
1217 * APIC R0 helpers.
1218 */
1219typedef struct PDMAPICHLPR0
1220{
1221 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1222 uint32_t u32Version;
1223
1224 /**
1225 * Set the interrupt force action flag.
1226 *
1227 * @param pDevIns Device instance of the APIC.
1228 * @param enmType IRQ type.
1229 * @param idCpu Virtual CPU to set flag upon.
1230 */
1231 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1232
1233 /**
1234 * Clear the interrupt force action flag.
1235 *
1236 * @param pDevIns Device instance of the APIC.
1237 * @param enmType IRQ type.
1238 * @param idCpu Virtual CPU to clear flag upon.
1239 */
1240 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1241
1242 /**
1243 * Modifies APIC-related bits in the CPUID feature mask.
1244 *
1245 * @param pDevIns Device instance of the APIC.
1246 * @param enmVersion Supported APIC version.
1247 */
1248 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1249
1250 /**
1251 * Acquires the PDM lock.
1252 *
1253 * @returns VINF_SUCCESS on success.
1254 * @returns rc if we failed to acquire the lock.
1255 * @param pDevIns The APIC device instance.
1256 * @param rc What to return if we fail to acquire the lock.
1257 */
1258 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1259
1260 /**
1261 * Releases the PDM lock.
1262 *
1263 * @param pDevIns The APIC device instance.
1264 */
1265 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1266
1267 /**
1268 * Get the virtual CPU id corresponding to the current EMT.
1269 *
1270 * @param pDevIns The APIC device instance.
1271 */
1272 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1273
1274 /** Just a safety precaution. */
1275 uint32_t u32TheEnd;
1276} PDMAPICHLPR0;
1277/** Pointer to APIC GC helpers. */
1278typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1279/** Pointer to const APIC helpers. */
1280typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1281
1282/** Current PDMAPICHLPR0 version number. */
1283#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1284
1285/**
1286 * APIC R3 helpers.
1287 */
1288typedef struct PDMAPICHLPR3
1289{
1290 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1291 uint32_t u32Version;
1292
1293 /**
1294 * Set the interrupt force action flag.
1295 *
1296 * @param pDevIns Device instance of the APIC.
1297 * @param enmType IRQ type.
1298 * @param idCpu Virtual CPU to set flag upon.
1299 */
1300 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1301
1302 /**
1303 * Clear the interrupt force action flag.
1304 *
1305 * @param pDevIns Device instance of the APIC.
1306 * @param enmType IRQ type.
1307 * @param idCpu Virtual CPU to clear flag upon.
1308 */
1309 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1310
1311 /**
1312 * Modifies APIC-related bits in the CPUID feature mask.
1313 *
1314 * @param pDevIns Device instance of the APIC.
1315 * @param enmVersion Supported APIC version.
1316 */
1317 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1318
1319 /**
1320 * Get the virtual CPU id corresponding to the current EMT.
1321 *
1322 * @param pDevIns The APIC device instance.
1323 */
1324 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1325
1326 /**
1327 * Sends SIPI to given virtual CPU.
1328 *
1329 * @param pDevIns The APIC device instance.
1330 * @param idCpu Virtual CPU to perform SIPI on
1331 * @param iVector SIPI vector
1332 */
1333 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1334
1335 /**
1336 * Sends init IPI to given virtual CPU, should result in reset and
1337 * halting till SIPI.
1338 *
1339 * @param pDevIns The APIC device instance.
1340 * @param idCpu Virtual CPU to perform SIPI on
1341 */
1342 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1343
1344 /**
1345 * Gets the address of the RC APIC helpers.
1346 *
1347 * This should be called at both construction and relocation time
1348 * to obtain the correct address of the RC helpers.
1349 *
1350 * @returns GC pointer to the APIC helpers.
1351 * @param pDevIns Device instance of the APIC.
1352 */
1353 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1354
1355 /**
1356 * Gets the address of the R0 APIC helpers.
1357 *
1358 * This should be called at both construction and relocation time
1359 * to obtain the correct address of the R0 helpers.
1360 *
1361 * @returns R0 pointer to the APIC helpers.
1362 * @param pDevIns Device instance of the APIC.
1363 */
1364 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1365
1366 /**
1367 * Get the critical section used to synchronize the PICs, PCI and stuff.
1368 *
1369 * @returns Ring-3 pointer to the critical section.
1370 * @param pDevIns The APIC device instance.
1371 */
1372 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1373
1374 /**
1375 * Get the critical section used to synchronize the PICs, PCI and stuff.
1376 *
1377 * @returns Raw-mode context pointer to the critical section.
1378 * @param pDevIns The APIC device instance.
1379 */
1380 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1381
1382 /**
1383 * Get the critical section used to synchronize the PICs, PCI and stuff.
1384 *
1385 * @returns Ring-0 pointer to the critical section.
1386 * @param pDevIns The APIC device instance.
1387 */
1388 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1389
1390 /** Just a safety precaution. */
1391 uint32_t u32TheEnd;
1392} PDMAPICHLPR3;
1393/** Pointer to APIC helpers. */
1394typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1395/** Pointer to const APIC helpers. */
1396typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1397
1398/** Current PDMAPICHLP version number. */
1399#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1400
1401
1402/**
1403 * I/O APIC registration structure.
1404 */
1405typedef struct PDMIOAPICREG
1406{
1407 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1408 uint32_t u32Version;
1409
1410 /**
1411 * Set the an IRQ.
1412 *
1413 * @param pDevIns Device instance of the I/O APIC.
1414 * @param iIrq IRQ number to set.
1415 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1416 */
1417 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1418
1419 /** The name of the GC SetIrq entry point. */
1420 const char *pszSetIrqRC;
1421
1422 /** The name of the R0 SetIrq entry point. */
1423 const char *pszSetIrqR0;
1424} PDMIOAPICREG;
1425/** Pointer to an APIC registration structure. */
1426typedef PDMIOAPICREG *PPDMIOAPICREG;
1427
1428/** Current PDMAPICREG version number. */
1429#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
1430
1431
1432/**
1433 * IOAPIC RC helpers.
1434 */
1435typedef struct PDMIOAPICHLPRC
1436{
1437 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1438 uint32_t u32Version;
1439
1440 /**
1441 * Private interface between the IOAPIC and APIC.
1442 *
1443 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1444 *
1445 * @returns status code.
1446 * @param pDevIns Device instance of the IOAPIC.
1447 * @param u8Dest See APIC implementation.
1448 * @param u8DestMode See APIC implementation.
1449 * @param u8DeliveryMode See APIC implementation.
1450 * @param iVector See APIC implementation.
1451 * @param u8Polarity See APIC implementation.
1452 * @param u8TriggerMode See APIC implementation.
1453 */
1454 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1456
1457 /**
1458 * Acquires the PDM lock.
1459 *
1460 * @returns VINF_SUCCESS on success.
1461 * @returns rc if we failed to acquire the lock.
1462 * @param pDevIns The IOAPIC device instance.
1463 * @param rc What to return if we fail to acquire the lock.
1464 */
1465 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1466
1467 /**
1468 * Releases the PDM lock.
1469 *
1470 * @param pDevIns The IOAPIC device instance.
1471 */
1472 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1473
1474 /** Just a safety precaution. */
1475 uint32_t u32TheEnd;
1476} PDMIOAPICHLPRC;
1477/** Pointer to IOAPIC RC helpers. */
1478typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1479/** Pointer to const IOAPIC helpers. */
1480typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1481
1482/** Current PDMIOAPICHLPRC version number. */
1483#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1484
1485
1486/**
1487 * IOAPIC R0 helpers.
1488 */
1489typedef struct PDMIOAPICHLPR0
1490{
1491 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1492 uint32_t u32Version;
1493
1494 /**
1495 * Private interface between the IOAPIC and APIC.
1496 *
1497 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1498 *
1499 * @returns status code.
1500 * @param pDevIns Device instance of the IOAPIC.
1501 * @param u8Dest See APIC implementation.
1502 * @param u8DestMode See APIC implementation.
1503 * @param u8DeliveryMode See APIC implementation.
1504 * @param iVector See APIC implementation.
1505 * @param u8Polarity See APIC implementation.
1506 * @param u8TriggerMode See APIC implementation.
1507 */
1508 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1509 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1510
1511 /**
1512 * Acquires the PDM lock.
1513 *
1514 * @returns VINF_SUCCESS on success.
1515 * @returns rc if we failed to acquire the lock.
1516 * @param pDevIns The IOAPIC device instance.
1517 * @param rc What to return if we fail to acquire the lock.
1518 */
1519 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1520
1521 /**
1522 * Releases the PDM lock.
1523 *
1524 * @param pDevIns The IOAPIC device instance.
1525 */
1526 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1527
1528 /** Just a safety precaution. */
1529 uint32_t u32TheEnd;
1530} PDMIOAPICHLPR0;
1531/** Pointer to IOAPIC R0 helpers. */
1532typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1533/** Pointer to const IOAPIC helpers. */
1534typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1535
1536/** Current PDMIOAPICHLPR0 version number. */
1537#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1538
1539/**
1540 * IOAPIC R3 helpers.
1541 */
1542typedef struct PDMIOAPICHLPR3
1543{
1544 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1545 uint32_t u32Version;
1546
1547 /**
1548 * Private interface between the IOAPIC and APIC.
1549 *
1550 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1551 *
1552 * @returns status code
1553 * @param pDevIns Device instance of the IOAPIC.
1554 * @param u8Dest See APIC implementation.
1555 * @param u8DestMode See APIC implementation.
1556 * @param u8DeliveryMode See APIC implementation.
1557 * @param iVector See APIC implementation.
1558 * @param u8Polarity See APIC implementation.
1559 * @param u8TriggerMode See APIC implementation.
1560 */
1561 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1562 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1563
1564 /**
1565 * Acquires the PDM lock.
1566 *
1567 * @returns VINF_SUCCESS on success.
1568 * @returns Fatal error on failure.
1569 * @param pDevIns The IOAPIC device instance.
1570 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1571 */
1572 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1573
1574 /**
1575 * Releases the PDM lock.
1576 *
1577 * @param pDevIns The IOAPIC device instance.
1578 */
1579 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1580
1581 /**
1582 * Gets the address of the RC IOAPIC helpers.
1583 *
1584 * This should be called at both construction and relocation time
1585 * to obtain the correct address of the RC helpers.
1586 *
1587 * @returns RC pointer to the IOAPIC helpers.
1588 * @param pDevIns Device instance of the IOAPIC.
1589 */
1590 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1591
1592 /**
1593 * Gets the address of the R0 IOAPIC helpers.
1594 *
1595 * This should be called at both construction and relocation time
1596 * to obtain the correct address of the R0 helpers.
1597 *
1598 * @returns R0 pointer to the IOAPIC helpers.
1599 * @param pDevIns Device instance of the IOAPIC.
1600 */
1601 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1602
1603 /** Just a safety precaution. */
1604 uint32_t u32TheEnd;
1605} PDMIOAPICHLPR3;
1606/** Pointer to IOAPIC R3 helpers. */
1607typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1608/** Pointer to const IOAPIC helpers. */
1609typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1610
1611/** Current PDMIOAPICHLPR3 version number. */
1612#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1613
1614
1615/**
1616 * HPET registration structure.
1617 */
1618typedef struct PDMHPETREG
1619{
1620 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1621 uint32_t u32Version;
1622
1623} PDMHPETREG;
1624/** Pointer to an HPET registration structure. */
1625typedef PDMHPETREG *PPDMHPETREG;
1626
1627/** Current PDMHPETREG version number. */
1628#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1629
1630/**
1631 * HPET RC helpers.
1632 *
1633 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1634 * at some later point.
1635 */
1636typedef struct PDMHPETHLPRC
1637{
1638 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1639 uint32_t u32Version;
1640
1641 /** Just a safety precaution. */
1642 uint32_t u32TheEnd;
1643} PDMHPETHLPRC;
1644
1645/** Pointer to HPET RC helpers. */
1646typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1647/** Pointer to const HPET RC helpers. */
1648typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1649
1650/** Current PDMHPETHLPRC version number. */
1651#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1652
1653
1654/**
1655 * HPET R0 helpers.
1656 *
1657 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1658 * at some later point.
1659 */
1660typedef struct PDMHPETHLPR0
1661{
1662 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1663 uint32_t u32Version;
1664
1665 /** Just a safety precaution. */
1666 uint32_t u32TheEnd;
1667} PDMHPETHLPR0;
1668
1669/** Pointer to HPET R0 helpers. */
1670typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1671/** Pointer to const HPET R0 helpers. */
1672typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1673
1674/** Current PDMHPETHLPR0 version number. */
1675#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1676
1677/**
1678 * HPET R3 helpers.
1679 */
1680typedef struct PDMHPETHLPR3
1681{
1682 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1683 uint32_t u32Version;
1684
1685 /**
1686 * Set the interrupt force action flag.
1687 *
1688 * @returns VINF_SUCCESS on success.
1689 * @returns rc if we failed to set legacy mode.
1690 * @param pDevIns Device instance of the HPET.
1691 * @param fActivate Activate or deactivate legacy mode.
1692 */
1693 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivate));
1694
1695 /**
1696 * Gets the address of the RC HPET helpers.
1697 *
1698 * This should be called at both construction and relocation time
1699 * to obtain the correct address of the RC helpers.
1700 *
1701 * @returns RC pointer to the HPET helpers.
1702 * @param pDevIns Device instance of the HPET.
1703 */
1704 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1705
1706 /**
1707 * Gets the address of the R0 HPET helpers.
1708 *
1709 * This should be called at both construction and relocation time
1710 * to obtain the correct address of the R0 helpers.
1711 *
1712 * @returns R0 pointer to the HPET helpers.
1713 * @param pDevIns Device instance of the HPET.
1714 */
1715 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1716
1717 /** Just a safety precaution. */
1718 uint32_t u32TheEnd;
1719} PDMHPETHLPR3;
1720
1721/** Pointer to HPET R3 helpers. */
1722typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1723/** Pointer to const HPET R3 helpers. */
1724typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1725
1726/** Current PDMHPETHLPR3 version number. */
1727#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 1, 0)
1728
1729
1730
1731#ifdef IN_RING3
1732
1733/**
1734 * DMA Transfer Handler.
1735 *
1736 * @returns Number of bytes transferred.
1737 * @param pDevIns Device instance of the DMA.
1738 * @param pvUser User pointer.
1739 * @param uChannel Channel number.
1740 * @param off DMA position.
1741 * @param cb Block size.
1742 */
1743typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1744/** Pointer to a FNDMATRANSFERHANDLER(). */
1745typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1746
1747/**
1748 * DMA Controller registration structure.
1749 */
1750typedef struct PDMDMAREG
1751{
1752 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1753 uint32_t u32Version;
1754
1755 /**
1756 * Execute pending transfers.
1757 *
1758 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1759 * @param pDevIns Device instance of the DMAC.
1760 */
1761 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1762
1763 /**
1764 * Register transfer function for DMA channel.
1765 *
1766 * @param pDevIns Device instance of the DMAC.
1767 * @param uChannel Channel number.
1768 * @param pfnTransferHandler Device specific transfer function.
1769 * @param pvUSer User pointer to be passed to the callback.
1770 */
1771 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1772
1773 /**
1774 * Read memory
1775 *
1776 * @returns Number of bytes read.
1777 * @param pDevIns Device instance of the DMAC.
1778 * @param pvBuffer Pointer to target buffer.
1779 * @param off DMA position.
1780 * @param cbBlock Block size.
1781 */
1782 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1783
1784 /**
1785 * Write memory
1786 *
1787 * @returns Number of bytes written.
1788 * @param pDevIns Device instance of the DMAC.
1789 * @param pvBuffer Memory to write.
1790 * @param off DMA position.
1791 * @param cbBlock Block size.
1792 */
1793 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1794
1795 /**
1796 * Set the DREQ line.
1797 *
1798 * @param pDevIns Device instance of the DMAC.
1799 * @param uChannel Channel number.
1800 * @param uLevel Level of the line.
1801 */
1802 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1803
1804 /**
1805 * Get channel mode
1806 *
1807 * @returns Channel mode.
1808 * @param pDevIns Device instance of the DMAC.
1809 * @param uChannel Channel number.
1810 */
1811 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1812
1813} PDMDMACREG;
1814/** Pointer to a DMAC registration structure. */
1815typedef PDMDMACREG *PPDMDMACREG;
1816
1817/** Current PDMDMACREG version number. */
1818#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1819
1820
1821/**
1822 * DMA Controller device helpers.
1823 */
1824typedef struct PDMDMACHLP
1825{
1826 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1827 uint32_t u32Version;
1828
1829 /* to-be-defined */
1830
1831} PDMDMACHLP;
1832/** Pointer to DMAC helpers. */
1833typedef PDMDMACHLP *PPDMDMACHLP;
1834/** Pointer to const DMAC helpers. */
1835typedef const PDMDMACHLP *PCPDMDMACHLP;
1836
1837/** Current PDMDMACHLP version number. */
1838#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1839
1840#endif /* IN_RING3 */
1841
1842
1843
1844/**
1845 * RTC registration structure.
1846 */
1847typedef struct PDMRTCREG
1848{
1849 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1850 uint32_t u32Version;
1851 uint32_t u32Alignment; /**< structure size alignment. */
1852
1853 /**
1854 * Write to a CMOS register and update the checksum if necessary.
1855 *
1856 * @returns VBox status code.
1857 * @param pDevIns Device instance of the RTC.
1858 * @param iReg The CMOS register index.
1859 * @param u8Value The CMOS register value.
1860 */
1861 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1862
1863 /**
1864 * Read a CMOS register.
1865 *
1866 * @returns VBox status code.
1867 * @param pDevIns Device instance of the RTC.
1868 * @param iReg The CMOS register index.
1869 * @param pu8Value Where to store the CMOS register value.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1872
1873} PDMRTCREG;
1874/** Pointer to a RTC registration structure. */
1875typedef PDMRTCREG *PPDMRTCREG;
1876/** Pointer to a const RTC registration structure. */
1877typedef const PDMRTCREG *PCPDMRTCREG;
1878
1879/** Current PDMRTCREG version number. */
1880#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1881
1882
1883/**
1884 * RTC device helpers.
1885 */
1886typedef struct PDMRTCHLP
1887{
1888 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1889 uint32_t u32Version;
1890
1891 /* to-be-defined */
1892
1893} PDMRTCHLP;
1894/** Pointer to RTC helpers. */
1895typedef PDMRTCHLP *PPDMRTCHLP;
1896/** Pointer to const RTC helpers. */
1897typedef const PDMRTCHLP *PCPDMRTCHLP;
1898
1899/** Current PDMRTCHLP version number. */
1900#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1901
1902
1903
1904#ifdef IN_RING3
1905
1906/**
1907 * PDM Device API.
1908 */
1909typedef struct PDMDEVHLPR3
1910{
1911 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1912 uint32_t u32Version;
1913
1914 /**
1915 * Register a number of I/O ports with a device.
1916 *
1917 * These callbacks are of course for the host context (HC).
1918 * Register HC handlers before guest context (GC) handlers! There must be a
1919 * HC handler for every GC handler!
1920 *
1921 * @returns VBox status.
1922 * @param pDevIns The device instance to register the ports with.
1923 * @param Port First port number in the range.
1924 * @param cPorts Number of ports to register.
1925 * @param pvUser User argument.
1926 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1927 * @param pfnIn Pointer to function which is gonna handle IN operations.
1928 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1929 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1930 * @param pszDesc Pointer to description string. This must not be freed.
1931 */
1932 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1933 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1934 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1935
1936 /**
1937 * Register a number of I/O ports with a device for RC.
1938 *
1939 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1940 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1941 * for every RC handler!
1942 *
1943 * @returns VBox status.
1944 * @param pDevIns The device instance to register the ports with
1945 * and which RC module to resolve the names
1946 * against.
1947 * @param Port First port number in the range.
1948 * @param cPorts Number of ports to register.
1949 * @param pvUser User argument.
1950 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1951 * @param pszIn Name of the RC function which is gonna handle IN operations.
1952 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1953 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1954 * @param pszDesc Pointer to description string. This must not be freed.
1955 */
1956 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1957 const char *pszOut, const char *pszIn,
1958 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1959
1960 /**
1961 * Register a number of I/O ports with a device.
1962 *
1963 * These callbacks are of course for the ring-0 host context (R0).
1964 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1965 *
1966 * @returns VBox status.
1967 * @param pDevIns The device instance to register the ports with.
1968 * @param Port First port number in the range.
1969 * @param cPorts Number of ports to register.
1970 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1971 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1972 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1973 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1974 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1975 * @param pszDesc Pointer to description string. This must not be freed.
1976 */
1977 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1978 const char *pszOut, const char *pszIn,
1979 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1980
1981 /**
1982 * Deregister I/O ports.
1983 *
1984 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1985 *
1986 * @returns VBox status.
1987 * @param pDevIns The device instance owning the ports.
1988 * @param Port First port number in the range.
1989 * @param cPorts Number of ports to deregister.
1990 */
1991 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1992
1993 /**
1994 * Register a Memory Mapped I/O (MMIO) region.
1995 *
1996 * These callbacks are of course for the ring-3 context (R3). Register HC
1997 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
1998 * must be a R3 handler for every RC and R0 handler!
1999 *
2000 * @returns VBox status.
2001 * @param pDevIns The device instance to register the MMIO with.
2002 * @param GCPhysStart First physical address in the range.
2003 * @param cbRange The size of the range (in bytes).
2004 * @param pvUser User argument.
2005 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2006 * @param pfnRead Pointer to function which is gonna handle Read operations.
2007 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2008 * @param pszDesc Pointer to description string. This must not be freed.
2009 */
2010 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2011 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2012 const char *pszDesc));
2013
2014 /**
2015 * Register a Memory Mapped I/O (MMIO) region for GC.
2016 *
2017 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2018 * (R3) handlers before guest context handlers! There must be a R3 handler for
2019 * every RC handler!
2020 *
2021 * @returns VBox status.
2022 * @param pDevIns The device instance to register the MMIO with.
2023 * @param GCPhysStart First physical address in the range.
2024 * @param cbRange The size of the range (in bytes).
2025 * @param pvUser User argument.
2026 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2027 * @param pszRead Name of the RC function which is gonna handle Read operations.
2028 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2029 * @param pszDesc Obsolete. NULL is fine.
2030 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2031 */
2032 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2033 const char *pszWrite, const char *pszRead, const char *pszFill,
2034 const char *pszDesc));
2035
2036 /**
2037 * Register a Memory Mapped I/O (MMIO) region for R0.
2038 *
2039 * These callbacks are for the ring-0 host context (R0). Register ring-3
2040 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2041 * every R0 handler!
2042 *
2043 * @returns VBox status.
2044 * @param pDevIns The device instance to register the MMIO with.
2045 * @param GCPhysStart First physical address in the range.
2046 * @param cbRange The size of the range (in bytes).
2047 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2048 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2049 * @param pszRead Name of the RC function which is gonna handle Read operations.
2050 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2051 * @param pszDesc Obsolete. NULL is fine.
2052 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2053 */
2054 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2055 const char *pszWrite, const char *pszRead, const char *pszFill,
2056 const char *pszDesc));
2057
2058 /**
2059 * Deregister a Memory Mapped I/O (MMIO) region.
2060 *
2061 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2062 *
2063 * @returns VBox status.
2064 * @param pDevIns The device instance owning the MMIO region(s).
2065 * @param GCPhysStart First physical address in the range.
2066 * @param cbRange The size of the range (in bytes).
2067 */
2068 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2069
2070 /**
2071 * Allocate and register a MMIO2 region.
2072 *
2073 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2074 * RAM associated with a device. It is also non-shared memory with a
2075 * permanent ring-3 mapping and page backing (presently).
2076 *
2077 * @returns VBox status.
2078 * @param pDevIns The device instance.
2079 * @param iRegion The region number. Use the PCI region number as
2080 * this must be known to the PCI bus device too. If
2081 * it's not associated with the PCI device, then
2082 * any number up to UINT8_MAX is fine.
2083 * @param cb The size (in bytes) of the region.
2084 * @param fFlags Reserved for future use, must be zero.
2085 * @param ppv Where to store the address of the ring-3 mapping
2086 * of the memory.
2087 * @param pszDesc Pointer to description string. This must not be
2088 * freed.
2089 * @thread EMT.
2090 */
2091 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2092
2093 /**
2094 * Deregisters and frees a MMIO2 region.
2095 *
2096 * Any physical (and virtual) access handlers registered for the region must
2097 * be deregistered before calling this function.
2098 *
2099 * @returns VBox status code.
2100 * @param pDevIns The device instance.
2101 * @param iRegion The region number used during registration.
2102 * @thread EMT.
2103 */
2104 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2105
2106 /**
2107 * Maps a MMIO2 region into the physical memory space.
2108 *
2109 * A MMIO2 range may overlap with base memory if a lot of RAM
2110 * is configured for the VM, in which case we'll drop the base
2111 * memory pages. Presently we will make no attempt to preserve
2112 * anything that happens to be present in the base memory that
2113 * is replaced, this is of course incorrectly but it's too much
2114 * effort.
2115 *
2116 * @returns VBox status code.
2117 * @param pDevIns The device instance.
2118 * @param iRegion The region number used during registration.
2119 * @param GCPhys The physical address to map it at.
2120 * @thread EMT.
2121 */
2122 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2123
2124 /**
2125 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2126 *
2127 * @returns VBox status code.
2128 * @param pDevIns The device instance.
2129 * @param iRegion The region number used during registration.
2130 * @param GCPhys The physical address it's currently mapped at.
2131 * @thread EMT.
2132 */
2133 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2134
2135 /**
2136 * Maps a portion of an MMIO2 region into the hypervisor region.
2137 *
2138 * Callers of this API must never deregister the MMIO2 region before the
2139 * VM is powered off.
2140 *
2141 * @return VBox status code.
2142 * @param pDevIns The device owning the MMIO2 memory.
2143 * @param iRegion The region.
2144 * @param off The offset into the region. Will be rounded down
2145 * to closest page boundrary.
2146 * @param cb The number of bytes to map. Will be rounded up
2147 * to the closest page boundrary.
2148 * @param pszDesc Mapping description.
2149 * @param pRCPtr Where to store the RC address.
2150 */
2151 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2152 const char *pszDesc, PRTRCPTR pRCPtr));
2153
2154 /**
2155 * Maps a portion of an MMIO2 region into kernel space (host).
2156 *
2157 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2158 * or the VM is terminated.
2159 *
2160 * @return VBox status code.
2161 * @param pDevIns The device owning the MMIO2 memory.
2162 * @param iRegion The region.
2163 * @param off The offset into the region. Must be page
2164 * aligned.
2165 * @param cb The number of bytes to map. Must be page
2166 * aligned.
2167 * @param pszDesc Mapping description.
2168 * @param pR0Ptr Where to store the R0 address.
2169 */
2170 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2171 const char *pszDesc, PRTR0PTR pR0Ptr));
2172
2173 /**
2174 * Register a ROM (BIOS) region.
2175 *
2176 * It goes without saying that this is read-only memory. The memory region must be
2177 * in unassigned memory. I.e. from the top of the address space or on the PC in
2178 * the 0xa0000-0xfffff range.
2179 *
2180 * @returns VBox status.
2181 * @param pDevIns The device instance owning the ROM region.
2182 * @param GCPhysStart First physical address in the range.
2183 * Must be page aligned!
2184 * @param cbRange The size of the range (in bytes).
2185 * Must be page aligned!
2186 * @param pvBinary Pointer to the binary data backing the ROM image.
2187 * This must be cbRange bytes big.
2188 * It will be copied and doesn't have to stick around if fShadow is clear.
2189 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2190 * @param pszDesc Pointer to description string. This must not be freed.
2191 *
2192 * @remark There is no way to remove the rom, automatically on device cleanup or
2193 * manually from the device yet. At present I doubt we need such features...
2194 */
2195 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2196
2197 /**
2198 * Changes the protection of shadowed ROM mapping.
2199 *
2200 * This is intented for use by the system BIOS, chipset or device in question to
2201 * change the protection of shadowed ROM code after init and on reset.
2202 *
2203 * @param pDevIns The device instance.
2204 * @param GCPhysStart Where the mapping starts.
2205 * @param cbRange The size of the mapping.
2206 * @param enmProt The new protection type.
2207 */
2208 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2209
2210 /**
2211 * Register a save state data unit.
2212 *
2213 * @returns VBox status.
2214 * @param pDevIns The device instance.
2215 * @param pszName Data unit name.
2216 * @param uInstance The instance identifier of the data unit.
2217 * This must together with the name be unique.
2218 * @param uVersion Data layout version number.
2219 * @param cbGuess The approximate amount of data in the unit.
2220 * Only for progress indicators.
2221 * @param pszBefore Name of data unit which we should be put in
2222 * front of. Optional (NULL).
2223 *
2224 * @param pfnLivePrep Prepare live save callback, optional.
2225 * @param pfnLiveExec Execute live save callback, optional.
2226 * @param pfnLiveVote Vote live save callback, optional.
2227 *
2228 * @param pfnSavePrep Prepare save callback, optional.
2229 * @param pfnSaveExec Execute save callback, optional.
2230 * @param pfnSaveDone Done save callback, optional.
2231 *
2232 * @param pfnLoadPrep Prepare load callback, optional.
2233 * @param pfnLoadExec Execute load callback, optional.
2234 * @param pfnLoadDone Done load callback, optional.
2235 */
2236 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2237 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2238 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2239 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2240
2241 /**
2242 * Creates a timer.
2243 *
2244 * @returns VBox status.
2245 * @param pDevIns The device instance.
2246 * @param enmClock The clock to use on this timer.
2247 * @param pfnCallback Callback function.
2248 * @param pvUser User argument for the callback.
2249 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2250 * @param pszDesc Pointer to description string which must stay around
2251 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2252 * @param ppTimer Where to store the timer on success.
2253 */
2254 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2255
2256 /**
2257 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2258 *
2259 * @returns pTime.
2260 * @param pDevIns The device instance.
2261 * @param pTime Where to store the time.
2262 */
2263 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2264
2265 /**
2266 * Read physical memory.
2267 *
2268 * @returns VINF_SUCCESS (for now).
2269 * @param pDevIns The device instance.
2270 * @param GCPhys Physical address start reading from.
2271 * @param pvBuf Where to put the read bits.
2272 * @param cbRead How many bytes to read.
2273 * @thread Any thread, but the call may involve the emulation thread.
2274 */
2275 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2276
2277 /**
2278 * Write to physical memory.
2279 *
2280 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2281 * @param pDevIns The device instance.
2282 * @param GCPhys Physical address to write to.
2283 * @param pvBuf What to write.
2284 * @param cbWrite How many bytes to write.
2285 * @thread Any thread, but the call may involve the emulation thread.
2286 */
2287 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2288
2289 /**
2290 * Requests the mapping of a guest page into ring-3.
2291 *
2292 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2293 * release it.
2294 *
2295 * This API will assume your intention is to write to the page, and will
2296 * therefore replace shared and zero pages. If you do not intend to modify the
2297 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2298 *
2299 * @returns VBox status code.
2300 * @retval VINF_SUCCESS on success.
2301 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2302 * backing or if the page has any active access handlers. The caller
2303 * must fall back on using PGMR3PhysWriteExternal.
2304 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2305 *
2306 * @param pVM The VM handle.
2307 * @param GCPhys The guest physical address of the page that
2308 * should be mapped.
2309 * @param fFlags Flags reserved for future use, MBZ.
2310 * @param ppv Where to store the address corresponding to
2311 * GCPhys.
2312 * @param pLock Where to store the lock information that
2313 * pfnPhysReleasePageMappingLock needs.
2314 *
2315 * @remark Avoid calling this API from within critical sections (other than the
2316 * PGM one) because of the deadlock risk when we have to delegating the
2317 * task to an EMT.
2318 * @thread Any.
2319 */
2320 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2321
2322 /**
2323 * Requests the mapping of a guest page into ring-3, external threads.
2324 *
2325 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2326 * release it.
2327 *
2328 * @returns VBox status code.
2329 * @retval VINF_SUCCESS on success.
2330 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2331 * backing or if the page as an active ALL access handler. The caller
2332 * must fall back on using PGMPhysRead.
2333 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2334 *
2335 * @param pDevIns The device instance.
2336 * @param GCPhys The guest physical address of the page that
2337 * should be mapped.
2338 * @param fFlags Flags reserved for future use, MBZ.
2339 * @param ppv Where to store the address corresponding to
2340 * GCPhys.
2341 * @param pLock Where to store the lock information that
2342 * pfnPhysReleasePageMappingLock needs.
2343 *
2344 * @remark Avoid calling this API from within critical sections.
2345 * @thread Any.
2346 */
2347 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2348
2349 /**
2350 * Release the mapping of a guest page.
2351 *
2352 * This is the counter part of pfnPhysGCPhys2CCPtr and
2353 * pfnPhysGCPhys2CCPtrReadOnly.
2354 *
2355 * @param pDevIns The device instance.
2356 * @param pLock The lock structure initialized by the mapping
2357 * function.
2358 */
2359 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2360
2361 /**
2362 * Read guest physical memory by virtual address.
2363 *
2364 * @param pDevIns The device instance.
2365 * @param pvDst Where to put the read bits.
2366 * @param GCVirtSrc Guest virtual address to start reading from.
2367 * @param cb How many bytes to read.
2368 * @thread The emulation thread.
2369 */
2370 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2371
2372 /**
2373 * Write to guest physical memory by virtual address.
2374 *
2375 * @param pDevIns The device instance.
2376 * @param GCVirtDst Guest virtual address to write to.
2377 * @param pvSrc What to write.
2378 * @param cb How many bytes to write.
2379 * @thread The emulation thread.
2380 */
2381 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2382
2383 /**
2384 * Convert a guest virtual address to a guest physical address.
2385 *
2386 * @returns VBox status code.
2387 * @param pDevIns The device instance.
2388 * @param GCPtr Guest virtual address.
2389 * @param pGCPhys Where to store the GC physical address
2390 * corresponding to GCPtr.
2391 * @thread The emulation thread.
2392 * @remark Careful with page boundraries.
2393 */
2394 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2395
2396 /**
2397 * Allocate memory which is associated with current VM instance
2398 * and automatically freed on it's destruction.
2399 *
2400 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2401 * @param pDevIns The device instance.
2402 * @param cb Number of bytes to allocate.
2403 */
2404 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2405
2406 /**
2407 * Allocate memory which is associated with current VM instance
2408 * and automatically freed on it's destruction. The memory is ZEROed.
2409 *
2410 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2411 * @param pDevIns The device instance.
2412 * @param cb Number of bytes to allocate.
2413 */
2414 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2415
2416 /**
2417 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2418 *
2419 * @param pDevIns The device instance.
2420 * @param pv Pointer to the memory to free.
2421 */
2422 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2423
2424 /**
2425 * Gets the VM state.
2426 *
2427 * @returns VM state.
2428 * @param pDevIns The device instance.
2429 * @thread Any thread (just keep in mind that it's volatile info).
2430 */
2431 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2432
2433 /**
2434 * Checks if the VM was teleported and hasn't been fully resumed yet.
2435 *
2436 * @returns true / false.
2437 * @param pDevIns The device instance.
2438 * @thread Any thread.
2439 */
2440 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2441
2442 /**
2443 * Set the VM error message
2444 *
2445 * @returns rc.
2446 * @param pDevIns The device instance.
2447 * @param rc VBox status code.
2448 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2449 * @param pszFormat Error message format string.
2450 * @param ... Error message arguments.
2451 */
2452 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2453
2454 /**
2455 * Set the VM error message
2456 *
2457 * @returns rc.
2458 * @param pDevIns The device instance.
2459 * @param rc VBox status code.
2460 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2461 * @param pszFormat Error message format string.
2462 * @param va Error message arguments.
2463 */
2464 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2465
2466 /**
2467 * Set the VM runtime error message
2468 *
2469 * @returns VBox status code.
2470 * @param pDevIns The device instance.
2471 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2472 * @param pszErrorId Error ID string.
2473 * @param pszFormat Error message format string.
2474 * @param ... Error message arguments.
2475 */
2476 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2477
2478 /**
2479 * Set the VM runtime error message
2480 *
2481 * @returns VBox status code.
2482 * @param pDevIns The device instance.
2483 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2484 * @param pszErrorId Error ID string.
2485 * @param pszFormat Error message format string.
2486 * @param va Error message arguments.
2487 */
2488 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2489
2490 /**
2491 * Stops the VM and enters the debugger to look at the guest state.
2492 *
2493 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2494 * invoking this function directly.
2495 *
2496 * @returns VBox status code which must be passed up to the VMM.
2497 * @param pDevIns The device instance.
2498 * @param pszFile Filename of the assertion location.
2499 * @param iLine The linenumber of the assertion location.
2500 * @param pszFunction Function of the assertion location.
2501 * @param pszFormat Message. (optional)
2502 * @param args Message parameters.
2503 */
2504 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2505
2506 /**
2507 * Register a info handler with DBGF,
2508 *
2509 * @returns VBox status code.
2510 * @param pDevIns The device instance.
2511 * @param pszName The identifier of the info.
2512 * @param pszDesc The description of the info and any arguments
2513 * the handler may take.
2514 * @param pfnHandler The handler function to be called to display the
2515 * info.
2516 */
2517 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2518
2519 /**
2520 * Registers a statistics sample if statistics are enabled.
2521 *
2522 * @param pDevIns Device instance of the DMA.
2523 * @param pvSample Pointer to the sample.
2524 * @param enmType Sample type. This indicates what pvSample is
2525 * pointing at.
2526 * @param pszName Sample name. The name is on this form
2527 * "/<component>/<sample>". Further nesting is
2528 * possible.
2529 * @param enmUnit Sample unit.
2530 * @param pszDesc Sample description.
2531 */
2532 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2533
2534 /**
2535 * Same as pfnSTAMRegister except that the name is specified in a
2536 * RTStrPrintf like fashion.
2537 *
2538 * @returns VBox status.
2539 * @param pDevIns Device instance of the DMA.
2540 * @param pvSample Pointer to the sample.
2541 * @param enmType Sample type. This indicates what pvSample is
2542 * pointing at.
2543 * @param enmVisibility Visibility type specifying whether unused
2544 * statistics should be visible or not.
2545 * @param enmUnit Sample unit.
2546 * @param pszDesc Sample description.
2547 * @param pszName The sample name format string.
2548 * @param ... Arguments to the format string.
2549 */
2550 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2551 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2552
2553 /**
2554 * Same as pfnSTAMRegister except that the name is specified in a
2555 * RTStrPrintfV like fashion.
2556 *
2557 * @returns VBox status.
2558 * @param pDevIns Device instance of the DMA.
2559 * @param pvSample Pointer to the sample.
2560 * @param enmType Sample type. This indicates what pvSample is
2561 * pointing at.
2562 * @param enmVisibility Visibility type specifying whether unused
2563 * statistics should be visible or not.
2564 * @param enmUnit Sample unit.
2565 * @param pszDesc Sample description.
2566 * @param pszName The sample name format string.
2567 * @param args Arguments to the format string.
2568 */
2569 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2570 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2571
2572 /**
2573 * Registers the device with the default PCI bus.
2574 *
2575 * @returns VBox status code.
2576 * @param pDevIns The device instance.
2577 * @param pPciDev The PCI device structure.
2578 * Any PCI enabled device must keep this in it's instance data!
2579 * Fill in the PCI data config before registration, please.
2580 * @remark This is the simple interface, a Ex interface will be created if
2581 * more features are needed later.
2582 */
2583 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2584
2585 /**
2586 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2587 *
2588 * @returns VBox status code.
2589 * @param pDevIns The device instance.
2590 * @param iRegion The region number.
2591 * @param cbRegion Size of the region.
2592 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2593 * @param pfnCallback Callback for doing the mapping.
2594 */
2595 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2596
2597 /**
2598 * Register PCI configuration space read/write callbacks.
2599 *
2600 * @param pDevIns The device instance.
2601 * @param pPciDev The PCI device structure.
2602 * If NULL the default PCI device for this device instance is used.
2603 * @param pfnRead Pointer to the user defined PCI config read function.
2604 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2605 * PCI config read function. This way, user can decide when (and if)
2606 * to call default PCI config read function. Can be NULL.
2607 * @param pfnWrite Pointer to the user defined PCI config write function.
2608 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2609 * PCI config write function. This way, user can decide when (and if)
2610 * to call default PCI config write function. Can be NULL.
2611 * @thread EMT
2612 */
2613 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2614 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2615
2616 /**
2617 * Set the IRQ for a PCI device.
2618 *
2619 * @param pDevIns The device instance.
2620 * @param iIrq IRQ number to set.
2621 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2622 * @thread Any thread, but will involve the emulation thread.
2623 */
2624 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2625
2626 /**
2627 * Set the IRQ for a PCI device, but don't wait for EMT to process
2628 * the request when not called from EMT.
2629 *
2630 * @param pDevIns The device instance.
2631 * @param iIrq IRQ number to set.
2632 * @param iLevel IRQ level.
2633 * @thread Any thread, but will involve the emulation thread.
2634 */
2635 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2636
2637 /**
2638 * Set ISA IRQ for a device.
2639 *
2640 * @param pDevIns The device instance.
2641 * @param iIrq IRQ number to set.
2642 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2643 * @thread Any thread, but will involve the emulation thread.
2644 */
2645 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2646
2647 /**
2648 * Set the ISA IRQ for a device, but don't wait for EMT to process
2649 * the request when not called from EMT.
2650 *
2651 * @param pDevIns The device instance.
2652 * @param iIrq IRQ number to set.
2653 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2654 * @thread Any thread, but will involve the emulation thread.
2655 */
2656 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2657
2658 /**
2659 * Attaches a driver (chain) to the device.
2660 *
2661 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2662 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2663 *
2664 * @returns VBox status code.
2665 * @param pDevIns The device instance.
2666 * @param iLun The logical unit to attach.
2667 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2668 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2669 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2670 * for the live of the device instance.
2671 */
2672 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2673
2674 /**
2675 * Create a queue.
2676 *
2677 * @returns VBox status code.
2678 * @param pDevIns The device instance.
2679 * @param cbItem The size of a queue item.
2680 * @param cItems The number of items in the queue.
2681 * @param cMilliesInterval The number of milliseconds between polling the queue.
2682 * If 0 then the emulation thread will be notified whenever an item arrives.
2683 * @param pfnCallback The consumer function.
2684 * @param fRZEnabled Set if the queue should work in RC and R0.
2685 * @param pszName The queue base name. The instance number will be
2686 * appended automatically.
2687 * @param ppQueue Where to store the queue handle on success.
2688 * @thread The emulation thread.
2689 */
2690 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2691 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2692
2693 /**
2694 * Initializes a PDM critical section.
2695 *
2696 * The PDM critical sections are derived from the IPRT critical sections, but
2697 * works in RC and R0 as well.
2698 *
2699 * @returns VBox status code.
2700 * @param pDevIns The device instance.
2701 * @param pCritSect Pointer to the critical section.
2702 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2703 * @param pszNameFmt Format string for namging the critical section.
2704 * For statistics and lock validation.
2705 * @param va Arguments for the format string.
2706 */
2707 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2708 const char *pszNameFmt, va_list va));
2709
2710 /**
2711 * Creates a PDM thread.
2712 *
2713 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2714 * resuming, and destroying the thread as the VM state changes.
2715 *
2716 * @returns VBox status code.
2717 * @param pDevIns The device instance.
2718 * @param ppThread Where to store the thread 'handle'.
2719 * @param pvUser The user argument to the thread function.
2720 * @param pfnThread The thread function.
2721 * @param pfnWakeup The wakup callback. This is called on the EMT
2722 * thread when a state change is pending.
2723 * @param cbStack See RTThreadCreate.
2724 * @param enmType See RTThreadCreate.
2725 * @param pszName See RTThreadCreate.
2726 */
2727 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2728 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2729
2730 /**
2731 * Set up asynchronous handling of a suspend, reset or power off notification.
2732 *
2733 * This shall only be called when getting the notification. It must be called
2734 * for each one.
2735 *
2736 * @returns VBox status code.
2737 * @param pDevIns The device instance.
2738 * @param pfnAsyncNotify The callback.
2739 * @thread EMT(0)
2740 */
2741 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2742
2743 /**
2744 * Notify EMT(0) that the device has completed the asynchronous notification
2745 * handling.
2746 *
2747 * This can be called at any time, spurious calls will simply be ignored.
2748 *
2749 * @param pDevIns The device instance.
2750 * @thread Any
2751 */
2752 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2753
2754 /**
2755 * Register the RTC device.
2756 *
2757 * @returns VBox status code.
2758 * @param pDevIns The device instance.
2759 * @param pRtcReg Pointer to a RTC registration structure.
2760 * @param ppRtcHlp Where to store the pointer to the helper
2761 * functions.
2762 */
2763 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2764
2765 /**
2766 * Register the PCI Bus.
2767 *
2768 * @returns VBox status code.
2769 * @param pDevIns The device instance.
2770 * @param pPciBusReg Pointer to PCI bus registration structure.
2771 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2772 * helpers.
2773 */
2774 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2775
2776 /**
2777 * Register the PIC device.
2778 *
2779 * @returns VBox status code.
2780 * @param pDevIns The device instance.
2781 * @param pPicReg Pointer to a PIC registration structure.
2782 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2783 * helpers.
2784 */
2785 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2786
2787 /**
2788 * Register the APIC device.
2789 *
2790 * @returns VBox status code.
2791 * @param pDevIns The device instance.
2792 * @param pApicReg Pointer to a APIC registration structure.
2793 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2794 */
2795 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2796
2797 /**
2798 * Register the I/O APIC device.
2799 *
2800 * @returns VBox status code.
2801 * @param pDevIns The device instance.
2802 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2803 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2804 * helpers.
2805 */
2806 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2807
2808 /**
2809 * Register the HPET device.
2810 *
2811 * @returns VBox status code.
2812 * @param pDevIns The device instance.
2813 * @param pHpetReg Pointer to a HPET registration structure.
2814 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2815 * helpers.
2816 */
2817 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2818
2819 /**
2820 * Register the DMA device.
2821 *
2822 * @returns VBox status code.
2823 * @param pDevIns The device instance.
2824 * @param pDmacReg Pointer to a DMAC registration structure.
2825 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2826 */
2827 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2828
2829 /**
2830 * Register transfer function for DMA channel.
2831 *
2832 * @returns VBox status code.
2833 * @param pDevIns The device instance.
2834 * @param uChannel Channel number.
2835 * @param pfnTransferHandler Device specific transfer callback function.
2836 * @param pvUser User pointer to pass to the callback.
2837 * @thread EMT
2838 */
2839 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2840
2841 /**
2842 * Read memory.
2843 *
2844 * @returns VBox status code.
2845 * @param pDevIns The device instance.
2846 * @param uChannel Channel number.
2847 * @param pvBuffer Pointer to target buffer.
2848 * @param off DMA position.
2849 * @param cbBlock Block size.
2850 * @param pcbRead Where to store the number of bytes which was
2851 * read. optional.
2852 * @thread EMT
2853 */
2854 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2855
2856 /**
2857 * Write memory.
2858 *
2859 * @returns VBox status code.
2860 * @param pDevIns The device instance.
2861 * @param uChannel Channel number.
2862 * @param pvBuffer Memory to write.
2863 * @param off DMA position.
2864 * @param cbBlock Block size.
2865 * @param pcbWritten Where to store the number of bytes which was
2866 * written. optional.
2867 * @thread EMT
2868 */
2869 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2870
2871 /**
2872 * Set the DREQ line.
2873 *
2874 * @returns VBox status code.
2875 * @param pDevIns Device instance.
2876 * @param uChannel Channel number.
2877 * @param uLevel Level of the line.
2878 * @thread EMT
2879 */
2880 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2881
2882 /**
2883 * Get channel mode.
2884 *
2885 * @returns Channel mode. See specs.
2886 * @param pDevIns The device instance.
2887 * @param uChannel Channel number.
2888 * @thread EMT
2889 */
2890 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2891
2892 /**
2893 * Schedule DMA execution.
2894 *
2895 * @param pDevIns The device instance.
2896 * @thread Any thread.
2897 */
2898 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2899
2900 /**
2901 * Write CMOS value and update the checksum(s).
2902 *
2903 * @returns VBox status code.
2904 * @param pDevIns The device instance.
2905 * @param iReg The CMOS register index.
2906 * @param u8Value The CMOS register value.
2907 * @thread EMT
2908 */
2909 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2910
2911 /**
2912 * Read CMOS value.
2913 *
2914 * @returns VBox status code.
2915 * @param pDevIns The device instance.
2916 * @param iReg The CMOS register index.
2917 * @param pu8Value Where to store the CMOS register value.
2918 * @thread EMT
2919 */
2920 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2921
2922 /**
2923 * Assert that the current thread is the emulation thread.
2924 *
2925 * @returns True if correct.
2926 * @returns False if wrong.
2927 * @param pDevIns The device instance.
2928 * @param pszFile Filename of the assertion location.
2929 * @param iLine The linenumber of the assertion location.
2930 * @param pszFunction Function of the assertion location.
2931 */
2932 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2933
2934 /**
2935 * Assert that the current thread is NOT the emulation thread.
2936 *
2937 * @returns True if correct.
2938 * @returns False if wrong.
2939 * @param pDevIns The device instance.
2940 * @param pszFile Filename of the assertion location.
2941 * @param iLine The linenumber of the assertion location.
2942 * @param pszFunction Function of the assertion location.
2943 */
2944 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2945
2946 /**
2947 * Resolves the symbol for a raw-mode context interface.
2948 *
2949 * @returns VBox status code.
2950 * @param pDevIns The device instance.
2951 * @param pvInterface The interface structure.
2952 * @param cbInterface The size of the interface structure.
2953 * @param pszSymPrefix What to prefix the symbols in the list with
2954 * before resolving them. This must start with
2955 * 'dev' and contain the driver name.
2956 * @param pszSymList List of symbols corresponding to the interface.
2957 * There is generally a there is generally a define
2958 * holding this list associated with the interface
2959 * definition (INTERFACE_SYM_LIST). For more
2960 * details see PDMR3LdrGetInterfaceSymbols.
2961 * @thread EMT
2962 */
2963 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2964 const char *pszSymPrefix, const char *pszSymList));
2965
2966 /**
2967 * Resolves the symbol for a ring-0 context interface.
2968 *
2969 * @returns VBox status code.
2970 * @param pDevIns The device instance.
2971 * @param pvInterface The interface structure.
2972 * @param cbInterface The size of the interface structure.
2973 * @param pszSymPrefix What to prefix the symbols in the list with
2974 * before resolving them. This must start with
2975 * 'dev' and contain the driver name.
2976 * @param pszSymList List of symbols corresponding to the interface.
2977 * There is generally a there is generally a define
2978 * holding this list associated with the interface
2979 * definition (INTERFACE_SYM_LIST). For more
2980 * details see PDMR3LdrGetInterfaceSymbols.
2981 * @thread EMT
2982 */
2983 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2984 const char *pszSymPrefix, const char *pszSymList));
2985
2986 /** Space reserved for future members.
2987 * @{ */
2988 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
2989 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2990 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2991 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2992 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2993 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2994 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2995 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2996 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2997 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2998 /** @} */
2999
3000
3001 /** API available to trusted devices only.
3002 *
3003 * These APIs are providing unrestricted access to the guest and the VM,
3004 * or they are interacting intimately with PDM.
3005 *
3006 * @{
3007 */
3008 /**
3009 * Gets the VM handle. Restricted API.
3010 *
3011 * @returns VM Handle.
3012 * @param pDevIns The device instance.
3013 */
3014 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3015
3016 /**
3017 * Gets the VMCPU handle. Restricted API.
3018 *
3019 * @returns VMCPU Handle.
3020 * @param pDevIns The device instance.
3021 */
3022 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3023
3024 /**
3025 * Registers the VMM device heap
3026 *
3027 * @returns VBox status code.
3028 * @param pDevIns The device instance.
3029 * @param GCPhys The physical address.
3030 * @param pvHeap Ring 3 heap pointer.
3031 * @param cbSize Size of the heap.
3032 * @thread EMT.
3033 */
3034 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3035
3036 /**
3037 * Unregisters the VMM device heap
3038 *
3039 * @returns VBox status code.
3040 * @param pDevIns The device instance.
3041 * @param GCPhys The physical address.
3042 * @thread EMT.
3043 */
3044 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3045
3046 /**
3047 * Resets the VM.
3048 *
3049 * @returns The appropriate VBox status code to pass around on reset.
3050 * @param pDevIns The device instance.
3051 * @thread The emulation thread.
3052 */
3053 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3054
3055 /**
3056 * Suspends the VM.
3057 *
3058 * @returns The appropriate VBox status code to pass around on suspend.
3059 * @param pDevIns The device instance.
3060 * @thread The emulation thread.
3061 */
3062 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3063
3064 /**
3065 * Power off the VM.
3066 *
3067 * @returns The appropriate VBox status code to pass around on power off.
3068 * @param pDevIns The device instance.
3069 * @thread The emulation thread.
3070 */
3071 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3072
3073 /**
3074 * Checks if the Gate A20 is enabled or not.
3075 *
3076 * @returns true if A20 is enabled.
3077 * @returns false if A20 is disabled.
3078 * @param pDevIns The device instance.
3079 * @thread The emulation thread.
3080 */
3081 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3082
3083 /**
3084 * Enables or disables the Gate A20.
3085 *
3086 * @param pDevIns The device instance.
3087 * @param fEnable Set this flag to enable the Gate A20; clear it
3088 * to disable.
3089 * @thread The emulation thread.
3090 */
3091 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3092
3093 /**
3094 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3095 * thread.
3096 *
3097 * @param pDevIns The device instance.
3098 * @param iLeaf The CPUID leaf to get.
3099 * @param pEax Where to store the EAX value.
3100 * @param pEbx Where to store the EBX value.
3101 * @param pEcx Where to store the ECX value.
3102 * @param pEdx Where to store the EDX value.
3103 * @thread EMT.
3104 */
3105 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3106
3107 /** @} */
3108
3109 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3110 uint32_t u32TheEnd;
3111} PDMDEVHLPR3;
3112#endif /* !IN_RING3 */
3113/** Pointer to the R3 PDM Device API. */
3114typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3115/** Pointer to the R3 PDM Device API, const variant. */
3116typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3117
3118/** Current PDMDEVHLPR3 version number. */
3119#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 2, 0)
3120
3121
3122/**
3123 * PDM Device API - RC Variant.
3124 */
3125typedef struct PDMDEVHLPRC
3126{
3127 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3128 uint32_t u32Version;
3129
3130 /**
3131 * Set the IRQ for a PCI device.
3132 *
3133 * @param pDevIns Device instance.
3134 * @param iIrq IRQ number to set.
3135 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3136 * @thread Any thread, but will involve the emulation thread.
3137 */
3138 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3139
3140 /**
3141 * Set ISA IRQ for a device.
3142 *
3143 * @param pDevIns Device instance.
3144 * @param iIrq IRQ number to set.
3145 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3146 * @thread Any thread, but will involve the emulation thread.
3147 */
3148 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3149
3150 /**
3151 * Read physical memory.
3152 *
3153 * @returns VINF_SUCCESS (for now).
3154 * @param pDevIns Device instance.
3155 * @param GCPhys Physical address start reading from.
3156 * @param pvBuf Where to put the read bits.
3157 * @param cbRead How many bytes to read.
3158 */
3159 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3160
3161 /**
3162 * Write to physical memory.
3163 *
3164 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3165 * @param pDevIns Device instance.
3166 * @param GCPhys Physical address to write to.
3167 * @param pvBuf What to write.
3168 * @param cbWrite How many bytes to write.
3169 */
3170 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3171
3172 /**
3173 * Checks if the Gate A20 is enabled or not.
3174 *
3175 * @returns true if A20 is enabled.
3176 * @returns false if A20 is disabled.
3177 * @param pDevIns Device instance.
3178 * @thread The emulation thread.
3179 */
3180 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3181
3182 /**
3183 * Set the VM error message
3184 *
3185 * @returns rc.
3186 * @param pDrvIns Driver instance.
3187 * @param rc VBox status code.
3188 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3189 * @param pszFormat Error message format string.
3190 * @param ... Error message arguments.
3191 */
3192 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3193
3194 /**
3195 * Set the VM error message
3196 *
3197 * @returns rc.
3198 * @param pDrvIns Driver instance.
3199 * @param rc VBox status code.
3200 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3201 * @param pszFormat Error message format string.
3202 * @param va Error message arguments.
3203 */
3204 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3205
3206 /**
3207 * Set the VM runtime error message
3208 *
3209 * @returns VBox status code.
3210 * @param pDevIns Device instance.
3211 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3212 * @param pszErrorId Error ID string.
3213 * @param pszFormat Error message format string.
3214 * @param ... Error message arguments.
3215 */
3216 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3217
3218 /**
3219 * Set the VM runtime error message
3220 *
3221 * @returns VBox status code.
3222 * @param pDevIns Device instance.
3223 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3224 * @param pszErrorId Error ID string.
3225 * @param pszFormat Error message format string.
3226 * @param va Error message arguments.
3227 */
3228 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3229
3230 /**
3231 * Set parameters for pending MMIO patch operation
3232 *
3233 * @returns VBox status code.
3234 * @param pDevIns Device instance.
3235 * @param GCPhys MMIO physical address
3236 * @param pCachedData GC pointer to cached data
3237 */
3238 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3239
3240 /**
3241 * Gets the VM handle. Restricted API.
3242 *
3243 * @returns VM Handle.
3244 * @param pDevIns Device instance.
3245 */
3246 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3247
3248 /**
3249 * Gets the VMCPU handle. Restricted API.
3250 *
3251 * @returns VMCPU Handle.
3252 * @param pDevIns The device instance.
3253 */
3254 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3255
3256 /** Just a safety precaution. */
3257 uint32_t u32TheEnd;
3258} PDMDEVHLPRC;
3259/** Pointer PDM Device RC API. */
3260typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3261/** Pointer PDM Device RC API. */
3262typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3263
3264/** Current PDMDEVHLP version number. */
3265#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3266
3267
3268/**
3269 * PDM Device API - R0 Variant.
3270 */
3271typedef struct PDMDEVHLPR0
3272{
3273 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3274 uint32_t u32Version;
3275
3276 /**
3277 * Set the IRQ for a PCI device.
3278 *
3279 * @param pDevIns Device instance.
3280 * @param iIrq IRQ number to set.
3281 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3282 * @thread Any thread, but will involve the emulation thread.
3283 */
3284 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3285
3286 /**
3287 * Set ISA IRQ for a device.
3288 *
3289 * @param pDevIns Device instance.
3290 * @param iIrq IRQ number to set.
3291 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3292 * @thread Any thread, but will involve the emulation thread.
3293 */
3294 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3295
3296 /**
3297 * Read physical memory.
3298 *
3299 * @returns VINF_SUCCESS (for now).
3300 * @param pDevIns Device instance.
3301 * @param GCPhys Physical address start reading from.
3302 * @param pvBuf Where to put the read bits.
3303 * @param cbRead How many bytes to read.
3304 */
3305 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3306
3307 /**
3308 * Write to physical memory.
3309 *
3310 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3311 * @param pDevIns Device instance.
3312 * @param GCPhys Physical address to write to.
3313 * @param pvBuf What to write.
3314 * @param cbWrite How many bytes to write.
3315 */
3316 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3317
3318 /**
3319 * Checks if the Gate A20 is enabled or not.
3320 *
3321 * @returns true if A20 is enabled.
3322 * @returns false if A20 is disabled.
3323 * @param pDevIns Device instance.
3324 * @thread The emulation thread.
3325 */
3326 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3327
3328 /**
3329 * Set the VM error message
3330 *
3331 * @returns rc.
3332 * @param pDrvIns Driver instance.
3333 * @param rc VBox status code.
3334 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3335 * @param pszFormat Error message format string.
3336 * @param ... Error message arguments.
3337 */
3338 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3339
3340 /**
3341 * Set the VM error message
3342 *
3343 * @returns rc.
3344 * @param pDrvIns Driver instance.
3345 * @param rc VBox status code.
3346 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3347 * @param pszFormat Error message format string.
3348 * @param va Error message arguments.
3349 */
3350 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3351
3352 /**
3353 * Set the VM runtime error message
3354 *
3355 * @returns VBox status code.
3356 * @param pDevIns Device instance.
3357 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3358 * @param pszErrorId Error ID string.
3359 * @param pszFormat Error message format string.
3360 * @param ... Error message arguments.
3361 */
3362 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3363
3364 /**
3365 * Set the VM runtime error message
3366 *
3367 * @returns VBox status code.
3368 * @param pDevIns Device instance.
3369 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3370 * @param pszErrorId Error ID string.
3371 * @param pszFormat Error message format string.
3372 * @param va Error message arguments.
3373 */
3374 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3375
3376 /**
3377 * Set parameters for pending MMIO patch operation
3378 *
3379 * @returns rc.
3380 * @param pDevIns Device instance.
3381 * @param GCPhys MMIO physical address
3382 * @param pCachedData GC pointer to cached data
3383 */
3384 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3385
3386 /**
3387 * Gets the VM handle. Restricted API.
3388 *
3389 * @returns VM Handle.
3390 * @param pDevIns Device instance.
3391 */
3392 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3393
3394 /**
3395 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3396 *
3397 * @returns true = yes, false = no
3398 * @param pDevIns Device instance.
3399 */
3400 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3401
3402 /**
3403 * Gets the VMCPU handle. Restricted API.
3404 *
3405 * @returns VMCPU Handle.
3406 * @param pDevIns The device instance.
3407 */
3408 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3409
3410 /** Just a safety precaution. */
3411 uint32_t u32TheEnd;
3412} PDMDEVHLPR0;
3413/** Pointer PDM Device R0 API. */
3414typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3415/** Pointer PDM Device GC API. */
3416typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3417
3418/** Current PDMDEVHLP version number. */
3419#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3420
3421
3422
3423/**
3424 * PDM Device Instance.
3425 */
3426typedef struct PDMDEVINS
3427{
3428 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3429 uint32_t u32Version;
3430 /** Device instance number. */
3431 uint32_t iInstance;
3432
3433 /** Pointer the GC PDM Device API. */
3434 PCPDMDEVHLPRC pHlpRC;
3435 /** Pointer to device instance data. */
3436 RTRCPTR pvInstanceDataRC;
3437
3438 /** Pointer the R0 PDM Device API. */
3439 PCPDMDEVHLPR0 pHlpR0;
3440 /** Pointer to device instance data (R0). */
3441 RTR0PTR pvInstanceDataR0;
3442
3443 /** Pointer the HC PDM Device API. */
3444 PCPDMDEVHLPR3 pHlpR3;
3445 /** Pointer to device instance data. */
3446 RTR3PTR pvInstanceDataR3;
3447
3448 /** Pointer to device registration structure. */
3449 R3PTRTYPE(PCPDMDEVREG) pReg;
3450 /** Configuration handle. */
3451 R3PTRTYPE(PCFGMNODE) pCfg;
3452
3453 /** The base interface of the device.
3454 * The device constructor initializes this if it has any
3455 * device level interfaces to export. To obtain this interface
3456 * call PDMR3QueryDevice(). */
3457 PDMIBASE IBase;
3458 /** Align the internal data more naturally. */
3459 RTR3PTR R3PtrPadding;
3460
3461 /** Internal data. */
3462 union
3463 {
3464#ifdef PDMDEVINSINT_DECLARED
3465 PDMDEVINSINT s;
3466#endif
3467 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3468 } Internal;
3469
3470 /** Device instance data. The size of this area is defined
3471 * in the PDMDEVREG::cbInstanceData field. */
3472 char achInstanceData[8];
3473} PDMDEVINS;
3474
3475/** Current PDMDEVINS version number. */
3476#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 1, 0)
3477
3478/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3479#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3480
3481/**
3482 * Checks the structure versions of the device instance and device helpers,
3483 * returning if they are incompatible.
3484 *
3485 * This is for use in the constructor.
3486 *
3487 * @param pDevIns The device instance pointer.
3488 */
3489#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3490 do \
3491 { \
3492 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3493 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3494 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3495 VERR_VERSION_MISMATCH); \
3496 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3497 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3498 VERR_VERSION_MISMATCH); \
3499 } while (0)
3500
3501/**
3502 * Quietly checks the structure versions of the device instance and device
3503 * helpers, returning if they are incompatible.
3504 *
3505 * This is for use in the destructor.
3506 *
3507 * @param pDevIns The device instance pointer.
3508 */
3509#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3510 do \
3511 { \
3512 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3513 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3514 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3515 return VERR_VERSION_MISMATCH; \
3516 } while (0)
3517
3518/** @def PDMDEV_ASSERT_EMT
3519 * Assert that the current thread is the emulation thread.
3520 */
3521#ifdef VBOX_STRICT
3522# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3523#else
3524# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3525#endif
3526
3527/** @def PDMDEV_ASSERT_OTHER
3528 * Assert that the current thread is NOT the emulation thread.
3529 */
3530#ifdef VBOX_STRICT
3531# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3532#else
3533# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3534#endif
3535
3536/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3537 * Assert that the current thread is owner of the VM lock.
3538 */
3539#ifdef VBOX_STRICT
3540# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3541#else
3542# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3543#endif
3544
3545/** @def PDMDEV_SET_ERROR
3546 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3547 */
3548#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3549 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3550
3551/** @def PDMDEV_SET_RUNTIME_ERROR
3552 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3553 */
3554#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3555 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3556
3557/** @def PDMDEVINS_2_RCPTR
3558 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3559 */
3560#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3561
3562/** @def PDMDEVINS_2_R3PTR
3563 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3564 */
3565#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3566
3567/** @def PDMDEVINS_2_R0PTR
3568 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3569 */
3570#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3571
3572
3573#ifdef IN_RING3
3574
3575/**
3576 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3577 */
3578DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3579 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3580 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3581{
3582 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3583}
3584
3585/**
3586 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3587 */
3588DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3589 const char *pszOut, const char *pszIn, const char *pszOutStr,
3590 const char *pszInStr, const char *pszDesc)
3591{
3592 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3593}
3594
3595/**
3596 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3597 */
3598DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3599 const char *pszOut, const char *pszIn, const char *pszOutStr,
3600 const char *pszInStr, const char *pszDesc)
3601{
3602 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3603}
3604
3605/**
3606 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3607 */
3608DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3609{
3610 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3611}
3612
3613/**
3614 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3615 */
3616DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3617 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3618 const char *pszDesc)
3619{
3620 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3621}
3622
3623/**
3624 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3625 */
3626DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3627 const char *pszWrite, const char *pszRead, const char *pszFill)
3628{
3629 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3630}
3631
3632/**
3633 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3634 */
3635DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3636 const char *pszWrite, const char *pszRead, const char *pszFill)
3637{
3638 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3639}
3640
3641/**
3642 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3643 */
3644DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3645{
3646 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3647}
3648
3649/**
3650 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3651 */
3652DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3653{
3654 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3655}
3656
3657/**
3658 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3659 */
3660DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3661{
3662 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3663}
3664
3665/**
3666 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3667 */
3668DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3669{
3670 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3671}
3672
3673/**
3674 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3675 */
3676DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3677{
3678 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3679}
3680
3681/**
3682 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3683 */
3684DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3685 const char *pszDesc, PRTRCPTR pRCPtr)
3686{
3687 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3688}
3689
3690/**
3691 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3692 */
3693DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3694 const char *pszDesc, PRTR0PTR pR0Ptr)
3695{
3696 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3697}
3698
3699/**
3700 * @copydoc PDMDEVHLPR3::pfnROMRegister
3701 */
3702DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3703{
3704 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3705}
3706
3707/**
3708 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3709 */
3710DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3711{
3712 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3713}
3714
3715/**
3716 * Register a save state data unit.
3717 *
3718 * @returns VBox status.
3719 * @param pDevIns The device instance.
3720 * @param uVersion Data layout version number.
3721 * @param cbGuess The approximate amount of data in the unit.
3722 * Only for progress indicators.
3723 * @param pfnSaveExec Execute save callback, optional.
3724 * @param pfnLoadExec Execute load callback, optional.
3725 */
3726DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3727 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3728{
3729 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3730 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3731 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3732 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3733}
3734
3735/**
3736 * Register a save state data unit with a live save callback as well.
3737 *
3738 * @returns VBox status.
3739 * @param pDevIns The device instance.
3740 * @param uVersion Data layout version number.
3741 * @param cbGuess The approximate amount of data in the unit.
3742 * Only for progress indicators.
3743 * @param pfnLiveExec Execute live callback, optional.
3744 * @param pfnSaveExec Execute save callback, optional.
3745 * @param pfnLoadExec Execute load callback, optional.
3746 */
3747DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3748 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3749{
3750 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3751 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3752 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3753 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3754}
3755
3756/**
3757 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3758 */
3759DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3760 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3761 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3762 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3763{
3764 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3765 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3766 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3767 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3768}
3769
3770/**
3771 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3772 */
3773DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3774 const char *pszDesc, PPTMTIMERR3 ppTimer)
3775{
3776 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3777}
3778
3779/**
3780 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3781 */
3782DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3783{
3784 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3785}
3786
3787#endif /* IN_RING3 */
3788
3789/**
3790 * @copydoc PDMDEVHLPR3::pfnPhysRead
3791 */
3792DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3793{
3794 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3795}
3796
3797/**
3798 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3799 */
3800DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3801{
3802 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3803}
3804
3805#ifdef IN_RING3
3806
3807/**
3808 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3809 */
3810DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3811{
3812 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3813}
3814
3815/**
3816 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3817 */
3818DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3819{
3820 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3821}
3822
3823/**
3824 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3825 */
3826DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3827{
3828 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3829}
3830
3831/**
3832 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3833 */
3834DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3835{
3836 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3837}
3838
3839/**
3840 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3841 */
3842DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3843{
3844 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3845}
3846
3847/**
3848 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3849 */
3850DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3851{
3852 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3853}
3854
3855/**
3856 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3857 */
3858DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3859{
3860 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3861}
3862
3863/**
3864 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3865 */
3866DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3867{
3868 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3869}
3870
3871/**
3872 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3873 */
3874DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3875{
3876 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
3877}
3878
3879/**
3880 * @copydoc PDMDEVHLPR3::pfnVMState
3881 */
3882DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3883{
3884 return pDevIns->pHlpR3->pfnVMState(pDevIns);
3885}
3886
3887/**
3888 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
3889 */
3890DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
3891{
3892 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
3893}
3894
3895#endif /* IN_RING3 */
3896
3897/**
3898 * @copydoc PDMDEVHLPR3::pfnVMSetError
3899 */
3900DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3901{
3902 va_list va;
3903 va_start(va, pszFormat);
3904 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3905 va_end(va);
3906 return rc;
3907}
3908
3909/**
3910 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3911 */
3912DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3913{
3914 va_list va;
3915 int rc;
3916 va_start(va, pszFormat);
3917 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3918 va_end(va);
3919 return rc;
3920}
3921
3922/**
3923 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
3924 *
3925 * @returns VBox status code which must be passed up to the VMM. This will be
3926 * VINF_SUCCESS in non-strict builds.
3927 * @param pDevIns The device instance.
3928 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3929 * @param pszFormat Message. (optional)
3930 * @param ... Message parameters.
3931 */
3932DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3933{
3934#ifdef VBOX_STRICT
3935# ifdef IN_RING3
3936 int rc;
3937 va_list args;
3938 va_start(args, pszFormat);
3939 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3940 va_end(args);
3941 return rc;
3942# else
3943 return VINF_EM_DBG_STOP;
3944# endif
3945#else
3946 NOREF(pDevIns);
3947 NOREF(pszFile);
3948 NOREF(iLine);
3949 NOREF(pszFunction);
3950 NOREF(pszFormat);
3951 return VINF_SUCCESS;
3952#endif
3953}
3954
3955#ifdef IN_RING3
3956
3957/**
3958 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3959 */
3960DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3961{
3962 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3963}
3964
3965/**
3966 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3967 */
3968DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3969{
3970 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3971}
3972
3973/**
3974 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3975 */
3976DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3977 const char *pszDesc, const char *pszName, ...)
3978{
3979 va_list va;
3980 va_start(va, pszName);
3981 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3982 va_end(va);
3983}
3984
3985/**
3986 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3987 */
3988DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3989{
3990 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3991}
3992
3993/**
3994 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3995 */
3996DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3997{
3998 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3999}
4000
4001/**
4002 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4003 */
4004DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4005 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4006{
4007 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4008}
4009
4010#endif /* IN_RING3 */
4011
4012/**
4013 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4014 */
4015DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4016{
4017 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4018}
4019
4020/**
4021 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4022 */
4023DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4024{
4025 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4026}
4027
4028/**
4029 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4030 */
4031DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4032{
4033 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4034}
4035
4036/**
4037 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4038 */
4039DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4040{
4041 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4042}
4043
4044#ifdef IN_RING3
4045
4046/**
4047 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4048 */
4049DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4050{
4051 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4052}
4053
4054/**
4055 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4056 */
4057DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4058 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4059{
4060 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4061}
4062
4063/**
4064 * Initializes a PDM critical section.
4065 *
4066 * The PDM critical sections are derived from the IPRT critical sections, but
4067 * works in RC and R0 as well.
4068 *
4069 * @returns VBox status code.
4070 * @param pDevIns The device instance.
4071 * @param pCritSect Pointer to the critical section.
4072 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4073 * @param pszNameFmt Format string for namging the critical section.
4074 * For statistics and lock validation.
4075 * @param ... Arguments for the format string.
4076 */
4077DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4078{
4079 int rc;
4080 va_list va;
4081 va_start(va, pszNameFmt);
4082 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4083 va_end(va);
4084 return rc;
4085}
4086
4087/**
4088 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4089 */
4090DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4091 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4092{
4093 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4094}
4095
4096/**
4097 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4098 */
4099DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4100{
4101 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4102}
4103
4104/**
4105 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4106 */
4107DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4108{
4109 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4110}
4111
4112/**
4113 * @copydoc PDMDEVHLPR3::pfnA20Set
4114 */
4115DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4116{
4117 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4118}
4119
4120/**
4121 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4122 */
4123DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4124{
4125 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4126}
4127
4128/**
4129 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4130 */
4131DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4132{
4133 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4134}
4135
4136/**
4137 * @copydoc PDMDEVHLPR3::pfnPICRegister
4138 */
4139DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4140{
4141 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4142}
4143
4144/**
4145 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4146 */
4147DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4148{
4149 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4150}
4151
4152/**
4153 * @copydoc PDMDEVHLPR3::pfn
4154 */
4155DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4156{
4157 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4158}
4159
4160/**
4161 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4162 */
4163DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4164{
4165 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4166}
4167
4168/**
4169 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4170 */
4171DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4172{
4173 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4174}
4175
4176/**
4177 * @copydoc PDMDEVHLPR3::pfnDMARegister
4178 */
4179DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4180{
4181 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4182}
4183
4184/**
4185 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4186 */
4187DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4188{
4189 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4190}
4191
4192/**
4193 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4194 */
4195DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4196{
4197 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4198}
4199
4200/**
4201 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4202 */
4203DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4204{
4205 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4206}
4207
4208/**
4209 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4210 */
4211DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4212{
4213 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4214}
4215
4216/**
4217 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4218 */
4219DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4220{
4221 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4222}
4223
4224/**
4225 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4226 */
4227DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4228{
4229 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4230}
4231
4232/**
4233 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4234 */
4235DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4236{
4237 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4238}
4239
4240#endif /* IN_RING3 */
4241
4242/**
4243 * @copydoc PDMDEVHLPR3::pfnGetVM
4244 */
4245DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4246{
4247 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4248}
4249
4250/**
4251 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4252 */
4253DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4254{
4255 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4256}
4257
4258#ifdef IN_RING3
4259
4260/**
4261 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4262 */
4263DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4264{
4265 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4266}
4267
4268/**
4269 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4270 */
4271DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4272{
4273 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4274}
4275
4276/**
4277 * @copydoc PDMDEVHLPR3::pfnVMReset
4278 */
4279DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4280{
4281 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4282}
4283
4284/**
4285 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4286 */
4287DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4288{
4289 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4290}
4291
4292/**
4293 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4294 */
4295DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4296{
4297 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4298}
4299
4300#endif /* IN_RING3 */
4301
4302/**
4303 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4304 */
4305DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4306{
4307 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4308}
4309
4310#ifdef IN_RING3
4311
4312/**
4313 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4314 */
4315DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4316{
4317 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4318}
4319
4320#endif /* IN_RING3 */
4321#ifdef IN_RING0
4322
4323/**
4324 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4325 */
4326DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4327{
4328 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4329}
4330
4331#endif /* IN_RING0 */
4332
4333
4334
4335
4336/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4337typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4338
4339/**
4340 * Callbacks for VBoxDeviceRegister().
4341 */
4342typedef struct PDMDEVREGCB
4343{
4344 /** Interface version.
4345 * This is set to PDM_DEVREG_CB_VERSION. */
4346 uint32_t u32Version;
4347
4348 /**
4349 * Registers a device with the current VM instance.
4350 *
4351 * @returns VBox status code.
4352 * @param pCallbacks Pointer to the callback table.
4353 * @param pReg Pointer to the device registration record.
4354 * This data must be permanent and readonly.
4355 */
4356 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4357} PDMDEVREGCB;
4358
4359/** Current version of the PDMDEVREGCB structure. */
4360#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4361
4362
4363/**
4364 * The VBoxDevicesRegister callback function.
4365 *
4366 * PDM will invoke this function after loading a device module and letting
4367 * the module decide which devices to register and how to handle conflicts.
4368 *
4369 * @returns VBox status code.
4370 * @param pCallbacks Pointer to the callback table.
4371 * @param u32Version VBox version number.
4372 */
4373typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4374
4375/** @} */
4376
4377RT_C_DECLS_END
4378
4379#endif
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