VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 22650

Last change on this file since 22650 was 22480, checked in by vboxsync, 15 years ago

SSM,VMM,Devices,Main,VBoxBFE: Live snapshot/migration SSM API adjustments.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/pdmdevdrv.h>
39#include <VBox/iom.h>
40#include <VBox/tm.h>
41#include <VBox/ssm.h>
42#include <VBox/cfgm.h>
43#include <VBox/dbgf.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48RT_C_DECLS_BEGIN
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust it's state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 */
208typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
209/** Pointer to a FNPDMDEVDETACH() function. */
210typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
211
212/**
213 * Query the base interface of a logical unit.
214 *
215 * @returns VBOX status code.
216 * @param pDevIns The device instance.
217 * @param iLUN The logicial unit to query.
218 * @param ppBase Where to store the pointer to the base interface of the LUN.
219 */
220typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
221/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
222typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
223
224/**
225 * Init complete notification.
226 * This can be done to do communication with other devices and other
227 * initialization which requires everything to be in place.
228 *
229 * @returns VBOX status code.
230 * @param pDevIns The device instance.
231 */
232typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
233/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
234typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
235
236
237
238/** PDM Device Registration Structure,
239 * This structure is used when registering a device from
240 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
241 * the VM is terminated.
242 */
243typedef struct PDMDEVREG
244{
245 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
246 uint32_t u32Version;
247 /** Device name. */
248 char szDeviceName[32];
249 /** Name of the raw-mode context module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
251 char szRCMod[32];
252 /** Name of the ring-0 module (no path).
253 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
254 char szR0Mod[32];
255 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
256 * remain unchanged from registration till VM destruction. */
257 const char *pszDescription;
258
259 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
260 RTUINT fFlags;
261 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
262 RTUINT fClass;
263 /** Maximum number of instances (per VM). */
264 RTUINT cMaxInstances;
265 /** Size of the instance data. */
266 RTUINT cbInstance;
267
268 /** Construct instance - required. */
269 PFNPDMDEVCONSTRUCT pfnConstruct;
270 /** Destruct instance - optional. */
271 PFNPDMDEVDESTRUCT pfnDestruct;
272 /** Relocation command - optional. */
273 PFNPDMDEVRELOCATE pfnRelocate;
274 /** I/O Control interface - optional. */
275 PFNPDMDEVIOCTL pfnIOCtl;
276 /** Power on notification - optional. */
277 PFNPDMDEVPOWERON pfnPowerOn;
278 /** Reset notification - optional. */
279 PFNPDMDEVRESET pfnReset;
280 /** Suspend notification - optional. */
281 PFNPDMDEVSUSPEND pfnSuspend;
282 /** Resume notification - optional. */
283 PFNPDMDEVRESUME pfnResume;
284 /** Attach command - optional. */
285 PFNPDMDEVATTACH pfnAttach;
286 /** Detach notification - optional. */
287 PFNPDMDEVDETACH pfnDetach;
288 /** Query a LUN base interface - optional. */
289 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
290 /** Init complete notification - optional. */
291 PFNPDMDEVINITCOMPLETE pfnInitComplete;
292 /** Power off notification - optional. */
293 PFNPDMDEVPOWEROFF pfnPowerOff;
294 /** @todo */
295 PFNRT pfnSoftReset;
296 /** Initialization safty marker. */
297 uint32_t u32VersionEnd;
298} PDMDEVREG;
299/** Pointer to a PDM Device Structure. */
300typedef PDMDEVREG *PPDMDEVREG;
301/** Const pointer to a PDM Device Structure. */
302typedef PDMDEVREG const *PCPDMDEVREG;
303
304/** Current DEVREG version number. */
305#define PDM_DEVREG_VERSION 0xc0020000
306
307/** PDM Device Flags.
308 * @{ */
309/** This flag is used to indicate that the device has a RC component. */
310#define PDM_DEVREG_FLAGS_RC 0x00000001
311/** This flag is used to indicate that the device has a R0 component. */
312#define PDM_DEVREG_FLAGS_R0 0x00000002
313
314/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
315 * The bit count for the current host. */
316#if HC_ARCH_BITS == 32
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
318#elif HC_ARCH_BITS == 64
319# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
320#else
321# error Unsupported HC_ARCH_BITS value.
322#endif
323/** The host bit count mask. */
324#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
325
326/** The device support only 32-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
328/** The device support only 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
330/** The device support both 32-bit & 64-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
332/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
333 * The guest bit count for the current compilation. */
334#if GC_ARCH_BITS == 32
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
336#elif GC_ARCH_BITS == 64
337# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
338#else
339# error Unsupported GC_ARCH_BITS value.
340#endif
341/** The guest bit count mask. */
342#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
343
344/** A convenience. */
345#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
346
347/** Indicates that the devices support PAE36 on a 32-bit guest. */
348#define PDM_DEVREG_FLAGS_PAE36 0x00001000
349
350/** Indicates that the device needs to be notified before the drivers when suspending. */
351#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
352
353/** Indicates that the device needs to be notified before the drivers when powering off. */
354#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
355/** @} */
356
357
358/** PDM Device Classes.
359 * The order is important, lower bit earlier instantiation.
360 * @{ */
361/** Architecture device. */
362#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
363/** Architecture BIOS device. */
364#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
365/** PCI bus brigde. */
366#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
367/** ISA bus brigde. */
368#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
369/** Input device (mouse, keyboard, joystick, HID, ...). */
370#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
371/** Interrupt controller (PIC). */
372#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
373/** Interval controoler (PIT). */
374#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
375/** RTC/CMOS. */
376#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
377/** DMA controller. */
378#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
379/** VMM Device. */
380#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
381/** Graphics device, like VGA. */
382#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
383/** Storage controller device. */
384#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
385/** Network interface controller. */
386#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
387/** Audio. */
388#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
389/** USB HIC. */
390#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
391/** ACPI. */
392#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
393/** Serial controller device. */
394#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
395/** Parallel controller device */
396#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
397/** Misc devices (always last). */
398#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
399/** @} */
400
401
402/** @name IRQ Level for use with the *SetIrq APIs.
403 * @{
404 */
405/** Assert the IRQ (can assume value 1). */
406#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
407/** Deassert the IRQ (can assume value 0). */
408#define PDM_IRQ_LEVEL_LOW 0
409/** flip-flop - assert and then deassert it again immediately. */
410#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
411/** @} */
412
413
414/**
415 * PCI Bus registration structure.
416 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
417 */
418typedef struct PDMPCIBUSREG
419{
420 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
421 uint32_t u32Version;
422
423 /**
424 * Registers the device with the default PCI bus.
425 *
426 * @returns VBox status code.
427 * @param pDevIns Device instance of the PCI Bus.
428 * @param pPciDev The PCI device structure.
429 * Any PCI enabled device must keep this in it's instance data!
430 * Fill in the PCI data config before registration, please.
431 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
432 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
433 * If negative, the pci bus device will assign one.
434 */
435 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
436
437 /**
438 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
439 *
440 * @returns VBox status code.
441 * @param pDevIns Device instance of the PCI Bus.
442 * @param pPciDev The PCI device structure.
443 * @param iRegion The region number.
444 * @param cbRegion Size of the region.
445 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
446 * @param pfnCallback Callback for doing the mapping.
447 */
448 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
449
450 /**
451 * Register PCI configuration space read/write callbacks.
452 *
453 * @param pDevIns Device instance of the PCI Bus.
454 * @param pPciDev The PCI device structure.
455 * @param pfnRead Pointer to the user defined PCI config read function.
456 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
457 * PCI config read function. This way, user can decide when (and if)
458 * to call default PCI config read function. Can be NULL.
459 * @param pfnWrite Pointer to the user defined PCI config write function.
460 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
461 * PCI config write function. This way, user can decide when (and if)
462 * to call default PCI config write function. Can be NULL.
463 * @thread EMT
464 */
465 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
466 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
467
468 /**
469 * Set the IRQ for a PCI device.
470 *
471 * @param pDevIns Device instance of the PCI Bus.
472 * @param pPciDev The PCI device structure.
473 * @param iIrq IRQ number to set.
474 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
475 */
476 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
477
478 /**
479 * Saves a state of the PCI device.
480 *
481 * @returns VBox status code.
482 * @param pDevIns Device instance of the PCI Bus.
483 * @param pPciDev Pointer to PCI device.
484 * @param pSSMHandle The handle to save the state to.
485 */
486 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
487
488 /**
489 * Loads a saved PCI device state.
490 *
491 * @returns VBox status code.
492 * @param pDevIns Device instance of the PCI Bus.
493 * @param pPciDev Pointer to PCI device.
494 * @param pSSMHandle The handle to the saved state.
495 */
496 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
497
498 /**
499 * Called to perform the job of the bios.
500 * This is only called for the first PCI Bus - it is expected to
501 * service all the PCI buses.
502 *
503 * @returns VBox status.
504 * @param pDevIns Device instance of the first bus.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
507
508 /** The name of the SetIrq RC entry point. */
509 const char *pszSetIrqRC;
510
511 /** The name of the SetIrq R0 entry point. */
512 const char *pszSetIrqR0;
513
514} PDMPCIBUSREG;
515/** Pointer to a PCI bus registration structure. */
516typedef PDMPCIBUSREG *PPDMPCIBUSREG;
517
518/** Current PDMPCIBUSREG version number. */
519#define PDM_PCIBUSREG_VERSION 0xd0020000
520
521/**
522 * PCI Bus RC helpers.
523 */
524typedef struct PDMPCIHLPRC
525{
526 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
527 uint32_t u32Version;
528
529 /**
530 * Set an ISA IRQ.
531 *
532 * @param pDevIns PCI device instance.
533 * @param iIrq IRQ number to set.
534 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
535 * @thread EMT only.
536 */
537 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
538
539 /**
540 * Set an I/O-APIC IRQ.
541 *
542 * @param pDevIns PCI device instance.
543 * @param iIrq IRQ number to set.
544 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
545 * @thread EMT only.
546 */
547 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
548
549 /**
550 * Acquires the PDM lock.
551 *
552 * @returns VINF_SUCCESS on success.
553 * @returns rc if we failed to acquire the lock.
554 * @param pDevIns The PCI device instance.
555 * @param rc What to return if we fail to acquire the lock.
556 */
557 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
558
559 /**
560 * Releases the PDM lock.
561 *
562 * @param pDevIns The PCI device instance.
563 */
564 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
565
566 /** Just a safety precaution. */
567 uint32_t u32TheEnd;
568} PDMPCIHLPRC;
569/** Pointer to PCI helpers. */
570typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
571/** Pointer to const PCI helpers. */
572typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
573
574/** Current PDMPCIHLPR3 version number. */
575#define PDM_PCIHLPRC_VERSION 0xe1010000
576
577
578/**
579 * PCI Bus R0 helpers.
580 */
581typedef struct PDMPCIHLPR0
582{
583 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
584 uint32_t u32Version;
585
586 /**
587 * Set an ISA IRQ.
588 *
589 * @param pDevIns PCI device instance.
590 * @param iIrq IRQ number to set.
591 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
592 * @thread EMT only.
593 */
594 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
595
596 /**
597 * Set an I/O-APIC IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @thread EMT only.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
605
606 /**
607 * Acquires the PDM lock.
608 *
609 * @returns VINF_SUCCESS on success.
610 * @returns rc if we failed to acquire the lock.
611 * @param pDevIns The PCI device instance.
612 * @param rc What to return if we fail to acquire the lock.
613 */
614 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
615
616 /**
617 * Releases the PDM lock.
618 *
619 * @param pDevIns The PCI device instance.
620 */
621 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
622
623 /** Just a safety precaution. */
624 uint32_t u32TheEnd;
625} PDMPCIHLPR0;
626/** Pointer to PCI helpers. */
627typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
628/** Pointer to const PCI helpers. */
629typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
630
631/** Current PDMPCIHLPR0 version number. */
632#define PDM_PCIHLPR0_VERSION 0xe1010000
633
634/**
635 * PCI device helpers.
636 */
637typedef struct PDMPCIHLPR3
638{
639 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
640 uint32_t u32Version;
641
642 /**
643 * Set an ISA IRQ.
644 *
645 * @param pDevIns The PCI device instance.
646 * @param iIrq IRQ number to set.
647 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
648 * @thread EMT only.
649 */
650 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
651
652 /**
653 * Set an I/O-APIC IRQ.
654 *
655 * @param pDevIns The PCI device instance.
656 * @param iIrq IRQ number to set.
657 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
658 * @thread EMT only.
659 */
660 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
661
662 /**
663 * Checks if the given address is an MMIO2 base address or not.
664 *
665 * @returns true/false accordingly.
666 * @param pDevIns The PCI device instance.
667 * @param pOwner The owner of the memory, optional.
668 * @param GCPhys The address to check.
669 */
670 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
671
672 /**
673 * Gets the address of the RC PCI Bus helpers.
674 *
675 * This should be called at both construction and relocation time
676 * to obtain the correct address of the RC helpers.
677 *
678 * @returns RC pointer to the PCI Bus helpers.
679 * @param pDevIns Device instance of the PCI Bus.
680 * @thread EMT only.
681 */
682 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
683
684 /**
685 * Gets the address of the R0 PCI Bus helpers.
686 *
687 * This should be called at both construction and relocation time
688 * to obtain the correct address of the R0 helpers.
689 *
690 * @returns R0 pointer to the PCI Bus helpers.
691 * @param pDevIns Device instance of the PCI Bus.
692 * @thread EMT only.
693 */
694 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
695
696 /**
697 * Acquires the PDM lock.
698 *
699 * @returns VINF_SUCCESS on success.
700 * @returns Fatal error on failure.
701 * @param pDevIns The PCI device instance.
702 * @param rc Dummy for making the interface identical to the RC and R0 versions.
703 */
704 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
705
706 /**
707 * Releases the PDM lock.
708 *
709 * @param pDevIns The PCI device instance.
710 */
711 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
712
713 /** Just a safety precaution. */
714 uint32_t u32TheEnd;
715} PDMPCIHLPR3;
716/** Pointer to PCI helpers. */
717typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
718/** Pointer to const PCI helpers. */
719typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
720
721/** Current PDMPCIHLPR3 version number. */
722#define PDM_PCIHLPR3_VERSION 0xf1020000
723
724
725/**
726 * Programmable Interrupt Controller registration structure.
727 */
728typedef struct PDMPICREG
729{
730 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
731 uint32_t u32Version;
732
733 /**
734 * Set the an IRQ.
735 *
736 * @param pDevIns Device instance of the PIC.
737 * @param iIrq IRQ number to set.
738 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
739 */
740 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
741
742 /**
743 * Get a pending interrupt.
744 *
745 * @returns Pending interrupt number.
746 * @param pDevIns Device instance of the PIC.
747 */
748 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
749
750 /** The name of the RC SetIrq entry point. */
751 const char *pszSetIrqRC;
752 /** The name of the RC GetInterrupt entry point. */
753 const char *pszGetInterruptRC;
754
755 /** The name of the R0 SetIrq entry point. */
756 const char *pszSetIrqR0;
757 /** The name of the R0 GetInterrupt entry point. */
758 const char *pszGetInterruptR0;
759} PDMPICREG;
760/** Pointer to a PIC registration structure. */
761typedef PDMPICREG *PPDMPICREG;
762
763/** Current PDMPICREG version number. */
764#define PDM_PICREG_VERSION 0xe0020000
765
766/**
767 * PIC RC helpers.
768 */
769typedef struct PDMPICHLPRC
770{
771 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
772 uint32_t u32Version;
773
774 /**
775 * Set the interrupt force action flag.
776 *
777 * @param pDevIns Device instance of the PIC.
778 */
779 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
780
781 /**
782 * Clear the interrupt force action flag.
783 *
784 * @param pDevIns Device instance of the PIC.
785 */
786 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
787
788 /**
789 * Acquires the PDM lock.
790 *
791 * @returns VINF_SUCCESS on success.
792 * @returns rc if we failed to acquire the lock.
793 * @param pDevIns The PIC device instance.
794 * @param rc What to return if we fail to acquire the lock.
795 */
796 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
797
798 /**
799 * Releases the PDM lock.
800 *
801 * @param pDevIns The PIC device instance.
802 */
803 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
804
805 /** Just a safety precaution. */
806 uint32_t u32TheEnd;
807} PDMPICHLPRC;
808
809/** Pointer to PIC RC helpers. */
810typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
811/** Pointer to const PIC RC helpers. */
812typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
813
814/** Current PDMPICHLPRC version number. */
815#define PDM_PICHLPRC_VERSION 0xfc010000
816
817
818/**
819 * PIC R0 helpers.
820 */
821typedef struct PDMPICHLPR0
822{
823 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
824 uint32_t u32Version;
825
826 /**
827 * Set the interrupt force action flag.
828 *
829 * @param pDevIns Device instance of the PIC.
830 */
831 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
832
833 /**
834 * Clear the interrupt force action flag.
835 *
836 * @param pDevIns Device instance of the PIC.
837 */
838 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
839
840 /**
841 * Acquires the PDM lock.
842 *
843 * @returns VINF_SUCCESS on success.
844 * @returns rc if we failed to acquire the lock.
845 * @param pDevIns The PIC device instance.
846 * @param rc What to return if we fail to acquire the lock.
847 */
848 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
849
850 /**
851 * Releases the PDM lock.
852 *
853 * @param pDevIns The PCI device instance.
854 */
855 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
856
857 /** Just a safety precaution. */
858 uint32_t u32TheEnd;
859} PDMPICHLPR0;
860
861/** Pointer to PIC R0 helpers. */
862typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
863/** Pointer to const PIC R0 helpers. */
864typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
865
866/** Current PDMPICHLPR0 version number. */
867#define PDM_PICHLPR0_VERSION 0xfc010000
868
869/**
870 * PIC R3 helpers.
871 */
872typedef struct PDMPICHLPR3
873{
874 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
875 uint32_t u32Version;
876
877 /**
878 * Set the interrupt force action flag.
879 *
880 * @param pDevIns Device instance of the PIC.
881 */
882 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
883
884 /**
885 * Clear the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Acquires the PDM lock.
893 *
894 * @returns VINF_SUCCESS on success.
895 * @returns Fatal error on failure.
896 * @param pDevIns The PIC device instance.
897 * @param rc Dummy for making the interface identical to the RC and R0 versions.
898 */
899 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
900
901 /**
902 * Releases the PDM lock.
903 *
904 * @param pDevIns The PIC device instance.
905 */
906 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
907
908 /**
909 * Gets the address of the RC PIC helpers.
910 *
911 * This should be called at both construction and relocation time
912 * to obtain the correct address of the RC helpers.
913 *
914 * @returns RC pointer to the PIC helpers.
915 * @param pDevIns Device instance of the PIC.
916 */
917 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
918
919 /**
920 * Gets the address of the R0 PIC helpers.
921 *
922 * This should be called at both construction and relocation time
923 * to obtain the correct address of the R0 helpers.
924 *
925 * @returns R0 pointer to the PIC helpers.
926 * @param pDevIns Device instance of the PIC.
927 */
928 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
929
930 /** Just a safety precaution. */
931 uint32_t u32TheEnd;
932} PDMPICHLPR3;
933
934/** Pointer to PIC R3 helpers. */
935typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
936/** Pointer to const PIC R3 helpers. */
937typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
938
939/** Current PDMPICHLPR3 version number. */
940#define PDM_PICHLPR3_VERSION 0xf0010000
941
942
943
944/**
945 * Advanced Programmable Interrupt Controller registration structure.
946 */
947typedef struct PDMAPICREG
948{
949 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
950 uint32_t u32Version;
951
952 /**
953 * Get a pending interrupt.
954 *
955 * @returns Pending interrupt number.
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
959
960 /**
961 * Check if the APIC has a pending interrupt/if a TPR change would active one
962 *
963 * @returns Pending interrupt yes/no
964 * @param pDevIns Device instance of the APIC.
965 */
966 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
967
968 /**
969 * Set the APIC base.
970 *
971 * @param pDevIns Device instance of the APIC.
972 * @param u64Base The new base.
973 */
974 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
975
976 /**
977 * Get the APIC base.
978 *
979 * @returns Current base.
980 * @param pDevIns Device instance of the APIC.
981 */
982 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
983
984 /**
985 * Set the TPR (task priority register).
986 *
987 * @param pDevIns Device instance of the APIC.
988 * @param idCpu VCPU id
989 * @param u8TPR The new TPR.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
992
993 /**
994 * Get the TPR (task priority register).
995 *
996 * @returns The current TPR.
997 * @param pDevIns Device instance of the APIC.
998 * @param idCpu VCPU id
999 */
1000 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1001
1002 /**
1003 * Write MSR in APIC range.
1004 *
1005 * @returns VBox status code.
1006 * @param pDevIns Device instance of the APIC.
1007 * @param idCpu Target CPU.
1008 * @param u32Reg MSR to write.
1009 * @param u64Value Value to write.
1010 */
1011 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1012
1013 /**
1014 * Read MSR in APIC range.
1015 *
1016 * @returns VBox status code.
1017 * @param pDevIns Device instance of the APIC.
1018 * @param idCpu Target CPU.
1019 * @param u32Reg MSR to read.
1020 * @param pu64Value Value read.
1021 */
1022 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1023
1024 /**
1025 * Private interface between the IOAPIC and APIC.
1026 *
1027 * This is a low-level, APIC/IOAPIC implementation specific interface
1028 * which is registered with PDM only because it makes life so much
1029 * simpler right now (GC bits). This is a bad bad hack! The correct
1030 * way of doing this would involve some way of querying GC interfaces
1031 * and relocating them. Perhaps doing some kind of device init in GC...
1032 *
1033 * @returns status code.
1034 * @param pDevIns Device instance of the APIC.
1035 * @param u8Dest See APIC implementation.
1036 * @param u8DestMode See APIC implementation.
1037 * @param u8DeliveryMode See APIC implementation.
1038 * @param iVector See APIC implementation.
1039 * @param u8Polarity See APIC implementation.
1040 * @param u8TriggerMode See APIC implementation.
1041 */
1042 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1043 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1044
1045 /** The name of the RC GetInterrupt entry point. */
1046 const char *pszGetInterruptRC;
1047 /** The name of the RC HasPendingIrq entry point. */
1048 const char *pszHasPendingIrqRC;
1049 /** The name of the RC SetBase entry point. */
1050 const char *pszSetBaseRC;
1051 /** The name of the RC GetBase entry point. */
1052 const char *pszGetBaseRC;
1053 /** The name of the RC SetTPR entry point. */
1054 const char *pszSetTPRRC;
1055 /** The name of the RC GetTPR entry point. */
1056 const char *pszGetTPRRC;
1057 /** The name of the RC WriteMSR entry point. */
1058 const char *pszWriteMSRRC;
1059 /** The name of the RC ReadMSR entry point. */
1060 const char *pszReadMSRRC;
1061 /** The name of the RC BusDeliver entry point. */
1062 const char *pszBusDeliverRC;
1063
1064 /** The name of the R0 GetInterrupt entry point. */
1065 const char *pszGetInterruptR0;
1066 /** The name of the R0 HasPendingIrq entry point. */
1067 const char *pszHasPendingIrqR0;
1068 /** The name of the R0 SetBase entry point. */
1069 const char *pszSetBaseR0;
1070 /** The name of the R0 GetBase entry point. */
1071 const char *pszGetBaseR0;
1072 /** The name of the R0 SetTPR entry point. */
1073 const char *pszSetTPRR0;
1074 /** The name of the R0 GetTPR entry point. */
1075 const char *pszGetTPRR0;
1076 /** The name of the R0 WriteMSR entry point. */
1077 const char *pszWriteMSRR0;
1078 /** The name of the R0 ReadMSR entry point. */
1079 const char *pszReadMSRR0;
1080 /** The name of the R0 BusDeliver entry point. */
1081 const char *pszBusDeliverR0;
1082
1083} PDMAPICREG;
1084/** Pointer to an APIC registration structure. */
1085typedef PDMAPICREG *PPDMAPICREG;
1086
1087/** Current PDMAPICREG version number. */
1088#define PDM_APICREG_VERSION 0x70010000
1089
1090
1091/**
1092 * APIC version argument for pfnChangeFeature.
1093 */
1094typedef enum PDMAPICVERSION
1095{
1096 /** Invalid 0 entry. */
1097 PDMAPICVERSION_INVALID = 0,
1098 /** No APIC. */
1099 PDMAPICVERSION_NONE,
1100 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1101 PDMAPICVERSION_APIC,
1102 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1103 PDMAPICVERSION_X2APIC,
1104 /** The usual 32-bit paranoia. */
1105 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1106} PDMAPICVERSION;
1107
1108/**
1109 * APIC irq argument for SetInterruptFF.
1110 */
1111typedef enum PDMAPICIRQ
1112{
1113 /** Invalid 0 entry. */
1114 PDMAPICIRQ_INVALID = 0,
1115 /** Normal hardware interrupt. */
1116 PDMAPICIRQ_HARDWARE,
1117 /** NMI. */
1118 PDMAPICIRQ_NMI,
1119 /** SMI. */
1120 PDMAPICIRQ_SMI,
1121 /** The usual 32-bit paranoia. */
1122 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1123} PDMAPICIRQ;
1124
1125
1126/**
1127 * APIC RC helpers.
1128 */
1129typedef struct PDMAPICHLPRC
1130{
1131 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1132 uint32_t u32Version;
1133
1134 /**
1135 * Set the interrupt force action flag.
1136 *
1137 * @param pDevIns Device instance of the APIC.
1138 * @param enmType IRQ type.
1139 * @param idCpu Virtual CPU to set flag upon.
1140 */
1141 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1142
1143 /**
1144 * Clear the interrupt force action flag.
1145 *
1146 * @param pDevIns Device instance of the APIC.
1147 * @param idCpu Virtual CPU to clear flag upon.
1148 */
1149 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1150
1151 /**
1152 * Modifies APIC-related bits in the CPUID feature mask.
1153 *
1154 * @param pDevIns Device instance of the APIC.
1155 * @param enmVersion Supported APIC version.
1156 */
1157 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1158
1159 /**
1160 * Acquires the PDM lock.
1161 *
1162 * @returns VINF_SUCCESS on success.
1163 * @returns rc if we failed to acquire the lock.
1164 * @param pDevIns The APIC device instance.
1165 * @param rc What to return if we fail to acquire the lock.
1166 */
1167 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1168
1169 /**
1170 * Releases the PDM lock.
1171 *
1172 * @param pDevIns The APIC device instance.
1173 */
1174 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1175
1176 /**
1177 * Get the virtual CPU id corresponding to the current EMT.
1178 *
1179 * @param pDevIns The APIC device instance.
1180 */
1181 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1182
1183 /** Just a safety precaution. */
1184 uint32_t u32TheEnd;
1185} PDMAPICHLPRC;
1186/** Pointer to APIC GC helpers. */
1187typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1188/** Pointer to const APIC helpers. */
1189typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1190
1191/** Current PDMAPICHLPRC version number. */
1192#define PDM_APICHLPRC_VERSION 0x60020000
1193
1194
1195/**
1196 * APIC R0 helpers.
1197 */
1198typedef struct PDMAPICHLPR0
1199{
1200 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1201 uint32_t u32Version;
1202
1203 /**
1204 * Set the interrupt force action flag.
1205 *
1206 * @param pDevIns Device instance of the APIC.
1207 * @param enmType IRQ type.
1208 * @param idCpu Virtual CPU to set flag upon.
1209 */
1210 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1211
1212 /**
1213 * Clear the interrupt force action flag.
1214 *
1215 * @param pDevIns Device instance of the APIC.
1216 * @param idCpu Virtual CPU to clear flag upon.
1217 */
1218 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1219
1220 /**
1221 * Modifies APIC-related bits in the CPUID feature mask.
1222 *
1223 * @param pDevIns Device instance of the APIC.
1224 * @param enmVersion Supported APIC version.
1225 */
1226 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1227
1228 /**
1229 * Acquires the PDM lock.
1230 *
1231 * @returns VINF_SUCCESS on success.
1232 * @returns rc if we failed to acquire the lock.
1233 * @param pDevIns The APIC device instance.
1234 * @param rc What to return if we fail to acquire the lock.
1235 */
1236 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1237
1238 /**
1239 * Releases the PDM lock.
1240 *
1241 * @param pDevIns The APIC device instance.
1242 */
1243 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1244
1245 /**
1246 * Get the virtual CPU id corresponding to the current EMT.
1247 *
1248 * @param pDevIns The APIC device instance.
1249 */
1250 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1251
1252 /** Just a safety precaution. */
1253 uint32_t u32TheEnd;
1254} PDMAPICHLPR0;
1255/** Pointer to APIC GC helpers. */
1256typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1257/** Pointer to const APIC helpers. */
1258typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1259
1260/** Current PDMAPICHLPR0 version number. */
1261#define PDM_APICHLPR0_VERSION 0x60020000
1262
1263/**
1264 * APIC R3 helpers.
1265 */
1266typedef struct PDMAPICHLPR3
1267{
1268 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1269 uint32_t u32Version;
1270
1271 /**
1272 * Set the interrupt force action flag.
1273 *
1274 * @param pDevIns Device instance of the APIC.
1275 * @param enmType IRQ type.
1276 * @param idCpu Virtual CPU to set flag upon.
1277 */
1278 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1279
1280 /**
1281 * Clear the interrupt force action flag.
1282 *
1283 * @param pDevIns Device instance of the APIC.
1284 * @param idCpu Virtual CPU to clear flag upon.
1285 */
1286 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1287
1288 /**
1289 * Modifies APIC-related bits in the CPUID feature mask.
1290 *
1291 * @param pDevIns Device instance of the APIC.
1292 * @param enmVersion Supported APIC version.
1293 */
1294 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1295
1296 /**
1297 * Get the virtual CPU id corresponding to the current EMT.
1298 *
1299 * @param pDevIns The APIC device instance.
1300 */
1301 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1302
1303 /**
1304 * Sends SIPI to given virtual CPU.
1305 *
1306 * @param pDevIns The APIC device instance.
1307 * @param idCpu Virtual CPU to perform SIPI on
1308 * @param iVector SIPI vector
1309 */
1310 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1311
1312 /**
1313 * Sends init IPI to given virtual CPU, should result in reset and
1314 * halting till SIPI.
1315 *
1316 * @param pDevIns The APIC device instance.
1317 * @param idCpu Virtual CPU to perform SIPI on
1318 */
1319 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1320
1321 /**
1322 * Gets the address of the RC APIC helpers.
1323 *
1324 * This should be called at both construction and relocation time
1325 * to obtain the correct address of the RC helpers.
1326 *
1327 * @returns GC pointer to the APIC helpers.
1328 * @param pDevIns Device instance of the APIC.
1329 */
1330 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1331
1332 /**
1333 * Gets the address of the R0 APIC helpers.
1334 *
1335 * This should be called at both construction and relocation time
1336 * to obtain the correct address of the R0 helpers.
1337 *
1338 * @returns R0 pointer to the APIC helpers.
1339 * @param pDevIns Device instance of the APIC.
1340 */
1341 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1342
1343 /**
1344 * Get the critical section used to synchronize the PICs, PCI and stuff.
1345 *
1346 * @returns Ring-3 pointer to the critical section.
1347 * @param pDevIns The APIC device instance.
1348 */
1349 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1350
1351 /**
1352 * Get the critical section used to synchronize the PICs, PCI and stuff.
1353 *
1354 * @returns Raw-mode context pointer to the critical section.
1355 * @param pDevIns The APIC device instance.
1356 */
1357 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1358
1359 /**
1360 * Get the critical section used to synchronize the PICs, PCI and stuff.
1361 *
1362 * @returns Ring-0 pointer to the critical section.
1363 * @param pDevIns The APIC device instance.
1364 */
1365 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1366
1367 /** Just a safety precaution. */
1368 uint32_t u32TheEnd;
1369} PDMAPICHLPR3;
1370/** Pointer to APIC helpers. */
1371typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1372/** Pointer to const APIC helpers. */
1373typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1374
1375/** Current PDMAPICHLP version number. */
1376#define PDM_APICHLPR3_VERSION 0xfd030000
1377
1378
1379/**
1380 * I/O APIC registration structure.
1381 */
1382typedef struct PDMIOAPICREG
1383{
1384 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1385 uint32_t u32Version;
1386
1387 /**
1388 * Set the an IRQ.
1389 *
1390 * @param pDevIns Device instance of the I/O APIC.
1391 * @param iIrq IRQ number to set.
1392 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1393 */
1394 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1395
1396 /** The name of the GC SetIrq entry point. */
1397 const char *pszSetIrqRC;
1398
1399 /** The name of the R0 SetIrq entry point. */
1400 const char *pszSetIrqR0;
1401} PDMIOAPICREG;
1402/** Pointer to an APIC registration structure. */
1403typedef PDMIOAPICREG *PPDMIOAPICREG;
1404
1405/** Current PDMAPICREG version number. */
1406#define PDM_IOAPICREG_VERSION 0x50010000
1407
1408
1409/**
1410 * IOAPIC RC helpers.
1411 */
1412typedef struct PDMIOAPICHLPRC
1413{
1414 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1415 uint32_t u32Version;
1416
1417 /**
1418 * Private interface between the IOAPIC and APIC.
1419 *
1420 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1421 *
1422 * @returns status code.
1423 * @param pDevIns Device instance of the IOAPIC.
1424 * @param u8Dest See APIC implementation.
1425 * @param u8DestMode See APIC implementation.
1426 * @param u8DeliveryMode See APIC implementation.
1427 * @param iVector See APIC implementation.
1428 * @param u8Polarity See APIC implementation.
1429 * @param u8TriggerMode See APIC implementation.
1430 */
1431 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1432 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1433
1434 /**
1435 * Acquires the PDM lock.
1436 *
1437 * @returns VINF_SUCCESS on success.
1438 * @returns rc if we failed to acquire the lock.
1439 * @param pDevIns The IOAPIC device instance.
1440 * @param rc What to return if we fail to acquire the lock.
1441 */
1442 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1443
1444 /**
1445 * Releases the PDM lock.
1446 *
1447 * @param pDevIns The IOAPIC device instance.
1448 */
1449 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1450
1451 /** Just a safety precaution. */
1452 uint32_t u32TheEnd;
1453} PDMIOAPICHLPRC;
1454/** Pointer to IOAPIC RC helpers. */
1455typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1456/** Pointer to const IOAPIC helpers. */
1457typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1458
1459/** Current PDMIOAPICHLPRC version number. */
1460#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1461
1462
1463/**
1464 * IOAPIC R0 helpers.
1465 */
1466typedef struct PDMIOAPICHLPR0
1467{
1468 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1469 uint32_t u32Version;
1470
1471 /**
1472 * Private interface between the IOAPIC and APIC.
1473 *
1474 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1475 *
1476 * @returns status code.
1477 * @param pDevIns Device instance of the IOAPIC.
1478 * @param u8Dest See APIC implementation.
1479 * @param u8DestMode See APIC implementation.
1480 * @param u8DeliveryMode See APIC implementation.
1481 * @param iVector See APIC implementation.
1482 * @param u8Polarity See APIC implementation.
1483 * @param u8TriggerMode See APIC implementation.
1484 */
1485 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1486 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1487
1488 /**
1489 * Acquires the PDM lock.
1490 *
1491 * @returns VINF_SUCCESS on success.
1492 * @returns rc if we failed to acquire the lock.
1493 * @param pDevIns The IOAPIC device instance.
1494 * @param rc What to return if we fail to acquire the lock.
1495 */
1496 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1497
1498 /**
1499 * Releases the PDM lock.
1500 *
1501 * @param pDevIns The IOAPIC device instance.
1502 */
1503 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1504
1505 /** Just a safety precaution. */
1506 uint32_t u32TheEnd;
1507} PDMIOAPICHLPR0;
1508/** Pointer to IOAPIC R0 helpers. */
1509typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1510/** Pointer to const IOAPIC helpers. */
1511typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1512
1513/** Current PDMIOAPICHLPR0 version number. */
1514#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1515
1516/**
1517 * IOAPIC R3 helpers.
1518 */
1519typedef struct PDMIOAPICHLPR3
1520{
1521 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1522 uint32_t u32Version;
1523
1524 /**
1525 * Private interface between the IOAPIC and APIC.
1526 *
1527 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1528 *
1529 * @returns status code
1530 * @param pDevIns Device instance of the IOAPIC.
1531 * @param u8Dest See APIC implementation.
1532 * @param u8DestMode See APIC implementation.
1533 * @param u8DeliveryMode See APIC implementation.
1534 * @param iVector See APIC implementation.
1535 * @param u8Polarity See APIC implementation.
1536 * @param u8TriggerMode See APIC implementation.
1537 */
1538 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1539 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1540
1541 /**
1542 * Acquires the PDM lock.
1543 *
1544 * @returns VINF_SUCCESS on success.
1545 * @returns Fatal error on failure.
1546 * @param pDevIns The IOAPIC device instance.
1547 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1548 */
1549 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1550
1551 /**
1552 * Releases the PDM lock.
1553 *
1554 * @param pDevIns The IOAPIC device instance.
1555 */
1556 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1557
1558 /**
1559 * Gets the address of the RC IOAPIC helpers.
1560 *
1561 * This should be called at both construction and relocation time
1562 * to obtain the correct address of the RC helpers.
1563 *
1564 * @returns RC pointer to the IOAPIC helpers.
1565 * @param pDevIns Device instance of the IOAPIC.
1566 */
1567 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1568
1569 /**
1570 * Gets the address of the R0 IOAPIC helpers.
1571 *
1572 * This should be called at both construction and relocation time
1573 * to obtain the correct address of the R0 helpers.
1574 *
1575 * @returns R0 pointer to the IOAPIC helpers.
1576 * @param pDevIns Device instance of the IOAPIC.
1577 */
1578 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1579
1580 /** Just a safety precaution. */
1581 uint32_t u32TheEnd;
1582} PDMIOAPICHLPR3;
1583/** Pointer to IOAPIC R3 helpers. */
1584typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1585/** Pointer to const IOAPIC helpers. */
1586typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1587
1588/** Current PDMIOAPICHLPR3 version number. */
1589#define PDM_IOAPICHLPR3_VERSION 0xff010000
1590
1591
1592
1593#ifdef IN_RING3
1594
1595/**
1596 * DMA Transfer Handler.
1597 *
1598 * @returns Number of bytes transferred.
1599 * @param pDevIns Device instance of the DMA.
1600 * @param pvUser User pointer.
1601 * @param uChannel Channel number.
1602 * @param off DMA position.
1603 * @param cb Block size.
1604 */
1605typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1606/** Pointer to a FNDMATRANSFERHANDLER(). */
1607typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1608
1609/**
1610 * DMA Controller registration structure.
1611 */
1612typedef struct PDMDMAREG
1613{
1614 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1615 uint32_t u32Version;
1616
1617 /**
1618 * Execute pending transfers.
1619 *
1620 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1621 * @param pDevIns Device instance of the DMAC.
1622 */
1623 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1624
1625 /**
1626 * Register transfer function for DMA channel.
1627 *
1628 * @param pDevIns Device instance of the DMAC.
1629 * @param uChannel Channel number.
1630 * @param pfnTransferHandler Device specific transfer function.
1631 * @param pvUSer User pointer to be passed to the callback.
1632 */
1633 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1634
1635 /**
1636 * Read memory
1637 *
1638 * @returns Number of bytes read.
1639 * @param pDevIns Device instance of the DMAC.
1640 * @param pvBuffer Pointer to target buffer.
1641 * @param off DMA position.
1642 * @param cbBlock Block size.
1643 */
1644 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1645
1646 /**
1647 * Write memory
1648 *
1649 * @returns Number of bytes written.
1650 * @param pDevIns Device instance of the DMAC.
1651 * @param pvBuffer Memory to write.
1652 * @param off DMA position.
1653 * @param cbBlock Block size.
1654 */
1655 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1656
1657 /**
1658 * Set the DREQ line.
1659 *
1660 * @param pDevIns Device instance of the DMAC.
1661 * @param uChannel Channel number.
1662 * @param uLevel Level of the line.
1663 */
1664 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1665
1666 /**
1667 * Get channel mode
1668 *
1669 * @returns Channel mode.
1670 * @param pDevIns Device instance of the DMAC.
1671 * @param uChannel Channel number.
1672 */
1673 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1674
1675} PDMDMACREG;
1676/** Pointer to a DMAC registration structure. */
1677typedef PDMDMACREG *PPDMDMACREG;
1678
1679/** Current PDMDMACREG version number. */
1680#define PDM_DMACREG_VERSION 0xf5010000
1681
1682
1683/**
1684 * DMA Controller device helpers.
1685 */
1686typedef struct PDMDMACHLP
1687{
1688 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1689 uint32_t u32Version;
1690
1691 /* to-be-defined */
1692
1693} PDMDMACHLP;
1694/** Pointer to DMAC helpers. */
1695typedef PDMDMACHLP *PPDMDMACHLP;
1696/** Pointer to const DMAC helpers. */
1697typedef const PDMDMACHLP *PCPDMDMACHLP;
1698
1699/** Current PDMDMACHLP version number. */
1700#define PDM_DMACHLP_VERSION 0xf6010000
1701
1702#endif /* IN_RING3 */
1703
1704
1705
1706/**
1707 * RTC registration structure.
1708 */
1709typedef struct PDMRTCREG
1710{
1711 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1712 uint32_t u32Version;
1713 uint32_t u32Alignment; /**< structure size alignment. */
1714
1715 /**
1716 * Write to a CMOS register and update the checksum if necessary.
1717 *
1718 * @returns VBox status code.
1719 * @param pDevIns Device instance of the RTC.
1720 * @param iReg The CMOS register index.
1721 * @param u8Value The CMOS register value.
1722 */
1723 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1724
1725 /**
1726 * Read a CMOS register.
1727 *
1728 * @returns VBox status code.
1729 * @param pDevIns Device instance of the RTC.
1730 * @param iReg The CMOS register index.
1731 * @param pu8Value Where to store the CMOS register value.
1732 */
1733 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1734
1735} PDMRTCREG;
1736/** Pointer to a RTC registration structure. */
1737typedef PDMRTCREG *PPDMRTCREG;
1738/** Pointer to a const RTC registration structure. */
1739typedef const PDMRTCREG *PCPDMRTCREG;
1740
1741/** Current PDMRTCREG version number. */
1742#define PDM_RTCREG_VERSION 0xfa010000
1743
1744
1745/**
1746 * RTC device helpers.
1747 */
1748typedef struct PDMRTCHLP
1749{
1750 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1751 uint32_t u32Version;
1752
1753 /* to-be-defined */
1754
1755} PDMRTCHLP;
1756/** Pointer to RTC helpers. */
1757typedef PDMRTCHLP *PPDMRTCHLP;
1758/** Pointer to const RTC helpers. */
1759typedef const PDMRTCHLP *PCPDMRTCHLP;
1760
1761/** Current PDMRTCHLP version number. */
1762#define PDM_RTCHLP_VERSION 0xf6010000
1763
1764
1765
1766#ifdef IN_RING3
1767
1768/**
1769 * PDM Device API.
1770 */
1771typedef struct PDMDEVHLPR3
1772{
1773 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1774 uint32_t u32Version;
1775
1776 /**
1777 * Register a number of I/O ports with a device.
1778 *
1779 * These callbacks are of course for the host context (HC).
1780 * Register HC handlers before guest context (GC) handlers! There must be a
1781 * HC handler for every GC handler!
1782 *
1783 * @returns VBox status.
1784 * @param pDevIns The device instance to register the ports with.
1785 * @param Port First port number in the range.
1786 * @param cPorts Number of ports to register.
1787 * @param pvUser User argument.
1788 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1789 * @param pfnIn Pointer to function which is gonna handle IN operations.
1790 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1791 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1792 * @param pszDesc Pointer to description string. This must not be freed.
1793 */
1794 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1795 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1796 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1797
1798 /**
1799 * Register a number of I/O ports with a device for GC.
1800 *
1801 * These callbacks are for the host context (GC).
1802 * Register host context (HC) handlers before guest context handlers! There must be a
1803 * HC handler for every GC handler!
1804 *
1805 * @returns VBox status.
1806 * @param pDevIns The device instance to register the ports with and which GC module
1807 * to resolve the names against.
1808 * @param Port First port number in the range.
1809 * @param cPorts Number of ports to register.
1810 * @param pvUser User argument.
1811 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1812 * @param pszIn Name of the GC function which is gonna handle IN operations.
1813 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1814 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1815 * @param pszDesc Pointer to description string. This must not be freed.
1816 */
1817 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1818 const char *pszOut, const char *pszIn,
1819 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1820
1821 /**
1822 * Register a number of I/O ports with a device.
1823 *
1824 * These callbacks are of course for the ring-0 host context (R0).
1825 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1826 *
1827 * @returns VBox status.
1828 * @param pDevIns The device instance to register the ports with.
1829 * @param Port First port number in the range.
1830 * @param cPorts Number of ports to register.
1831 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1832 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1833 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1834 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1835 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1836 * @param pszDesc Pointer to description string. This must not be freed.
1837 */
1838 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1839 const char *pszOut, const char *pszIn,
1840 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1841
1842 /**
1843 * Deregister I/O ports.
1844 *
1845 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1846 *
1847 * @returns VBox status.
1848 * @param pDevIns The device instance owning the ports.
1849 * @param Port First port number in the range.
1850 * @param cPorts Number of ports to deregister.
1851 */
1852 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1853
1854 /**
1855 * Register a Memory Mapped I/O (MMIO) region.
1856 *
1857 * These callbacks are of course for the host context (HC).
1858 * Register HC handlers before guest context (GC) handlers! There must be a
1859 * HC handler for every GC handler!
1860 *
1861 * @returns VBox status.
1862 * @param pDevIns The device instance to register the MMIO with.
1863 * @param GCPhysStart First physical address in the range.
1864 * @param cbRange The size of the range (in bytes).
1865 * @param pvUser User argument.
1866 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1867 * @param pfnRead Pointer to function which is gonna handle Read operations.
1868 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1869 * @param pszDesc Pointer to description string. This must not be freed.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1872 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1873 const char *pszDesc));
1874
1875 /**
1876 * Register a Memory Mapped I/O (MMIO) region for GC.
1877 *
1878 * These callbacks are for the guest context (GC).
1879 * Register host context (HC) handlers before guest context handlers! There must be a
1880 * HC handler for every GC handler!
1881 *
1882 * @returns VBox status.
1883 * @param pDevIns The device instance to register the MMIO with.
1884 * @param GCPhysStart First physical address in the range.
1885 * @param cbRange The size of the range (in bytes).
1886 * @param pvUser User argument.
1887 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1888 * @param pszRead Name of the GC function which is gonna handle Read operations.
1889 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1890 * @param pszDesc Obsolete. NULL is fine.
1891 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1892 */
1893 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1894 const char *pszWrite, const char *pszRead, const char *pszFill,
1895 const char *pszDesc));
1896
1897 /**
1898 * Register a Memory Mapped I/O (MMIO) region for R0.
1899 *
1900 * These callbacks are for the ring-0 host context (R0).
1901 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1902 *
1903 * @returns VBox status.
1904 * @param pDevIns The device instance to register the MMIO with.
1905 * @param GCPhysStart First physical address in the range.
1906 * @param cbRange The size of the range (in bytes).
1907 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1908 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1909 * @param pszRead Name of the GC function which is gonna handle Read operations.
1910 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1911 * @param pszDesc Obsolete. NULL is fine.
1912 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1913 */
1914 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1915 const char *pszWrite, const char *pszRead, const char *pszFill,
1916 const char *pszDesc));
1917
1918 /**
1919 * Deregister a Memory Mapped I/O (MMIO) region.
1920 *
1921 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1922 *
1923 * @returns VBox status.
1924 * @param pDevIns The device instance owning the MMIO region(s).
1925 * @param GCPhysStart First physical address in the range.
1926 * @param cbRange The size of the range (in bytes).
1927 */
1928 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1929
1930 /**
1931 * Register a ROM (BIOS) region.
1932 *
1933 * It goes without saying that this is read-only memory. The memory region must be
1934 * in unassigned memory. I.e. from the top of the address space or on the PC in
1935 * the 0xa0000-0xfffff range.
1936 *
1937 * @returns VBox status.
1938 * @param pDevIns The device instance owning the ROM region.
1939 * @param GCPhysStart First physical address in the range.
1940 * Must be page aligned!
1941 * @param cbRange The size of the range (in bytes).
1942 * Must be page aligned!
1943 * @param pvBinary Pointer to the binary data backing the ROM image.
1944 * This must be cbRange bytes big.
1945 * It will be copied and doesn't have to stick around if fShadow is clear.
1946 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1947 * @param pszDesc Pointer to description string. This must not be freed.
1948 *
1949 * @remark There is no way to remove the rom, automatically on device cleanup or
1950 * manually from the device yet. At present I doubt we need such features...
1951 */
1952 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1953
1954 /**
1955 * Register a save state data unit.
1956 *
1957 * @returns VBox status.
1958 * @param pDevIns Device instance.
1959 * @param pszName Data unit name.
1960 * @param uInstance The instance identifier of the data unit.
1961 * This must together with the name be unique.
1962 * @param uVersion Data layout version number.
1963 * @param cbGuess The approximate amount of data in the unit.
1964 * Only for progress indicators.
1965 * @param pszBefore Name of data unit which we should be put in
1966 * front of. Optional (NULL).
1967 *
1968 * @param pfnLivePrep Prepare live save callback, optional.
1969 * @param pfnLiveExec Execute live save callback, optional.
1970 * @param pfnLiveVote Vote live save callback, optional.
1971 *
1972 * @param pfnSavePrep Prepare save callback, optional.
1973 * @param pfnSaveExec Execute save callback, optional.
1974 * @param pfnSaveDone Done save callback, optional.
1975 *
1976 * @param pfnLoadPrep Prepare load callback, optional.
1977 * @param pfnLoadExec Execute load callback, optional.
1978 * @param pfnLoadDone Done load callback, optional.
1979 */
1980 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
1981 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
1982 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1983 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1984
1985 /**
1986 * Creates a timer.
1987 *
1988 * @returns VBox status.
1989 * @param pDevIns Device instance.
1990 * @param enmClock The clock to use on this timer.
1991 * @param pfnCallback Callback function.
1992 * @param pvUser User argument for the callback.
1993 * @param fFlags Flags, see TMTIMER_FLAGS_*.
1994 * @param pszDesc Pointer to description string which must stay around
1995 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1996 * @param ppTimer Where to store the timer on success.
1997 */
1998 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
1999
2000 /**
2001 * Registers the device with the default PCI bus.
2002 *
2003 * @returns VBox status code.
2004 * @param pDevIns Device instance.
2005 * @param pPciDev The PCI device structure.
2006 * Any PCI enabled device must keep this in it's instance data!
2007 * Fill in the PCI data config before registration, please.
2008 * @remark This is the simple interface, a Ex interface will be created if
2009 * more features are needed later.
2010 */
2011 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2012
2013 /**
2014 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2015 *
2016 * @returns VBox status code.
2017 * @param pDevIns Device instance.
2018 * @param iRegion The region number.
2019 * @param cbRegion Size of the region.
2020 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2021 * @param pfnCallback Callback for doing the mapping.
2022 */
2023 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2024
2025 /**
2026 * Register PCI configuration space read/write callbacks.
2027 *
2028 * @param pDevIns Device instance.
2029 * @param pPciDev The PCI device structure.
2030 * If NULL the default PCI device for this device instance is used.
2031 * @param pfnRead Pointer to the user defined PCI config read function.
2032 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2033 * PCI config read function. This way, user can decide when (and if)
2034 * to call default PCI config read function. Can be NULL.
2035 * @param pfnWrite Pointer to the user defined PCI config write function.
2036 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2037 * PCI config write function. This way, user can decide when (and if)
2038 * to call default PCI config write function. Can be NULL.
2039 * @thread EMT
2040 */
2041 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2042 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2043
2044 /**
2045 * Set the IRQ for a PCI device.
2046 *
2047 * @param pDevIns Device instance.
2048 * @param iIrq IRQ number to set.
2049 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2050 * @thread Any thread, but will involve the emulation thread.
2051 */
2052 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2053
2054 /**
2055 * Set the IRQ for a PCI device, but don't wait for EMT to process
2056 * the request when not called from EMT.
2057 *
2058 * @param pDevIns Device instance.
2059 * @param iIrq IRQ number to set.
2060 * @param iLevel IRQ level.
2061 * @thread Any thread, but will involve the emulation thread.
2062 */
2063 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2064
2065 /**
2066 * Set ISA IRQ for a device.
2067 *
2068 * @param pDevIns Device instance.
2069 * @param iIrq IRQ number to set.
2070 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2071 * @thread Any thread, but will involve the emulation thread.
2072 */
2073 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2074
2075 /**
2076 * Set the ISA IRQ for a device, but don't wait for EMT to process
2077 * the request when not called from EMT.
2078 *
2079 * @param pDevIns Device instance.
2080 * @param iIrq IRQ number to set.
2081 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2082 * @thread Any thread, but will involve the emulation thread.
2083 */
2084 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2085
2086 /**
2087 * Attaches a driver (chain) to the device.
2088 *
2089 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2090 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2091 *
2092 * @returns VBox status code.
2093 * @param pDevIns Device instance.
2094 * @param iLun The logical unit to attach.
2095 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2096 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2097 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2098 * for the live of the device instance.
2099 */
2100 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2101
2102 /**
2103 * Allocate memory which is associated with current VM instance
2104 * and automatically freed on it's destruction.
2105 *
2106 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2107 * @param pDevIns Device instance.
2108 * @param cb Number of bytes to allocate.
2109 */
2110 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2111
2112 /**
2113 * Allocate memory which is associated with current VM instance
2114 * and automatically freed on it's destruction. The memory is ZEROed.
2115 *
2116 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2117 * @param pDevIns Device instance.
2118 * @param cb Number of bytes to allocate.
2119 */
2120 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2121
2122 /**
2123 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2124 *
2125 * @param pDevIns Device instance.
2126 * @param pv Pointer to the memory to free.
2127 */
2128 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2129
2130 /**
2131 * Set the VM error message
2132 *
2133 * @returns rc.
2134 * @param pDevIns Device instance.
2135 * @param rc VBox status code.
2136 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2137 * @param pszFormat Error message format string.
2138 * @param ... Error message arguments.
2139 */
2140 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2141
2142 /**
2143 * Set the VM error message
2144 *
2145 * @returns rc.
2146 * @param pDevIns Device instance.
2147 * @param rc VBox status code.
2148 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2149 * @param pszFormat Error message format string.
2150 * @param va Error message arguments.
2151 */
2152 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2153
2154 /**
2155 * Set the VM runtime error message
2156 *
2157 * @returns VBox status code.
2158 * @param pDevIns Device instance.
2159 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2160 * @param pszErrorId Error ID string.
2161 * @param pszFormat Error message format string.
2162 * @param ... Error message arguments.
2163 */
2164 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2165
2166 /**
2167 * Set the VM runtime error message
2168 *
2169 * @returns VBox status code.
2170 * @param pDevIns Device instance.
2171 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2172 * @param pszErrorId Error ID string.
2173 * @param pszFormat Error message format string.
2174 * @param va Error message arguments.
2175 */
2176 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2177
2178 /**
2179 * Assert that the current thread is the emulation thread.
2180 *
2181 * @returns True if correct.
2182 * @returns False if wrong.
2183 * @param pDevIns Device instance.
2184 * @param pszFile Filename of the assertion location.
2185 * @param iLine The linenumber of the assertion location.
2186 * @param pszFunction Function of the assertion location.
2187 */
2188 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2189
2190 /**
2191 * Assert that the current thread is NOT the emulation thread.
2192 *
2193 * @returns True if correct.
2194 * @returns False if wrong.
2195 * @param pDevIns Device instance.
2196 * @param pszFile Filename of the assertion location.
2197 * @param iLine The linenumber of the assertion location.
2198 * @param pszFunction Function of the assertion location.
2199 */
2200 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2201
2202 /**
2203 * Stops the VM and enters the debugger to look at the guest state.
2204 *
2205 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2206 * invoking this function directly.
2207 *
2208 * @returns VBox status code which must be passed up to the VMM.
2209 * @param pDevIns Device instance.
2210 * @param pszFile Filename of the assertion location.
2211 * @param iLine The linenumber of the assertion location.
2212 * @param pszFunction Function of the assertion location.
2213 * @param pszFormat Message. (optional)
2214 * @param args Message parameters.
2215 */
2216 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2217
2218 /**
2219 * Register a info handler with DBGF,
2220 *
2221 * @returns VBox status code.
2222 * @param pDevIns Device instance.
2223 * @param pszName The identifier of the info.
2224 * @param pszDesc The description of the info and any arguments
2225 * the handler may take.
2226 * @param pfnHandler The handler function to be called to display the
2227 * info.
2228 */
2229 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2230
2231 /**
2232 * Registers a statistics sample if statistics are enabled.
2233 *
2234 * @param pDevIns Device instance of the DMA.
2235 * @param pvSample Pointer to the sample.
2236 * @param enmType Sample type. This indicates what pvSample is
2237 * pointing at.
2238 * @param pszName Sample name. The name is on this form
2239 * "/<component>/<sample>". Further nesting is
2240 * possible.
2241 * @param enmUnit Sample unit.
2242 * @param pszDesc Sample description.
2243 */
2244 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2245
2246 /**
2247 * Same as pfnSTAMRegister except that the name is specified in a
2248 * RTStrPrintf like fashion.
2249 *
2250 * @returns VBox status.
2251 * @param pDevIns Device instance of the DMA.
2252 * @param pvSample Pointer to the sample.
2253 * @param enmType Sample type. This indicates what pvSample is
2254 * pointing at.
2255 * @param enmVisibility Visibility type specifying whether unused
2256 * statistics should be visible or not.
2257 * @param enmUnit Sample unit.
2258 * @param pszDesc Sample description.
2259 * @param pszName The sample name format string.
2260 * @param ... Arguments to the format string.
2261 */
2262 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2263 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2264
2265 /**
2266 * Same as pfnSTAMRegister except that the name is specified in a
2267 * RTStrPrintfV like fashion.
2268 *
2269 * @returns VBox status.
2270 * @param pDevIns Device instance of the DMA.
2271 * @param pvSample Pointer to the sample.
2272 * @param enmType Sample type. This indicates what pvSample is
2273 * pointing at.
2274 * @param enmVisibility Visibility type specifying whether unused
2275 * statistics should be visible or not.
2276 * @param enmUnit Sample unit.
2277 * @param pszDesc Sample description.
2278 * @param pszName The sample name format string.
2279 * @param args Arguments to the format string.
2280 */
2281 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2282 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2283
2284 /**
2285 * Register the RTC device.
2286 *
2287 * @returns VBox status code.
2288 * @param pDevIns Device instance.
2289 * @param pRtcReg Pointer to a RTC registration structure.
2290 * @param ppRtcHlp Where to store the pointer to the helper
2291 * functions.
2292 */
2293 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2294
2295 /**
2296 * Create a queue.
2297 *
2298 * @returns VBox status code.
2299 * @param pDevIns The device instance.
2300 * @param cbItem The size of a queue item.
2301 * @param cItems The number of items in the queue.
2302 * @param cMilliesInterval The number of milliseconds between polling the queue.
2303 * If 0 then the emulation thread will be notified whenever an item arrives.
2304 * @param pfnCallback The consumer function.
2305 * @param fRZEnabled Set if the queue should work in RC and R0.
2306 * @param pszName The queue base name. The instance number will be
2307 * appended automatically.
2308 * @param ppQueue Where to store the queue handle on success.
2309 * @thread The emulation thread.
2310 */
2311 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2312 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2313
2314 /**
2315 * Initializes a PDM critical section.
2316 *
2317 * The PDM critical sections are derived from the IPRT critical sections, but
2318 * works in GC as well.
2319 *
2320 * @returns VBox status code.
2321 * @param pDevIns Device instance.
2322 * @param pCritSect Pointer to the critical section.
2323 * @param pszName The name of the critical section (for
2324 * statistics).
2325 */
2326 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2327
2328 /**
2329 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2330 *
2331 * @returns pTime.
2332 * @param pDevIns Device instance.
2333 * @param pTime Where to store the time.
2334 */
2335 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2336
2337 /**
2338 * Creates a PDM thread.
2339 *
2340 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2341 * resuming, and destroying the thread as the VM state changes.
2342 *
2343 * @returns VBox status code.
2344 * @param pDevIns The device instance.
2345 * @param ppThread Where to store the thread 'handle'.
2346 * @param pvUser The user argument to the thread function.
2347 * @param pfnThread The thread function.
2348 * @param pfnWakeup The wakup callback. This is called on the EMT
2349 * thread when a state change is pending.
2350 * @param cbStack See RTThreadCreate.
2351 * @param enmType See RTThreadCreate.
2352 * @param pszName See RTThreadCreate.
2353 */
2354 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2355 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2356
2357 /**
2358 * Convert a guest virtual address to a guest physical address.
2359 *
2360 * @returns VBox status code.
2361 * @param pDevIns Device instance.
2362 * @param GCPtr Guest virtual address.
2363 * @param pGCPhys Where to store the GC physical address
2364 * corresponding to GCPtr.
2365 * @thread The emulation thread.
2366 * @remark Careful with page boundraries.
2367 */
2368 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2369
2370 /**
2371 * Gets the VM state.
2372 *
2373 * @returns VM state.
2374 * @param pDevIns The device instance.
2375 * @thread Any thread (just keep in mind that it's volatile info).
2376 */
2377 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2378
2379 /** Space reserved for future members.
2380 * @{ */
2381 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2382 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2383 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2384 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2385 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2386 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2387 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2388 /** @} */
2389
2390
2391 /** API available to trusted devices only.
2392 *
2393 * These APIs are providing unrestricted access to the guest and the VM,
2394 * or they are interacting intimately with PDM.
2395 *
2396 * @{
2397 */
2398 /**
2399 * Gets the VM handle. Restricted API.
2400 *
2401 * @returns VM Handle.
2402 * @param pDevIns Device instance.
2403 */
2404 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2405
2406 /**
2407 * Register the PCI Bus.
2408 *
2409 * @returns VBox status code.
2410 * @param pDevIns Device instance.
2411 * @param pPciBusReg Pointer to PCI bus registration structure.
2412 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2413 * helpers.
2414 */
2415 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2416
2417 /**
2418 * Register the PIC device.
2419 *
2420 * @returns VBox status code.
2421 * @param pDevIns Device instance.
2422 * @param pPicReg Pointer to a PIC registration structure.
2423 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2424 * helpers.
2425 */
2426 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2427
2428 /**
2429 * Register the APIC device.
2430 *
2431 * @returns VBox status code.
2432 * @param pDevIns Device instance.
2433 * @param pApicReg Pointer to a APIC registration structure.
2434 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2437
2438 /**
2439 * Register the I/O APIC device.
2440 *
2441 * @returns VBox status code.
2442 * @param pDevIns Device instance.
2443 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2444 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2445 * helpers.
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2448
2449 /**
2450 * Register the DMA device.
2451 *
2452 * @returns VBox status code.
2453 * @param pDevIns Device instance.
2454 * @param pDmacReg Pointer to a DMAC registration structure.
2455 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2456 */
2457 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2458
2459 /**
2460 * Read physical memory.
2461 *
2462 * @returns VINF_SUCCESS (for now).
2463 * @param pDevIns Device instance.
2464 * @param GCPhys Physical address start reading from.
2465 * @param pvBuf Where to put the read bits.
2466 * @param cbRead How many bytes to read.
2467 * @thread Any thread, but the call may involve the emulation thread.
2468 */
2469 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2470
2471 /**
2472 * Write to physical memory.
2473 *
2474 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2475 * @param pDevIns Device instance.
2476 * @param GCPhys Physical address to write to.
2477 * @param pvBuf What to write.
2478 * @param cbWrite How many bytes to write.
2479 * @thread Any thread, but the call may involve the emulation thread.
2480 */
2481 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2482
2483 /**
2484 * Requests the mapping of a guest page into ring-3.
2485 *
2486 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2487 * release it.
2488 *
2489 * This API will assume your intention is to write to the page, and will
2490 * therefore replace shared and zero pages. If you do not intend to modify the
2491 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2492 *
2493 * @returns VBox status code.
2494 * @retval VINF_SUCCESS on success.
2495 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2496 * backing or if the page has any active access handlers. The caller
2497 * must fall back on using PGMR3PhysWriteExternal.
2498 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2499 *
2500 * @param pVM The VM handle.
2501 * @param GCPhys The guest physical address of the page that
2502 * should be mapped.
2503 * @param fFlags Flags reserved for future use, MBZ.
2504 * @param ppv Where to store the address corresponding to
2505 * GCPhys.
2506 * @param pLock Where to store the lock information that
2507 * pfnPhysReleasePageMappingLock needs.
2508 *
2509 * @remark Avoid calling this API from within critical sections (other than the
2510 * PGM one) because of the deadlock risk when we have to delegating the
2511 * task to an EMT.
2512 * @thread Any.
2513 */
2514 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2515
2516 /**
2517 * Requests the mapping of a guest page into ring-3, external threads.
2518 *
2519 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2520 * release it.
2521 *
2522 * @returns VBox status code.
2523 * @retval VINF_SUCCESS on success.
2524 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2525 * backing or if the page as an active ALL access handler. The caller
2526 * must fall back on using PGMPhysRead.
2527 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2528 *
2529 * @param pDevIns Device instance.
2530 * @param GCPhys The guest physical address of the page that
2531 * should be mapped.
2532 * @param fFlags Flags reserved for future use, MBZ.
2533 * @param ppv Where to store the address corresponding to
2534 * GCPhys.
2535 * @param pLock Where to store the lock information that
2536 * pfnPhysReleasePageMappingLock needs.
2537 *
2538 * @remark Avoid calling this API from within critical sections.
2539 * @thread Any.
2540 */
2541 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2542
2543 /**
2544 * Release the mapping of a guest page.
2545 *
2546 * This is the counter part of pfnPhysGCPhys2CCPtr and
2547 * pfnPhysGCPhys2CCPtrReadOnly.
2548 *
2549 * @param pDevIns Device instance.
2550 * @param pLock The lock structure initialized by the mapping
2551 * function.
2552 */
2553 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2554
2555 /**
2556 * Read guest physical memory by virtual address.
2557 *
2558 * @param pDevIns Device instance.
2559 * @param pvDst Where to put the read bits.
2560 * @param GCVirtSrc Guest virtual address to start reading from.
2561 * @param cb How many bytes to read.
2562 * @thread The emulation thread.
2563 */
2564 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2565
2566 /**
2567 * Write to guest physical memory by virtual address.
2568 *
2569 * @param pDevIns Device instance.
2570 * @param GCVirtDst Guest virtual address to write to.
2571 * @param pvSrc What to write.
2572 * @param cb How many bytes to write.
2573 * @thread The emulation thread.
2574 */
2575 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2576
2577 /**
2578 * Checks if the Gate A20 is enabled or not.
2579 *
2580 * @returns true if A20 is enabled.
2581 * @returns false if A20 is disabled.
2582 * @param pDevIns Device instance.
2583 * @thread The emulation thread.
2584 */
2585 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2586
2587 /**
2588 * Enables or disables the Gate A20.
2589 *
2590 * @param pDevIns Device instance.
2591 * @param fEnable Set this flag to enable the Gate A20; clear it
2592 * to disable.
2593 * @thread The emulation thread.
2594 */
2595 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2596
2597 /**
2598 * Resets the VM.
2599 *
2600 * @returns The appropriate VBox status code to pass around on reset.
2601 * @param pDevIns Device instance.
2602 * @thread The emulation thread.
2603 */
2604 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2605
2606 /**
2607 * Suspends the VM.
2608 *
2609 * @returns The appropriate VBox status code to pass around on suspend.
2610 * @param pDevIns Device instance.
2611 * @thread The emulation thread.
2612 */
2613 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2614
2615 /**
2616 * Power off the VM.
2617 *
2618 * @returns The appropriate VBox status code to pass around on power off.
2619 * @param pDevIns Device instance.
2620 * @thread The emulation thread.
2621 */
2622 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2623
2624 /**
2625 * Register transfer function for DMA channel.
2626 *
2627 * @returns VBox status code.
2628 * @param pDevIns Device instance.
2629 * @param uChannel Channel number.
2630 * @param pfnTransferHandler Device specific transfer callback function.
2631 * @param pvUser User pointer to pass to the callback.
2632 * @thread EMT
2633 */
2634 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2635
2636 /**
2637 * Read memory.
2638 *
2639 * @returns VBox status code.
2640 * @param pDevIns Device instance.
2641 * @param uChannel Channel number.
2642 * @param pvBuffer Pointer to target buffer.
2643 * @param off DMA position.
2644 * @param cbBlock Block size.
2645 * @param pcbRead Where to store the number of bytes which was
2646 * read. optional.
2647 * @thread EMT
2648 */
2649 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2650
2651 /**
2652 * Write memory.
2653 *
2654 * @returns VBox status code.
2655 * @param pDevIns Device instance.
2656 * @param uChannel Channel number.
2657 * @param pvBuffer Memory to write.
2658 * @param off DMA position.
2659 * @param cbBlock Block size.
2660 * @param pcbWritten Where to store the number of bytes which was
2661 * written. optional.
2662 * @thread EMT
2663 */
2664 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2665
2666 /**
2667 * Set the DREQ line.
2668 *
2669 * @returns VBox status code.
2670 * @param pDevIns Device instance.
2671 * @param uChannel Channel number.
2672 * @param uLevel Level of the line.
2673 * @thread EMT
2674 */
2675 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2676
2677 /**
2678 * Get channel mode.
2679 *
2680 * @returns Channel mode. See specs.
2681 * @param pDevIns Device instance.
2682 * @param uChannel Channel number.
2683 * @thread EMT
2684 */
2685 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2686
2687 /**
2688 * Schedule DMA execution.
2689 *
2690 * @param pDevIns Device instance.
2691 * @thread Any thread.
2692 */
2693 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2694
2695 /**
2696 * Write CMOS value and update the checksum(s).
2697 *
2698 * @returns VBox status code.
2699 * @param pDevIns Device instance.
2700 * @param iReg The CMOS register index.
2701 * @param u8Value The CMOS register value.
2702 * @thread EMT
2703 */
2704 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2705
2706 /**
2707 * Read CMOS value.
2708 *
2709 * @returns VBox status code.
2710 * @param pDevIns Device instance.
2711 * @param iReg The CMOS register index.
2712 * @param pu8Value Where to store the CMOS register value.
2713 * @thread EMT
2714 */
2715 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2716
2717 /**
2718 * Get the specified CPUID leaf for the virtual CPU associated with the calling
2719 * thread.
2720 *
2721 * @param pDevIns Device instance.
2722 * @param iLeaf The CPUID leaf to get.
2723 * @param pEax Where to store the EAX value.
2724 * @param pEbx Where to store the EBX value.
2725 * @param pEcx Where to store the ECX value.
2726 * @param pEdx Where to store the EDX value.
2727 * @thread EMT.
2728 */
2729 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2730
2731 /**
2732 * Changes the protection of shadowed ROM mapping.
2733 *
2734 * This is intented for use by the system BIOS, chipset or device in question to
2735 * change the protection of shadowed ROM code after init and on reset.
2736 *
2737 * @param pDevIns Device instance.
2738 * @param GCPhysStart Where the mapping starts.
2739 * @param cbRange The size of the mapping.
2740 * @param enmProt The new protection type.
2741 */
2742 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2743
2744 /**
2745 * Allocate and register a MMIO2 region.
2746 *
2747 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2748 * RAM associated with a device. It is also non-shared memory with a
2749 * permanent ring-3 mapping and page backing (presently).
2750 *
2751 * @returns VBox status.
2752 * @param pDevIns The device instance.
2753 * @param iRegion The region number. Use the PCI region number as
2754 * this must be known to the PCI bus device too. If
2755 * it's not associated with the PCI device, then
2756 * any number up to UINT8_MAX is fine.
2757 * @param cb The size (in bytes) of the region.
2758 * @param fFlags Reserved for future use, must be zero.
2759 * @param ppv Where to store the address of the ring-3 mapping
2760 * of the memory.
2761 * @param pszDesc Pointer to description string. This must not be
2762 * freed.
2763 * @thread EMT.
2764 */
2765 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2766
2767 /**
2768 * Deregisters and frees a MMIO2 region.
2769 *
2770 * Any physical (and virtual) access handlers registered for the region must
2771 * be deregistered before calling this function.
2772 *
2773 * @returns VBox status code.
2774 * @param pDevIns The device instance.
2775 * @param iRegion The region number used during registration.
2776 * @thread EMT.
2777 */
2778 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2779
2780 /**
2781 * Maps a MMIO2 region into the physical memory space.
2782 *
2783 * A MMIO2 range may overlap with base memory if a lot of RAM
2784 * is configured for the VM, in which case we'll drop the base
2785 * memory pages. Presently we will make no attempt to preserve
2786 * anything that happens to be present in the base memory that
2787 * is replaced, this is of course incorrectly but it's too much
2788 * effort.
2789 *
2790 * @returns VBox status code.
2791 * @param pDevIns The device instance.
2792 * @param iRegion The region number used during registration.
2793 * @param GCPhys The physical address to map it at.
2794 * @thread EMT.
2795 */
2796 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2797
2798 /**
2799 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2800 *
2801 * @returns VBox status code.
2802 * @param pDevIns The device instance.
2803 * @param iRegion The region number used during registration.
2804 * @param GCPhys The physical address it's currently mapped at.
2805 * @thread EMT.
2806 */
2807 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2808
2809 /**
2810 * Maps a portion of an MMIO2 region into the hypervisor region.
2811 *
2812 * Callers of this API must never deregister the MMIO2 region before the
2813 * VM is powered off.
2814 *
2815 * @return VBox status code.
2816 * @param pDevIns The device owning the MMIO2 memory.
2817 * @param iRegion The region.
2818 * @param off The offset into the region. Will be rounded down
2819 * to closest page boundrary.
2820 * @param cb The number of bytes to map. Will be rounded up
2821 * to the closest page boundrary.
2822 * @param pszDesc Mapping description.
2823 * @param pRCPtr Where to store the RC address.
2824 */
2825 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2826 const char *pszDesc, PRTRCPTR pRCPtr));
2827
2828 /**
2829 * Maps a portion of an MMIO2 region into kernel space (host).
2830 *
2831 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2832 * or the VM is terminated.
2833 *
2834 * @return VBox status code.
2835 * @param pDevIns The device owning the MMIO2 memory.
2836 * @param iRegion The region.
2837 * @param off The offset into the region. Must be page
2838 * aligned.
2839 * @param cb The number of bytes to map. Must be page
2840 * aligned.
2841 * @param pszDesc Mapping description.
2842 * @param pR0Ptr Where to store the R0 address.
2843 */
2844 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2845 const char *pszDesc, PRTR0PTR pR0Ptr));
2846
2847 /**
2848 * Registers the VMM device heap
2849 *
2850 * @returns VBox status code.
2851 * @param pDevIns The device instance.
2852 * @param GCPhys The physical address.
2853 * @param pvHeap Ring 3 heap pointer.
2854 * @param cbSize Size of the heap.
2855 * @thread EMT.
2856 */
2857 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2858
2859 /**
2860 * Unregisters the VMM device heap
2861 *
2862 * @returns VBox status code.
2863 * @param pDevIns The device instance.
2864 * @param GCPhys The physical address.
2865 * @thread EMT.
2866 */
2867 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2868
2869 /**
2870 * Gets the VMCPU handle. Restricted API.
2871 *
2872 * @returns VMCPU Handle.
2873 * @param pDevIns Device instance.
2874 */
2875 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2876
2877 /** @} */
2878
2879 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2880 uint32_t u32TheEnd;
2881} PDMDEVHLPR3;
2882#endif /* !IN_RING3 */
2883/** Pointer to the R3 PDM Device API. */
2884typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2885/** Pointer to the R3 PDM Device API, const variant. */
2886typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2887
2888/** Current PDMDEVHLP version number. */
2889#define PDM_DEVHLP_VERSION 0xf20c0000
2890
2891
2892/**
2893 * PDM Device API - RC Variant.
2894 */
2895typedef struct PDMDEVHLPRC
2896{
2897 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2898 uint32_t u32Version;
2899
2900 /**
2901 * Set the IRQ for a PCI device.
2902 *
2903 * @param pDevIns Device instance.
2904 * @param iIrq IRQ number to set.
2905 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2906 * @thread Any thread, but will involve the emulation thread.
2907 */
2908 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2909
2910 /**
2911 * Set ISA IRQ for a device.
2912 *
2913 * @param pDevIns Device instance.
2914 * @param iIrq IRQ number to set.
2915 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2916 * @thread Any thread, but will involve the emulation thread.
2917 */
2918 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2919
2920 /**
2921 * Read physical memory.
2922 *
2923 * @returns VINF_SUCCESS (for now).
2924 * @param pDevIns Device instance.
2925 * @param GCPhys Physical address start reading from.
2926 * @param pvBuf Where to put the read bits.
2927 * @param cbRead How many bytes to read.
2928 */
2929 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2930
2931 /**
2932 * Write to physical memory.
2933 *
2934 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2935 * @param pDevIns Device instance.
2936 * @param GCPhys Physical address to write to.
2937 * @param pvBuf What to write.
2938 * @param cbWrite How many bytes to write.
2939 */
2940 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2941
2942 /**
2943 * Checks if the Gate A20 is enabled or not.
2944 *
2945 * @returns true if A20 is enabled.
2946 * @returns false if A20 is disabled.
2947 * @param pDevIns Device instance.
2948 * @thread The emulation thread.
2949 */
2950 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2951
2952 /**
2953 * Set the VM error message
2954 *
2955 * @returns rc.
2956 * @param pDrvIns Driver instance.
2957 * @param rc VBox status code.
2958 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2959 * @param pszFormat Error message format string.
2960 * @param ... Error message arguments.
2961 */
2962 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2963
2964 /**
2965 * Set the VM error message
2966 *
2967 * @returns rc.
2968 * @param pDrvIns Driver instance.
2969 * @param rc VBox status code.
2970 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2971 * @param pszFormat Error message format string.
2972 * @param va Error message arguments.
2973 */
2974 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2975
2976 /**
2977 * Set the VM runtime error message
2978 *
2979 * @returns VBox status code.
2980 * @param pDevIns Device instance.
2981 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2982 * @param pszErrorId Error ID string.
2983 * @param pszFormat Error message format string.
2984 * @param ... Error message arguments.
2985 */
2986 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2987
2988 /**
2989 * Set the VM runtime error message
2990 *
2991 * @returns VBox status code.
2992 * @param pDevIns Device instance.
2993 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2994 * @param pszErrorId Error ID string.
2995 * @param pszFormat Error message format string.
2996 * @param va Error message arguments.
2997 */
2998 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2999
3000 /**
3001 * Set parameters for pending MMIO patch operation
3002 *
3003 * @returns VBox status code.
3004 * @param pDevIns Device instance.
3005 * @param GCPhys MMIO physical address
3006 * @param pCachedData GC pointer to cached data
3007 */
3008 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3009
3010 /**
3011 * Gets the VM handle. Restricted API.
3012 *
3013 * @returns VM Handle.
3014 * @param pDevIns Device instance.
3015 */
3016 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3017
3018 /**
3019 * Gets the VMCPU handle. Restricted API.
3020 *
3021 * @returns VMCPU Handle.
3022 * @param pDevIns Device instance.
3023 */
3024 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3025
3026 /** Just a safety precaution. */
3027 uint32_t u32TheEnd;
3028} PDMDEVHLPRC;
3029/** Pointer PDM Device RC API. */
3030typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3031/** Pointer PDM Device RC API. */
3032typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3033
3034/** Current PDMDEVHLP version number. */
3035#define PDM_DEVHLPRC_VERSION 0xfb020000
3036
3037
3038/**
3039 * PDM Device API - R0 Variant.
3040 */
3041typedef struct PDMDEVHLPR0
3042{
3043 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3044 uint32_t u32Version;
3045
3046 /**
3047 * Set the IRQ for a PCI device.
3048 *
3049 * @param pDevIns Device instance.
3050 * @param iIrq IRQ number to set.
3051 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3052 * @thread Any thread, but will involve the emulation thread.
3053 */
3054 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3055
3056 /**
3057 * Set ISA IRQ for a device.
3058 *
3059 * @param pDevIns Device instance.
3060 * @param iIrq IRQ number to set.
3061 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3062 * @thread Any thread, but will involve the emulation thread.
3063 */
3064 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3065
3066 /**
3067 * Read physical memory.
3068 *
3069 * @returns VINF_SUCCESS (for now).
3070 * @param pDevIns Device instance.
3071 * @param GCPhys Physical address start reading from.
3072 * @param pvBuf Where to put the read bits.
3073 * @param cbRead How many bytes to read.
3074 */
3075 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3076
3077 /**
3078 * Write to physical memory.
3079 *
3080 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3081 * @param pDevIns Device instance.
3082 * @param GCPhys Physical address to write to.
3083 * @param pvBuf What to write.
3084 * @param cbWrite How many bytes to write.
3085 */
3086 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3087
3088 /**
3089 * Checks if the Gate A20 is enabled or not.
3090 *
3091 * @returns true if A20 is enabled.
3092 * @returns false if A20 is disabled.
3093 * @param pDevIns Device instance.
3094 * @thread The emulation thread.
3095 */
3096 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3097
3098 /**
3099 * Set the VM error message
3100 *
3101 * @returns rc.
3102 * @param pDrvIns Driver instance.
3103 * @param rc VBox status code.
3104 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3105 * @param pszFormat Error message format string.
3106 * @param ... Error message arguments.
3107 */
3108 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3109
3110 /**
3111 * Set the VM error message
3112 *
3113 * @returns rc.
3114 * @param pDrvIns Driver instance.
3115 * @param rc VBox status code.
3116 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3117 * @param pszFormat Error message format string.
3118 * @param va Error message arguments.
3119 */
3120 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3121
3122 /**
3123 * Set the VM runtime error message
3124 *
3125 * @returns VBox status code.
3126 * @param pDevIns Device instance.
3127 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3128 * @param pszErrorId Error ID string.
3129 * @param pszFormat Error message format string.
3130 * @param ... Error message arguments.
3131 */
3132 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3133
3134 /**
3135 * Set the VM runtime error message
3136 *
3137 * @returns VBox status code.
3138 * @param pDevIns Device instance.
3139 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3140 * @param pszErrorId Error ID string.
3141 * @param pszFormat Error message format string.
3142 * @param va Error message arguments.
3143 */
3144 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3145
3146 /**
3147 * Set parameters for pending MMIO patch operation
3148 *
3149 * @returns rc.
3150 * @param pDevIns Device instance.
3151 * @param GCPhys MMIO physical address
3152 * @param pCachedData GC pointer to cached data
3153 */
3154 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3155
3156 /**
3157 * Gets the VM handle. Restricted API.
3158 *
3159 * @returns VM Handle.
3160 * @param pDevIns Device instance.
3161 */
3162 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3163
3164 /**
3165 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3166 *
3167 * @returns true = yes, false = no
3168 * @param pDevIns Device instance.
3169 */
3170 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3171
3172 /**
3173 * Gets the VMCPU handle. Restricted API.
3174 *
3175 * @returns VMCPU Handle.
3176 * @param pDevIns Device instance.
3177 */
3178 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3179
3180 /** Just a safety precaution. */
3181 uint32_t u32TheEnd;
3182} PDMDEVHLPR0;
3183/** Pointer PDM Device R0 API. */
3184typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3185/** Pointer PDM Device GC API. */
3186typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3187
3188/** Current PDMDEVHLP version number. */
3189#define PDM_DEVHLPR0_VERSION 0xfb030000
3190
3191
3192
3193/**
3194 * PDM Device Instance.
3195 */
3196typedef struct PDMDEVINS
3197{
3198 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3199 uint32_t u32Version;
3200 /** Device instance number. */
3201 RTUINT iInstance;
3202
3203 /** Pointer the GC PDM Device API. */
3204 PCPDMDEVHLPRC pDevHlpRC;
3205 /** Pointer to device instance data. */
3206 RTRCPTR pvInstanceDataRC;
3207
3208 /** Pointer the R0 PDM Device API. */
3209 PCPDMDEVHLPR0 pDevHlpR0;
3210 /** Pointer to device instance data (R0). */
3211 RTR0PTR pvInstanceDataR0;
3212
3213 /** Pointer the HC PDM Device API. */
3214 PCPDMDEVHLPR3 pDevHlpR3;
3215 /** Pointer to device instance data. */
3216 RTR3PTR pvInstanceDataR3;
3217
3218 /** Pointer to device registration structure. */
3219 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3220 /** Configuration handle. */
3221 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3222
3223 /** The base interface of the device.
3224 * The device constructor initializes this if it has any
3225 * device level interfaces to export. To obtain this interface
3226 * call PDMR3QueryDevice(). */
3227 PDMIBASE IBase;
3228 /** Align the internal data more naturally. */
3229 RTR3PTR R3PtrPadding;
3230
3231 /** Internal data. */
3232 union
3233 {
3234#ifdef PDMDEVINSINT_DECLARED
3235 PDMDEVINSINT s;
3236#endif
3237 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3238 } Internal;
3239
3240 /** Device instance data. The size of this area is defined
3241 * in the PDMDEVREG::cbInstanceData field. */
3242 char achInstanceData[8];
3243} PDMDEVINS;
3244
3245/** Current PDMDEVINS version number. */
3246#define PDM_DEVINS_VERSION 0xf3020000
3247
3248/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3249#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3250
3251
3252/** @def PDMDEV_ASSERT_EMT
3253 * Assert that the current thread is the emulation thread.
3254 */
3255#ifdef VBOX_STRICT
3256# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3257#else
3258# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3259#endif
3260
3261/** @def PDMDEV_ASSERT_OTHER
3262 * Assert that the current thread is NOT the emulation thread.
3263 */
3264#ifdef VBOX_STRICT
3265# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3266#else
3267# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3268#endif
3269
3270/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3271 * Assert that the current thread is owner of the VM lock.
3272 */
3273#ifdef VBOX_STRICT
3274# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3275#else
3276# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3277#endif
3278
3279/** @def PDMDEV_SET_ERROR
3280 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3281 */
3282#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3283 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3284
3285/** @def PDMDEV_SET_RUNTIME_ERROR
3286 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3287 */
3288#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3289 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3290
3291/** @def PDMDEVINS_2_RCPTR
3292 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3293 */
3294#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3295
3296/** @def PDMDEVINS_2_R3PTR
3297 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3298 */
3299#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3300
3301/** @def PDMDEVINS_2_R0PTR
3302 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3303 */
3304#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3305
3306
3307/**
3308 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3309 *
3310 * @returns VBox status code which must be passed up to the VMM.
3311 * @param pDevIns Device instance.
3312 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3313 * @param pszFormat Message. (optional)
3314 * @param ... Message parameters.
3315 */
3316DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3317{
3318#ifdef VBOX_STRICT
3319# ifdef IN_RING3
3320 int rc;
3321 va_list args;
3322 va_start(args, pszFormat);
3323 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3324 va_end(args);
3325 return rc;
3326# else
3327 return VINF_EM_DBG_STOP;
3328# endif
3329#else
3330 NOREF(pDevIns);
3331 NOREF(pszFile);
3332 NOREF(iLine);
3333 NOREF(pszFunction);
3334 NOREF(pszFormat);
3335 return VINF_SUCCESS;
3336#endif
3337}
3338
3339
3340#ifdef IN_RING3
3341/**
3342 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3343 */
3344DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3345 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3346 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3347{
3348 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3349}
3350
3351/**
3352 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3353 */
3354DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3355 const char *pszOut, const char *pszIn, const char *pszOutStr,
3356 const char *pszInStr, const char *pszDesc)
3357{
3358 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3359}
3360
3361/**
3362 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3363 */
3364DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3365 const char *pszOut, const char *pszIn, const char *pszOutStr,
3366 const char *pszInStr, const char *pszDesc)
3367{
3368 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3369}
3370
3371/**
3372 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3373 */
3374DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3375{
3376 return pDevIns->pDevHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3377}
3378
3379/**
3380 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3381 */
3382DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3383 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3384 const char *pszDesc)
3385{
3386 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3387}
3388
3389/**
3390 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3391 */
3392DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3393 const char *pszWrite, const char *pszRead, const char *pszFill)
3394{
3395 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3396}
3397
3398/**
3399 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3400 */
3401DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3402 const char *pszWrite, const char *pszRead, const char *pszFill)
3403{
3404 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3405}
3406
3407/**
3408 * @copydoc PDMDEVHLPR3::pfnROMRegister
3409 */
3410DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3411{
3412 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3413}
3414/**
3415 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3416 */
3417DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3418{
3419 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3420}
3421
3422/**
3423 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3424 */
3425DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3426{
3427 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3428}
3429
3430/**
3431 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3432 */
3433DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3434{
3435 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3436}
3437
3438/**
3439 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3440 */
3441DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3442{
3443 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3444}
3445
3446/**
3447 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3448 */
3449DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3450{
3451 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3452}
3453
3454/**
3455 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3456 */
3457DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3458 const char *pszDesc, PRTRCPTR pRCPtr)
3459{
3460 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3461}
3462
3463/**
3464 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3465 */
3466DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3467 const char *pszDesc, PRTR0PTR pR0Ptr)
3468{
3469 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3470}
3471
3472/**
3473 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3474 */
3475DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3476{
3477 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3478}
3479
3480/**
3481 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3482 */
3483DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3484{
3485 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3486}
3487
3488/**
3489 * Register a save state data unit.
3490 *
3491 * @returns VBox status.
3492 * @param pDevIns Device instance.
3493 * @param uVersion Data layout version number.
3494 * @param cbGuess The approximate amount of data in the unit.
3495 * Only for progress indicators.
3496 * @param pfnSaveExec Execute save callback, optional.
3497 * @param pfnLoadExec Execute load callback, optional.
3498 */
3499DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3500 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3501{
3502 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3503 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3504 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3505 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3506}
3507
3508/**
3509 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3510 */
3511DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3512 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3513 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3514 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3515{
3516 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3517 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3518 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3519 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3520}
3521
3522/**
3523 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3524 */
3525DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3526 const char *pszDesc, PPTMTIMERR3 ppTimer)
3527{
3528 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3529}
3530
3531/**
3532 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3533 */
3534DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3535{
3536 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3537}
3538
3539/**
3540 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3541 */
3542DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3543{
3544 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3545}
3546
3547/**
3548 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3549 */
3550DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3551 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3552{
3553 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3554}
3555
3556/**
3557 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3558 */
3559DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3560{
3561 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3562}
3563
3564/**
3565 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3566 */
3567DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3568{
3569 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3570}
3571
3572/**
3573 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3574 */
3575DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3576{
3577 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3578}
3579
3580/**
3581 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3582 */
3583DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3584{
3585 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3586}
3587
3588/**
3589 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3590 */
3591DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3592{
3593 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3594}
3595
3596/**
3597 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3598 */
3599DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3600{
3601 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3602}
3603
3604/**
3605 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3606 */
3607DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3608 const char *pszDesc, const char *pszName, ...)
3609{
3610 va_list va;
3611 va_start(va, pszName);
3612 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3613 va_end(va);
3614}
3615
3616/**
3617 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3618 */
3619DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3620 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
3621{
3622 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
3623}
3624
3625/**
3626 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3627 */
3628DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3629{
3630 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3631}
3632
3633/**
3634 * @copydoc PDMDEVHLPR3::pfnUTCNow
3635 */
3636DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3637{
3638 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3639}
3640
3641/**
3642 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3643 */
3644DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3645{
3646 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3647}
3648
3649/**
3650 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3651 */
3652DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3653{
3654 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3655}
3656
3657/**
3658 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3659 */
3660DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3661{
3662 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3663}
3664
3665/**
3666 * @copydoc PDMDEVHLPR3::pfnVMState
3667 */
3668DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3669{
3670 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3671}
3672
3673/**
3674 * @copydoc PDMDEVHLPR3::pfnA20Set
3675 */
3676DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3677{
3678 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3679}
3680
3681/**
3682 * @copydoc PDMDEVHLPR3::pfnVMReset
3683 */
3684DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3685{
3686 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3687}
3688
3689/**
3690 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3691 */
3692DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3693{
3694 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3695}
3696
3697/**
3698 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3699 */
3700DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3701{
3702 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3703}
3704
3705/**
3706 * @copydoc PDMDEVHLPR3::pfnDMARegister
3707 */
3708DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3709{
3710 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3711}
3712
3713/**
3714 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3715 */
3716DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3717{
3718 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3719}
3720
3721/**
3722 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3723 */
3724DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3725{
3726 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3727}
3728
3729/**
3730 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3731 */
3732DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3733{
3734 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3735}
3736
3737/**
3738 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3739 */
3740DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3741{
3742 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3743}
3744
3745/**
3746 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3747 */
3748DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3749{
3750 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3751}
3752
3753/**
3754 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3755 */
3756DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3757{
3758 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3759}
3760
3761/**
3762 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3763 */
3764DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3765{
3766 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3767}
3768
3769/**
3770 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3771 */
3772DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3773{
3774 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3775}
3776
3777/**
3778 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3779 */
3780DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3781 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3782{
3783 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3784}
3785#endif /* IN_RING3 */
3786
3787
3788/**
3789 * @copydoc PDMDEVHLPR3::pfnGetVM
3790 */
3791DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3792{
3793 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3794}
3795
3796/**
3797 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
3798 */
3799DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
3800{
3801 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
3802}
3803
3804#ifdef IN_RING0
3805/**
3806 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3807 */
3808DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3809{
3810 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3811}
3812#endif
3813
3814/**
3815 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3816 */
3817DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3818{
3819 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3820}
3821
3822/**
3823 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3824 */
3825DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3826{
3827 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3828}
3829
3830/**
3831 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3832 */
3833DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3834{
3835 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3836}
3837
3838/**
3839 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3840 */
3841DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3842{
3843 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3844}
3845
3846/**
3847 * @copydoc PDMDEVHLPR3::pfnPhysRead
3848 */
3849DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3850{
3851 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3852}
3853
3854/**
3855 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3856 */
3857DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3858{
3859 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3860}
3861
3862#ifdef IN_RING3
3863
3864/**
3865 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3866 */
3867DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3868{
3869 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3870}
3871
3872/**
3873 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3874 */
3875DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3876{
3877 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3878}
3879
3880/**
3881 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3882 */
3883DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3884{
3885 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3886}
3887
3888#endif /* IN_RING3 */
3889
3890/**
3891 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3892 */
3893DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3894{
3895 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3896}
3897
3898/**
3899 * @copydoc PDMDEVHLPR3::pfnVMSetError
3900 */
3901DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3902{
3903 va_list va;
3904 va_start(va, pszFormat);
3905 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3906 va_end(va);
3907 return rc;
3908}
3909
3910/**
3911 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3912 */
3913DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3914{
3915 va_list va;
3916 int rc;
3917 va_start(va, pszFormat);
3918 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3919 va_end(va);
3920 return rc;
3921}
3922
3923
3924
3925/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3926typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3927
3928/**
3929 * Callbacks for VBoxDeviceRegister().
3930 */
3931typedef struct PDMDEVREGCB
3932{
3933 /** Interface version.
3934 * This is set to PDM_DEVREG_CB_VERSION. */
3935 uint32_t u32Version;
3936
3937 /**
3938 * Registers a device with the current VM instance.
3939 *
3940 * @returns VBox status code.
3941 * @param pCallbacks Pointer to the callback table.
3942 * @param pDevReg Pointer to the device registration record.
3943 * This data must be permanent and readonly.
3944 */
3945 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3946
3947 /**
3948 * Allocate memory which is associated with current VM instance
3949 * and automatically freed on it's destruction.
3950 *
3951 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3952 * @param pCallbacks Pointer to the callback table.
3953 * @param cb Number of bytes to allocate.
3954 */
3955 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3956} PDMDEVREGCB;
3957
3958/** Current version of the PDMDEVREGCB structure. */
3959#define PDM_DEVREG_CB_VERSION 0xf4010000
3960
3961
3962/**
3963 * The VBoxDevicesRegister callback function.
3964 *
3965 * PDM will invoke this function after loading a device module and letting
3966 * the module decide which devices to register and how to handle conflicts.
3967 *
3968 * @returns VBox status code.
3969 * @param pCallbacks Pointer to the callback table.
3970 * @param u32Version VBox version number.
3971 */
3972typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3973
3974/** @} */
3975
3976RT_C_DECLS_END
3977
3978#endif
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