VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 19452

Last change on this file since 19452 was 19437, checked in by vboxsync, 16 years ago

SMP: send SIPI notification from APIC, let VM handle what really do

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/err.h>
44#include <VBox/pci.h>
45#include <iprt/stdarg.h>
46
47__BEGIN_DECLS
48
49/** @defgroup grp_pdm_device The PDM Devices API
50 * @ingroup grp_pdm
51 * @{
52 */
53
54/**
55 * Construct a device instance for a VM.
56 *
57 * @returns VBox status.
58 * @param pDevIns The device instance data.
59 * If the registration structure is needed, pDevIns->pDevReg points to it.
60 * @param iInstance Instance number. Use this to figure out which registers and such to use.
61 * The instance number is also found in pDevIns->iInstance, but since it's
62 * likely to be freqently used PDM passes it as parameter.
63 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
64 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
65 * primary usage will in this function it's passed as a parameter.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 */
80typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
81/** Pointer to a FNPDMDEVDESTRUCT() function. */
82typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
83
84/**
85 * Device relocation callback.
86 *
87 * When this callback is called the device instance data, and if the
88 * device have a GC component, is being relocated, or/and the selectors
89 * have been changed. The device must use the chance to perform the
90 * necessary pointer relocations and data updates.
91 *
92 * Before the GC code is executed the first time, this function will be
93 * called with a 0 delta so GC pointer calculations can be one in one place.
94 *
95 * @param pDevIns Pointer to the device instance.
96 * @param offDelta The relocation delta relative to the old location.
97 *
98 * @remark A relocation CANNOT fail.
99 */
100typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
101/** Pointer to a FNPDMDEVRELOCATE() function. */
102typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
103
104
105/**
106 * Device I/O Control interface.
107 *
108 * This is used by external components, such as the COM interface, to
109 * communicate with devices using a class wide interface or a device
110 * specific interface.
111 *
112 * @returns VBox status code.
113 * @param pDevIns Pointer to the device instance.
114 * @param uFunction Function to perform.
115 * @param pvIn Pointer to input data.
116 * @param cbIn Size of input data.
117 * @param pvOut Pointer to output data.
118 * @param cbOut Size of output data.
119 * @param pcbOut Where to store the actual size of the output data.
120 */
121typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
122 void *pvIn, RTUINT cbIn,
123 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
124/** Pointer to a FNPDMDEVIOCTL() function. */
125typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
126
127/**
128 * Power On notification.
129 *
130 * @returns VBox status.
131 * @param pDevIns The device instance data.
132 */
133typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
134/** Pointer to a FNPDMDEVPOWERON() function. */
135typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
136
137/**
138 * Reset notification.
139 *
140 * @returns VBox status.
141 * @param pDevIns The device instance data.
142 */
143typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
144/** Pointer to a FNPDMDEVRESET() function. */
145typedef FNPDMDEVRESET *PFNPDMDEVRESET;
146
147/**
148 * Suspend notification.
149 *
150 * @returns VBox status.
151 * @param pDevIns The device instance data.
152 */
153typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
154/** Pointer to a FNPDMDEVSUSPEND() function. */
155typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
156
157/**
158 * Resume notification.
159 *
160 * @returns VBox status.
161 * @param pDevIns The device instance data.
162 */
163typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
164/** Pointer to a FNPDMDEVRESUME() function. */
165typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
166
167/**
168 * Power Off notification.
169 *
170 * @param pDevIns The device instance data.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 */
189typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
190/** Pointer to a FNPDMDEVATTACH() function. */
191typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
192
193/**
194 * Detach notification.
195 *
196 * This is called when a driver is detaching itself from a LUN of the device.
197 * The device should adjust it's state to reflect this.
198 *
199 * This is like unplugging the network cable to use it for the laptop or
200 * something while the PC is still running.
201 *
202 * @param pDevIns The device instance.
203 * @param iLUN The logical unit which is being detached.
204 */
205typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
206/** Pointer to a FNPDMDEVDETACH() function. */
207typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
208
209/**
210 * Query the base interface of a logical unit.
211 *
212 * @returns VBOX status code.
213 * @param pDevIns The device instance.
214 * @param iLUN The logicial unit to query.
215 * @param ppBase Where to store the pointer to the base interface of the LUN.
216 */
217typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
218/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
219typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
220
221/**
222 * Init complete notification.
223 * This can be done to do communication with other devices and other
224 * initialization which requires everything to be in place.
225 *
226 * @returns VBOX status code.
227 * @param pDevIns The device instance.
228 */
229typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
230/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
231typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
232
233
234
235/** PDM Device Registration Structure,
236 * This structure is used when registering a device from
237 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
238 * the VM is terminated.
239 */
240typedef struct PDMDEVREG
241{
242 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
243 uint32_t u32Version;
244 /** Device name. */
245 char szDeviceName[32];
246 /** Name of the raw-mode context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
248 char szRCMod[32];
249 /** Name of the ring-0 module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
251 char szR0Mod[32];
252 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
253 * remain unchanged from registration till VM destruction. */
254 const char *pszDescription;
255
256 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
257 RTUINT fFlags;
258 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
259 RTUINT fClass;
260 /** Maximum number of instances (per VM). */
261 RTUINT cMaxInstances;
262 /** Size of the instance data. */
263 RTUINT cbInstance;
264
265 /** Construct instance - required. */
266 PFNPDMDEVCONSTRUCT pfnConstruct;
267 /** Destruct instance - optional. */
268 PFNPDMDEVDESTRUCT pfnDestruct;
269 /** Relocation command - optional. */
270 PFNPDMDEVRELOCATE pfnRelocate;
271 /** I/O Control interface - optional. */
272 PFNPDMDEVIOCTL pfnIOCtl;
273 /** Power on notification - optional. */
274 PFNPDMDEVPOWERON pfnPowerOn;
275 /** Reset notification - optional. */
276 PFNPDMDEVRESET pfnReset;
277 /** Suspend notification - optional. */
278 PFNPDMDEVSUSPEND pfnSuspend;
279 /** Resume notification - optional. */
280 PFNPDMDEVRESUME pfnResume;
281 /** Attach command - optional. */
282 PFNPDMDEVATTACH pfnAttach;
283 /** Detach notification - optional. */
284 PFNPDMDEVDETACH pfnDetach;
285 /** Query a LUN base interface - optional. */
286 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
287 /** Init complete notification - optional. */
288 PFNPDMDEVINITCOMPLETE pfnInitComplete;
289 /** Power off notification - optional. */
290 PFNPDMDEVPOWEROFF pfnPowerOff;
291 /** @todo */
292 PFNRT pfnSoftReset;
293 /** Initialization safty marker. */
294 uint32_t u32VersionEnd;
295} PDMDEVREG;
296/** Pointer to a PDM Device Structure. */
297typedef PDMDEVREG *PPDMDEVREG;
298/** Const pointer to a PDM Device Structure. */
299typedef PDMDEVREG const *PCPDMDEVREG;
300
301/** Current DEVREG version number. */
302#define PDM_DEVREG_VERSION 0xc0020000
303
304/** PDM Device Flags.
305 * @{ */
306/** This flag is used to indicate that the device has a RC component. */
307#define PDM_DEVREG_FLAGS_RC 0x00000001
308/** This flag is used to indicate that the device has a R0 component. */
309#define PDM_DEVREG_FLAGS_R0 0x00000002
310
311/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
312 * The bit count for the current host. */
313#if HC_ARCH_BITS == 32
314# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
315#elif HC_ARCH_BITS == 64
316# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
317#else
318# error Unsupported HC_ARCH_BITS value.
319#endif
320/** The host bit count mask. */
321#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
322
323/** The device support only 32-bit guests. */
324#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
325/** The device support only 64-bit guests. */
326#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
327/** The device support both 32-bit & 64-bit guests. */
328#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
329/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
330 * The guest bit count for the current compilation. */
331#if GC_ARCH_BITS == 32
332# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
333#elif GC_ARCH_BITS == 64
334# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
335#else
336# error Unsupported GC_ARCH_BITS value.
337#endif
338/** The guest bit count mask. */
339#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
340
341/** A convenience. */
342#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
343
344/** Indicates that the devices support PAE36 on a 32-bit guest. */
345#define PDM_DEVREG_FLAGS_PAE36 0x00001000
346
347/** Indicates that the device needs to be notified before the drivers when suspending. */
348#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
349
350/** Indicates that the device needs to be notified before the drivers when powering off. */
351#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
352/** @} */
353
354
355/** PDM Device Classes.
356 * The order is important, lower bit earlier instantiation.
357 * @{ */
358/** Architecture device. */
359#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
360/** Architecture BIOS device. */
361#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
362/** PCI bus brigde. */
363#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
364/** ISA bus brigde. */
365#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
366/** Input device (mouse, keyboard, joystick, HID, ...). */
367#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
368/** Interrupt controller (PIC). */
369#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
370/** Interval controoler (PIT). */
371#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
372/** RTC/CMOS. */
373#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
374/** DMA controller. */
375#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
376/** VMM Device. */
377#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
378/** Graphics device, like VGA. */
379#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
380/** Storage controller device. */
381#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
382/** Network interface controller. */
383#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
384/** Audio. */
385#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
386/** USB HIC. */
387#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
388/** ACPI. */
389#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
390/** Serial controller device. */
391#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
392/** Parallel controller device */
393#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
394/** Misc devices (always last). */
395#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
396/** @} */
397
398
399/** @name IRQ Level for use with the *SetIrq APIs.
400 * @{
401 */
402/** Assert the IRQ (can assume value 1). */
403#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
404/** Deassert the IRQ (can assume value 0). */
405#define PDM_IRQ_LEVEL_LOW 0
406/** flip-flop - assert and then deassert it again immediately. */
407#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
408/** @} */
409
410
411/**
412 * PCI Bus registration structure.
413 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
414 */
415typedef struct PDMPCIBUSREG
416{
417 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
418 uint32_t u32Version;
419
420 /**
421 * Registers the device with the default PCI bus.
422 *
423 * @returns VBox status code.
424 * @param pDevIns Device instance of the PCI Bus.
425 * @param pPciDev The PCI device structure.
426 * Any PCI enabled device must keep this in it's instance data!
427 * Fill in the PCI data config before registration, please.
428 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
429 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
430 * If negative, the pci bus device will assign one.
431 */
432 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
433
434 /**
435 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
436 *
437 * @returns VBox status code.
438 * @param pDevIns Device instance of the PCI Bus.
439 * @param pPciDev The PCI device structure.
440 * @param iRegion The region number.
441 * @param cbRegion Size of the region.
442 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
443 * @param pfnCallback Callback for doing the mapping.
444 */
445 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
446
447 /**
448 * Register PCI configuration space read/write callbacks.
449 *
450 * @param pDevIns Device instance of the PCI Bus.
451 * @param pPciDev The PCI device structure.
452 * @param pfnRead Pointer to the user defined PCI config read function.
453 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
454 * PCI config read function. This way, user can decide when (and if)
455 * to call default PCI config read function. Can be NULL.
456 * @param pfnWrite Pointer to the user defined PCI config write function.
457 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
458 * PCI config write function. This way, user can decide when (and if)
459 * to call default PCI config write function. Can be NULL.
460 * @thread EMT
461 */
462 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
463 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
464
465 /**
466 * Set the IRQ for a PCI device.
467 *
468 * @param pDevIns Device instance of the PCI Bus.
469 * @param pPciDev The PCI device structure.
470 * @param iIrq IRQ number to set.
471 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
472 */
473 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
474
475 /**
476 * Saves a state of the PCI device.
477 *
478 * @returns VBox status code.
479 * @param pDevIns Device instance of the PCI Bus.
480 * @param pPciDev Pointer to PCI device.
481 * @param pSSMHandle The handle to save the state to.
482 */
483 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
484
485 /**
486 * Loads a saved PCI device state.
487 *
488 * @returns VBox status code.
489 * @param pDevIns Device instance of the PCI Bus.
490 * @param pPciDev Pointer to PCI device.
491 * @param pSSMHandle The handle to the saved state.
492 */
493 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
494
495 /**
496 * Called to perform the job of the bios.
497 * This is only called for the first PCI Bus - it is expected to
498 * service all the PCI buses.
499 *
500 * @returns VBox status.
501 * @param pDevIns Device instance of the first bus.
502 */
503 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
504
505 /** The name of the SetIrq RC entry point. */
506 const char *pszSetIrqRC;
507
508 /** The name of the SetIrq R0 entry point. */
509 const char *pszSetIrqR0;
510
511} PDMPCIBUSREG;
512/** Pointer to a PCI bus registration structure. */
513typedef PDMPCIBUSREG *PPDMPCIBUSREG;
514
515/** Current PDMPCIBUSREG version number. */
516#define PDM_PCIBUSREG_VERSION 0xd0020000
517
518/**
519 * PCI Bus RC helpers.
520 */
521typedef struct PDMPCIHLPRC
522{
523 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
524 uint32_t u32Version;
525
526 /**
527 * Set an ISA IRQ.
528 *
529 * @param pDevIns PCI device instance.
530 * @param iIrq IRQ number to set.
531 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
532 * @thread EMT only.
533 */
534 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
535
536 /**
537 * Set an I/O-APIC IRQ.
538 *
539 * @param pDevIns PCI device instance.
540 * @param iIrq IRQ number to set.
541 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
542 * @thread EMT only.
543 */
544 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
545
546 /**
547 * Acquires the PDM lock.
548 *
549 * @returns VINF_SUCCESS on success.
550 * @returns rc if we failed to acquire the lock.
551 * @param pDevIns The PCI device instance.
552 * @param rc What to return if we fail to acquire the lock.
553 */
554 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
555
556 /**
557 * Releases the PDM lock.
558 *
559 * @param pDevIns The PCI device instance.
560 */
561 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
562
563 /** Just a safety precaution. */
564 uint32_t u32TheEnd;
565} PDMPCIHLPRC;
566/** Pointer to PCI helpers. */
567typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
568/** Pointer to const PCI helpers. */
569typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
570
571/** Current PDMPCIHLPR3 version number. */
572#define PDM_PCIHLPRC_VERSION 0xe1010000
573
574
575/**
576 * PCI Bus R0 helpers.
577 */
578typedef struct PDMPCIHLPR0
579{
580 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
581 uint32_t u32Version;
582
583 /**
584 * Set an ISA IRQ.
585 *
586 * @param pDevIns PCI device instance.
587 * @param iIrq IRQ number to set.
588 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
589 * @thread EMT only.
590 */
591 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
592
593 /**
594 * Set an I/O-APIC IRQ.
595 *
596 * @param pDevIns PCI device instance.
597 * @param iIrq IRQ number to set.
598 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
599 * @thread EMT only.
600 */
601 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
602
603 /**
604 * Acquires the PDM lock.
605 *
606 * @returns VINF_SUCCESS on success.
607 * @returns rc if we failed to acquire the lock.
608 * @param pDevIns The PCI device instance.
609 * @param rc What to return if we fail to acquire the lock.
610 */
611 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
612
613 /**
614 * Releases the PDM lock.
615 *
616 * @param pDevIns The PCI device instance.
617 */
618 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
619
620 /** Just a safety precaution. */
621 uint32_t u32TheEnd;
622} PDMPCIHLPR0;
623/** Pointer to PCI helpers. */
624typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
625/** Pointer to const PCI helpers. */
626typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
627
628/** Current PDMPCIHLPR0 version number. */
629#define PDM_PCIHLPR0_VERSION 0xe1010000
630
631/**
632 * PCI device helpers.
633 */
634typedef struct PDMPCIHLPR3
635{
636 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
637 uint32_t u32Version;
638
639 /**
640 * Set an ISA IRQ.
641 *
642 * @param pDevIns The PCI device instance.
643 * @param iIrq IRQ number to set.
644 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
645 * @thread EMT only.
646 */
647 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
648
649 /**
650 * Set an I/O-APIC IRQ.
651 *
652 * @param pDevIns The PCI device instance.
653 * @param iIrq IRQ number to set.
654 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
655 * @thread EMT only.
656 */
657 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
658
659 /**
660 * Checks if the given address is an MMIO2 base address or not.
661 *
662 * @returns true/false accordingly.
663 * @param pDevIns The PCI device instance.
664 * @param pOwner The owner of the memory, optional.
665 * @param GCPhys The address to check.
666 */
667 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
668
669 /**
670 * Gets the address of the RC PCI Bus helpers.
671 *
672 * This should be called at both construction and relocation time
673 * to obtain the correct address of the RC helpers.
674 *
675 * @returns RC pointer to the PCI Bus helpers.
676 * @param pDevIns Device instance of the PCI Bus.
677 * @thread EMT only.
678 */
679 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
680
681 /**
682 * Gets the address of the R0 PCI Bus helpers.
683 *
684 * This should be called at both construction and relocation time
685 * to obtain the correct address of the R0 helpers.
686 *
687 * @returns R0 pointer to the PCI Bus helpers.
688 * @param pDevIns Device instance of the PCI Bus.
689 * @thread EMT only.
690 */
691 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
692
693 /**
694 * Acquires the PDM lock.
695 *
696 * @returns VINF_SUCCESS on success.
697 * @returns Fatal error on failure.
698 * @param pDevIns The PCI device instance.
699 * @param rc Dummy for making the interface identical to the RC and R0 versions.
700 */
701 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
702
703 /**
704 * Releases the PDM lock.
705 *
706 * @param pDevIns The PCI device instance.
707 */
708 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
709
710 /** Just a safety precaution. */
711 uint32_t u32TheEnd;
712} PDMPCIHLPR3;
713/** Pointer to PCI helpers. */
714typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
715/** Pointer to const PCI helpers. */
716typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
717
718/** Current PDMPCIHLPR3 version number. */
719#define PDM_PCIHLPR3_VERSION 0xf1020000
720
721
722/**
723 * Programmable Interrupt Controller registration structure.
724 */
725typedef struct PDMPICREG
726{
727 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
728 uint32_t u32Version;
729
730 /**
731 * Set the an IRQ.
732 *
733 * @param pDevIns Device instance of the PIC.
734 * @param iIrq IRQ number to set.
735 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
736 */
737 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
738
739 /**
740 * Get a pending interrupt.
741 *
742 * @returns Pending interrupt number.
743 * @param pDevIns Device instance of the PIC.
744 */
745 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
746
747 /** The name of the RC SetIrq entry point. */
748 const char *pszSetIrqRC;
749 /** The name of the RC GetInterrupt entry point. */
750 const char *pszGetInterruptRC;
751
752 /** The name of the R0 SetIrq entry point. */
753 const char *pszSetIrqR0;
754 /** The name of the R0 GetInterrupt entry point. */
755 const char *pszGetInterruptR0;
756} PDMPICREG;
757/** Pointer to a PIC registration structure. */
758typedef PDMPICREG *PPDMPICREG;
759
760/** Current PDMPICREG version number. */
761#define PDM_PICREG_VERSION 0xe0020000
762
763/**
764 * PIC RC helpers.
765 */
766typedef struct PDMPICHLPRC
767{
768 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
769 uint32_t u32Version;
770
771 /**
772 * Set the interrupt force action flag.
773 *
774 * @param pDevIns Device instance of the PIC.
775 */
776 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
777
778 /**
779 * Clear the interrupt force action flag.
780 *
781 * @param pDevIns Device instance of the PIC.
782 */
783 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
784
785 /**
786 * Acquires the PDM lock.
787 *
788 * @returns VINF_SUCCESS on success.
789 * @returns rc if we failed to acquire the lock.
790 * @param pDevIns The PIC device instance.
791 * @param rc What to return if we fail to acquire the lock.
792 */
793 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
794
795 /**
796 * Releases the PDM lock.
797 *
798 * @param pDevIns The PIC device instance.
799 */
800 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
801
802 /** Just a safety precaution. */
803 uint32_t u32TheEnd;
804} PDMPICHLPRC;
805
806/** Pointer to PIC RC helpers. */
807typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
808/** Pointer to const PIC RC helpers. */
809typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
810
811/** Current PDMPICHLPRC version number. */
812#define PDM_PICHLPRC_VERSION 0xfc010000
813
814
815/**
816 * PIC R0 helpers.
817 */
818typedef struct PDMPICHLPR0
819{
820 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
821 uint32_t u32Version;
822
823 /**
824 * Set the interrupt force action flag.
825 *
826 * @param pDevIns Device instance of the PIC.
827 */
828 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
829
830 /**
831 * Clear the interrupt force action flag.
832 *
833 * @param pDevIns Device instance of the PIC.
834 */
835 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
836
837 /**
838 * Acquires the PDM lock.
839 *
840 * @returns VINF_SUCCESS on success.
841 * @returns rc if we failed to acquire the lock.
842 * @param pDevIns The PIC device instance.
843 * @param rc What to return if we fail to acquire the lock.
844 */
845 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
846
847 /**
848 * Releases the PDM lock.
849 *
850 * @param pDevIns The PCI device instance.
851 */
852 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
853
854 /** Just a safety precaution. */
855 uint32_t u32TheEnd;
856} PDMPICHLPR0;
857
858/** Pointer to PIC R0 helpers. */
859typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
860/** Pointer to const PIC R0 helpers. */
861typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
862
863/** Current PDMPICHLPR0 version number. */
864#define PDM_PICHLPR0_VERSION 0xfc010000
865
866/**
867 * PIC R3 helpers.
868 */
869typedef struct PDMPICHLPR3
870{
871 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
872 uint32_t u32Version;
873
874 /**
875 * Set the interrupt force action flag.
876 *
877 * @param pDevIns Device instance of the PIC.
878 */
879 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
880
881 /**
882 * Clear the interrupt force action flag.
883 *
884 * @param pDevIns Device instance of the PIC.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
887
888 /**
889 * Acquires the PDM lock.
890 *
891 * @returns VINF_SUCCESS on success.
892 * @returns Fatal error on failure.
893 * @param pDevIns The PIC device instance.
894 * @param rc Dummy for making the interface identical to the RC and R0 versions.
895 */
896 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
897
898 /**
899 * Releases the PDM lock.
900 *
901 * @param pDevIns The PIC device instance.
902 */
903 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
904
905 /**
906 * Gets the address of the RC PIC helpers.
907 *
908 * This should be called at both construction and relocation time
909 * to obtain the correct address of the RC helpers.
910 *
911 * @returns RC pointer to the PIC helpers.
912 * @param pDevIns Device instance of the PIC.
913 */
914 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
915
916 /**
917 * Gets the address of the R0 PIC helpers.
918 *
919 * This should be called at both construction and relocation time
920 * to obtain the correct address of the R0 helpers.
921 *
922 * @returns R0 pointer to the PIC helpers.
923 * @param pDevIns Device instance of the PIC.
924 */
925 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
926
927 /** Just a safety precaution. */
928 uint32_t u32TheEnd;
929} PDMPICHLPR3;
930
931/** Pointer to PIC R3 helpers. */
932typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
933/** Pointer to const PIC R3 helpers. */
934typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
935
936/** Current PDMPICHLPR3 version number. */
937#define PDM_PICHLPR3_VERSION 0xf0010000
938
939
940
941/**
942 * Advanced Programmable Interrupt Controller registration structure.
943 */
944typedef struct PDMAPICREG
945{
946 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
947 uint32_t u32Version;
948
949 /**
950 * Get a pending interrupt.
951 *
952 * @returns Pending interrupt number.
953 * @param pDevIns Device instance of the APIC.
954 */
955 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
956
957 /**
958 * Check if the APIC has a pending interrupt/if a TPR change would active one
959 *
960 * @returns Pending interrupt yes/no
961 * @param pDevIns Device instance of the APIC.
962 */
963 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
964
965 /**
966 * Set the APIC base.
967 *
968 * @param pDevIns Device instance of the APIC.
969 * @param u64Base The new base.
970 */
971 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
972
973 /**
974 * Get the APIC base.
975 *
976 * @returns Current base.
977 * @param pDevIns Device instance of the APIC.
978 */
979 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
980
981 /**
982 * Set the TPR (task priority register).
983 *
984 * @param pDevIns Device instance of the APIC.
985 * @param u8TPR The new TPR.
986 */
987 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
988
989 /**
990 * Get the TPR (task priority register).
991 *
992 * @returns The current TPR.
993 * @param pDevIns Device instance of the APIC.
994 * @param pfPending Pending interrupt state (out).
995 */
996 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
997
998 /**
999 * Write MSR in APIC range.
1000 *
1001 * @returns VBox status code.
1002 * @param pDevIns Device instance of the APIC.
1003 * @param idCpu Target CPU.
1004 * @param u32Reg MSR to write.
1005 * @param u64Value Value to write.
1006 */
1007 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1008
1009 /**
1010 * Read MSR in APIC range.
1011 *
1012 * @returns VBox status code.
1013 * @param pDevIns Device instance of the APIC.
1014 * @param idCpu Target CPU.
1015 * @param u32Reg MSR to read.
1016 * @param pu64Value Value read.
1017 */
1018 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1019
1020 /**
1021 * Private interface between the IOAPIC and APIC.
1022 *
1023 * This is a low-level, APIC/IOAPIC implementation specific interface
1024 * which is registered with PDM only because it makes life so much
1025 * simpler right now (GC bits). This is a bad bad hack! The correct
1026 * way of doing this would involve some way of querying GC interfaces
1027 * and relocating them. Perhaps doing some kind of device init in GC...
1028 *
1029 * @returns The current TPR.
1030 * @param pDevIns Device instance of the APIC.
1031 * @param u8Dest See APIC implementation.
1032 * @param u8DestMode See APIC implementation.
1033 * @param u8DeliveryMode See APIC implementation.
1034 * @param iVector See APIC implementation.
1035 * @param u8Polarity See APIC implementation.
1036 * @param u8TriggerMode See APIC implementation.
1037 */
1038 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1039 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1040
1041 /** The name of the RC GetInterrupt entry point. */
1042 const char *pszGetInterruptRC;
1043 /** The name of the RC HasPendingIrq entry point. */
1044 const char *pszHasPendingIrqRC;
1045 /** The name of the RC SetBase entry point. */
1046 const char *pszSetBaseRC;
1047 /** The name of the RC GetBase entry point. */
1048 const char *pszGetBaseRC;
1049 /** The name of the RC SetTPR entry point. */
1050 const char *pszSetTPRRC;
1051 /** The name of the RC GetTPR entry point. */
1052 const char *pszGetTPRRC;
1053 /** The name of the RC WriteMSR entry point. */
1054 const char *pszWriteMSRRC;
1055 /** The name of the RC ReadMSR entry point. */
1056 const char *pszReadMSRRC;
1057 /** The name of the RC BusDeliver entry point. */
1058 const char *pszBusDeliverRC;
1059
1060 /** The name of the R0 GetInterrupt entry point. */
1061 const char *pszGetInterruptR0;
1062 /** The name of the R0 HasPendingIrq entry point. */
1063 const char *pszHasPendingIrqR0;
1064 /** The name of the R0 SetBase entry point. */
1065 const char *pszSetBaseR0;
1066 /** The name of the R0 GetBase entry point. */
1067 const char *pszGetBaseR0;
1068 /** The name of the R0 SetTPR entry point. */
1069 const char *pszSetTPRR0;
1070 /** The name of the R0 GetTPR entry point. */
1071 const char *pszGetTPRR0;
1072 /** The name of the R0 WriteMSR entry point. */
1073 const char *pszWriteMSRR0;
1074 /** The name of the R0 ReadMSR entry point. */
1075 const char *pszReadMSRR0;
1076 /** The name of the R0 BusDeliver entry point. */
1077 const char *pszBusDeliverR0;
1078
1079} PDMAPICREG;
1080/** Pointer to an APIC registration structure. */
1081typedef PDMAPICREG *PPDMAPICREG;
1082
1083/** Current PDMAPICREG version number. */
1084#define PDM_APICREG_VERSION 0x70010000
1085
1086
1087/**
1088 * APIC version argument for pfnChangeFeature.
1089 */
1090typedef enum PDMAPICVERSION
1091{
1092 /** Invalid 0 entry. */
1093 PDMAPICVERSION_INVALID = 0,
1094 /** No APIC. */
1095 PDMAPICVERSION_NONE,
1096 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1097 PDMAPICVERSION_APIC,
1098 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1099 PDMAPICVERSION_X2APIC,
1100 /** The usual 32-bit paranoia. */
1101 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1102} PDMAPICVERSION;
1103
1104
1105/**
1106 * APIC RC helpers.
1107 */
1108typedef struct PDMAPICHLPRC
1109{
1110 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1111 uint32_t u32Version;
1112
1113 /**
1114 * Set the interrupt force action flag.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 * @param idCpu Virtual CPU to set flag upon.
1118 */
1119 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1120
1121 /**
1122 * Clear the interrupt force action flag.
1123 *
1124 * @param pDevIns Device instance of the APIC.
1125 * @param idCpu Virtual CPU to clear flag upon.
1126 */
1127 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1128
1129 /**
1130 * Modifies APIC-related bits in the CPUID feature mask.
1131 *
1132 * @param pDevIns Device instance of the APIC.
1133 * @param enmVersion Supported APIC version.
1134 */
1135 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1136
1137 /**
1138 * Acquires the PDM lock.
1139 *
1140 * @returns VINF_SUCCESS on success.
1141 * @returns rc if we failed to acquire the lock.
1142 * @param pDevIns The APIC device instance.
1143 * @param rc What to return if we fail to acquire the lock.
1144 */
1145 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1146
1147 /**
1148 * Releases the PDM lock.
1149 *
1150 * @param pDevIns The APIC device instance.
1151 */
1152 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1153
1154 /**
1155 * Get the virtual CPU id corresponding to the current EMT.
1156 *
1157 * @param pDevIns The APIC device instance.
1158 */
1159 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1160
1161 /**
1162 * Sends SIPI to given virtual CPU.
1163 *
1164 * @param pDevIns The APIC device instance.
1165 * @param idCpu Virtual CPU to perform SIPI on
1166 * @param iVector SIPI vector
1167 */
1168 DECLRCCALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, int iVector));
1169
1170 /** Just a safety precaution. */
1171 uint32_t u32TheEnd;
1172} PDMAPICHLPRC;
1173/** Pointer to APIC GC helpers. */
1174typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1175/** Pointer to const APIC helpers. */
1176typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1177
1178/** Current PDMAPICHLPRC version number. */
1179#define PDM_APICHLPRC_VERSION 0x60010000
1180
1181
1182/**
1183 * APIC R0 helpers.
1184 */
1185typedef struct PDMAPICHLPR0
1186{
1187 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1188 uint32_t u32Version;
1189
1190 /**
1191 * Set the interrupt force action flag.
1192 *
1193 * @param pDevIns Device instance of the APIC.
1194 * @param idCpu Virtual CPU to set flag upon.
1195 */
1196 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1197
1198 /**
1199 * Clear the interrupt force action flag.
1200 *
1201 * @param pDevIns Device instance of the APIC.
1202 * @param idCpu Virtual CPU to clear flag upon.
1203 */
1204 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1205
1206 /**
1207 * Modifies APIC-related bits in the CPUID feature mask.
1208 *
1209 * @param pDevIns Device instance of the APIC.
1210 * @param enmVersion Supported APIC version.
1211 */
1212 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1213
1214 /**
1215 * Acquires the PDM lock.
1216 *
1217 * @returns VINF_SUCCESS on success.
1218 * @returns rc if we failed to acquire the lock.
1219 * @param pDevIns The APIC device instance.
1220 * @param rc What to return if we fail to acquire the lock.
1221 */
1222 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1223
1224 /**
1225 * Releases the PDM lock.
1226 *
1227 * @param pDevIns The APIC device instance.
1228 */
1229 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1230
1231 /**
1232 * Get the virtual CPU id corresponding to the current EMT.
1233 *
1234 * @param pDevIns The APIC device instance.
1235 */
1236 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1237
1238 /**
1239 * Sends SIPI to given virtual CPU.
1240 *
1241 * @param pDevIns The APIC device instance.
1242 * @param idCpu Virtual CPU to perform SIPI on
1243 * @param iVector SIPI vector
1244 */
1245 DECLR0CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, int iVector));
1246
1247 /** Just a safety precaution. */
1248 uint32_t u32TheEnd;
1249} PDMAPICHLPR0;
1250/** Pointer to APIC GC helpers. */
1251typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1252/** Pointer to const APIC helpers. */
1253typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1254
1255/** Current PDMAPICHLPR0 version number. */
1256#define PDM_APICHLPR0_VERSION 0x60010000
1257
1258/**
1259 * APIC R3 helpers.
1260 */
1261typedef struct PDMAPICHLPR3
1262{
1263 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1264 uint32_t u32Version;
1265
1266 /**
1267 * Set the interrupt force action flag.
1268 *
1269 * @param pDevIns Device instance of the APIC.
1270 * @param idCpu Virtual CPU to set flag upon.
1271 */
1272 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1273
1274 /**
1275 * Clear the interrupt force action flag.
1276 *
1277 * @param pDevIns Device instance of the APIC.
1278 * @param idCpu Virtual CPU to clear flag upon.
1279 */
1280 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1281
1282 /**
1283 * Modifies APIC-related bits in the CPUID feature mask.
1284 *
1285 * @param pDevIns Device instance of the APIC.
1286 * @param enmVersion Supported APIC version.
1287 */
1288 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1289
1290 /**
1291 * Acquires the PDM lock.
1292 *
1293 * @returns VINF_SUCCESS on success.
1294 * @returns Fatal error on failure.
1295 * @param pDevIns The APIC device instance.
1296 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1297 */
1298 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1299
1300 /**
1301 * Releases the PDM lock.
1302 *
1303 * @param pDevIns The APIC device instance.
1304 */
1305 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1306
1307 /**
1308 * Get the virtual CPU id corresponding to the current EMT.
1309 *
1310 * @param pDevIns The APIC device instance.
1311 */
1312 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1313
1314 /**
1315 * Sends SIPI to given virtual CPU.
1316 *
1317 * @param pDevIns The APIC device instance.
1318 * @param idCpu Virtual CPU to perform SIPI on
1319 * @param iVector SIPI vector
1320 */
1321 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, int iVector));
1322
1323 /**
1324 * Gets the address of the RC APIC helpers.
1325 *
1326 * This should be called at both construction and relocation time
1327 * to obtain the correct address of the RC helpers.
1328 *
1329 * @returns GC pointer to the APIC helpers.
1330 * @param pDevIns Device instance of the APIC.
1331 */
1332 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1333
1334 /**
1335 * Gets the address of the R0 APIC helpers.
1336 *
1337 * This should be called at both construction and relocation time
1338 * to obtain the correct address of the R0 helpers.
1339 *
1340 * @returns R0 pointer to the APIC helpers.
1341 * @param pDevIns Device instance of the APIC.
1342 */
1343 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1344
1345 /** Just a safety precaution. */
1346 uint32_t u32TheEnd;
1347} PDMAPICHLPR3;
1348/** Pointer to APIC helpers. */
1349typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1350/** Pointer to const APIC helpers. */
1351typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1352
1353/** Current PDMAPICHLP version number. */
1354#define PDM_APICHLPR3_VERSION 0xfd010000
1355
1356
1357/**
1358 * I/O APIC registration structure.
1359 */
1360typedef struct PDMIOAPICREG
1361{
1362 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1363 uint32_t u32Version;
1364
1365 /**
1366 * Set the an IRQ.
1367 *
1368 * @param pDevIns Device instance of the I/O APIC.
1369 * @param iIrq IRQ number to set.
1370 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1371 */
1372 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1373
1374 /** The name of the GC SetIrq entry point. */
1375 const char *pszSetIrqRC;
1376
1377 /** The name of the R0 SetIrq entry point. */
1378 const char *pszSetIrqR0;
1379} PDMIOAPICREG;
1380/** Pointer to an APIC registration structure. */
1381typedef PDMIOAPICREG *PPDMIOAPICREG;
1382
1383/** Current PDMAPICREG version number. */
1384#define PDM_IOAPICREG_VERSION 0x50010000
1385
1386
1387/**
1388 * IOAPIC RC helpers.
1389 */
1390typedef struct PDMIOAPICHLPRC
1391{
1392 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1393 uint32_t u32Version;
1394
1395 /**
1396 * Private interface between the IOAPIC and APIC.
1397 *
1398 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1399 *
1400 * @returns The current TPR.
1401 * @param pDevIns Device instance of the IOAPIC.
1402 * @param u8Dest See APIC implementation.
1403 * @param u8DestMode See APIC implementation.
1404 * @param u8DeliveryMode See APIC implementation.
1405 * @param iVector See APIC implementation.
1406 * @param u8Polarity See APIC implementation.
1407 * @param u8TriggerMode See APIC implementation.
1408 */
1409 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1410 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1411
1412 /**
1413 * Acquires the PDM lock.
1414 *
1415 * @returns VINF_SUCCESS on success.
1416 * @returns rc if we failed to acquire the lock.
1417 * @param pDevIns The IOAPIC device instance.
1418 * @param rc What to return if we fail to acquire the lock.
1419 */
1420 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1421
1422 /**
1423 * Releases the PDM lock.
1424 *
1425 * @param pDevIns The IOAPIC device instance.
1426 */
1427 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1428
1429 /** Just a safety precaution. */
1430 uint32_t u32TheEnd;
1431} PDMIOAPICHLPRC;
1432/** Pointer to IOAPIC RC helpers. */
1433typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1434/** Pointer to const IOAPIC helpers. */
1435typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1436
1437/** Current PDMIOAPICHLPRC version number. */
1438#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1439
1440
1441/**
1442 * IOAPIC R0 helpers.
1443 */
1444typedef struct PDMIOAPICHLPR0
1445{
1446 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1447 uint32_t u32Version;
1448
1449 /**
1450 * Private interface between the IOAPIC and APIC.
1451 *
1452 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1453 *
1454 * @returns The current TPR.
1455 * @param pDevIns Device instance of the IOAPIC.
1456 * @param u8Dest See APIC implementation.
1457 * @param u8DestMode See APIC implementation.
1458 * @param u8DeliveryMode See APIC implementation.
1459 * @param iVector See APIC implementation.
1460 * @param u8Polarity See APIC implementation.
1461 * @param u8TriggerMode See APIC implementation.
1462 */
1463 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1464 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1465
1466 /**
1467 * Acquires the PDM lock.
1468 *
1469 * @returns VINF_SUCCESS on success.
1470 * @returns rc if we failed to acquire the lock.
1471 * @param pDevIns The IOAPIC device instance.
1472 * @param rc What to return if we fail to acquire the lock.
1473 */
1474 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1475
1476 /**
1477 * Releases the PDM lock.
1478 *
1479 * @param pDevIns The IOAPIC device instance.
1480 */
1481 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1482
1483 /** Just a safety precaution. */
1484 uint32_t u32TheEnd;
1485} PDMIOAPICHLPR0;
1486/** Pointer to IOAPIC R0 helpers. */
1487typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1488/** Pointer to const IOAPIC helpers. */
1489typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1490
1491/** Current PDMIOAPICHLPR0 version number. */
1492#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1493
1494/**
1495 * IOAPIC R3 helpers.
1496 */
1497typedef struct PDMIOAPICHLPR3
1498{
1499 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1500 uint32_t u32Version;
1501
1502 /**
1503 * Private interface between the IOAPIC and APIC.
1504 *
1505 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1506 *
1507 * @returns The current TPR.
1508 * @param pDevIns Device instance of the IOAPIC.
1509 * @param u8Dest See APIC implementation.
1510 * @param u8DestMode See APIC implementation.
1511 * @param u8DeliveryMode See APIC implementation.
1512 * @param iVector See APIC implementation.
1513 * @param u8Polarity See APIC implementation.
1514 * @param u8TriggerMode See APIC implementation.
1515 */
1516 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1517 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1518
1519 /**
1520 * Acquires the PDM lock.
1521 *
1522 * @returns VINF_SUCCESS on success.
1523 * @returns Fatal error on failure.
1524 * @param pDevIns The IOAPIC device instance.
1525 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1526 */
1527 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1528
1529 /**
1530 * Releases the PDM lock.
1531 *
1532 * @param pDevIns The IOAPIC device instance.
1533 */
1534 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1535
1536 /**
1537 * Gets the address of the RC IOAPIC helpers.
1538 *
1539 * This should be called at both construction and relocation time
1540 * to obtain the correct address of the RC helpers.
1541 *
1542 * @returns RC pointer to the IOAPIC helpers.
1543 * @param pDevIns Device instance of the IOAPIC.
1544 */
1545 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1546
1547 /**
1548 * Gets the address of the R0 IOAPIC helpers.
1549 *
1550 * This should be called at both construction and relocation time
1551 * to obtain the correct address of the R0 helpers.
1552 *
1553 * @returns R0 pointer to the IOAPIC helpers.
1554 * @param pDevIns Device instance of the IOAPIC.
1555 */
1556 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1557
1558 /** Just a safety precaution. */
1559 uint32_t u32TheEnd;
1560} PDMIOAPICHLPR3;
1561/** Pointer to IOAPIC R3 helpers. */
1562typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1563/** Pointer to const IOAPIC helpers. */
1564typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1565
1566/** Current PDMIOAPICHLPR3 version number. */
1567#define PDM_IOAPICHLPR3_VERSION 0xff010000
1568
1569
1570
1571#ifdef IN_RING3
1572
1573/**
1574 * DMA Transfer Handler.
1575 *
1576 * @returns Number of bytes transferred.
1577 * @param pDevIns Device instance of the DMA.
1578 * @param pvUser User pointer.
1579 * @param uChannel Channel number.
1580 * @param off DMA position.
1581 * @param cb Block size.
1582 */
1583typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1584/** Pointer to a FNDMATRANSFERHANDLER(). */
1585typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1586
1587/**
1588 * DMA Controller registration structure.
1589 */
1590typedef struct PDMDMAREG
1591{
1592 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1593 uint32_t u32Version;
1594
1595 /**
1596 * Execute pending transfers.
1597 *
1598 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1599 * @param pDevIns Device instance of the DMAC.
1600 */
1601 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1602
1603 /**
1604 * Register transfer function for DMA channel.
1605 *
1606 * @param pDevIns Device instance of the DMAC.
1607 * @param uChannel Channel number.
1608 * @param pfnTransferHandler Device specific transfer function.
1609 * @param pvUSer User pointer to be passed to the callback.
1610 */
1611 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1612
1613 /**
1614 * Read memory
1615 *
1616 * @returns Number of bytes read.
1617 * @param pDevIns Device instance of the DMAC.
1618 * @param pvBuffer Pointer to target buffer.
1619 * @param off DMA position.
1620 * @param cbBlock Block size.
1621 */
1622 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1623
1624 /**
1625 * Write memory
1626 *
1627 * @returns Number of bytes written.
1628 * @param pDevIns Device instance of the DMAC.
1629 * @param pvBuffer Memory to write.
1630 * @param off DMA position.
1631 * @param cbBlock Block size.
1632 */
1633 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1634
1635 /**
1636 * Set the DREQ line.
1637 *
1638 * @param pDevIns Device instance of the DMAC.
1639 * @param uChannel Channel number.
1640 * @param uLevel Level of the line.
1641 */
1642 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1643
1644 /**
1645 * Get channel mode
1646 *
1647 * @returns Channel mode.
1648 * @param pDevIns Device instance of the DMAC.
1649 * @param uChannel Channel number.
1650 */
1651 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1652
1653} PDMDMACREG;
1654/** Pointer to a DMAC registration structure. */
1655typedef PDMDMACREG *PPDMDMACREG;
1656
1657/** Current PDMDMACREG version number. */
1658#define PDM_DMACREG_VERSION 0xf5010000
1659
1660
1661/**
1662 * DMA Controller device helpers.
1663 */
1664typedef struct PDMDMACHLP
1665{
1666 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1667 uint32_t u32Version;
1668
1669 /* to-be-defined */
1670
1671} PDMDMACHLP;
1672/** Pointer to DMAC helpers. */
1673typedef PDMDMACHLP *PPDMDMACHLP;
1674/** Pointer to const DMAC helpers. */
1675typedef const PDMDMACHLP *PCPDMDMACHLP;
1676
1677/** Current PDMDMACHLP version number. */
1678#define PDM_DMACHLP_VERSION 0xf6010000
1679
1680#endif /* IN_RING3 */
1681
1682
1683
1684/**
1685 * RTC registration structure.
1686 */
1687typedef struct PDMRTCREG
1688{
1689 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1690 uint32_t u32Version;
1691 uint32_t u32Alignment; /**< structure size alignment. */
1692
1693 /**
1694 * Write to a CMOS register and update the checksum if necessary.
1695 *
1696 * @returns VBox status code.
1697 * @param pDevIns Device instance of the RTC.
1698 * @param iReg The CMOS register index.
1699 * @param u8Value The CMOS register value.
1700 */
1701 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1702
1703 /**
1704 * Read a CMOS register.
1705 *
1706 * @returns VBox status code.
1707 * @param pDevIns Device instance of the RTC.
1708 * @param iReg The CMOS register index.
1709 * @param pu8Value Where to store the CMOS register value.
1710 */
1711 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1712
1713} PDMRTCREG;
1714/** Pointer to a RTC registration structure. */
1715typedef PDMRTCREG *PPDMRTCREG;
1716/** Pointer to a const RTC registration structure. */
1717typedef const PDMRTCREG *PCPDMRTCREG;
1718
1719/** Current PDMRTCREG version number. */
1720#define PDM_RTCREG_VERSION 0xfa010000
1721
1722
1723/**
1724 * RTC device helpers.
1725 */
1726typedef struct PDMRTCHLP
1727{
1728 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1729 uint32_t u32Version;
1730
1731 /* to-be-defined */
1732
1733} PDMRTCHLP;
1734/** Pointer to RTC helpers. */
1735typedef PDMRTCHLP *PPDMRTCHLP;
1736/** Pointer to const RTC helpers. */
1737typedef const PDMRTCHLP *PCPDMRTCHLP;
1738
1739/** Current PDMRTCHLP version number. */
1740#define PDM_RTCHLP_VERSION 0xf6010000
1741
1742
1743
1744#ifdef IN_RING3
1745
1746/**
1747 * PDM Device API.
1748 */
1749typedef struct PDMDEVHLPR3
1750{
1751 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1752 uint32_t u32Version;
1753
1754 /**
1755 * Register a number of I/O ports with a device.
1756 *
1757 * These callbacks are of course for the host context (HC).
1758 * Register HC handlers before guest context (GC) handlers! There must be a
1759 * HC handler for every GC handler!
1760 *
1761 * @returns VBox status.
1762 * @param pDevIns The device instance to register the ports with.
1763 * @param Port First port number in the range.
1764 * @param cPorts Number of ports to register.
1765 * @param pvUser User argument.
1766 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1767 * @param pfnIn Pointer to function which is gonna handle IN operations.
1768 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1769 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1770 * @param pszDesc Pointer to description string. This must not be freed.
1771 */
1772 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1773 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1774 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1775
1776 /**
1777 * Register a number of I/O ports with a device for GC.
1778 *
1779 * These callbacks are for the host context (GC).
1780 * Register host context (HC) handlers before guest context handlers! There must be a
1781 * HC handler for every GC handler!
1782 *
1783 * @returns VBox status.
1784 * @param pDevIns The device instance to register the ports with and which GC module
1785 * to resolve the names against.
1786 * @param Port First port number in the range.
1787 * @param cPorts Number of ports to register.
1788 * @param pvUser User argument.
1789 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1790 * @param pszIn Name of the GC function which is gonna handle IN operations.
1791 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1792 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1793 * @param pszDesc Pointer to description string. This must not be freed.
1794 */
1795 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1796 const char *pszOut, const char *pszIn,
1797 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1798
1799 /**
1800 * Register a number of I/O ports with a device.
1801 *
1802 * These callbacks are of course for the ring-0 host context (R0).
1803 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1804 *
1805 * @returns VBox status.
1806 * @param pDevIns The device instance to register the ports with.
1807 * @param Port First port number in the range.
1808 * @param cPorts Number of ports to register.
1809 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1810 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1811 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1812 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1813 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1814 * @param pszDesc Pointer to description string. This must not be freed.
1815 */
1816 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1817 const char *pszOut, const char *pszIn,
1818 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1819
1820 /**
1821 * Deregister I/O ports.
1822 *
1823 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1824 *
1825 * @returns VBox status.
1826 * @param pDevIns The device instance owning the ports.
1827 * @param Port First port number in the range.
1828 * @param cPorts Number of ports to deregister.
1829 */
1830 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1831
1832 /**
1833 * Register a Memory Mapped I/O (MMIO) region.
1834 *
1835 * These callbacks are of course for the host context (HC).
1836 * Register HC handlers before guest context (GC) handlers! There must be a
1837 * HC handler for every GC handler!
1838 *
1839 * @returns VBox status.
1840 * @param pDevIns The device instance to register the MMIO with.
1841 * @param GCPhysStart First physical address in the range.
1842 * @param cbRange The size of the range (in bytes).
1843 * @param pvUser User argument.
1844 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1845 * @param pfnRead Pointer to function which is gonna handle Read operations.
1846 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1847 * @param pszDesc Pointer to description string. This must not be freed.
1848 */
1849 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1850 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1851 const char *pszDesc));
1852
1853 /**
1854 * Register a Memory Mapped I/O (MMIO) region for GC.
1855 *
1856 * These callbacks are for the guest context (GC).
1857 * Register host context (HC) handlers before guest context handlers! There must be a
1858 * HC handler for every GC handler!
1859 *
1860 * @returns VBox status.
1861 * @param pDevIns The device instance to register the MMIO with.
1862 * @param GCPhysStart First physical address in the range.
1863 * @param cbRange The size of the range (in bytes).
1864 * @param pvUser User argument.
1865 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1866 * @param pszRead Name of the GC function which is gonna handle Read operations.
1867 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1868 * @param pszDesc Obsolete. NULL is fine.
1869 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1872 const char *pszWrite, const char *pszRead, const char *pszFill,
1873 const char *pszDesc));
1874
1875 /**
1876 * Register a Memory Mapped I/O (MMIO) region for R0.
1877 *
1878 * These callbacks are for the ring-0 host context (R0).
1879 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1880 *
1881 * @returns VBox status.
1882 * @param pDevIns The device instance to register the MMIO with.
1883 * @param GCPhysStart First physical address in the range.
1884 * @param cbRange The size of the range (in bytes).
1885 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1886 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1887 * @param pszRead Name of the GC function which is gonna handle Read operations.
1888 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1889 * @param pszDesc Obsolete. NULL is fine.
1890 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1891 */
1892 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1893 const char *pszWrite, const char *pszRead, const char *pszFill,
1894 const char *pszDesc));
1895
1896 /**
1897 * Deregister a Memory Mapped I/O (MMIO) region.
1898 *
1899 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1900 *
1901 * @returns VBox status.
1902 * @param pDevIns The device instance owning the MMIO region(s).
1903 * @param GCPhysStart First physical address in the range.
1904 * @param cbRange The size of the range (in bytes).
1905 */
1906 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1907
1908 /**
1909 * Register a ROM (BIOS) region.
1910 *
1911 * It goes without saying that this is read-only memory. The memory region must be
1912 * in unassigned memory. I.e. from the top of the address space or on the PC in
1913 * the 0xa0000-0xfffff range.
1914 *
1915 * @returns VBox status.
1916 * @param pDevIns The device instance owning the ROM region.
1917 * @param GCPhysStart First physical address in the range.
1918 * Must be page aligned!
1919 * @param cbRange The size of the range (in bytes).
1920 * Must be page aligned!
1921 * @param pvBinary Pointer to the binary data backing the ROM image.
1922 * This must be cbRange bytes big.
1923 * It will be copied and doesn't have to stick around if fShadow is clear.
1924 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1925 * @param pszDesc Pointer to description string. This must not be freed.
1926 *
1927 * @remark There is no way to remove the rom, automatically on device cleanup or
1928 * manually from the device yet. At present I doubt we need such features...
1929 */
1930 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1931
1932 /**
1933 * Register a save state data unit.
1934 *
1935 * @returns VBox status.
1936 * @param pDevIns Device instance.
1937 * @param pszName Data unit name.
1938 * @param u32Instance The instance identifier of the data unit.
1939 * This must together with the name be unique.
1940 * @param u32Version Data layout version number.
1941 * @param cbGuess The approximate amount of data in the unit.
1942 * Only for progress indicators.
1943 * @param pfnSavePrep Prepare save callback, optional.
1944 * @param pfnSaveExec Execute save callback, optional.
1945 * @param pfnSaveDone Done save callback, optional.
1946 * @param pfnLoadPrep Prepare load callback, optional.
1947 * @param pfnLoadExec Execute load callback, optional.
1948 * @param pfnLoadDone Done load callback, optional.
1949 */
1950 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1951 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1952 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1953
1954 /**
1955 * Creates a timer.
1956 *
1957 * @returns VBox status.
1958 * @param pDevIns Device instance.
1959 * @param enmClock The clock to use on this timer.
1960 * @param pfnCallback Callback function.
1961 * @param pszDesc Pointer to description string which must stay around
1962 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1963 * @param ppTimer Where to store the timer on success.
1964 */
1965 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1966
1967 /**
1968 * Creates an external timer.
1969 *
1970 * @returns timer pointer
1971 * @param pDevIns Device instance.
1972 * @param enmClock The clock to use on this timer.
1973 * @param pfnCallback Callback function.
1974 * @param pvUser User pointer
1975 * @param pszDesc Pointer to description string which must stay around
1976 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1977 */
1978 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1979
1980 /**
1981 * Registers the device with the default PCI bus.
1982 *
1983 * @returns VBox status code.
1984 * @param pDevIns Device instance.
1985 * @param pPciDev The PCI device structure.
1986 * Any PCI enabled device must keep this in it's instance data!
1987 * Fill in the PCI data config before registration, please.
1988 * @remark This is the simple interface, a Ex interface will be created if
1989 * more features are needed later.
1990 */
1991 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1992
1993 /**
1994 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1995 *
1996 * @returns VBox status code.
1997 * @param pDevIns Device instance.
1998 * @param iRegion The region number.
1999 * @param cbRegion Size of the region.
2000 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2001 * @param pfnCallback Callback for doing the mapping.
2002 */
2003 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2004
2005 /**
2006 * Register PCI configuration space read/write callbacks.
2007 *
2008 * @param pDevIns Device instance.
2009 * @param pPciDev The PCI device structure.
2010 * If NULL the default PCI device for this device instance is used.
2011 * @param pfnRead Pointer to the user defined PCI config read function.
2012 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2013 * PCI config read function. This way, user can decide when (and if)
2014 * to call default PCI config read function. Can be NULL.
2015 * @param pfnWrite Pointer to the user defined PCI config write function.
2016 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2017 * PCI config write function. This way, user can decide when (and if)
2018 * to call default PCI config write function. Can be NULL.
2019 * @thread EMT
2020 */
2021 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2022 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2023
2024 /**
2025 * Set the IRQ for a PCI device.
2026 *
2027 * @param pDevIns Device instance.
2028 * @param iIrq IRQ number to set.
2029 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2030 * @thread Any thread, but will involve the emulation thread.
2031 */
2032 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2033
2034 /**
2035 * Set the IRQ for a PCI device, but don't wait for EMT to process
2036 * the request when not called from EMT.
2037 *
2038 * @param pDevIns Device instance.
2039 * @param iIrq IRQ number to set.
2040 * @param iLevel IRQ level.
2041 * @thread Any thread, but will involve the emulation thread.
2042 */
2043 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2044
2045 /**
2046 * Set ISA IRQ for a device.
2047 *
2048 * @param pDevIns Device instance.
2049 * @param iIrq IRQ number to set.
2050 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2051 * @thread Any thread, but will involve the emulation thread.
2052 */
2053 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2054
2055 /**
2056 * Set the ISA IRQ for a device, but don't wait for EMT to process
2057 * the request when not called from EMT.
2058 *
2059 * @param pDevIns Device instance.
2060 * @param iIrq IRQ number to set.
2061 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2062 * @thread Any thread, but will involve the emulation thread.
2063 */
2064 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2065
2066 /**
2067 * Attaches a driver (chain) to the device.
2068 *
2069 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2070 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2071 *
2072 * @returns VBox status code.
2073 * @param pDevIns Device instance.
2074 * @param iLun The logical unit to attach.
2075 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2076 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2077 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2078 * for the live of the device instance.
2079 */
2080 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2081
2082 /**
2083 * Allocate memory which is associated with current VM instance
2084 * and automatically freed on it's destruction.
2085 *
2086 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2087 * @param pDevIns Device instance.
2088 * @param cb Number of bytes to allocate.
2089 */
2090 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2091
2092 /**
2093 * Allocate memory which is associated with current VM instance
2094 * and automatically freed on it's destruction. The memory is ZEROed.
2095 *
2096 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2097 * @param pDevIns Device instance.
2098 * @param cb Number of bytes to allocate.
2099 */
2100 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2101
2102 /**
2103 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2104 *
2105 * @param pDevIns Device instance.
2106 * @param pv Pointer to the memory to free.
2107 */
2108 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2109
2110 /**
2111 * Set the VM error message
2112 *
2113 * @returns rc.
2114 * @param pDevIns Device instance.
2115 * @param rc VBox status code.
2116 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2117 * @param pszFormat Error message format string.
2118 * @param ... Error message arguments.
2119 */
2120 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2121
2122 /**
2123 * Set the VM error message
2124 *
2125 * @returns rc.
2126 * @param pDevIns Device instance.
2127 * @param rc VBox status code.
2128 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2129 * @param pszFormat Error message format string.
2130 * @param va Error message arguments.
2131 */
2132 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2133
2134 /**
2135 * Set the VM runtime error message
2136 *
2137 * @returns VBox status code.
2138 * @param pDevIns Device instance.
2139 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2140 * @param pszErrorId Error ID string.
2141 * @param pszFormat Error message format string.
2142 * @param ... Error message arguments.
2143 */
2144 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2145
2146 /**
2147 * Set the VM runtime error message
2148 *
2149 * @returns VBox status code.
2150 * @param pDevIns Device instance.
2151 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2152 * @param pszErrorId Error ID string.
2153 * @param pszFormat Error message format string.
2154 * @param va Error message arguments.
2155 */
2156 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2157
2158 /**
2159 * Assert that the current thread is the emulation thread.
2160 *
2161 * @returns True if correct.
2162 * @returns False if wrong.
2163 * @param pDevIns Device instance.
2164 * @param pszFile Filename of the assertion location.
2165 * @param iLine The linenumber of the assertion location.
2166 * @param pszFunction Function of the assertion location.
2167 */
2168 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2169
2170 /**
2171 * Assert that the current thread is NOT the emulation thread.
2172 *
2173 * @returns True if correct.
2174 * @returns False if wrong.
2175 * @param pDevIns Device instance.
2176 * @param pszFile Filename of the assertion location.
2177 * @param iLine The linenumber of the assertion location.
2178 * @param pszFunction Function of the assertion location.
2179 */
2180 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2181
2182 /**
2183 * Stops the VM and enters the debugger to look at the guest state.
2184 *
2185 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2186 * invoking this function directly.
2187 *
2188 * @returns VBox status code which must be passed up to the VMM.
2189 * @param pDevIns Device instance.
2190 * @param pszFile Filename of the assertion location.
2191 * @param iLine The linenumber of the assertion location.
2192 * @param pszFunction Function of the assertion location.
2193 * @param pszFormat Message. (optional)
2194 * @param args Message parameters.
2195 */
2196 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2197
2198 /**
2199 * Register a info handler with DBGF,
2200 *
2201 * @returns VBox status code.
2202 * @param pDevIns Device instance.
2203 * @param pszName The identifier of the info.
2204 * @param pszDesc The description of the info and any arguments
2205 * the handler may take.
2206 * @param pfnHandler The handler function to be called to display the
2207 * info.
2208 */
2209 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2210
2211 /**
2212 * Registers a statistics sample if statistics are enabled.
2213 *
2214 * @param pDevIns Device instance of the DMA.
2215 * @param pvSample Pointer to the sample.
2216 * @param enmType Sample type. This indicates what pvSample is
2217 * pointing at.
2218 * @param pszName Sample name. The name is on this form
2219 * "/<component>/<sample>". Further nesting is
2220 * possible.
2221 * @param enmUnit Sample unit.
2222 * @param pszDesc Sample description.
2223 */
2224 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2225
2226 /**
2227 * Same as pfnSTAMRegister except that the name is specified in a
2228 * RTStrPrintf like fashion.
2229 *
2230 * @returns VBox status.
2231 * @param pDevIns Device instance of the DMA.
2232 * @param pvSample Pointer to the sample.
2233 * @param enmType Sample type. This indicates what pvSample is
2234 * pointing at.
2235 * @param enmVisibility Visibility type specifying whether unused
2236 * statistics should be visible or not.
2237 * @param enmUnit Sample unit.
2238 * @param pszDesc Sample description.
2239 * @param pszName The sample name format string.
2240 * @param ... Arguments to the format string.
2241 */
2242 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2243 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2244
2245 /**
2246 * Same as pfnSTAMRegister except that the name is specified in a
2247 * RTStrPrintfV like fashion.
2248 *
2249 * @returns VBox status.
2250 * @param pDevIns Device instance of the DMA.
2251 * @param pvSample Pointer to the sample.
2252 * @param enmType Sample type. This indicates what pvSample is
2253 * pointing at.
2254 * @param enmVisibility Visibility type specifying whether unused
2255 * statistics should be visible or not.
2256 * @param enmUnit Sample unit.
2257 * @param pszDesc Sample description.
2258 * @param pszName The sample name format string.
2259 * @param args Arguments to the format string.
2260 */
2261 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2262 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2263
2264 /**
2265 * Register the RTC device.
2266 *
2267 * @returns VBox status code.
2268 * @param pDevIns Device instance.
2269 * @param pRtcReg Pointer to a RTC registration structure.
2270 * @param ppRtcHlp Where to store the pointer to the helper
2271 * functions.
2272 */
2273 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2274
2275 /**
2276 * Create a queue.
2277 *
2278 * @returns VBox status code.
2279 * @param pDevIns The device instance.
2280 * @param cbItem The size of a queue item.
2281 * @param cItems The number of items in the queue.
2282 * @param cMilliesInterval The number of milliseconds between polling the queue.
2283 * If 0 then the emulation thread will be notified whenever an item arrives.
2284 * @param pfnCallback The consumer function.
2285 * @param fGCEnabled Set if the queue should work in GC too.
2286 * @param ppQueue Where to store the queue handle on success.
2287 * @thread The emulation thread.
2288 */
2289 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2290 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2291
2292 /**
2293 * Initializes a PDM critical section.
2294 *
2295 * The PDM critical sections are derived from the IPRT critical sections, but
2296 * works in GC as well.
2297 *
2298 * @returns VBox status code.
2299 * @param pDevIns Device instance.
2300 * @param pCritSect Pointer to the critical section.
2301 * @param pszName The name of the critical section (for
2302 * statistics).
2303 */
2304 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2305
2306 /**
2307 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2308 *
2309 * @returns pTime.
2310 * @param pDevIns Device instance.
2311 * @param pTime Where to store the time.
2312 */
2313 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2314
2315 /**
2316 * Creates a PDM thread.
2317 *
2318 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2319 * resuming, and destroying the thread as the VM state changes.
2320 *
2321 * @returns VBox status code.
2322 * @param pDevIns The device instance.
2323 * @param ppThread Where to store the thread 'handle'.
2324 * @param pvUser The user argument to the thread function.
2325 * @param pfnThread The thread function.
2326 * @param pfnWakeup The wakup callback. This is called on the EMT
2327 * thread when a state change is pending.
2328 * @param cbStack See RTThreadCreate.
2329 * @param enmType See RTThreadCreate.
2330 * @param pszName See RTThreadCreate.
2331 */
2332 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2333 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2334
2335 /**
2336 * Convert a guest virtual address to a guest physical address.
2337 *
2338 * @returns VBox status code.
2339 * @param pDevIns Device instance.
2340 * @param GCPtr Guest virtual address.
2341 * @param pGCPhys Where to store the GC physical address
2342 * corresponding to GCPtr.
2343 * @thread The emulation thread.
2344 * @remark Careful with page boundraries.
2345 */
2346 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2347
2348 /**
2349 * Gets the VM state.
2350 *
2351 * @returns VM state.
2352 * @param pDevIns The device instance.
2353 * @thread Any thread (just keep in mind that it's volatile info).
2354 */
2355 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2356
2357 /** Space reserved for future members.
2358 * @{ */
2359 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2360 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2361 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2362 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2363 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2364 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2365 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2366 /** @} */
2367
2368
2369 /** API available to trusted devices only.
2370 *
2371 * These APIs are providing unrestricted access to the guest and the VM,
2372 * or they are interacting intimately with PDM.
2373 *
2374 * @{
2375 */
2376 /**
2377 * Gets the VM handle. Restricted API.
2378 *
2379 * @returns VM Handle.
2380 * @param pDevIns Device instance.
2381 */
2382 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2383
2384 /**
2385 * Register the PCI Bus.
2386 *
2387 * @returns VBox status code.
2388 * @param pDevIns Device instance.
2389 * @param pPciBusReg Pointer to PCI bus registration structure.
2390 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2391 * helpers.
2392 */
2393 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2394
2395 /**
2396 * Register the PIC device.
2397 *
2398 * @returns VBox status code.
2399 * @param pDevIns Device instance.
2400 * @param pPicReg Pointer to a PIC registration structure.
2401 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2402 * helpers.
2403 */
2404 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2405
2406 /**
2407 * Register the APIC device.
2408 *
2409 * @returns VBox status code.
2410 * @param pDevIns Device instance.
2411 * @param pApicReg Pointer to a APIC registration structure.
2412 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2413 */
2414 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2415
2416 /**
2417 * Register the I/O APIC device.
2418 *
2419 * @returns VBox status code.
2420 * @param pDevIns Device instance.
2421 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2422 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2423 * helpers.
2424 */
2425 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2426
2427 /**
2428 * Register the DMA device.
2429 *
2430 * @returns VBox status code.
2431 * @param pDevIns Device instance.
2432 * @param pDmacReg Pointer to a DMAC registration structure.
2433 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2434 */
2435 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2436
2437 /**
2438 * Read physical memory.
2439 *
2440 * @returns VINF_SUCCESS (for now).
2441 * @param pDevIns Device instance.
2442 * @param GCPhys Physical address start reading from.
2443 * @param pvBuf Where to put the read bits.
2444 * @param cbRead How many bytes to read.
2445 * @thread Any thread, but the call may involve the emulation thread.
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2448
2449 /**
2450 * Write to physical memory.
2451 *
2452 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2453 * @param pDevIns Device instance.
2454 * @param GCPhys Physical address to write to.
2455 * @param pvBuf What to write.
2456 * @param cbWrite How many bytes to write.
2457 * @thread Any thread, but the call may involve the emulation thread.
2458 */
2459 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2460
2461 /**
2462 * Requests the mapping of a guest page into ring-3.
2463 *
2464 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2465 * release it.
2466 *
2467 * This API will assume your intention is to write to the page, and will
2468 * therefore replace shared and zero pages. If you do not intend to modify the
2469 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2470 *
2471 * @returns VBox status code.
2472 * @retval VINF_SUCCESS on success.
2473 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2474 * backing or if the page has any active access handlers. The caller
2475 * must fall back on using PGMR3PhysWriteExternal.
2476 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2477 *
2478 * @param pVM The VM handle.
2479 * @param GCPhys The guest physical address of the page that
2480 * should be mapped.
2481 * @param fFlags Flags reserved for future use, MBZ.
2482 * @param ppv Where to store the address corresponding to
2483 * GCPhys.
2484 * @param pLock Where to store the lock information that
2485 * pfnPhysReleasePageMappingLock needs.
2486 *
2487 * @remark Avoid calling this API from within critical sections (other than the
2488 * PGM one) because of the deadlock risk when we have to delegating the
2489 * task to an EMT.
2490 * @thread Any.
2491 */
2492 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2493
2494 /**
2495 * Requests the mapping of a guest page into ring-3, external threads.
2496 *
2497 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2498 * release it.
2499 *
2500 * @returns VBox status code.
2501 * @retval VINF_SUCCESS on success.
2502 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2503 * backing or if the page as an active ALL access handler. The caller
2504 * must fall back on using PGMPhysRead.
2505 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2506 *
2507 * @param pDevIns Device instance.
2508 * @param GCPhys The guest physical address of the page that
2509 * should be mapped.
2510 * @param fFlags Flags reserved for future use, MBZ.
2511 * @param ppv Where to store the address corresponding to
2512 * GCPhys.
2513 * @param pLock Where to store the lock information that
2514 * pfnPhysReleasePageMappingLock needs.
2515 *
2516 * @remark Avoid calling this API from within critical sections.
2517 * @thread Any.
2518 */
2519 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2520
2521 /**
2522 * Release the mapping of a guest page.
2523 *
2524 * This is the counter part of pfnPhysGCPhys2CCPtr and
2525 * pfnPhysGCPhys2CCPtrReadOnly.
2526 *
2527 * @param pDevIns Device instance.
2528 * @param pLock The lock structure initialized by the mapping
2529 * function.
2530 */
2531 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2532
2533 /**
2534 * Read guest physical memory by virtual address.
2535 *
2536 * @param pDevIns Device instance.
2537 * @param pvDst Where to put the read bits.
2538 * @param GCVirtSrc Guest virtual address to start reading from.
2539 * @param cb How many bytes to read.
2540 * @thread The emulation thread.
2541 */
2542 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2543
2544 /**
2545 * Write to guest physical memory by virtual address.
2546 *
2547 * @param pDevIns Device instance.
2548 * @param GCVirtDst Guest virtual address to write to.
2549 * @param pvSrc What to write.
2550 * @param cb How many bytes to write.
2551 * @thread The emulation thread.
2552 */
2553 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2554
2555 /**
2556 * Checks if the Gate A20 is enabled or not.
2557 *
2558 * @returns true if A20 is enabled.
2559 * @returns false if A20 is disabled.
2560 * @param pDevIns Device instance.
2561 * @thread The emulation thread.
2562 */
2563 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2564
2565 /**
2566 * Enables or disables the Gate A20.
2567 *
2568 * @param pDevIns Device instance.
2569 * @param fEnable Set this flag to enable the Gate A20; clear it
2570 * to disable.
2571 * @thread The emulation thread.
2572 */
2573 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2574
2575 /**
2576 * Resets the VM.
2577 *
2578 * @returns The appropriate VBox status code to pass around on reset.
2579 * @param pDevIns Device instance.
2580 * @thread The emulation thread.
2581 */
2582 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2583
2584 /**
2585 * Suspends the VM.
2586 *
2587 * @returns The appropriate VBox status code to pass around on suspend.
2588 * @param pDevIns Device instance.
2589 * @thread The emulation thread.
2590 */
2591 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2592
2593 /**
2594 * Power off the VM.
2595 *
2596 * @returns The appropriate VBox status code to pass around on power off.
2597 * @param pDevIns Device instance.
2598 * @thread The emulation thread.
2599 */
2600 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2601
2602 /**
2603 * Register transfer function for DMA channel.
2604 *
2605 * @returns VBox status code.
2606 * @param pDevIns Device instance.
2607 * @param uChannel Channel number.
2608 * @param pfnTransferHandler Device specific transfer callback function.
2609 * @param pvUser User pointer to pass to the callback.
2610 * @thread EMT
2611 */
2612 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2613
2614 /**
2615 * Read memory.
2616 *
2617 * @returns VBox status code.
2618 * @param pDevIns Device instance.
2619 * @param uChannel Channel number.
2620 * @param pvBuffer Pointer to target buffer.
2621 * @param off DMA position.
2622 * @param cbBlock Block size.
2623 * @param pcbRead Where to store the number of bytes which was
2624 * read. optional.
2625 * @thread EMT
2626 */
2627 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2628
2629 /**
2630 * Write memory.
2631 *
2632 * @returns VBox status code.
2633 * @param pDevIns Device instance.
2634 * @param uChannel Channel number.
2635 * @param pvBuffer Memory to write.
2636 * @param off DMA position.
2637 * @param cbBlock Block size.
2638 * @param pcbWritten Where to store the number of bytes which was
2639 * written. optional.
2640 * @thread EMT
2641 */
2642 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2643
2644 /**
2645 * Set the DREQ line.
2646 *
2647 * @returns VBox status code.
2648 * @param pDevIns Device instance.
2649 * @param uChannel Channel number.
2650 * @param uLevel Level of the line.
2651 * @thread EMT
2652 */
2653 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2654
2655 /**
2656 * Get channel mode.
2657 *
2658 * @returns Channel mode. See specs.
2659 * @param pDevIns Device instance.
2660 * @param uChannel Channel number.
2661 * @thread EMT
2662 */
2663 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2664
2665 /**
2666 * Schedule DMA execution.
2667 *
2668 * @param pDevIns Device instance.
2669 * @thread Any thread.
2670 */
2671 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2672
2673 /**
2674 * Write CMOS value and update the checksum(s).
2675 *
2676 * @returns VBox status code.
2677 * @param pDevIns Device instance.
2678 * @param iReg The CMOS register index.
2679 * @param u8Value The CMOS register value.
2680 * @thread EMT
2681 */
2682 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2683
2684 /**
2685 * Read CMOS value.
2686 *
2687 * @returns VBox status code.
2688 * @param pDevIns Device instance.
2689 * @param iReg The CMOS register index.
2690 * @param pu8Value Where to store the CMOS register value.
2691 * @thread EMT
2692 */
2693 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2694
2695 /**
2696 * Get the specified CPUID leaf for the virtual CPU associated with the calling
2697 * thread.
2698 *
2699 * @param pDevIns Device instance.
2700 * @param iLeaf The CPUID leaf to get.
2701 * @param pEax Where to store the EAX value.
2702 * @param pEbx Where to store the EBX value.
2703 * @param pEcx Where to store the ECX value.
2704 * @param pEdx Where to store the EDX value.
2705 * @thread EMT.
2706 */
2707 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2708
2709 /**
2710 * Changes the protection of shadowed ROM mapping.
2711 *
2712 * This is intented for use by the system BIOS, chipset or device in question to
2713 * change the protection of shadowed ROM code after init and on reset.
2714 *
2715 * @param pDevIns Device instance.
2716 * @param GCPhysStart Where the mapping starts.
2717 * @param cbRange The size of the mapping.
2718 * @param enmProt The new protection type.
2719 */
2720 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2721
2722 /**
2723 * Allocate and register a MMIO2 region.
2724 *
2725 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2726 * RAM associated with a device. It is also non-shared memory with a
2727 * permanent ring-3 mapping and page backing (presently).
2728 *
2729 * @returns VBox status.
2730 * @param pDevIns The device instance.
2731 * @param iRegion The region number. Use the PCI region number as
2732 * this must be known to the PCI bus device too. If
2733 * it's not associated with the PCI device, then
2734 * any number up to UINT8_MAX is fine.
2735 * @param cb The size (in bytes) of the region.
2736 * @param fFlags Reserved for future use, must be zero.
2737 * @param ppv Where to store the address of the ring-3 mapping
2738 * of the memory.
2739 * @param pszDesc Pointer to description string. This must not be
2740 * freed.
2741 * @thread EMT.
2742 */
2743 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2744
2745 /**
2746 * Deregisters and frees a MMIO2 region.
2747 *
2748 * Any physical (and virtual) access handlers registered for the region must
2749 * be deregistered before calling this function.
2750 *
2751 * @returns VBox status code.
2752 * @param pDevIns The device instance.
2753 * @param iRegion The region number used during registration.
2754 * @thread EMT.
2755 */
2756 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2757
2758 /**
2759 * Maps a MMIO2 region into the physical memory space.
2760 *
2761 * A MMIO2 range may overlap with base memory if a lot of RAM
2762 * is configured for the VM, in which case we'll drop the base
2763 * memory pages. Presently we will make no attempt to preserve
2764 * anything that happens to be present in the base memory that
2765 * is replaced, this is of course incorrectly but it's too much
2766 * effort.
2767 *
2768 * @returns VBox status code.
2769 * @param pDevIns The device instance.
2770 * @param iRegion The region number used during registration.
2771 * @param GCPhys The physical address to map it at.
2772 * @thread EMT.
2773 */
2774 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2775
2776 /**
2777 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2778 *
2779 * @returns VBox status code.
2780 * @param pDevIns The device instance.
2781 * @param iRegion The region number used during registration.
2782 * @param GCPhys The physical address it's currently mapped at.
2783 * @thread EMT.
2784 */
2785 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2786
2787 /**
2788 * Maps a portion of an MMIO2 region into the hypervisor region.
2789 *
2790 * Callers of this API must never deregister the MMIO2 region before the
2791 * VM is powered off.
2792 *
2793 * @return VBox status code.
2794 * @param pDevIns The device owning the MMIO2 memory.
2795 * @param iRegion The region.
2796 * @param off The offset into the region. Will be rounded down
2797 * to closest page boundrary.
2798 * @param cb The number of bytes to map. Will be rounded up
2799 * to the closest page boundrary.
2800 * @param pszDesc Mapping description.
2801 * @param pRCPtr Where to store the RC address.
2802 */
2803 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2804 const char *pszDesc, PRTRCPTR pRCPtr));
2805
2806 /**
2807 * Maps a portion of an MMIO2 region into kernel space (host).
2808 *
2809 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2810 * or the VM is terminated.
2811 *
2812 * @return VBox status code.
2813 * @param pDevIns The device owning the MMIO2 memory.
2814 * @param iRegion The region.
2815 * @param off The offset into the region. Must be page
2816 * aligned.
2817 * @param cb The number of bytes to map. Must be page
2818 * aligned.
2819 * @param pszDesc Mapping description.
2820 * @param pR0Ptr Where to store the R0 address.
2821 */
2822 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2823 const char *pszDesc, PRTR0PTR pR0Ptr));
2824
2825 /**
2826 * Registers the VMM device heap
2827 *
2828 * @returns VBox status code.
2829 * @param pDevIns The device instance.
2830 * @param GCPhys The physical address.
2831 * @param pvHeap Ring 3 heap pointer.
2832 * @param cbSize Size of the heap.
2833 * @thread EMT.
2834 */
2835 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2836
2837 /**
2838 * Unregisters the VMM device heap
2839 *
2840 * @returns VBox status code.
2841 * @param pDevIns The device instance.
2842 * @param GCPhys The physical address.
2843 * @thread EMT.
2844 */
2845 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2846
2847 /**
2848 * Gets the VMCPU handle. Restricted API.
2849 *
2850 * @returns VMCPU Handle.
2851 * @param pDevIns Device instance.
2852 */
2853 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2854
2855 /** @} */
2856
2857 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2858 uint32_t u32TheEnd;
2859} PDMDEVHLPR3;
2860#endif /* !IN_RING3 */
2861/** Pointer to the R3 PDM Device API. */
2862typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2863/** Pointer to the R3 PDM Device API, const variant. */
2864typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2865
2866/** Current PDMDEVHLP version number. */
2867#define PDM_DEVHLP_VERSION 0xf2090000
2868
2869
2870/**
2871 * PDM Device API - RC Variant.
2872 */
2873typedef struct PDMDEVHLPRC
2874{
2875 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2876 uint32_t u32Version;
2877
2878 /**
2879 * Set the IRQ for a PCI device.
2880 *
2881 * @param pDevIns Device instance.
2882 * @param iIrq IRQ number to set.
2883 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2884 * @thread Any thread, but will involve the emulation thread.
2885 */
2886 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2887
2888 /**
2889 * Set ISA IRQ for a device.
2890 *
2891 * @param pDevIns Device instance.
2892 * @param iIrq IRQ number to set.
2893 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2894 * @thread Any thread, but will involve the emulation thread.
2895 */
2896 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2897
2898 /**
2899 * Read physical memory.
2900 *
2901 * @returns VINF_SUCCESS (for now).
2902 * @param pDevIns Device instance.
2903 * @param GCPhys Physical address start reading from.
2904 * @param pvBuf Where to put the read bits.
2905 * @param cbRead How many bytes to read.
2906 */
2907 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2908
2909 /**
2910 * Write to physical memory.
2911 *
2912 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2913 * @param pDevIns Device instance.
2914 * @param GCPhys Physical address to write to.
2915 * @param pvBuf What to write.
2916 * @param cbWrite How many bytes to write.
2917 */
2918 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2919
2920 /**
2921 * Checks if the Gate A20 is enabled or not.
2922 *
2923 * @returns true if A20 is enabled.
2924 * @returns false if A20 is disabled.
2925 * @param pDevIns Device instance.
2926 * @thread The emulation thread.
2927 */
2928 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2929
2930 /**
2931 * Set the VM error message
2932 *
2933 * @returns rc.
2934 * @param pDrvIns Driver instance.
2935 * @param rc VBox status code.
2936 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2937 * @param pszFormat Error message format string.
2938 * @param ... Error message arguments.
2939 */
2940 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2941
2942 /**
2943 * Set the VM error message
2944 *
2945 * @returns rc.
2946 * @param pDrvIns Driver instance.
2947 * @param rc VBox status code.
2948 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2949 * @param pszFormat Error message format string.
2950 * @param va Error message arguments.
2951 */
2952 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2953
2954 /**
2955 * Set the VM runtime error message
2956 *
2957 * @returns VBox status code.
2958 * @param pDevIns Device instance.
2959 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2960 * @param pszErrorId Error ID string.
2961 * @param pszFormat Error message format string.
2962 * @param ... Error message arguments.
2963 */
2964 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2965
2966 /**
2967 * Set the VM runtime error message
2968 *
2969 * @returns VBox status code.
2970 * @param pDevIns Device instance.
2971 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2972 * @param pszErrorId Error ID string.
2973 * @param pszFormat Error message format string.
2974 * @param va Error message arguments.
2975 */
2976 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2977
2978 /**
2979 * Set parameters for pending MMIO patch operation
2980 *
2981 * @returns VBox status code.
2982 * @param pDevIns Device instance.
2983 * @param GCPhys MMIO physical address
2984 * @param pCachedData GC pointer to cached data
2985 */
2986 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2987
2988 /**
2989 * Gets the VM handle. Restricted API.
2990 *
2991 * @returns VM Handle.
2992 * @param pDevIns Device instance.
2993 */
2994 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2995
2996 /**
2997 * Gets the VMCPU handle. Restricted API.
2998 *
2999 * @returns VMCPU Handle.
3000 * @param pDevIns Device instance.
3001 */
3002 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3003
3004 /** Just a safety precaution. */
3005 uint32_t u32TheEnd;
3006} PDMDEVHLPRC;
3007/** Pointer PDM Device RC API. */
3008typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3009/** Pointer PDM Device RC API. */
3010typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3011
3012/** Current PDMDEVHLP version number. */
3013#define PDM_DEVHLPRC_VERSION 0xfb020000
3014
3015
3016/**
3017 * PDM Device API - R0 Variant.
3018 */
3019typedef struct PDMDEVHLPR0
3020{
3021 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3022 uint32_t u32Version;
3023
3024 /**
3025 * Set the IRQ for a PCI device.
3026 *
3027 * @param pDevIns Device instance.
3028 * @param iIrq IRQ number to set.
3029 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3030 * @thread Any thread, but will involve the emulation thread.
3031 */
3032 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3033
3034 /**
3035 * Set ISA IRQ for a device.
3036 *
3037 * @param pDevIns Device instance.
3038 * @param iIrq IRQ number to set.
3039 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3040 * @thread Any thread, but will involve the emulation thread.
3041 */
3042 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3043
3044 /**
3045 * Read physical memory.
3046 *
3047 * @returns VINF_SUCCESS (for now).
3048 * @param pDevIns Device instance.
3049 * @param GCPhys Physical address start reading from.
3050 * @param pvBuf Where to put the read bits.
3051 * @param cbRead How many bytes to read.
3052 */
3053 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3054
3055 /**
3056 * Write to physical memory.
3057 *
3058 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3059 * @param pDevIns Device instance.
3060 * @param GCPhys Physical address to write to.
3061 * @param pvBuf What to write.
3062 * @param cbWrite How many bytes to write.
3063 */
3064 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3065
3066 /**
3067 * Checks if the Gate A20 is enabled or not.
3068 *
3069 * @returns true if A20 is enabled.
3070 * @returns false if A20 is disabled.
3071 * @param pDevIns Device instance.
3072 * @thread The emulation thread.
3073 */
3074 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3075
3076 /**
3077 * Set the VM error message
3078 *
3079 * @returns rc.
3080 * @param pDrvIns Driver instance.
3081 * @param rc VBox status code.
3082 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3083 * @param pszFormat Error message format string.
3084 * @param ... Error message arguments.
3085 */
3086 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3087
3088 /**
3089 * Set the VM error message
3090 *
3091 * @returns rc.
3092 * @param pDrvIns Driver instance.
3093 * @param rc VBox status code.
3094 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3095 * @param pszFormat Error message format string.
3096 * @param va Error message arguments.
3097 */
3098 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3099
3100 /**
3101 * Set the VM runtime error message
3102 *
3103 * @returns VBox status code.
3104 * @param pDevIns Device instance.
3105 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3106 * @param pszErrorId Error ID string.
3107 * @param pszFormat Error message format string.
3108 * @param ... Error message arguments.
3109 */
3110 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3111
3112 /**
3113 * Set the VM runtime error message
3114 *
3115 * @returns VBox status code.
3116 * @param pDevIns Device instance.
3117 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3118 * @param pszErrorId Error ID string.
3119 * @param pszFormat Error message format string.
3120 * @param va Error message arguments.
3121 */
3122 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3123
3124 /**
3125 * Set parameters for pending MMIO patch operation
3126 *
3127 * @returns rc.
3128 * @param pDevIns Device instance.
3129 * @param GCPhys MMIO physical address
3130 * @param pCachedData GC pointer to cached data
3131 */
3132 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3133
3134 /**
3135 * Gets the VM handle. Restricted API.
3136 *
3137 * @returns VM Handle.
3138 * @param pDevIns Device instance.
3139 */
3140 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3141
3142 /**
3143 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3144 *
3145 * @returns true = yes, false = no
3146 * @param pDevIns Device instance.
3147 */
3148 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3149
3150 /**
3151 * Gets the VMCPU handle. Restricted API.
3152 *
3153 * @returns VMCPU Handle.
3154 * @param pDevIns Device instance.
3155 */
3156 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3157
3158 /** Just a safety precaution. */
3159 uint32_t u32TheEnd;
3160} PDMDEVHLPR0;
3161/** Pointer PDM Device R0 API. */
3162typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3163/** Pointer PDM Device GC API. */
3164typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3165
3166/** Current PDMDEVHLP version number. */
3167#define PDM_DEVHLPR0_VERSION 0xfb030000
3168
3169
3170
3171/**
3172 * PDM Device Instance.
3173 */
3174typedef struct PDMDEVINS
3175{
3176 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3177 uint32_t u32Version;
3178 /** Device instance number. */
3179 RTUINT iInstance;
3180
3181 /** Pointer the GC PDM Device API. */
3182 PCPDMDEVHLPRC pDevHlpRC;
3183 /** Pointer to device instance data. */
3184 RTRCPTR pvInstanceDataRC;
3185
3186 /** Pointer the R0 PDM Device API. */
3187 PCPDMDEVHLPR0 pDevHlpR0;
3188 /** Pointer to device instance data (R0). */
3189 RTR0PTR pvInstanceDataR0;
3190
3191 /** Pointer the HC PDM Device API. */
3192 PCPDMDEVHLPR3 pDevHlpR3;
3193 /** Pointer to device instance data. */
3194 RTR3PTR pvInstanceDataR3;
3195
3196 /** Pointer to device registration structure. */
3197 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3198 /** Configuration handle. */
3199 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3200
3201 /** The base interface of the device.
3202 * The device constructor initializes this if it has any
3203 * device level interfaces to export. To obtain this interface
3204 * call PDMR3QueryDevice(). */
3205 PDMIBASE IBase;
3206 /** Align the internal data more naturally. */
3207 RTR3PTR R3PtrPadding;
3208
3209 /** Internal data. */
3210 union
3211 {
3212#ifdef PDMDEVINSINT_DECLARED
3213 PDMDEVINSINT s;
3214#endif
3215 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3216 } Internal;
3217
3218 /** Device instance data. The size of this area is defined
3219 * in the PDMDEVREG::cbInstanceData field. */
3220 char achInstanceData[8];
3221} PDMDEVINS;
3222
3223/** Current PDMDEVINS version number. */
3224#define PDM_DEVINS_VERSION 0xf3020000
3225
3226/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3227#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3228
3229
3230/** @def PDMDEV_ASSERT_EMT
3231 * Assert that the current thread is the emulation thread.
3232 */
3233#ifdef VBOX_STRICT
3234# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3235#else
3236# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3237#endif
3238
3239/** @def PDMDEV_ASSERT_OTHER
3240 * Assert that the current thread is NOT the emulation thread.
3241 */
3242#ifdef VBOX_STRICT
3243# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3244#else
3245# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3246#endif
3247
3248/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3249 * Assert that the current thread is owner of the VM lock.
3250 */
3251#ifdef VBOX_STRICT
3252# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3253#else
3254# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3255#endif
3256
3257/** @def PDMDEV_SET_ERROR
3258 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3259 */
3260#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3261 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3262
3263/** @def PDMDEV_SET_RUNTIME_ERROR
3264 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3265 */
3266#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3267 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3268
3269/** @def PDMDEVINS_2_RCPTR
3270 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3271 */
3272#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3273
3274/** @def PDMDEVINS_2_R3PTR
3275 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3276 */
3277#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3278
3279/** @def PDMDEVINS_2_R0PTR
3280 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3281 */
3282#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3283
3284
3285/**
3286 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3287 *
3288 * @returns VBox status code which must be passed up to the VMM.
3289 * @param pDevIns Device instance.
3290 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3291 * @param pszFormat Message. (optional)
3292 * @param ... Message parameters.
3293 */
3294DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3295{
3296#ifdef VBOX_STRICT
3297# ifdef IN_RING3
3298 int rc;
3299 va_list args;
3300 va_start(args, pszFormat);
3301 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3302 va_end(args);
3303 return rc;
3304# else
3305 return VINF_EM_DBG_STOP;
3306# endif
3307#else
3308 NOREF(pDevIns);
3309 NOREF(pszFile);
3310 NOREF(iLine);
3311 NOREF(pszFunction);
3312 NOREF(pszFormat);
3313 return VINF_SUCCESS;
3314#endif
3315}
3316
3317
3318#ifdef IN_RING3
3319/**
3320 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3321 */
3322DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3323 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3324 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3325{
3326 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3327}
3328
3329/**
3330 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3331 */
3332DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3333 const char *pszOut, const char *pszIn, const char *pszOutStr,
3334 const char *pszInStr, const char *pszDesc)
3335{
3336 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3337}
3338
3339/**
3340 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3341 */
3342DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3343 const char *pszOut, const char *pszIn, const char *pszOutStr,
3344 const char *pszInStr, const char *pszDesc)
3345{
3346 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3347}
3348
3349/**
3350 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3351 */
3352DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3353 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3354 const char *pszDesc)
3355{
3356 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3357}
3358
3359/**
3360 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3361 */
3362DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3363 const char *pszWrite, const char *pszRead, const char *pszFill)
3364{
3365 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3366}
3367
3368/**
3369 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3370 */
3371DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3372 const char *pszWrite, const char *pszRead, const char *pszFill)
3373{
3374 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3375}
3376
3377/**
3378 * @copydoc PDMDEVHLPR3::pfnROMRegister
3379 */
3380DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3381{
3382 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3383}
3384/**
3385 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3386 */
3387DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3388{
3389 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3390}
3391
3392/**
3393 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3394 */
3395DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3396{
3397 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3398}
3399
3400/**
3401 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3402 */
3403DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3404{
3405 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3406}
3407
3408/**
3409 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3410 */
3411DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3412{
3413 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3414}
3415
3416/**
3417 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3418 */
3419DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3420{
3421 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3422}
3423
3424/**
3425 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3426 */
3427DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3428 const char *pszDesc, PRTRCPTR pRCPtr)
3429{
3430 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3431}
3432
3433/**
3434 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3435 */
3436DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3437 const char *pszDesc, PRTR0PTR pR0Ptr)
3438{
3439 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3440}
3441
3442/**
3443 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3444 */
3445DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3446{
3447 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3448}
3449
3450/**
3451 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3452 */
3453DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3454{
3455 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3456}
3457
3458/**
3459 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3460 */
3461DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3462 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3463 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3464{
3465 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3466 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3467 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3468}
3469
3470/**
3471 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3472 */
3473DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3474{
3475 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3476}
3477
3478/**
3479 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3480 */
3481DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3482{
3483 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3484}
3485
3486/**
3487 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3488 */
3489DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3490{
3491 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3492}
3493
3494/**
3495 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3496 */
3497DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3498 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3499{
3500 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3501}
3502
3503/**
3504 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3505 */
3506DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3507{
3508 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3509}
3510
3511/**
3512 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3513 */
3514DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3515{
3516 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3517}
3518
3519/**
3520 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3521 */
3522DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3523{
3524 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3525}
3526
3527/**
3528 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3529 */
3530DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3531{
3532 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3533}
3534
3535/**
3536 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3537 */
3538DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3539{
3540 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3541}
3542
3543/**
3544 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3545 */
3546DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3547{
3548 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3549}
3550
3551/**
3552 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3553 */
3554DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3555 const char *pszDesc, const char *pszName, ...)
3556{
3557 va_list va;
3558 va_start(va, pszName);
3559 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3560 va_end(va);
3561}
3562
3563/**
3564 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3565 */
3566DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3567 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3568{
3569 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3570}
3571
3572/**
3573 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3574 */
3575DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3576{
3577 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3578}
3579
3580/**
3581 * @copydoc PDMDEVHLPR3::pfnUTCNow
3582 */
3583DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3584{
3585 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3586}
3587
3588/**
3589 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3590 */
3591DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3592{
3593 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3594}
3595
3596/**
3597 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3598 */
3599DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3600{
3601 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3602}
3603
3604/**
3605 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3606 */
3607DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3608{
3609 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3610}
3611
3612/**
3613 * @copydoc PDMDEVHLPR3::pfnVMState
3614 */
3615DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3616{
3617 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3618}
3619
3620/**
3621 * @copydoc PDMDEVHLPR3::pfnA20Set
3622 */
3623DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3624{
3625 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3626}
3627
3628/**
3629 * @copydoc PDMDEVHLPR3::pfnVMReset
3630 */
3631DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3632{
3633 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3634}
3635
3636/**
3637 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3638 */
3639DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3640{
3641 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3642}
3643
3644/**
3645 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3646 */
3647DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3648{
3649 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3650}
3651
3652/**
3653 * @copydoc PDMDEVHLPR3::pfnDMARegister
3654 */
3655DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3656{
3657 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3658}
3659
3660/**
3661 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3662 */
3663DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3664{
3665 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3666}
3667
3668/**
3669 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3670 */
3671DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3672{
3673 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3674}
3675
3676/**
3677 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3678 */
3679DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3680{
3681 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3682}
3683
3684/**
3685 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3686 */
3687DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3688{
3689 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3690}
3691
3692/**
3693 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3694 */
3695DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3696{
3697 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3698}
3699
3700/**
3701 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3702 */
3703DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3704{
3705 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3706}
3707
3708/**
3709 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3710 */
3711DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3712{
3713 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3714}
3715
3716/**
3717 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3718 */
3719DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3720{
3721 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3722}
3723
3724/**
3725 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3726 */
3727DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3728 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3729{
3730 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3731}
3732#endif /* IN_RING3 */
3733
3734
3735/**
3736 * @copydoc PDMDEVHLPR3::pfnGetVM
3737 */
3738DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3739{
3740 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3741}
3742
3743/**
3744 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
3745 */
3746DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
3747{
3748 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
3749}
3750
3751#ifdef IN_RING0
3752/**
3753 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3754 */
3755DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3756{
3757 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3758}
3759#endif
3760
3761/**
3762 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3763 */
3764DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3765{
3766 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3767}
3768
3769/**
3770 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3771 */
3772DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3773{
3774 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3775}
3776
3777/**
3778 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3779 */
3780DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3781{
3782 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3783}
3784
3785/**
3786 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3787 */
3788DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3789{
3790 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3791}
3792
3793/**
3794 * @copydoc PDMDEVHLPR3::pfnPhysRead
3795 */
3796DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3797{
3798 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3799}
3800
3801/**
3802 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3803 */
3804DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3805{
3806 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3807}
3808
3809#ifdef IN_RING3
3810
3811/**
3812 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3813 */
3814DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3815{
3816 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3817}
3818
3819/**
3820 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3821 */
3822DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3823{
3824 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3825}
3826
3827/**
3828 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3829 */
3830DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3831{
3832 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3833}
3834
3835#endif /* IN_RING3 */
3836
3837/**
3838 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3839 */
3840DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3841{
3842 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3843}
3844
3845/**
3846 * @copydoc PDMDEVHLPR3::pfnVMSetError
3847 */
3848DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3849{
3850 va_list va;
3851 va_start(va, pszFormat);
3852 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3853 va_end(va);
3854 return rc;
3855}
3856
3857/**
3858 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3859 */
3860DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3861{
3862 va_list va;
3863 int rc;
3864 va_start(va, pszFormat);
3865 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3866 va_end(va);
3867 return rc;
3868}
3869
3870
3871
3872/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3873typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3874
3875/**
3876 * Callbacks for VBoxDeviceRegister().
3877 */
3878typedef struct PDMDEVREGCB
3879{
3880 /** Interface version.
3881 * This is set to PDM_DEVREG_CB_VERSION. */
3882 uint32_t u32Version;
3883
3884 /**
3885 * Registers a device with the current VM instance.
3886 *
3887 * @returns VBox status code.
3888 * @param pCallbacks Pointer to the callback table.
3889 * @param pDevReg Pointer to the device registration record.
3890 * This data must be permanent and readonly.
3891 */
3892 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3893
3894 /**
3895 * Allocate memory which is associated with current VM instance
3896 * and automatically freed on it's destruction.
3897 *
3898 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3899 * @param pCallbacks Pointer to the callback table.
3900 * @param cb Number of bytes to allocate.
3901 */
3902 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3903} PDMDEVREGCB;
3904
3905/** Current version of the PDMDEVREGCB structure. */
3906#define PDM_DEVREG_CB_VERSION 0xf4010000
3907
3908
3909/**
3910 * The VBoxDevicesRegister callback function.
3911 *
3912 * PDM will invoke this function after loading a device module and letting
3913 * the module decide which devices to register and how to handle conflicts.
3914 *
3915 * @returns VBox status code.
3916 * @param pCallbacks Pointer to the callback table.
3917 * @param u32Version VBox version number.
3918 */
3919typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3920
3921/** @} */
3922
3923__END_DECLS
3924
3925#endif
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