VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 5999

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/iom.h>
35#include <VBox/tm.h>
36#include <VBox/ssm.h>
37#include <VBox/cfgm.h>
38#include <VBox/dbgf.h>
39#include <VBox/mm.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44__BEGIN_DECLS
45
46/** @defgroup grp_pdm_device Devices
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data.
56 * If the registration structure is needed, pDevIns->pDevReg points to it.
57 * @param iInstance Instance number. Use this to figure out which registers and such to use.
58 * The instance number is also found in pDevIns->iInstance, but since it's
59 * likely to be freqently used PDM passes it as parameter.
60 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
61 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
62 * primary usage will in this function it's passed as a parameter.
63 */
64typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
65/** Pointer to a FNPDMDEVCONSTRUCT() function. */
66typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
67
68/**
69 * Destruct a device instance.
70 *
71 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
72 * resources can be freed correctly.
73 *
74 * @returns VBox status.
75 * @param pDevIns The device instance data.
76 */
77typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
78/** Pointer to a FNPDMDEVDESTRUCT() function. */
79typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
80
81/**
82 * Device relocation callback.
83 *
84 * When this callback is called the device instance data, and if the
85 * device have a GC component, is being relocated, or/and the selectors
86 * have been changed. The device must use the chance to perform the
87 * necessary pointer relocations and data updates.
88 *
89 * Before the GC code is executed the first time, this function will be
90 * called with a 0 delta so GC pointer calculations can be one in one place.
91 *
92 * @param pDevIns Pointer to the device instance.
93 * @param offDelta The relocation delta relative to the old location.
94 *
95 * @remark A relocation CANNOT fail.
96 */
97typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
98/** Pointer to a FNPDMDEVRELOCATE() function. */
99typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
100
101
102/**
103 * Device I/O Control interface.
104 *
105 * This is used by external components, such as the COM interface, to
106 * communicate with devices using a class wide interface or a device
107 * specific interface.
108 *
109 * @returns VBox status code.
110 * @param pDevIns Pointer to the device instance.
111 * @param uFunction Function to perform.
112 * @param pvIn Pointer to input data.
113 * @param cbIn Size of input data.
114 * @param pvOut Pointer to output data.
115 * @param cbOut Size of output data.
116 * @param pcbOut Where to store the actual size of the output data.
117 */
118typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
119 void *pvIn, RTUINT cbIn,
120 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
121/** Pointer to a FNPDMDEVIOCTL() function. */
122typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
123
124/**
125 * Power On notification.
126 *
127 * @returns VBox status.
128 * @param pDevIns The device instance data.
129 */
130typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
131/** Pointer to a FNPDMDEVPOWERON() function. */
132typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
133
134/**
135 * Reset notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 */
140typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
141/** Pointer to a FNPDMDEVRESET() function. */
142typedef FNPDMDEVRESET *PFNPDMDEVRESET;
143
144/**
145 * Suspend notification.
146 *
147 * @returns VBox status.
148 * @param pDevIns The device instance data.
149 */
150typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
151/** Pointer to a FNPDMDEVSUSPEND() function. */
152typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
153
154/**
155 * Resume notification.
156 *
157 * @returns VBox status.
158 * @param pDevIns The device instance data.
159 */
160typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
161/** Pointer to a FNPDMDEVRESUME() function. */
162typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
163
164/**
165 * Power Off notification.
166 *
167 * @param pDevIns The device instance data.
168 */
169typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
170/** Pointer to a FNPDMDEVPOWEROFF() function. */
171typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
172
173/**
174 * Attach command.
175 *
176 * This is called to let the device attach to a driver for a specified LUN
177 * at runtime. This is not called during VM construction, the device
178 * constructor have to attach to all the available drivers.
179 *
180 * This is like plugging in the keyboard or mouse after turning on the PC.
181 *
182 * @returns VBox status code.
183 * @param pDevIns The device instance.
184 * @param iLUN The logical unit which is being detached.
185 */
186typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
187/** Pointer to a FNPDMDEVATTACH() function. */
188typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
189
190/**
191 * Detach notification.
192 *
193 * This is called when a driver is detaching itself from a LUN of the device.
194 * The device should adjust it's state to reflect this.
195 *
196 * This is like unplugging the network cable to use it for the laptop or
197 * something while the PC is still running.
198 *
199 * @param pDevIns The device instance.
200 * @param iLUN The logical unit which is being detached.
201 */
202typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
203/** Pointer to a FNPDMDEVDETACH() function. */
204typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
205
206/**
207 * Query the base interface of a logical unit.
208 *
209 * @returns VBOX status code.
210 * @param pDevIns The device instance.
211 * @param iLUN The logicial unit to query.
212 * @param ppBase Where to store the pointer to the base interface of the LUN.
213 */
214typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
215/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
216typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
217
218/**
219 * Init complete notification.
220 * This can be done to do communication with other devices and other
221 * initialization which requires everything to be in place.
222 *
223 * @returns VBOX status code.
224 * @param pDevIns The device instance.
225 */
226typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
227/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
228typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
229
230
231
232/** PDM Device Registration Structure,
233 * This structure is used when registering a device from
234 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
235 * the VM is terminated.
236 */
237typedef struct PDMDEVREG
238{
239 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
240 uint32_t u32Version;
241 /** Device name. */
242 char szDeviceName[32];
243 /** Name of guest context module (no path).
244 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
245 char szGCMod[32];
246 /** Name of guest context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
248 char szR0Mod[32];
249 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
250 * remain unchanged from registration till VM destruction. */
251 const char *pszDescription;
252
253 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
254 RTUINT fFlags;
255 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
256 RTUINT fClass;
257 /** Maximum number of instances (per VM). */
258 RTUINT cMaxInstances;
259 /** Size of the instance data. */
260 RTUINT cbInstance;
261
262 /** Construct instance - required. */
263 PFNPDMDEVCONSTRUCT pfnConstruct;
264 /** Destruct instance - optional. */
265 PFNPDMDEVDESTRUCT pfnDestruct;
266 /** Relocation command - optional. */
267 PFNPDMDEVRELOCATE pfnRelocate;
268 /** I/O Control interface - optional. */
269 PFNPDMDEVIOCTL pfnIOCtl;
270 /** Power on notification - optional. */
271 PFNPDMDEVPOWERON pfnPowerOn;
272 /** Reset notification - optional. */
273 PFNPDMDEVRESET pfnReset;
274 /** Suspend notification - optional. */
275 PFNPDMDEVSUSPEND pfnSuspend;
276 /** Resume notification - optional. */
277 PFNPDMDEVRESUME pfnResume;
278 /** Attach command - optional. */
279 PFNPDMDEVATTACH pfnAttach;
280 /** Detach notification - optional. */
281 PFNPDMDEVDETACH pfnDetach;
282 /** Query a LUN base interface - optional. */
283 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
284 /** Init complete notification - optional. */
285 PFNPDMDEVINITCOMPLETE pfnInitComplete;
286 /** Power off notification - optional. */
287 PFNPDMDEVPOWEROFF pfnPowerOff;
288} PDMDEVREG;
289/** Pointer to a PDM Device Structure. */
290typedef PDMDEVREG *PPDMDEVREG;
291/** Const pointer to a PDM Device Structure. */
292typedef PDMDEVREG const *PCPDMDEVREG;
293
294/** Current DEVREG version number. */
295#define PDM_DEVREG_VERSION 0xc0010000
296
297/** PDM Device Flags.
298 * @{ */
299/** This flag is used to indicate that the device has a GC component. */
300#define PDM_DEVREG_FLAGS_GC 0x00000001
301/** This flag is used to indicate that the device has a R0 component. */
302#define PDM_DEVREG_FLAGS_R0 0x00010000
303
304/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
305 * The bit count for the current host. */
306#if HC_ARCH_BITS == 32
307# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
308#elif HC_ARCH_BITS == 64
309# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
310#else
311# error Unsupported HC_ARCH_BITS value.
312#endif
313/** The host bit count mask. */
314#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
315
316/** The device support only 32-bit guests. */
317#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
318/** The device support only 64-bit guests. */
319#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
320/** The device support both 32-bit & 64-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
322/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
323 * The guest bit count for the current compilation. */
324#if GC_ARCH_BITS == 32
325# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
326#elif GC_ARCH_BITS == 64
327# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
328#else
329# error Unsupported GC_ARCH_BITS value.
330#endif
331/** The guest bit count mask. */
332#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
333
334/** Indicates that the devices support PAE36 on a 32-bit guest. */
335#define PDM_DEVREG_FLAGS_PAE36 0x00000020
336/** @} */
337
338
339/** PDM Device Classes.
340 * The order is important, lower bit earlier instantiation.
341 * @{ */
342/** Architecture device. */
343#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
344/** Architecture BIOS device. */
345#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
346/** PCI bus brigde. */
347#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
348/** ISA bus brigde. */
349#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
350/** Input device (mouse, keyboard, joystick,..). */
351#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
352/** Interrupt controller (PIC). */
353#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
354/** Interval controoler (PIT). */
355#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
356/** RTC/CMOS. */
357#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
358/** DMA controller. */
359#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
360/** VMM Device. */
361#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
362/** Graphics device, like VGA. */
363#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
364/** Storage controller device. */
365#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
366/** Network interface controller. */
367#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
368/** Audio. */
369#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
370/** USB HIC. */
371#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
372/** ACPI. */
373#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
374/** Serial controller device. */
375#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
376/** Parallel controller device */
377#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
378/** Misc devices (always last). */
379#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
380/** @} */
381
382
383/** @name IRQ Level for use with the *SetIrq APIs.
384 * @{
385 */
386/** Assert the IRQ (can assume value 1). */
387#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
388/** Deassert the IRQ (can assume value 0). */
389#define PDM_IRQ_LEVEL_LOW 0
390/** flip-flop - assert and then deassert it again immediately. */
391#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
392/** @} */
393
394
395/**
396 * PCI Bus registration structure.
397 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
398 */
399typedef struct PDMPCIBUSREG
400{
401 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
402 uint32_t u32Version;
403
404 /**
405 * Registers the device with the default PCI bus.
406 *
407 * @returns VBox status code.
408 * @param pDevIns Device instance of the PCI Bus.
409 * @param pPciDev The PCI device structure.
410 * Any PCI enabled device must keep this in it's instance data!
411 * Fill in the PCI data config before registration, please.
412 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
413 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
414 * If negative, the pci bus device will assign one.
415 */
416 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
417
418 /**
419 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
420 *
421 * @returns VBox status code.
422 * @param pDevIns Device instance of the PCI Bus.
423 * @param pPciDev The PCI device structure.
424 * @param iRegion The region number.
425 * @param cbRegion Size of the region.
426 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
427 * @param pfnCallback Callback for doing the mapping.
428 */
429 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
430
431 /**
432 * Register PCI configuration space read/write callbacks.
433 *
434 * @param pDevIns Device instance of the PCI Bus.
435 * @param pPciDev The PCI device structure.
436 * @param pfnRead Pointer to the user defined PCI config read function.
437 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
438 * PCI config read function. This way, user can decide when (and if)
439 * to call default PCI config read function. Can be NULL.
440 * @param pfnWrite Pointer to the user defined PCI config write function.
441 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
442 * PCI config write function. This way, user can decide when (and if)
443 * to call default PCI config write function. Can be NULL.
444 * @thread EMT
445 */
446 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
447 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
448
449 /**
450 * Set the IRQ for a PCI device.
451 *
452 * @param pDevIns Device instance of the PCI Bus.
453 * @param pPciDev The PCI device structure.
454 * @param iIrq IRQ number to set.
455 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
456 */
457 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
458
459 /**
460 * Saves a state of the PCI device.
461 *
462 * @returns VBox status code.
463 * @param pDevIns Device instance of the PCI Bus.
464 * @param pPciDev Pointer to PCI device.
465 * @param pSSMHandle The handle to save the state to.
466 */
467 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
468
469 /**
470 * Loads a saved PCI device state.
471 *
472 * @returns VBox status code.
473 * @param pDevIns Device instance of the PCI Bus.
474 * @param pPciDev Pointer to PCI device.
475 * @param pSSMHandle The handle to the saved state.
476 */
477 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
478
479 /**
480 * Called to perform the job of the bios.
481 * This is only called for the first PCI Bus - it is expected to
482 * service all the PCI buses.
483 *
484 * @returns VBox status.
485 * @param pDevIns Device instance of the first bus.
486 */
487 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
488
489 /** The name of the SetIrq GC entry point. */
490 const char *pszSetIrqGC;
491
492 /** The name of the SetIrq R0 entry point. */
493 const char *pszSetIrqR0;
494
495} PDMPCIBUSREG;
496/** Pointer to a PCI bus registration structure. */
497typedef PDMPCIBUSREG *PPDMPCIBUSREG;
498
499/** Current PDMPCIBUSREG version number. */
500#define PDM_PCIBUSREG_VERSION 0xd0020000
501
502/**
503 * PCI Bus GC helpers.
504 */
505typedef struct PDMPCIHLPGC
506{
507 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
508 uint32_t u32Version;
509
510 /**
511 * Set an ISA IRQ.
512 *
513 * @param pDevIns PCI device instance.
514 * @param iIrq IRQ number to set.
515 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
516 * @thread EMT only.
517 */
518 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
519
520 /**
521 * Set an I/O-APIC IRQ.
522 *
523 * @param pDevIns PCI device instance.
524 * @param iIrq IRQ number to set.
525 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
526 * @thread EMT only.
527 */
528 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
529
530#ifdef VBOX_WITH_PDM_LOCK
531 /**
532 * Acquires the PDM lock.
533 *
534 * @returns VINF_SUCCESS on success.
535 * @returns rc if we failed to acquire the lock.
536 * @param pDevIns The PCI device instance.
537 * @param rc What to return if we fail to acquire the lock.
538 */
539 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
540
541 /**
542 * Releases the PDM lock.
543 *
544 * @param pDevIns The PCI device instance.
545 */
546 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
547#endif
548 /** Just a safety precaution. */
549 uint32_t u32TheEnd;
550} PDMPCIHLPGC;
551/** Pointer to PCI helpers. */
552typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
553/** Pointer to const PCI helpers. */
554typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
555
556/** Current PDMPCIHLPR3 version number. */
557#define PDM_PCIHLPGC_VERSION 0xe1010000
558
559
560/**
561 * PCI Bus R0 helpers.
562 */
563typedef struct PDMPCIHLPR0
564{
565 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
566 uint32_t u32Version;
567
568 /**
569 * Set an ISA IRQ.
570 *
571 * @param pDevIns PCI device instance.
572 * @param iIrq IRQ number to set.
573 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
574 * @thread EMT only.
575 */
576 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
577
578 /**
579 * Set an I/O-APIC IRQ.
580 *
581 * @param pDevIns PCI device instance.
582 * @param iIrq IRQ number to set.
583 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
584 * @thread EMT only.
585 */
586 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
587
588#ifdef VBOX_WITH_PDM_LOCK
589 /**
590 * Acquires the PDM lock.
591 *
592 * @returns VINF_SUCCESS on success.
593 * @returns rc if we failed to acquire the lock.
594 * @param pDevIns The PCI device instance.
595 * @param rc What to return if we fail to acquire the lock.
596 */
597 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
598
599 /**
600 * Releases the PDM lock.
601 *
602 * @param pDevIns The PCI device instance.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
605#endif
606
607 /** Just a safety precaution. */
608 uint32_t u32TheEnd;
609} PDMPCIHLPR0;
610/** Pointer to PCI helpers. */
611typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
612/** Pointer to const PCI helpers. */
613typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
614
615/** Current PDMPCIHLPR0 version number. */
616#define PDM_PCIHLPR0_VERSION 0xe1010000
617
618/**
619 * PCI device helpers.
620 */
621typedef struct PDMPCIHLPR3
622{
623 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
624 uint32_t u32Version;
625
626 /**
627 * Set an ISA IRQ.
628 *
629 * @param pDevIns The PCI device instance.
630 * @param iIrq IRQ number to set.
631 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
632 * @thread EMT only.
633 */
634 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
635
636 /**
637 * Set an I/O-APIC IRQ.
638 *
639 * @param pDevIns The PCI device instance.
640 * @param iIrq IRQ number to set.
641 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
642 * @thread EMT only.
643 */
644 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
645
646#ifdef VBOX_WITH_PDM_LOCK
647 /**
648 * Acquires the PDM lock.
649 *
650 * @returns VINF_SUCCESS on success.
651 * @returns Fatal error on failure.
652 * @param pDevIns The PCI device instance.
653 * @param rc Dummy for making the interface identical to the GC and R0 versions.
654 */
655 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
656
657 /**
658 * Releases the PDM lock.
659 *
660 * @param pDevIns The PCI device instance.
661 */
662 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
663#endif
664
665 /**
666 * Gets the address of the GC PCI Bus helpers.
667 *
668 * This should be called at both construction and relocation time
669 * to obtain the correct address of the GC helpers.
670 *
671 * @returns GC pointer to the PCI Bus helpers.
672 * @param pDevIns Device instance of the PCI Bus.
673 * @thread EMT only.
674 */
675 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
676
677 /**
678 * Gets the address of the R0 PCI Bus helpers.
679 *
680 * This should be called at both construction and relocation time
681 * to obtain the correct address of the GC helpers.
682 *
683 * @returns R0 pointer to the PCI Bus helpers.
684 * @param pDevIns Device instance of the PCI Bus.
685 * @thread EMT only.
686 */
687 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
688
689 /** Just a safety precaution. */
690 uint32_t u32TheEnd;
691} PDMPCIHLPR3;
692/** Pointer to PCI helpers. */
693typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
694/** Pointer to const PCI helpers. */
695typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
696
697/** Current PDMPCIHLPR3 version number. */
698#define PDM_PCIHLPR3_VERSION 0xf1010000
699
700
701/**
702 * Programmable Interrupt Controller registration structure.
703 */
704typedef struct PDMPICREG
705{
706 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
707 uint32_t u32Version;
708
709 /**
710 * Set the an IRQ.
711 *
712 * @param pDevIns Device instance of the PIC.
713 * @param iIrq IRQ number to set.
714 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
715 */
716 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
717
718 /**
719 * Get a pending interrupt.
720 *
721 * @returns Pending interrupt number.
722 * @param pDevIns Device instance of the PIC.
723 */
724 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
725
726 /** The name of the GC SetIrq entry point. */
727 const char *pszSetIrqGC;
728 /** The name of the GC GetInterrupt entry point. */
729 const char *pszGetInterruptGC;
730
731 /** The name of the R0 SetIrq entry point. */
732 const char *pszSetIrqR0;
733 /** The name of the R0 GetInterrupt entry point. */
734 const char *pszGetInterruptR0;
735} PDMPICREG;
736/** Pointer to a PIC registration structure. */
737typedef PDMPICREG *PPDMPICREG;
738
739/** Current PDMPICREG version number. */
740#define PDM_PICREG_VERSION 0xe0020000
741
742/**
743 * PIC GC helpers.
744 */
745typedef struct PDMPICHLPGC
746{
747 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
748 uint32_t u32Version;
749
750 /**
751 * Set the interrupt force action flag.
752 *
753 * @param pDevIns Device instance of the PIC.
754 */
755 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
756
757 /**
758 * Clear the interrupt force action flag.
759 *
760 * @param pDevIns Device instance of the PIC.
761 */
762 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
763
764#ifdef VBOX_WITH_PDM_LOCK
765 /**
766 * Acquires the PDM lock.
767 *
768 * @returns VINF_SUCCESS on success.
769 * @returns rc if we failed to acquire the lock.
770 * @param pDevIns The PIC device instance.
771 * @param rc What to return if we fail to acquire the lock.
772 */
773 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
774
775 /**
776 * Releases the PDM lock.
777 *
778 * @param pDevIns The PIC device instance.
779 */
780 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
781#endif
782 /** Just a safety precaution. */
783 uint32_t u32TheEnd;
784} PDMPICHLPGC;
785
786/** Pointer to PIC GC helpers. */
787typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
788/** Pointer to const PIC GC helpers. */
789typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
790
791/** Current PDMPICHLPGC version number. */
792#define PDM_PICHLPGC_VERSION 0xfc010000
793
794
795/**
796 * PIC R0 helpers.
797 */
798typedef struct PDMPICHLPR0
799{
800 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
801 uint32_t u32Version;
802
803 /**
804 * Set the interrupt force action flag.
805 *
806 * @param pDevIns Device instance of the PIC.
807 */
808 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
809
810 /**
811 * Clear the interrupt force action flag.
812 *
813 * @param pDevIns Device instance of the PIC.
814 */
815 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
816
817#ifdef VBOX_WITH_PDM_LOCK
818 /**
819 * Acquires the PDM lock.
820 *
821 * @returns VINF_SUCCESS on success.
822 * @returns rc if we failed to acquire the lock.
823 * @param pDevIns The PIC device instance.
824 * @param rc What to return if we fail to acquire the lock.
825 */
826 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
827
828 /**
829 * Releases the PDM lock.
830 *
831 * @param pDevIns The PCI device instance.
832 */
833 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
834#endif
835
836 /** Just a safety precaution. */
837 uint32_t u32TheEnd;
838} PDMPICHLPR0;
839
840/** Pointer to PIC R0 helpers. */
841typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
842/** Pointer to const PIC R0 helpers. */
843typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
844
845/** Current PDMPICHLPR0 version number. */
846#define PDM_PICHLPR0_VERSION 0xfc010000
847
848/**
849 * PIC HC helpers.
850 */
851typedef struct PDMPICHLPR3
852{
853 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
854 uint32_t u32Version;
855
856 /**
857 * Set the interrupt force action flag.
858 *
859 * @param pDevIns Device instance of the PIC.
860 */
861 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
862
863 /**
864 * Clear the interrupt force action flag.
865 *
866 * @param pDevIns Device instance of the PIC.
867 */
868 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
869
870#ifdef VBOX_WITH_PDM_LOCK
871 /**
872 * Acquires the PDM lock.
873 *
874 * @returns VINF_SUCCESS on success.
875 * @returns Fatal error on failure.
876 * @param pDevIns The PIC device instance.
877 * @param rc Dummy for making the interface identical to the GC and R0 versions.
878 */
879 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
880
881 /**
882 * Releases the PDM lock.
883 *
884 * @param pDevIns The PIC device instance.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
887#endif
888
889 /**
890 * Gets the address of the GC PIC helpers.
891 *
892 * This should be called at both construction and relocation time
893 * to obtain the correct address of the GC helpers.
894 *
895 * @returns GC pointer to the PIC helpers.
896 * @param pDevIns Device instance of the PIC.
897 */
898 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
899
900 /**
901 * Gets the address of the R0 PIC helpers.
902 *
903 * This should be called at both construction and relocation time
904 * to obtain the correct address of the GC helpers.
905 *
906 * @returns R0 pointer to the PIC helpers.
907 * @param pDevIns Device instance of the PIC.
908 */
909 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
910
911 /** Just a safety precaution. */
912 uint32_t u32TheEnd;
913} PDMPICHLPR3;
914
915/** Pointer to PIC HC helpers. */
916typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
917/** Pointer to const PIC HC helpers. */
918typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
919
920/** Current PDMPICHLPR3 version number. */
921#define PDM_PICHLPR3_VERSION 0xf0010000
922
923
924
925/**
926 * Advanced Programmable Interrupt Controller registration structure.
927 */
928typedef struct PDMAPICREG
929{
930 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
931 uint32_t u32Version;
932
933 /**
934 * Get a pending interrupt.
935 *
936 * @returns Pending interrupt number.
937 * @param pDevIns Device instance of the APIC.
938 */
939 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
940
941 /**
942 * Set the APIC base.
943 *
944 * @param pDevIns Device instance of the APIC.
945 * @param u64Base The new base.
946 */
947 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
948
949 /**
950 * Get the APIC base.
951 *
952 * @returns Current base.
953 * @param pDevIns Device instance of the APIC.
954 */
955 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
956
957 /**
958 * Set the TPR (task priority register?).
959 *
960 * @param pDevIns Device instance of the APIC.
961 * @param u8TPR The new TPR.
962 */
963 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
964
965 /**
966 * Get the TPR (task priority register?).
967 *
968 * @returns The current TPR.
969 * @param pDevIns Device instance of the APIC.
970 */
971 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
972
973 /**
974 * Private interface between the IOAPIC and APIC.
975 *
976 * This is a low-level, APIC/IOAPIC implementation specific interface
977 * which is registered with PDM only because it makes life so much
978 * simpler right now (GC bits). This is a bad bad hack! The correct
979 * way of doing this would involve some way of querying GC interfaces
980 * and relocating them. Perhaps doing some kind of device init in GC...
981 *
982 * @returns The current TPR.
983 * @param pDevIns Device instance of the APIC.
984 * @param u8Dest See APIC implementation.
985 * @param u8DestMode See APIC implementation.
986 * @param u8DeliveryMode See APIC implementation.
987 * @param iVector See APIC implementation.
988 * @param u8Polarity See APIC implementation.
989 * @param u8TriggerMode See APIC implementation.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
992 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
993
994 /** The name of the GC GetInterrupt entry point. */
995 const char *pszGetInterruptGC;
996 /** The name of the GC SetBase entry point. */
997 const char *pszSetBaseGC;
998 /** The name of the GC GetBase entry point. */
999 const char *pszGetBaseGC;
1000 /** The name of the GC SetTPR entry point. */
1001 const char *pszSetTPRGC;
1002 /** The name of the GC GetTPR entry point. */
1003 const char *pszGetTPRGC;
1004 /** The name of the GC BusDeliver entry point. */
1005 const char *pszBusDeliverGC;
1006
1007 /** The name of the R0 GetInterrupt entry point. */
1008 const char *pszGetInterruptR0;
1009 /** The name of the R0 SetBase entry point. */
1010 const char *pszSetBaseR0;
1011 /** The name of the R0 GetBase entry point. */
1012 const char *pszGetBaseR0;
1013 /** The name of the R0 SetTPR entry point. */
1014 const char *pszSetTPRR0;
1015 /** The name of the R0 GetTPR entry point. */
1016 const char *pszGetTPRR0;
1017 /** The name of the R0 BusDeliver entry point. */
1018 const char *pszBusDeliverR0;
1019
1020} PDMAPICREG;
1021/** Pointer to an APIC registration structure. */
1022typedef PDMAPICREG *PPDMAPICREG;
1023
1024/** Current PDMAPICREG version number. */
1025#define PDM_APICREG_VERSION 0x70010000
1026
1027
1028/**
1029 * APIC GC helpers.
1030 */
1031typedef struct PDMAPICHLPGC
1032{
1033 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1034 uint32_t u32Version;
1035
1036 /**
1037 * Set the interrupt force action flag.
1038 *
1039 * @param pDevIns Device instance of the APIC.
1040 */
1041 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1042
1043 /**
1044 * Clear the interrupt force action flag.
1045 *
1046 * @param pDevIns Device instance of the APIC.
1047 */
1048 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1049
1050 /**
1051 * Sets or clears the APIC bit in the CPUID feature masks.
1052 *
1053 * @param pDevIns Device instance of the APIC.
1054 * @param fEnabled If true the bit is set, else cleared.
1055 */
1056 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1057
1058#ifdef VBOX_WITH_PDM_LOCK
1059 /**
1060 * Acquires the PDM lock.
1061 *
1062 * @returns VINF_SUCCESS on success.
1063 * @returns rc if we failed to acquire the lock.
1064 * @param pDevIns The APIC device instance.
1065 * @param rc What to return if we fail to acquire the lock.
1066 */
1067 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1068
1069 /**
1070 * Releases the PDM lock.
1071 *
1072 * @param pDevIns The APIC device instance.
1073 */
1074 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1075#endif
1076 /** Just a safety precaution. */
1077 uint32_t u32TheEnd;
1078} PDMAPICHLPGC;
1079/** Pointer to APIC GC helpers. */
1080typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1081/** Pointer to const APIC helpers. */
1082typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1083
1084/** Current PDMAPICHLPGC version number. */
1085#define PDM_APICHLPGC_VERSION 0x60010000
1086
1087
1088/**
1089 * APIC R0 helpers.
1090 */
1091typedef struct PDMAPICHLPR0
1092{
1093 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1094 uint32_t u32Version;
1095
1096 /**
1097 * Set the interrupt force action flag.
1098 *
1099 * @param pDevIns Device instance of the APIC.
1100 */
1101 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1102
1103 /**
1104 * Clear the interrupt force action flag.
1105 *
1106 * @param pDevIns Device instance of the APIC.
1107 */
1108 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1109
1110 /**
1111 * Sets or clears the APIC bit in the CPUID feature masks.
1112 *
1113 * @param pDevIns Device instance of the APIC.
1114 * @param fEnabled If true the bit is set, else cleared.
1115 */
1116 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1117
1118#ifdef VBOX_WITH_PDM_LOCK
1119 /**
1120 * Acquires the PDM lock.
1121 *
1122 * @returns VINF_SUCCESS on success.
1123 * @returns rc if we failed to acquire the lock.
1124 * @param pDevIns The APIC device instance.
1125 * @param rc What to return if we fail to acquire the lock.
1126 */
1127 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1128
1129 /**
1130 * Releases the PDM lock.
1131 *
1132 * @param pDevIns The APIC device instance.
1133 */
1134 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1135#endif
1136
1137 /** Just a safety precaution. */
1138 uint32_t u32TheEnd;
1139} PDMAPICHLPR0;
1140/** Pointer to APIC GC helpers. */
1141typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1142/** Pointer to const APIC helpers. */
1143typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1144
1145/** Current PDMAPICHLPR0 version number. */
1146#define PDM_APICHLPR0_VERSION 0x60010000
1147
1148/**
1149 * APIC HC helpers.
1150 */
1151typedef struct PDMAPICHLPR3
1152{
1153 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1154 uint32_t u32Version;
1155
1156 /**
1157 * Set the interrupt force action flag.
1158 *
1159 * @param pDevIns Device instance of the APIC.
1160 */
1161 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1162
1163 /**
1164 * Clear the interrupt force action flag.
1165 *
1166 * @param pDevIns Device instance of the APIC.
1167 */
1168 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1169
1170 /**
1171 * Sets or clears the APIC bit in the CPUID feature masks.
1172 *
1173 * @param pDevIns Device instance of the APIC.
1174 * @param fEnabled If true the bit is set, else cleared.
1175 */
1176 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1177
1178#ifdef VBOX_WITH_PDM_LOCK
1179 /**
1180 * Acquires the PDM lock.
1181 *
1182 * @returns VINF_SUCCESS on success.
1183 * @returns Fatal error on failure.
1184 * @param pDevIns The APIC device instance.
1185 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1186 */
1187 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1188
1189 /**
1190 * Releases the PDM lock.
1191 *
1192 * @param pDevIns The APIC device instance.
1193 */
1194 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1195#endif
1196
1197 /**
1198 * Gets the address of the GC APIC helpers.
1199 *
1200 * This should be called at both construction and relocation time
1201 * to obtain the correct address of the GC helpers.
1202 *
1203 * @returns GC pointer to the APIC helpers.
1204 * @param pDevIns Device instance of the APIC.
1205 */
1206 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1207
1208 /**
1209 * Gets the address of the R0 APIC helpers.
1210 *
1211 * This should be called at both construction and relocation time
1212 * to obtain the correct address of the R0 helpers.
1213 *
1214 * @returns R0 pointer to the APIC helpers.
1215 * @param pDevIns Device instance of the APIC.
1216 */
1217 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1218
1219 /** Just a safety precaution. */
1220 uint32_t u32TheEnd;
1221} PDMAPICHLPR3;
1222/** Pointer to APIC helpers. */
1223typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1224/** Pointer to const APIC helpers. */
1225typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1226
1227/** Current PDMAPICHLP version number. */
1228#define PDM_APICHLPR3_VERSION 0xfd010000
1229
1230
1231/**
1232 * I/O APIC registration structure.
1233 */
1234typedef struct PDMIOAPICREG
1235{
1236 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1237 uint32_t u32Version;
1238
1239 /**
1240 * Set the an IRQ.
1241 *
1242 * @param pDevIns Device instance of the I/O APIC.
1243 * @param iIrq IRQ number to set.
1244 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1245 */
1246 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1247
1248 /** The name of the GC SetIrq entry point. */
1249 const char *pszSetIrqGC;
1250
1251 /** The name of the R0 SetIrq entry point. */
1252 const char *pszSetIrqR0;
1253} PDMIOAPICREG;
1254/** Pointer to an APIC registration structure. */
1255typedef PDMIOAPICREG *PPDMIOAPICREG;
1256
1257/** Current PDMAPICREG version number. */
1258#define PDM_IOAPICREG_VERSION 0x50010000
1259
1260
1261/**
1262 * IOAPIC GC helpers.
1263 */
1264typedef struct PDMIOAPICHLPGC
1265{
1266 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1267 uint32_t u32Version;
1268
1269 /**
1270 * Private interface between the IOAPIC and APIC.
1271 *
1272 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1273 *
1274 * @returns The current TPR.
1275 * @param pDevIns Device instance of the IOAPIC.
1276 * @param u8Dest See APIC implementation.
1277 * @param u8DestMode See APIC implementation.
1278 * @param u8DeliveryMode See APIC implementation.
1279 * @param iVector See APIC implementation.
1280 * @param u8Polarity See APIC implementation.
1281 * @param u8TriggerMode See APIC implementation.
1282 */
1283 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1284 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1285
1286#ifdef VBOX_WITH_PDM_LOCK
1287 /**
1288 * Acquires the PDM lock.
1289 *
1290 * @returns VINF_SUCCESS on success.
1291 * @returns rc if we failed to acquire the lock.
1292 * @param pDevIns The IOAPIC device instance.
1293 * @param rc What to return if we fail to acquire the lock.
1294 */
1295 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1296
1297 /**
1298 * Releases the PDM lock.
1299 *
1300 * @param pDevIns The IOAPIC device instance.
1301 */
1302 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1303#endif
1304
1305 /** Just a safety precaution. */
1306 uint32_t u32TheEnd;
1307} PDMIOAPICHLPGC;
1308/** Pointer to IOAPIC GC helpers. */
1309typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1310/** Pointer to const IOAPIC helpers. */
1311typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1312
1313/** Current PDMIOAPICHLPGC version number. */
1314#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1315
1316
1317/**
1318 * IOAPIC R0 helpers.
1319 */
1320typedef struct PDMIOAPICHLPR0
1321{
1322 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1323 uint32_t u32Version;
1324
1325 /**
1326 * Private interface between the IOAPIC and APIC.
1327 *
1328 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1329 *
1330 * @returns The current TPR.
1331 * @param pDevIns Device instance of the IOAPIC.
1332 * @param u8Dest See APIC implementation.
1333 * @param u8DestMode See APIC implementation.
1334 * @param u8DeliveryMode See APIC implementation.
1335 * @param iVector See APIC implementation.
1336 * @param u8Polarity See APIC implementation.
1337 * @param u8TriggerMode See APIC implementation.
1338 */
1339 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1340 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1341
1342#ifdef VBOX_WITH_PDM_LOCK
1343 /**
1344 * Acquires the PDM lock.
1345 *
1346 * @returns VINF_SUCCESS on success.
1347 * @returns rc if we failed to acquire the lock.
1348 * @param pDevIns The IOAPIC device instance.
1349 * @param rc What to return if we fail to acquire the lock.
1350 */
1351 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1352
1353 /**
1354 * Releases the PDM lock.
1355 *
1356 * @param pDevIns The IOAPIC device instance.
1357 */
1358 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1359#endif
1360
1361 /** Just a safety precaution. */
1362 uint32_t u32TheEnd;
1363} PDMIOAPICHLPR0;
1364/** Pointer to IOAPIC R0 helpers. */
1365typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1366/** Pointer to const IOAPIC helpers. */
1367typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1368
1369/** Current PDMIOAPICHLPR0 version number. */
1370#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1371
1372/**
1373 * IOAPIC HC helpers.
1374 */
1375typedef struct PDMIOAPICHLPR3
1376{
1377 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1378 uint32_t u32Version;
1379
1380 /**
1381 * Private interface between the IOAPIC and APIC.
1382 *
1383 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1384 *
1385 * @returns The current TPR.
1386 * @param pDevIns Device instance of the IOAPIC.
1387 * @param u8Dest See APIC implementation.
1388 * @param u8DestMode See APIC implementation.
1389 * @param u8DeliveryMode See APIC implementation.
1390 * @param iVector See APIC implementation.
1391 * @param u8Polarity See APIC implementation.
1392 * @param u8TriggerMode See APIC implementation.
1393 */
1394 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1395 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1396
1397#ifdef VBOX_WITH_PDM_LOCK
1398 /**
1399 * Acquires the PDM lock.
1400 *
1401 * @returns VINF_SUCCESS on success.
1402 * @returns Fatal error on failure.
1403 * @param pDevIns The IOAPIC device instance.
1404 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1405 */
1406 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1407
1408 /**
1409 * Releases the PDM lock.
1410 *
1411 * @param pDevIns The IOAPIC device instance.
1412 */
1413 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1414#endif
1415
1416 /**
1417 * Gets the address of the GC IOAPIC helpers.
1418 *
1419 * This should be called at both construction and relocation time
1420 * to obtain the correct address of the GC helpers.
1421 *
1422 * @returns GC pointer to the IOAPIC helpers.
1423 * @param pDevIns Device instance of the IOAPIC.
1424 */
1425 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1426
1427 /**
1428 * Gets the address of the R0 IOAPIC helpers.
1429 *
1430 * This should be called at both construction and relocation time
1431 * to obtain the correct address of the R0 helpers.
1432 *
1433 * @returns R0 pointer to the IOAPIC helpers.
1434 * @param pDevIns Device instance of the IOAPIC.
1435 */
1436 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1437
1438 /** Just a safety precaution. */
1439 uint32_t u32TheEnd;
1440} PDMIOAPICHLPR3;
1441/** Pointer to IOAPIC HC helpers. */
1442typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1443/** Pointer to const IOAPIC helpers. */
1444typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1445
1446/** Current PDMIOAPICHLPR3 version number. */
1447#define PDM_IOAPICHLPR3_VERSION 0xff010000
1448
1449
1450
1451#ifdef IN_RING3
1452
1453/**
1454 * DMA Transfer Handler.
1455 *
1456 * @returns Number of bytes transferred.
1457 * @param pDevIns Device instance of the DMA.
1458 * @param pvUser User pointer.
1459 * @param uChannel Channel number.
1460 * @param off DMA position.
1461 * @param cb Block size.
1462 */
1463typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1464/** Pointer to a FNDMATRANSFERHANDLER(). */
1465typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1466
1467/**
1468 * DMA Controller registration structure.
1469 */
1470typedef struct PDMDMAREG
1471{
1472 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1473 uint32_t u32Version;
1474
1475 /**
1476 * Execute pending transfers.
1477 *
1478 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1479 * @param pDevIns Device instance of the DMAC.
1480 */
1481 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1482
1483 /**
1484 * Register transfer function for DMA channel.
1485 *
1486 * @param pDevIns Device instance of the DMAC.
1487 * @param uChannel Channel number.
1488 * @param pfnTransferHandler Device specific transfer function.
1489 * @param pvUSer User pointer to be passed to the callback.
1490 */
1491 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1492
1493 /**
1494 * Read memory
1495 *
1496 * @returns Number of bytes read.
1497 * @param pDevIns Device instance of the DMAC.
1498 * @param pvBuffer Pointer to target buffer.
1499 * @param off DMA position.
1500 * @param cbBlock Block size.
1501 */
1502 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1503
1504 /**
1505 * Write memory
1506 *
1507 * @returns Number of bytes written.
1508 * @param pDevIns Device instance of the DMAC.
1509 * @param pvBuffer Memory to write.
1510 * @param off DMA position.
1511 * @param cbBlock Block size.
1512 */
1513 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1514
1515 /**
1516 * Set the DREQ line.
1517 *
1518 * @param pDevIns Device instance of the DMAC.
1519 * @param uChannel Channel number.
1520 * @param uLevel Level of the line.
1521 */
1522 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1523
1524 /**
1525 * Get channel mode
1526 *
1527 * @returns Channel mode.
1528 * @param pDevIns Device instance of the DMAC.
1529 * @param uChannel Channel number.
1530 */
1531 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1532
1533} PDMDMACREG;
1534/** Pointer to a DMAC registration structure. */
1535typedef PDMDMACREG *PPDMDMACREG;
1536
1537/** Current PDMDMACREG version number. */
1538#define PDM_DMACREG_VERSION 0xf5010000
1539
1540
1541/**
1542 * DMA Controller device helpers.
1543 */
1544typedef struct PDMDMACHLP
1545{
1546 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1547 uint32_t u32Version;
1548
1549 /* to-be-defined */
1550
1551} PDMDMACHLP;
1552/** Pointer to DMAC helpers. */
1553typedef PDMDMACHLP *PPDMDMACHLP;
1554/** Pointer to const DMAC helpers. */
1555typedef const PDMDMACHLP *PCPDMDMACHLP;
1556
1557/** Current PDMDMACHLP version number. */
1558#define PDM_DMACHLP_VERSION 0xf6010000
1559
1560#endif /* IN_RING3 */
1561
1562
1563
1564/**
1565 * RTC registration structure.
1566 */
1567typedef struct PDMRTCREG
1568{
1569 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1570 uint32_t u32Version;
1571 uint32_t u32Alignment; /**< structure size alignment. */
1572
1573 /**
1574 * Write to a CMOS register and update the checksum if necessary.
1575 *
1576 * @returns VBox status code.
1577 * @param pDevIns Device instance of the RTC.
1578 * @param iReg The CMOS register index.
1579 * @param u8Value The CMOS register value.
1580 */
1581 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1582
1583 /**
1584 * Read a CMOS register.
1585 *
1586 * @returns VBox status code.
1587 * @param pDevIns Device instance of the RTC.
1588 * @param iReg The CMOS register index.
1589 * @param pu8Value Where to store the CMOS register value.
1590 */
1591 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1592
1593} PDMRTCREG;
1594/** Pointer to a RTC registration structure. */
1595typedef PDMRTCREG *PPDMRTCREG;
1596/** Pointer to a const RTC registration structure. */
1597typedef const PDMRTCREG *PCPDMRTCREG;
1598
1599/** Current PDMRTCREG version number. */
1600#define PDM_RTCREG_VERSION 0xfa010000
1601
1602
1603/**
1604 * RTC device helpers.
1605 */
1606typedef struct PDMRTCHLP
1607{
1608 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1609 uint32_t u32Version;
1610
1611 /* to-be-defined */
1612
1613} PDMRTCHLP;
1614/** Pointer to RTC helpers. */
1615typedef PDMRTCHLP *PPDMRTCHLP;
1616/** Pointer to const RTC helpers. */
1617typedef const PDMRTCHLP *PCPDMRTCHLP;
1618
1619/** Current PDMRTCHLP version number. */
1620#define PDM_RTCHLP_VERSION 0xf6010000
1621
1622
1623
1624#ifdef IN_RING3
1625
1626/**
1627 * PDM Device API.
1628 */
1629typedef struct PDMDEVHLP
1630{
1631 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1632 uint32_t u32Version;
1633
1634 /**
1635 * Register a number of I/O ports with a device.
1636 *
1637 * These callbacks are of course for the host context (HC).
1638 * Register HC handlers before guest context (GC) handlers! There must be a
1639 * HC handler for every GC handler!
1640 *
1641 * @returns VBox status.
1642 * @param pDevIns The device instance to register the ports with.
1643 * @param Port First port number in the range.
1644 * @param cPorts Number of ports to register.
1645 * @param pvUser User argument.
1646 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1647 * @param pfnIn Pointer to function which is gonna handle IN operations.
1648 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1649 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1650 * @param pszDesc Pointer to description string. This must not be freed.
1651 */
1652 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1653 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1654 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1655
1656 /**
1657 * Register a number of I/O ports with a device for GC.
1658 *
1659 * These callbacks are for the host context (GC).
1660 * Register host context (HC) handlers before guest context handlers! There must be a
1661 * HC handler for every GC handler!
1662 *
1663 * @returns VBox status.
1664 * @param pDevIns The device instance to register the ports with and which GC module
1665 * to resolve the names against.
1666 * @param Port First port number in the range.
1667 * @param cPorts Number of ports to register.
1668 * @param pvUser User argument.
1669 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1670 * @param pszIn Name of the GC function which is gonna handle IN operations.
1671 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1672 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1673 * @param pszDesc Pointer to description string. This must not be freed.
1674 */
1675 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1676 const char *pszOut, const char *pszIn,
1677 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1678
1679 /**
1680 * Register a number of I/O ports with a device.
1681 *
1682 * These callbacks are of course for the ring-0 host context (R0).
1683 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1684 *
1685 * @returns VBox status.
1686 * @param pDevIns The device instance to register the ports with.
1687 * @param Port First port number in the range.
1688 * @param cPorts Number of ports to register.
1689 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1690 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1691 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1692 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1693 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1694 * @param pszDesc Pointer to description string. This must not be freed.
1695 */
1696 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1697 const char *pszOut, const char *pszIn,
1698 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1699
1700 /**
1701 * Deregister I/O ports.
1702 *
1703 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1704 *
1705 * @returns VBox status.
1706 * @param pDevIns The device instance owning the ports.
1707 * @param Port First port number in the range.
1708 * @param cPorts Number of ports to deregister.
1709 */
1710 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1711
1712
1713 /**
1714 * Register a Memory Mapped I/O (MMIO) region.
1715 *
1716 * These callbacks are of course for the host context (HC).
1717 * Register HC handlers before guest context (GC) handlers! There must be a
1718 * HC handler for every GC handler!
1719 *
1720 * @returns VBox status.
1721 * @param pDevIns The device instance to register the MMIO with.
1722 * @param GCPhysStart First physical address in the range.
1723 * @param cbRange The size of the range (in bytes).
1724 * @param pvUser User argument.
1725 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1726 * @param pfnRead Pointer to function which is gonna handle Read operations.
1727 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1728 * @param pszDesc Pointer to description string. This must not be freed.
1729 */
1730 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1731 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1732 const char *pszDesc));
1733
1734 /**
1735 * Register a Memory Mapped I/O (MMIO) region for GC.
1736 *
1737 * These callbacks are for the guest context (GC).
1738 * Register host context (HC) handlers before guest context handlers! There must be a
1739 * HC handler for every GC handler!
1740 *
1741 * @returns VBox status.
1742 * @param pDevIns The device instance to register the MMIO with.
1743 * @param GCPhysStart First physical address in the range.
1744 * @param cbRange The size of the range (in bytes).
1745 * @param pvUser User argument.
1746 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1747 * @param pszRead Name of the GC function which is gonna handle Read operations.
1748 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1749 * @param pszDesc Pointer to description string. This must not be freed.
1750 */
1751 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1752 const char *pszWrite, const char *pszRead, const char *pszFill,
1753 const char *pszDesc));
1754
1755 /**
1756 * Register a Memory Mapped I/O (MMIO) region for R0.
1757 *
1758 * These callbacks are for the ring-0 host context (R0).
1759 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1760 *
1761 * @returns VBox status.
1762 * @param pDevIns The device instance to register the MMIO with.
1763 * @param GCPhysStart First physical address in the range.
1764 * @param cbRange The size of the range (in bytes).
1765 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1766 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1767 * @param pszRead Name of the GC function which is gonna handle Read operations.
1768 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1769 * @param pszDesc Pointer to description string. This must not be freed.
1770 */
1771 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1772 const char *pszWrite, const char *pszRead, const char *pszFill,
1773 const char *pszDesc));
1774
1775 /**
1776 * Deregister a Memory Mapped I/O (MMIO) region.
1777 *
1778 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1779 *
1780 * @returns VBox status.
1781 * @param pDevIns The device instance owning the MMIO region(s).
1782 * @param GCPhysStart First physical address in the range.
1783 * @param cbRange The size of the range (in bytes).
1784 */
1785 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1786
1787 /**
1788 * Register a ROM (BIOS) region.
1789 *
1790 * It goes without saying that this is read-only memory. The memory region must be
1791 * in unassigned memory. I.e. from the top of the address space or on the PC in
1792 * the 0xa0000-0xfffff range.
1793 *
1794 * @returns VBox status.
1795 * @param pDevIns The device instance owning the ROM region.
1796 * @param GCPhysStart First physical address in the range.
1797 * Must be page aligned!
1798 * @param cbRange The size of the range (in bytes).
1799 * Must be page aligned!
1800 * @param pvBinary Pointer to the binary data backing the ROM image.
1801 * This must be cbRange bytes big.
1802 * It will be copied and doesn't have to stick around if fShadow is clear.
1803 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1804 * the ROM writable for a while during the POST and refreshing
1805 * it at reset. When this flag is set, the memory pointed to by
1806 * pvBinary has to stick around for the lifespan of the VM.
1807 * @param pszDesc Pointer to description string. This must not be freed.
1808 *
1809 * @remark There is no way to remove the rom, automatically on device cleanup or
1810 * manually from the device yet. At present I doubt we need such features...
1811 */
1812 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1813
1814 /**
1815 * Register a save state data unit.
1816 *
1817 * @returns VBox status.
1818 * @param pDevIns Device instance.
1819 * @param pszName Data unit name.
1820 * @param u32Instance The instance identifier of the data unit.
1821 * This must together with the name be unique.
1822 * @param u32Version Data layout version number.
1823 * @param cbGuess The approximate amount of data in the unit.
1824 * Only for progress indicators.
1825 * @param pfnSavePrep Prepare save callback, optional.
1826 * @param pfnSaveExec Execute save callback, optional.
1827 * @param pfnSaveDone Done save callback, optional.
1828 * @param pfnLoadPrep Prepare load callback, optional.
1829 * @param pfnLoadExec Execute load callback, optional.
1830 * @param pfnLoadDone Done load callback, optional.
1831 */
1832 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1833 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1834 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1835
1836 /**
1837 * Creates a timer.
1838 *
1839 * @returns VBox status.
1840 * @param pDevIns Device instance.
1841 * @param enmClock The clock to use on this timer.
1842 * @param pfnCallback Callback function.
1843 * @param pszDesc Pointer to description string which must stay around
1844 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1845 * @param ppTimer Where to store the timer on success.
1846 */
1847 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1848
1849 /**
1850 * Creates an external timer.
1851 *
1852 * @returns timer pointer
1853 * @param pDevIns Device instance.
1854 * @param enmClock The clock to use on this timer.
1855 * @param pfnCallback Callback function.
1856 * @param pvUser User pointer
1857 * @param pszDesc Pointer to description string which must stay around
1858 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1859 */
1860 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1861
1862 /**
1863 * Registers the device with the default PCI bus.
1864 *
1865 * @returns VBox status code.
1866 * @param pDevIns Device instance.
1867 * @param pPciDev The PCI device structure.
1868 * Any PCI enabled device must keep this in it's instance data!
1869 * Fill in the PCI data config before registration, please.
1870 * @remark This is the simple interface, a Ex interface will be created if
1871 * more features are needed later.
1872 */
1873 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1874
1875 /**
1876 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1877 *
1878 * @returns VBox status code.
1879 * @param pDevIns Device instance.
1880 * @param iRegion The region number.
1881 * @param cbRegion Size of the region.
1882 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1883 * @param pfnCallback Callback for doing the mapping.
1884 */
1885 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1886
1887 /**
1888 * Register PCI configuration space read/write callbacks.
1889 *
1890 * @param pDevIns Device instance.
1891 * @param pPciDev The PCI device structure.
1892 * If NULL the default PCI device for this device instance is used.
1893 * @param pfnRead Pointer to the user defined PCI config read function.
1894 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1895 * PCI config read function. This way, user can decide when (and if)
1896 * to call default PCI config read function. Can be NULL.
1897 * @param pfnWrite Pointer to the user defined PCI config write function.
1898 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1899 * PCI config write function. This way, user can decide when (and if)
1900 * to call default PCI config write function. Can be NULL.
1901 * @thread EMT
1902 */
1903 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1904 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1905
1906 /**
1907 * Set the IRQ for a PCI device.
1908 *
1909 * @param pDevIns Device instance.
1910 * @param iIrq IRQ number to set.
1911 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1912 * @thread Any thread, but will involve the emulation thread.
1913 */
1914 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1915
1916 /**
1917 * Set the IRQ for a PCI device, but don't wait for EMT to process
1918 * the request when not called from EMT.
1919 *
1920 * @param pDevIns Device instance.
1921 * @param iIrq IRQ number to set.
1922 * @param iLevel IRQ level.
1923 * @thread Any thread, but will involve the emulation thread.
1924 */
1925 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1926
1927 /**
1928 * Set ISA IRQ for a device.
1929 *
1930 * @param pDevIns Device instance.
1931 * @param iIrq IRQ number to set.
1932 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1933 * @thread Any thread, but will involve the emulation thread.
1934 */
1935 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1936
1937 /**
1938 * Set the ISA IRQ for a device, but don't wait for EMT to process
1939 * the request when not called from EMT.
1940 *
1941 * @param pDevIns Device instance.
1942 * @param iIrq IRQ number to set.
1943 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1944 * @thread Any thread, but will involve the emulation thread.
1945 */
1946 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1947
1948 /**
1949 * Attaches a driver (chain) to the device.
1950 *
1951 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1952 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1953 *
1954 * @returns VBox status code.
1955 * @param pDevIns Device instance.
1956 * @param iLun The logical unit to attach.
1957 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1958 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1959 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1960 * for the live of the device instance.
1961 */
1962 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1963
1964 /**
1965 * Allocate memory which is associated with current VM instance
1966 * and automatically freed on it's destruction.
1967 *
1968 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1969 * @param pDevIns Device instance.
1970 * @param cb Number of bytes to allocate.
1971 */
1972 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1973
1974 /**
1975 * Allocate memory which is associated with current VM instance
1976 * and automatically freed on it's destruction. The memory is ZEROed.
1977 *
1978 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1979 * @param pDevIns Device instance.
1980 * @param cb Number of bytes to allocate.
1981 */
1982 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1983
1984 /**
1985 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1986 *
1987 * @param pDevIns Device instance.
1988 * @param pv Pointer to the memory to free.
1989 */
1990 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1991
1992 /**
1993 * Set the VM error message
1994 *
1995 * @returns rc.
1996 * @param pDevIns Device instance.
1997 * @param rc VBox status code.
1998 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1999 * @param pszFormat Error message format string.
2000 * @param ... Error message arguments.
2001 */
2002 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2003
2004 /**
2005 * Set the VM error message
2006 *
2007 * @returns rc.
2008 * @param pDevIns Device instance.
2009 * @param rc VBox status code.
2010 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2011 * @param pszFormat Error message format string.
2012 * @param va Error message arguments.
2013 */
2014 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2015
2016 /**
2017 * Set the VM runtime error message
2018 *
2019 * @returns VBox status code.
2020 * @param pDevIns Device instance.
2021 * @param fFatal Whether it is a fatal error or not.
2022 * @param pszErrorID Error ID string.
2023 * @param pszFormat Error message format string.
2024 * @param ... Error message arguments.
2025 */
2026 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2027
2028 /**
2029 * Set the VM runtime error message
2030 *
2031 * @returns VBox status code.
2032 * @param pDevIns Device instance.
2033 * @param fFatal Whether it is a fatal error or not.
2034 * @param pszErrorID Error ID string.
2035 * @param pszFormat Error message format string.
2036 * @param va Error message arguments.
2037 */
2038 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2039
2040 /**
2041 * Assert that the current thread is the emulation thread.
2042 *
2043 * @returns True if correct.
2044 * @returns False if wrong.
2045 * @param pDevIns Device instance.
2046 * @param pszFile Filename of the assertion location.
2047 * @param iLine The linenumber of the assertion location.
2048 * @param pszFunction Function of the assertion location.
2049 */
2050 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2051
2052 /**
2053 * Assert that the current thread is NOT the emulation thread.
2054 *
2055 * @returns True if correct.
2056 * @returns False if wrong.
2057 * @param pDevIns Device instance.
2058 * @param pszFile Filename of the assertion location.
2059 * @param iLine The linenumber of the assertion location.
2060 * @param pszFunction Function of the assertion location.
2061 */
2062 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2063
2064 /**
2065 * Stops the VM and enters the debugger to look at the guest state.
2066 *
2067 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2068 * invoking this function directly.
2069 *
2070 * @returns VBox status code which must be passed up to the VMM.
2071 * @param pDevIns Device instance.
2072 * @param pszFile Filename of the assertion location.
2073 * @param iLine The linenumber of the assertion location.
2074 * @param pszFunction Function of the assertion location.
2075 * @param pszFormat Message. (optional)
2076 * @param args Message parameters.
2077 */
2078 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2079
2080 /**
2081 * Register a info handler with DBGF,
2082 *
2083 * @returns VBox status code.
2084 * @param pDevIns Device instance.
2085 * @param pszName The identifier of the info.
2086 * @param pszDesc The description of the info and any arguments the handler may take.
2087 * @param pfnHandler The handler function to be called to display the info.
2088 */
2089 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2090
2091 /**
2092 * Registers a statistics sample if statistics are enabled.
2093 *
2094 * @param pDevIns Device instance of the DMA.
2095 * @param pvSample Pointer to the sample.
2096 * @param enmType Sample type. This indicates what pvSample is pointing at.
2097 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2098 * Further nesting is possible.
2099 * @param enmUnit Sample unit.
2100 * @param pszDesc Sample description.
2101 */
2102 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2103
2104 /**
2105 * Same as pfnSTAMRegister except that the name is specified in a
2106 * RTStrPrintf like fashion.
2107 *
2108 * @returns VBox status.
2109 * @param pDevIns Device instance of the DMA.
2110 * @param pvSample Pointer to the sample.
2111 * @param enmType Sample type. This indicates what pvSample is pointing at.
2112 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2113 * @param enmUnit Sample unit.
2114 * @param pszDesc Sample description.
2115 * @param pszName The sample name format string.
2116 * @param ... Arguments to the format string.
2117 */
2118 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2119 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2120
2121 /**
2122 * Same as pfnSTAMRegister except that the name is specified in a
2123 * RTStrPrintfV like fashion.
2124 *
2125 * @returns VBox status.
2126 * @param pDevIns Device instance of the DMA.
2127 * @param pvSample Pointer to the sample.
2128 * @param enmType Sample type. This indicates what pvSample is pointing at.
2129 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2130 * @param enmUnit Sample unit.
2131 * @param pszDesc Sample description.
2132 * @param pszName The sample name format string.
2133 * @param args Arguments to the format string.
2134 */
2135 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2136 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2137
2138 /**
2139 * Register the RTC device.
2140 *
2141 * @returns VBox status code.
2142 * @param pDevIns Device instance.
2143 * @param pRtcReg Pointer to a RTC registration structure.
2144 * @param ppRtcHlp Where to store the pointer to the helper functions.
2145 */
2146 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2147
2148 /**
2149 * Create a queue.
2150 *
2151 * @returns VBox status code.
2152 * @param pDevIns The device instance.
2153 * @param cbItem The size of a queue item.
2154 * @param cItems The number of items in the queue.
2155 * @param cMilliesInterval The number of milliseconds between polling the queue.
2156 * If 0 then the emulation thread will be notified whenever an item arrives.
2157 * @param pfnCallback The consumer function.
2158 * @param fGCEnabled Set if the queue should work in GC too.
2159 * @param ppQueue Where to store the queue handle on success.
2160 * @thread The emulation thread.
2161 */
2162 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2163 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2164
2165 /**
2166 * Initializes a PDM critical section.
2167 *
2168 * The PDM critical sections are derived from the IPRT critical sections, but
2169 * works in GC as well.
2170 *
2171 * @returns VBox status code.
2172 * @param pDevIns Device instance.
2173 * @param pCritSect Pointer to the critical section.
2174 * @param pszName The name of the critical section (for statistics).
2175 */
2176 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2177
2178 /**
2179 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2180 *
2181 * @returns pTime.
2182 * @param pDevIns Device instance.
2183 * @param pTime Where to store the time.
2184 */
2185 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2186
2187 /**
2188 * Creates a PDM thread.
2189 *
2190 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2191 * resuming, and destroying the thread as the VM state changes.
2192 *
2193 * @returns VBox status code.
2194 * @param pDevIns The device instance.
2195 * @param ppThread Where to store the thread 'handle'.
2196 * @param pvUser The user argument to the thread function.
2197 * @param pfnThread The thread function.
2198 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2199 * a state change is pending.
2200 * @param cbStack See RTThreadCreate.
2201 * @param enmType See RTThreadCreate.
2202 * @param pszName See RTThreadCreate.
2203 */
2204 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2205 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2206
2207 /**
2208 * Convert a guest virtual address to a guest physical address.
2209 *
2210 * @returns VBox status code.
2211 * @param pDevIns Device instance.
2212 * @param GCPtr Guest virtual address.
2213 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2214 * @thread The emulation thread.
2215 * @remark Careful with page boundraries.
2216 */
2217 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2218
2219 /** Space reserved for future members.
2220 * @{ */
2221 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2222 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2223 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2224 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2225 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2226 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2227 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2228 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2229 /** @} */
2230
2231
2232 /** API available to trusted devices only.
2233 *
2234 * These APIs are providing unrestricted access to the guest and the VM,
2235 * or they are interacting intimately with PDM.
2236 *
2237 * @{
2238 */
2239 /**
2240 * Gets the VM handle. Restricted API.
2241 *
2242 * @returns VM Handle.
2243 * @param pDevIns Device instance.
2244 */
2245 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2246
2247 /**
2248 * Register the PCI Bus.
2249 *
2250 * @returns VBox status code.
2251 * @param pDevIns Device instance.
2252 * @param pPciBusReg Pointer to PCI bus registration structure.
2253 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2254 */
2255 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2256
2257 /**
2258 * Register the PIC device.
2259 *
2260 * @returns VBox status code.
2261 * @param pDevIns Device instance.
2262 * @param pPicReg Pointer to a PIC registration structure.
2263 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2266
2267 /**
2268 * Register the APIC device.
2269 *
2270 * @returns VBox status code.
2271 * @param pDevIns Device instance.
2272 * @param pApicReg Pointer to a APIC registration structure.
2273 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2274 */
2275 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2276
2277 /**
2278 * Register the I/O APIC device.
2279 *
2280 * @returns VBox status code.
2281 * @param pDevIns Device instance.
2282 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2283 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2284 */
2285 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2286
2287 /**
2288 * Register the DMA device.
2289 *
2290 * @returns VBox status code.
2291 * @param pDevIns Device instance.
2292 * @param pDmacReg Pointer to a DMAC registration structure.
2293 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2294 */
2295 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2296
2297 /**
2298 * Read physical memory.
2299 *
2300 * @param pDevIns Device instance.
2301 * @param GCPhys Physical address start reading from.
2302 * @param pvBuf Where to put the read bits.
2303 * @param cbRead How many bytes to read.
2304 * @thread Any thread, but the call may involve the emulation thread.
2305 */
2306 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2307
2308 /**
2309 * Write to physical memory.
2310 *
2311 * @param pDevIns Device instance.
2312 * @param GCPhys Physical address to write to.
2313 * @param pvBuf What to write.
2314 * @param cbWrite How many bytes to write.
2315 * @thread Any thread, but the call may involve the emulation thread.
2316 */
2317 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2318
2319 /**
2320 * Read guest physical memory by virtual address.
2321 *
2322 * @param pDevIns Device instance.
2323 * @param pvDst Where to put the read bits.
2324 * @param GCVirtSrc Guest virtual address to start reading from.
2325 * @param cb How many bytes to read.
2326 * @thread The emulation thread.
2327 */
2328 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2329
2330 /**
2331 * Write to guest physical memory by virtual address.
2332 *
2333 * @param pDevIns Device instance.
2334 * @param GCVirtDst Guest virtual address to write to.
2335 * @param pvSrc What to write.
2336 * @param cb How many bytes to write.
2337 * @thread The emulation thread.
2338 */
2339 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2340
2341 /**
2342 * Reserve physical address space for ROM and MMIO ranges.
2343 *
2344 * @returns VBox status code.
2345 * @param pDevIns Device instance.
2346 * @param GCPhys Start physical address.
2347 * @param cbRange The size of the range.
2348 * @param pszDesc Description string.
2349 * @thread The emulation thread.
2350 */
2351 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2352
2353 /**
2354 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2355 *
2356 * @returns VBox status code.
2357 * @param pDevIns Device instance.
2358 * @param GCPhys Start physical address.
2359 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2360 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2361 * @thread The emulation thread.
2362 *
2363 * @remark Careful with page boundraries.
2364 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2365 */
2366 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2367
2368 /**
2369 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2370 *
2371 * @returns VBox status code.
2372 * @param pDevIns Device instance.
2373 * @param GCPtr Guest virtual address.
2374 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2375 * @thread The emulation thread.
2376 *
2377 * @remark Careful with page boundraries.
2378 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2381
2382 /**
2383 * Checks if the Gate A20 is enabled or not.
2384 *
2385 * @returns true if A20 is enabled.
2386 * @returns false if A20 is disabled.
2387 * @param pDevIns Device instance.
2388 * @thread The emulation thread.
2389 */
2390 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2391
2392 /**
2393 * Enables or disables the Gate A20.
2394 *
2395 * @param pDevIns Device instance.
2396 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2397 * @thread The emulation thread.
2398 */
2399 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2400
2401 /**
2402 * Resets the VM.
2403 *
2404 * @returns The appropriate VBox status code to pass around on reset.
2405 * @param pDevIns Device instance.
2406 * @thread The emulation thread.
2407 */
2408 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2409
2410 /**
2411 * Suspends the VM.
2412 *
2413 * @returns The appropriate VBox status code to pass around on suspend.
2414 * @param pDevIns Device instance.
2415 * @thread The emulation thread.
2416 */
2417 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2418
2419 /**
2420 * Power off the VM.
2421 *
2422 * @returns The appropriate VBox status code to pass around on power off.
2423 * @param pDevIns Device instance.
2424 * @thread The emulation thread.
2425 */
2426 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2427
2428 /**
2429 * Acquire global VM lock
2430 *
2431 * @returns VBox status code
2432 * @param pDevIns Device instance.
2433 */
2434 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2435
2436 /**
2437 * Release global VM lock
2438 *
2439 * @returns VBox status code
2440 * @param pDevIns Device instance.
2441 */
2442 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2443
2444 /**
2445 * Check that the current thread owns the global VM lock.
2446 *
2447 * @returns boolean
2448 * @param pDevIns Device instance.
2449 * @param pszFile Filename of the assertion location.
2450 * @param iLine Linenumber of the assertion location.
2451 * @param pszFunction Function of the assertion location.
2452 */
2453 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2454
2455 /**
2456 * Register transfer function for DMA channel.
2457 *
2458 * @returns VBox status code.
2459 * @param pDevIns Device instance.
2460 * @param uChannel Channel number.
2461 * @param pfnTransferHandler Device specific transfer callback function.
2462 * @param pvUser User pointer to pass to the callback.
2463 * @thread EMT
2464 */
2465 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2466
2467 /**
2468 * Read memory.
2469 *
2470 * @returns VBox status code.
2471 * @param pDevIns Device instance.
2472 * @param uChannel Channel number.
2473 * @param pvBuffer Pointer to target buffer.
2474 * @param off DMA position.
2475 * @param cbBlock Block size.
2476 * @param pcbRead Where to store the number of bytes which was read. optional.
2477 * @thread EMT
2478 */
2479 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2480
2481 /**
2482 * Write memory.
2483 *
2484 * @returns VBox status code.
2485 * @param pDevIns Device instance.
2486 * @param uChannel Channel number.
2487 * @param pvBuffer Memory to write.
2488 * @param off DMA position.
2489 * @param cbBlock Block size.
2490 * @param pcbWritten Where to store the number of bytes which was written. optional.
2491 * @thread EMT
2492 */
2493 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2494
2495 /**
2496 * Set the DREQ line.
2497 *
2498 * @returns VBox status code.
2499 * @param pDevIns Device instance.
2500 * @param uChannel Channel number.
2501 * @param uLevel Level of the line.
2502 * @thread EMT
2503 */
2504 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2505
2506 /**
2507 * Get channel mode.
2508 *
2509 * @returns Channel mode. See specs.
2510 * @param pDevIns Device instance.
2511 * @param uChannel Channel number.
2512 * @thread EMT
2513 */
2514 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2515
2516 /**
2517 * Schedule DMA execution.
2518 *
2519 * @param pDevIns Device instance.
2520 * @thread Any thread.
2521 */
2522 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2523
2524 /**
2525 * Write CMOS value and update the checksum(s).
2526 *
2527 * @returns VBox status code.
2528 * @param pDevIns Device instance.
2529 * @param iReg The CMOS register index.
2530 * @param u8Value The CMOS register value.
2531 * @thread EMT
2532 */
2533 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2534
2535 /**
2536 * Read CMOS value.
2537 *
2538 * @returns VBox status code.
2539 * @param pDevIns Device instance.
2540 * @param iReg The CMOS register index.
2541 * @param pu8Value Where to store the CMOS register value.
2542 * @thread EMT
2543 */
2544 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2545
2546 /**
2547 * Query CPUID.
2548 *
2549 * @param pDevIns Device instance.
2550 * @param iLeaf The CPUID leaf to get.
2551 * @param pEax Where to store the EAX value.
2552 * @param pEbx Where to store the EBX value.
2553 * @param pEcx Where to store the ECX value.
2554 * @param pEdx Where to store the EDX value.
2555 */
2556 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2557
2558 /**
2559 * Write protects a shadow ROM mapping.
2560 *
2561 * This is intented for use by the system BIOS or by the device that
2562 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2563 * write protected once the POST is over.
2564 *
2565 * @param pDevIns Device instance.
2566 * @param GCPhysStart Where the shadow ROM mapping starts.
2567 * @param cbRange The size of the shadow ROM mapping.
2568 */
2569 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2570
2571 /** @} */
2572
2573 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2574 uint32_t u32TheEnd;
2575} PDMDEVHLP;
2576#endif /* !IN_RING3 */
2577/** Pointer PDM Device API. */
2578typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2579/** Pointer PDM Device API. */
2580typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2581
2582/** Current PDMDEVHLP version number. */
2583#define PDM_DEVHLP_VERSION 0xf2050000
2584
2585
2586/**
2587 * PDM Device API - GC Variant.
2588 */
2589typedef struct PDMDEVHLPGC
2590{
2591 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2592 uint32_t u32Version;
2593
2594 /**
2595 * Set the IRQ for a PCI device.
2596 *
2597 * @param pDevIns Device instance.
2598 * @param iIrq IRQ number to set.
2599 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2600 * @thread Any thread, but will involve the emulation thread.
2601 */
2602 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2603
2604 /**
2605 * Set ISA IRQ for a device.
2606 *
2607 * @param pDevIns Device instance.
2608 * @param iIrq IRQ number to set.
2609 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2610 * @thread Any thread, but will involve the emulation thread.
2611 */
2612 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2613
2614 /**
2615 * Read physical memory.
2616 *
2617 * @param pDevIns Device instance.
2618 * @param GCPhys Physical address start reading from.
2619 * @param pvBuf Where to put the read bits.
2620 * @param cbRead How many bytes to read.
2621 */
2622 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2623
2624 /**
2625 * Write to physical memory.
2626 *
2627 * @param pDevIns Device instance.
2628 * @param GCPhys Physical address to write to.
2629 * @param pvBuf What to write.
2630 * @param cbWrite How many bytes to write.
2631 */
2632 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2633
2634 /**
2635 * Checks if the Gate A20 is enabled or not.
2636 *
2637 * @returns true if A20 is enabled.
2638 * @returns false if A20 is disabled.
2639 * @param pDevIns Device instance.
2640 * @thread The emulation thread.
2641 */
2642 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2643
2644 /**
2645 * Set the VM error message
2646 *
2647 * @returns rc.
2648 * @param pDrvIns Driver instance.
2649 * @param rc VBox status code.
2650 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2651 * @param pszFormat Error message format string.
2652 * @param ... Error message arguments.
2653 */
2654 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2655
2656 /**
2657 * Set the VM error message
2658 *
2659 * @returns rc.
2660 * @param pDrvIns Driver instance.
2661 * @param rc VBox status code.
2662 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2663 * @param pszFormat Error message format string.
2664 * @param va Error message arguments.
2665 */
2666 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2667
2668 /**
2669 * Set the VM runtime error message
2670 *
2671 * @returns VBox status code.
2672 * @param pDevIns Device instance.
2673 * @param fFatal Whether it is a fatal error or not.
2674 * @param pszErrorID Error ID string.
2675 * @param pszFormat Error message format string.
2676 * @param ... Error message arguments.
2677 */
2678 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2679
2680 /**
2681 * Set the VM runtime error message
2682 *
2683 * @returns VBox status code.
2684 * @param pDevIns Device instance.
2685 * @param fFatal Whether it is a fatal error or not.
2686 * @param pszErrorID Error ID string.
2687 * @param pszFormat Error message format string.
2688 * @param va Error message arguments.
2689 */
2690 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2691
2692 /**
2693 * Set parameters for pending MMIO patch operation
2694 *
2695 * @returns VBox status code.
2696 * @param pDevIns Device instance.
2697 * @param GCPhys MMIO physical address
2698 * @param pCachedData GC pointer to cached data
2699 */
2700 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2701
2702 /** Just a safety precaution. */
2703 uint32_t u32TheEnd;
2704} PDMDEVHLPGC;
2705/** Pointer PDM Device GC API. */
2706typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2707/** Pointer PDM Device GC API. */
2708typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2709
2710/** Current PDMDEVHLP version number. */
2711#define PDM_DEVHLPGC_VERSION 0xfb010000
2712
2713
2714/**
2715 * PDM Device API - R0 Variant.
2716 */
2717typedef struct PDMDEVHLPR0
2718{
2719 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2720 uint32_t u32Version;
2721
2722 /**
2723 * Set the IRQ for a PCI device.
2724 *
2725 * @param pDevIns Device instance.
2726 * @param iIrq IRQ number to set.
2727 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2728 * @thread Any thread, but will involve the emulation thread.
2729 */
2730 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2731
2732 /**
2733 * Set ISA IRQ for a device.
2734 *
2735 * @param pDevIns Device instance.
2736 * @param iIrq IRQ number to set.
2737 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2738 * @thread Any thread, but will involve the emulation thread.
2739 */
2740 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2741
2742 /**
2743 * Read physical memory.
2744 *
2745 * @param pDevIns Device instance.
2746 * @param GCPhys Physical address start reading from.
2747 * @param pvBuf Where to put the read bits.
2748 * @param cbRead How many bytes to read.
2749 */
2750 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2751
2752 /**
2753 * Write to physical memory.
2754 *
2755 * @param pDevIns Device instance.
2756 * @param GCPhys Physical address to write to.
2757 * @param pvBuf What to write.
2758 * @param cbWrite How many bytes to write.
2759 */
2760 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2761
2762 /**
2763 * Checks if the Gate A20 is enabled or not.
2764 *
2765 * @returns true if A20 is enabled.
2766 * @returns false if A20 is disabled.
2767 * @param pDevIns Device instance.
2768 * @thread The emulation thread.
2769 */
2770 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2771
2772 /**
2773 * Set the VM error message
2774 *
2775 * @returns rc.
2776 * @param pDrvIns Driver instance.
2777 * @param rc VBox status code.
2778 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2779 * @param pszFormat Error message format string.
2780 * @param ... Error message arguments.
2781 */
2782 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2783
2784 /**
2785 * Set the VM error message
2786 *
2787 * @returns rc.
2788 * @param pDrvIns Driver instance.
2789 * @param rc VBox status code.
2790 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2791 * @param pszFormat Error message format string.
2792 * @param va Error message arguments.
2793 */
2794 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2795
2796 /**
2797 * Set the VM runtime error message
2798 *
2799 * @returns VBox status code.
2800 * @param pDevIns Device instance.
2801 * @param fFatal Whether it is a fatal error or not.
2802 * @param pszErrorID Error ID string.
2803 * @param pszFormat Error message format string.
2804 * @param ... Error message arguments.
2805 */
2806 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2807
2808 /**
2809 * Set the VM runtime error message
2810 *
2811 * @returns VBox status code.
2812 * @param pDevIns Device instance.
2813 * @param fFatal Whether it is a fatal error or not.
2814 * @param pszErrorID Error ID string.
2815 * @param pszFormat Error message format string.
2816 * @param va Error message arguments.
2817 */
2818 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2819
2820 /**
2821 * Set parameters for pending MMIO patch operation
2822 *
2823 * @returns rc.
2824 * @param pDevIns Device instance.
2825 * @param GCPhys MMIO physical address
2826 * @param pCachedData GC pointer to cached data
2827 */
2828 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2829
2830 /** Just a safety precaution. */
2831 uint32_t u32TheEnd;
2832} PDMDEVHLPR0;
2833/** Pointer PDM Device R0 API. */
2834typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2835/** Pointer PDM Device GC API. */
2836typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2837
2838/** Current PDMDEVHLP version number. */
2839#define PDM_DEVHLPR0_VERSION 0xfb010000
2840
2841
2842
2843/**
2844 * PDM Device Instance.
2845 */
2846typedef struct PDMDEVINS
2847{
2848 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2849 uint32_t u32Version;
2850 /** Device instance number. */
2851 RTUINT iInstance;
2852 /** The base interface of the device.
2853 * The device constructor initializes this if it has any
2854 * device level interfaces to export. To obtain this interface
2855 * call PDMR3QueryDevice(). */
2856 PDMIBASE IBase;
2857
2858 /** Internal data. */
2859 union
2860 {
2861#ifdef PDMDEVINSINT_DECLARED
2862 PDMDEVINSINT s;
2863#endif
2864 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2865 } Internal;
2866
2867 /** Pointer the HC PDM Device API. */
2868 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2869 /** Pointer the R0 PDM Device API. */
2870 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2871 /** Pointer to device registration structure. */
2872 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2873 /** Configuration handle. */
2874 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2875 /** Pointer to device instance data. */
2876 R3PTRTYPE(void *) pvInstanceDataR3;
2877 /** Pointer to device instance data. */
2878 R0PTRTYPE(void *) pvInstanceDataR0;
2879 /** Pointer the GC PDM Device API. */
2880 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2881 /** Pointer to device instance data. */
2882 GCPTRTYPE(void *) pvInstanceDataGC;
2883 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2884 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2885 /** Device instance data. The size of this area is defined
2886 * in the PDMDEVREG::cbInstanceData field. */
2887 char achInstanceData[8];
2888} PDMDEVINS;
2889
2890/** Current DEVREG version number. */
2891#define PDM_DEVINS_VERSION 0xf3010000
2892
2893/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2894#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2895
2896
2897/** @def PDMDEV_ASSERT_EMT
2898 * Assert that the current thread is the emulation thread.
2899 */
2900#ifdef VBOX_STRICT
2901# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2902#else
2903# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2904#endif
2905
2906/** @def PDMDEV_ASSERT_OTHER
2907 * Assert that the current thread is NOT the emulation thread.
2908 */
2909#ifdef VBOX_STRICT
2910# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2911#else
2912# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2913#endif
2914
2915/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2916 * Assert that the current thread is owner of the VM lock.
2917 */
2918#ifdef VBOX_STRICT
2919# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2920#else
2921# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
2922#endif
2923
2924/** @def PDMDEV_SET_ERROR
2925 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
2926 */
2927#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
2928 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
2929
2930/** @def PDMDEV_SET_RUNTIME_ERROR
2931 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
2932 */
2933#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
2934 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
2935
2936/** @def PDMDEVINS_2_GCPTR
2937 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
2938 */
2939#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2940
2941/** @def PDMDEVINS_2_R3PTR
2942 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
2943 */
2944#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2945
2946/** @def PDMDEVINS_2_R0PTR
2947 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
2948 */
2949#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2950
2951
2952/**
2953 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
2954 *
2955 * @returns VBox status code which must be passed up to the VMM.
2956 * @param pDevIns Device instance.
2957 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2958 * @param pszFormat Message. (optional)
2959 * @param ... Message parameters.
2960 */
2961DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
2962{
2963#ifdef VBOX_STRICT
2964# ifdef IN_RING3
2965 int rc;
2966 va_list args;
2967 va_start(args, pszFormat);
2968 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
2969 va_end(args);
2970 return rc;
2971# else
2972 return VINF_EM_DBG_STOP;
2973# endif
2974#else
2975 return VINF_SUCCESS;
2976#endif
2977}
2978
2979
2980#ifdef IN_RING3
2981/**
2982 * @copydoc PDMDEVHLP::pfnIOPortRegister
2983 */
2984DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2985 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2986 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
2987{
2988 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
2989}
2990
2991/**
2992 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
2993 */
2994DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
2995 const char *pszOut, const char *pszIn, const char *pszOutStr,
2996 const char *pszInStr, const char *pszDesc)
2997{
2998 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2999}
3000
3001/**
3002 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
3003 */
3004DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3005 const char *pszOut, const char *pszIn, const char *pszOutStr,
3006 const char *pszInStr, const char *pszDesc)
3007{
3008 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3009}
3010
3011/**
3012 * @copydoc PDMDEVHLP::pfnMMIORegister
3013 */
3014DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3015 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3016 const char *pszDesc)
3017{
3018 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3019}
3020
3021/**
3022 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
3023 */
3024DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3025 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
3026{
3027 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
3028}
3029
3030/**
3031 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3032 */
3033DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3034 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
3035{
3036 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
3037}
3038
3039/**
3040 * @copydoc PDMDEVHLP::pfnROMRegister
3041 */
3042DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3043{
3044 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3045}
3046
3047/**
3048 * @copydoc PDMDEVHLP::pfnROMProtectShadow
3049 */
3050DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3051{
3052 return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3053}
3054
3055/**
3056 * @copydoc PDMDEVHLP::pfnSSMRegister
3057 */
3058DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3059 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3060 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3061{
3062 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3063 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3064 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3065}
3066
3067/**
3068 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3069 */
3070DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3071{
3072 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3073}
3074
3075/**
3076 * @copydoc PDMDEVHLP::pfnPCIRegister
3077 */
3078DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3079{
3080 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3081}
3082
3083/**
3084 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3085 */
3086DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3087{
3088 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3089}
3090
3091/**
3092 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3093 */
3094DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3095 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3096{
3097 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3098}
3099
3100/**
3101 * @copydoc PDMDEVHLP::pfnDriverAttach
3102 */
3103DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3104{
3105 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3106}
3107
3108/**
3109 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3110 */
3111DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3112{
3113 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3114}
3115
3116/**
3117 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3118 */
3119DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3120{
3121 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3122}
3123
3124/**
3125 * @copydoc PDMDEVHLP::pfnMMHeapFree
3126 */
3127DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3128{
3129 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3130}
3131
3132/**
3133 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3134 */
3135DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3136{
3137 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3138}
3139
3140/**
3141 * @copydoc PDMDEVHLP::pfnSTAMRegister
3142 */
3143DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3144{
3145 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3146}
3147
3148/**
3149 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3150 */
3151DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3152 const char *pszDesc, const char *pszName, ...)
3153{
3154 va_list va;
3155 va_start(va, pszName);
3156 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3157 va_end(va);
3158}
3159
3160/**
3161 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3162 */
3163DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3164 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3165{
3166 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3167}
3168
3169/**
3170 * @copydoc PDMDEVHLP::pfnCritSectInit
3171 */
3172DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3173{
3174 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3175}
3176
3177/**
3178 * @copydoc PDMDEVHLP::pfnUTCNow
3179 */
3180DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3181{
3182 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3183}
3184
3185/**
3186 * @copydoc PDMDEVHLP::pfnGetVM
3187 */
3188DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3189{
3190 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3191}
3192
3193/**
3194 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3195 */
3196DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3197{
3198 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3199}
3200
3201/**
3202 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3203 */
3204DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3205{
3206 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3207}
3208
3209/**
3210 * @copydoc PDMDEVHLP::pfnPhysReserve
3211 */
3212DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3213{
3214 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3215}
3216
3217/**
3218 * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
3219 */
3220DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3221{
3222 return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3223}
3224
3225/**
3226 * @copydoc PDMDEVHLP::pfnA20Set
3227 */
3228DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3229{
3230 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3231}
3232
3233/**
3234 * @copydoc PDMDEVHLP::pfnVMReset
3235 */
3236DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3237{
3238 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3239}
3240
3241/**
3242 * @copydoc PDMDEVHLP::pfnVMSuspend
3243 */
3244DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3245{
3246 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3247}
3248
3249/**
3250 * @copydoc PDMDEVHLP::pfnVMPowerOff
3251 */
3252DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3253{
3254 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3255}
3256
3257/**
3258 * @copydoc PDMDEVHLP::pfnDMARegister
3259 */
3260DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3261{
3262 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3263}
3264
3265/**
3266 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3267 */
3268DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3269{
3270 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3271}
3272
3273/**
3274 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3275 */
3276DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3277{
3278 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3279}
3280
3281/**
3282 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3283 */
3284DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3285{
3286 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3287}
3288
3289/**
3290 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3291 */
3292DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3293{
3294 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3295}
3296
3297/**
3298 * @copydoc PDMDEVHLP::pfnDMASchedule
3299 */
3300DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3301{
3302 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3303}
3304
3305/**
3306 * @copydoc PDMDEVHLP::pfnCMOSWrite
3307 */
3308DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3309{
3310 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3311}
3312
3313/**
3314 * @copydoc PDMDEVHLP::pfnCMOSRead
3315 */
3316DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3317{
3318 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3319}
3320
3321/**
3322 * @copydoc PDMDEVHLP::pfnGetCpuId
3323 */
3324DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3325{
3326 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3327}
3328
3329/**
3330 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3331 */
3332DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3333 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3334{
3335 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3336}
3337#endif /* IN_RING3 */
3338
3339
3340/**
3341 * @copydoc PDMDEVHLP::pfnPCISetIrq
3342 */
3343DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3344{
3345#ifdef IN_GC
3346 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3347#elif defined(IN_RING0)
3348 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3349#else
3350 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3351#endif
3352}
3353
3354/**
3355 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3356 */
3357DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3358{
3359#ifdef IN_GC
3360 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3361#elif defined(IN_RING0)
3362 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3363#else
3364 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3365#endif
3366}
3367
3368/**
3369 * @copydoc PDMDEVHLP::pfnISASetIrq
3370 */
3371DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3372{
3373#ifdef IN_GC
3374 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3375#elif defined(IN_RING0)
3376 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3377#else
3378 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3379#endif
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3384 */
3385DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3386{
3387#ifdef IN_GC
3388 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3389#elif defined(IN_RING0)
3390 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3391#else
3392 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3393#endif
3394}
3395
3396/**
3397 * @copydoc PDMDEVHLP::pfnPhysRead
3398 */
3399DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3400{
3401#ifdef IN_GC
3402 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3403#elif defined(IN_RING0)
3404 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3405#else
3406 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3407#endif
3408}
3409
3410/**
3411 * @copydoc PDMDEVHLP::pfnPhysWrite
3412 */
3413DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3414{
3415#ifdef IN_GC
3416 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3417#elif defined(IN_RING0)
3418 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3419#else
3420 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3421#endif
3422}
3423
3424/**
3425 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3426 */
3427DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3428{
3429#ifdef IN_GC
3430 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3431#elif defined(IN_RING0)
3432 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3433#else
3434 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3435#endif
3436}
3437
3438/**
3439 * @copydoc PDMDEVHLP::pfnVMSetError
3440 */
3441DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3442{
3443 va_list va;
3444 va_start(va, pszFormat);
3445#ifdef IN_GC
3446 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3447#elif defined(IN_RING0)
3448 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3449#else
3450 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3451#endif
3452 va_end(va);
3453 return rc;
3454}
3455
3456/**
3457 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3458 */
3459DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3460{
3461 va_list va;
3462 int rc;
3463 va_start(va, pszFormat);
3464#ifdef IN_GC
3465 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3466#elif defined(IN_RING0)
3467 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3468#else
3469 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3470#endif
3471 va_end(va);
3472 return rc;
3473}
3474
3475
3476
3477/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3478typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3479
3480/**
3481 * Callbacks for VBoxDeviceRegister().
3482 */
3483typedef struct PDMDEVREGCB
3484{
3485 /** Interface version.
3486 * This is set to PDM_DEVREG_CB_VERSION. */
3487 uint32_t u32Version;
3488
3489 /**
3490 * Registers a device with the current VM instance.
3491 *
3492 * @returns VBox status code.
3493 * @param pCallbacks Pointer to the callback table.
3494 * @param pDevReg Pointer to the device registration record.
3495 * This data must be permanent and readonly.
3496 */
3497 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3498
3499 /**
3500 * Allocate memory which is associated with current VM instance
3501 * and automatically freed on it's destruction.
3502 *
3503 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3504 * @param pCallbacks Pointer to the callback table.
3505 * @param cb Number of bytes to allocate.
3506 */
3507 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3508} PDMDEVREGCB;
3509
3510/** Current version of the PDMDEVREGCB structure. */
3511#define PDM_DEVREG_CB_VERSION 0xf4010000
3512
3513
3514/**
3515 * The VBoxDevicesRegister callback function.
3516 *
3517 * PDM will invoke this function after loading a device module and letting
3518 * the module decide which devices to register and how to handle conflicts.
3519 *
3520 * @returns VBox status code.
3521 * @param pCallbacks Pointer to the callback table.
3522 * @param u32Version VBox version number.
3523 */
3524typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3525
3526/** @} */
3527
3528__END_DECLS
3529
3530#endif
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