1 | %define VMX_VMCS_GUEST_FIELD_ES 0800h
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2 | %define VMX_VMCS_GUEST_FIELD_CS 0802h
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3 | %define VMX_VMCS_GUEST_FIELD_SS 0804h
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4 | %define VMX_VMCS_GUEST_FIELD_DS 0806h
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5 | %define VMX_VMCS_GUEST_FIELD_FS 0808h
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6 | %define VMX_VMCS_GUEST_FIELD_GS 080Ah
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7 | %define VMX_VMCS_GUEST_FIELD_LDTR 080Ch
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8 | %define VMX_VMCS_GUEST_FIELD_TR 080Eh
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9 | %define VMX_VMCS_HOST_FIELD_ES 0C00h
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10 | %define VMX_VMCS_HOST_FIELD_CS 0C02h
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11 | %define VMX_VMCS_HOST_FIELD_SS 0C04h
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12 | %define VMX_VMCS_HOST_FIELD_DS 0C06h
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13 | %define VMX_VMCS_HOST_FIELD_FS 0C08h
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14 | %define VMX_VMCS_HOST_FIELD_GS 0C0Ah
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15 | %define VMX_VMCS_HOST_FIELD_TR 0C0Ch
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16 | %define VMX_VMCS_CTRL_IO_BITMAP_A_FULL 02000h
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17 | %define VMX_VMCS_CTRL_IO_BITMAP_A_HIGH 02001h
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18 | %define VMX_VMCS_CTRL_IO_BITMAP_B_FULL 02002h
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19 | %define VMX_VMCS_CTRL_IO_BITMAP_B_HIGH 02003h
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20 | %define VMX_VMCS_CTRL_MSR_BITMAP_FULL 02004h
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21 | %define VMX_VMCS_CTRL_MSR_BITMAP_HIGH 02005h
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22 | %define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL 02006h
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23 | %define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_HIGH 02007h
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24 | %define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL 02008h
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25 | %define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH 02009h
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26 | %define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL 0200Ah
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27 | %define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_HIGH 0200Bh
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28 | %define VMX_VMCS_CTRL_EXEC_VMCS_PTR_FULL 0200Ch
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29 | %define VMX_VMCS_CTRL_EXEC_VMCS_PTR_HIGH 0200Dh
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30 | %define VMX_VMCS_CTRL_TSC_OFFSET_FULL 02010h
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31 | %define VMX_VMCS_CTRL_TSC_OFFSET_HIGH 02011h
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32 | %define VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL 02012h
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33 | %define VMX_VMCS_CTRL_VAPIC_PAGEADDR_HIGH 02013h
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34 | %define VMX_VMCS_GUEST_LINK_PTR_FULL 02800h
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35 | %define VMX_VMCS_GUEST_LINK_PTR_HIGH 02801h
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36 | %define VMX_VMCS_GUEST_DEBUGCTL_FULL 02802h
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37 | %define VMX_VMCS_GUEST_DEBUGCTL_HIGH 02803h
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38 | %define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS 04000h
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39 | %define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS 04002h
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40 | %define VMX_VMCS_CTRL_EXCEPTION_BITMAP 04004h
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41 | %define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MASK 04006h
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42 | %define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MATCH 04008h
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43 | %define VMX_VMCS_CTRL_CR3_TARGET_COUNT 0400Ah
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44 | %define VMX_VMCS_CTRL_EXIT_CONTROLS 0400Ch
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45 | %define VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT 0400Eh
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46 | %define VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT 04010h
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47 | %define VMX_VMCS_CTRL_ENTRY_CONTROLS 04012h
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48 | %define VMX_VMCS_CTRL_ENTRY_MSR_LOAD_COUNT 04014h
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49 | %define VMX_VMCS_CTRL_ENTRY_IRQ_INFO 04016h
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50 | %define VMX_VMCS_CTRL_ENTRY_EXCEPTION_ERRCODE 04018h
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51 | %define VMX_VMCS_CTRL_ENTRY_INSTR_LENGTH 0401Ah
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52 | %define VMX_VMCS_CTRL_TRP_TRESHOLD 0401Ch
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53 | %define VMX_VMCS_RO_VM_INSTR_ERROR 04400h
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54 | %define VMX_VMCS_RO_EXIT_REASON 04402h
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55 | %define VMX_VMCS_RO_EXIT_INTERRUPTION_INFO 04404h
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56 | %define VMX_VMCS_RO_EXIT_INTERRUPTION_ERRCODE 04406h
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57 | %define VMX_VMCS_RO_IDT_INFO 04408h
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58 | %define VMX_VMCS_RO_IDT_ERRCODE 0440Ah
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59 | %define VMX_VMCS_RO_EXIT_INSTR_LENGTH 0440Ch
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60 | %define VMX_VMCS_RO_EXIT_INSTR_INFO 0440Eh
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61 | %define VMX_VMCS_GUEST_ES_LIMIT 04800h
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62 | %define VMX_VMCS_GUEST_CS_LIMIT 04802h
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63 | %define VMX_VMCS_GUEST_SS_LIMIT 04804h
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64 | %define VMX_VMCS_GUEST_DS_LIMIT 04806h
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65 | %define VMX_VMCS_GUEST_FS_LIMIT 04808h
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66 | %define VMX_VMCS_GUEST_GS_LIMIT 0480Ah
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67 | %define VMX_VMCS_GUEST_LDTR_LIMIT 0480Ch
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68 | %define VMX_VMCS_GUEST_TR_LIMIT 0480Eh
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69 | %define VMX_VMCS_GUEST_GDTR_LIMIT 04810h
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70 | %define VMX_VMCS_GUEST_IDTR_LIMIT 04812h
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71 | %define VMX_VMCS_GUEST_ES_ACCESS_RIGHTS 04814h
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72 | %define VMX_VMCS_GUEST_CS_ACCESS_RIGHTS 04816h
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73 | %define VMX_VMCS_GUEST_SS_ACCESS_RIGHTS 04818h
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74 | %define VMX_VMCS_GUEST_DS_ACCESS_RIGHTS 0481Ah
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75 | %define VMX_VMCS_GUEST_FS_ACCESS_RIGHTS 0481Ch
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76 | %define VMX_VMCS_GUEST_GS_ACCESS_RIGHTS 0481Eh
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77 | %define VMX_VMCS_GUEST_LDTR_ACCESS_RIGHTS 04820h
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78 | %define VMX_VMCS_GUEST_TR_ACCESS_RIGHTS 04822h
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79 | %define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE 04824h
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80 | %define VMX_VMCS_GUEST_ACTIVITY_STATE 04826h
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81 | %define VMX_VMCS_GUEST_SYSENTER_CS 0482Ah
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82 | %define VMX_VMCS_CTRL_CR0_MASK 06000h
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83 | %define VMX_VMCS_CTRL_CR4_MASK 06002h
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84 | %define VMX_VMCS_CTRL_CR0_READ_SHADOW 06004h
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85 | %define VMX_VMCS_CTRL_CR4_READ_SHADOW 06006h
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86 | %define VMX_VMCS_CTRL_CR3_TARGET_VAL0 06008h
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87 | %define VMX_VMCS_CTRL_CR3_TARGET_VAL1 0600Ah
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88 | %define VMX_VMCS_CTRL_CR3_TARGET_VAL2 0600Ch
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89 | %define VMX_VMCS_CTRL_CR3_TARGET_VAL31 0600Eh
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90 | %define VMX_VMCS_RO_EXIT_QUALIFICATION 06400h
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91 | %define VMX_VMCS_RO_IO_RCX 06402h
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92 | %define VMX_VMCS_RO_IO_RSX 06404h
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93 | %define VMX_VMCS_RO_IO_RDI 06406h
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94 | %define VMX_VMCS_RO_IO_RIP 06408h
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95 | %define VMX_VMCS_GUEST_LINEAR_ADDR 0640Ah
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96 | %define VMX_VMCS_GUEST_CR0 06800h
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97 | %define VMX_VMCS_GUEST_CR3 06802h
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98 | %define VMX_VMCS_GUEST_CR4 06804h
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99 | %define VMX_VMCS_GUEST_ES_BASE 06806h
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100 | %define VMX_VMCS_GUEST_CS_BASE 06808h
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101 | %define VMX_VMCS_GUEST_SS_BASE 0680Ah
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102 | %define VMX_VMCS_GUEST_DS_BASE 0680Ch
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103 | %define VMX_VMCS_GUEST_FS_BASE 0680Eh
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104 | %define VMX_VMCS_GUEST_GS_BASE 06810h
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105 | %define VMX_VMCS_GUEST_LDTR_BASE 06812h
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106 | %define VMX_VMCS_GUEST_TR_BASE 06814h
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107 | %define VMX_VMCS_GUEST_GDTR_BASE 06816h
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108 | %define VMX_VMCS_GUEST_IDTR_BASE 06818h
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109 | %define VMX_VMCS_GUEST_DR7 0681Ah
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110 | %define VMX_VMCS_GUEST_RSP 0681Ch
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111 | %define VMX_VMCS_GUEST_RIP 0681Eh
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112 | %define VMX_VMCS_GUEST_RFLAGS 06820h
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113 | %define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS 06822h
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114 | %define VMX_VMCS_GUEST_SYSENTER_ESP 06824h
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115 | %define VMX_VMCS_GUEST_SYSENTER_EIP 06826h
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116 | %define VMX_VMCS_HOST_CR0 06C00h
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117 | %define VMX_VMCS_HOST_CR3 06C02h
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118 | %define VMX_VMCS_HOST_CR4 06C04h
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119 | %define VMX_VMCS_HOST_FS_BASE 06C06h
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120 | %define VMX_VMCS_HOST_GS_BASE 06C08h
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121 | %define VMX_VMCS_HOST_TR_BASE 06C0Ah
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122 | %define VMX_VMCS_HOST_GDTR_BASE 06C0Ch
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123 | %define VMX_VMCS_HOST_IDTR_BASE 06C0Eh
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124 | %define VMX_VMCS_HOST_SYSENTER_ESP 06C10h
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125 | %define VMX_VMCS_HOST_SYSENTER_EIP 06C12h
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126 | %define VMX_VMCS_HOST_RSP 06C14h
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127 | %define VMX_VMCS_HOST_RIP 06C16h
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