disopcode.h@ 62855

Last change on this file since 62855 was 61135, checked in by vboxsync, 9 years ago
DISGetParamSize fixes; corrected movlpd and cvtps2dq disassembly table entries.
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File size: 22.4 KB

Line
1	/** @file
2	* Disassembler - Opcodes
3	*/
4
5	/*
6	* Copyright (C) 2006-2016 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_disopcode_h
27	#define ___VBox_disopcode_h
28
29	#include <iprt/assert.h>
30
31	#define MODRM_MOD(a) (a>>6)
32	#define MODRM_REG(a) ((a>>3)&0x7)
33	#define MODRM_RM(a) (a&0x7)
34	#define MAKE_MODRM(mod, reg, rm) (((mod&3) << 6) \| ((reg&7) << 3) \| (rm&7))
35
36	#define SIB_SCALE(a) (a>>6)
37	#define SIB_INDEX(a) ((a>>3)&0x7)
38	#define SIB_BASE(a) (a&0x7)
39
40
41	/** @defgroup grp_dis_opcodes Opcodes (DISOPCODE::uOpCode)
42	* @ingroup grp_dis
43	* @{
44	*/
45	enum OPCODES
46	{
47	/** @name Full Intel X86 opcode list
48	* @{ */
49	OP_INVALID = 0,
50	OP_OPSIZE,
51	OP_ADDRSIZE,
52	OP_SEG,
53	OP_REPNE,
54	OP_REPE,
55	OP_REX,
56	OP_LOCK,
57	#ifndef IN_SLICKEDIT
58	OP_LAST_PREFIX = OP_LOCK, /*< Last prefix for disassembler. /
59	#else
60	OP_LAST_PREFIX = 7, /*< Last prefix for disassembler. /
61	#endif
62	OP_AND,
63	OP_OR,
64	OP_DAA,
65	OP_SUB,
66	OP_DAS,
67	OP_XOR,
68	OP_AAA,
69	OP_CMP,
70	OP_IMM_GRP1,
71	OP_AAS,
72	OP_INC,
73	OP_DEC,
74	OP_PUSHA,
75	OP_POPA,
76	OP_BOUND,
77	OP_ARPL,
78	OP_PUSH,
79	OP_POP,
80	OP_IMUL,
81	OP_INSB,
82	OP_INSWD,
83	OP_OUTSB,
84	OP_OUTSWD,
85	OP_JO,
86	OP_JNO,
87	OP_JC,
88	OP_JNC,
89	OP_JE,
90	OP_JNE,
91	OP_JBE,
92	OP_JNBE,
93	OP_JS,
94	OP_JNS,
95	OP_JP,
96	OP_JNP,
97	OP_JL,
98	OP_JNL,
99	OP_JLE,
100	OP_JNLE,
101	OP_ADD,
102	OP_TEST,
103	OP_XCHG,
104	OP_MOV,
105	OP_LEA,
106	OP_NOP,
107	OP_CBW,
108	OP_CWD,
109	OP_CALL,
110	OP_WAIT,
111	OP_PUSHF,
112	OP_POPF,
113	OP_SAHF,
114	OP_LAHF,
115	OP_MOVSB,
116	OP_MOVSWD,
117	OP_CMPSB,
118	OP_CMPWD,
119	OP_STOSB,
120	OP_STOSWD,
121	OP_LODSB,
122	OP_LODSWD,
123	OP_SCASB,
124	OP_SCASWD,
125	OP_SHIFT_GRP2,
126	OP_RETN,
127	OP_LES,
128	OP_LDS,
129	OP_ENTER,
130	OP_LEAVE,
131	OP_RETF,
132	OP_INT3,
133	OP_INT,
134	OP_INTO,
135	OP_IRET,
136	OP_AAM,
137	OP_AAD,
138	OP_XLAT,
139	OP_ESCF0,
140	OP_ESCF1,
141	OP_ESCF2,
142	OP_ESCF3,
143	OP_ESCF4,
144	OP_ESCF5,
145	OP_ESCF6,
146	OP_ESCF7,
147	OP_LOOPNE,
148	OP_LOOPE,
149	OP_LOOP,
150	OP_JECXZ,
151	OP_IN,
152	OP_OUT,
153	OP_JMP,
154	OP_2B_ESC,
155	OP_ADC,
156	OP_SBB,
157	OP_HLT,
158	OP_CMC,
159	OP_UNARY_GRP3,
160	OP_CLC,
161	OP_STC,
162	OP_CLI,
163	OP_STI,
164	OP_CLD,
165	OP_STD,
166	OP_INC_GRP4,
167	OP_IND_GRP5,
168	OP_GRP6,
169	OP_GRP7,
170	OP_LAR,
171	OP_LSL,
172	OP_SYSCALL,
173	OP_CLTS,
174	OP_SYSRET,
175	OP_INVD,
176	OP_WBINVD,
177	OP_ILLUD2,
178	OP_FEMMS,
179	OP_3DNOW,
180	OP_MOVUPS,
181	OP_MOVLPS,
182	OP_UNPCKLPS,
183	OP_MOVHPS,
184	OP_UNPCKHPS,
185	OP_PREFETCH_GRP16,
186	OP_MOV_CR,
187	OP_MOVAPS,
188	OP_CVTPI2PS,
189	OP_MOVNTPS,
190	OP_CVTTPS2PI,
191	OP_CVTPS2PI,
192	OP_UCOMISS,
193	OP_COMISS,
194	OP_WRMSR,
195	OP_RDTSC,
196	OP_RDMSR,
197	OP_RDPMC,
198	OP_SYSENTER,
199	OP_SYSEXIT,
200	OP_GETSEC,
201	OP_PAUSE,
202	OP_CMOVO,
203	OP_CMOVNO,
204	OP_CMOVC,
205	OP_CMOVNC,
206	OP_CMOVZ,
207	OP_CMOVNZ,
208	OP_CMOVBE,
209	OP_CMOVNBE,
210	OP_CMOVS,
211	OP_CMOVNS,
212	OP_CMOVP,
213	OP_CMOVNP,
214	OP_CMOVL,
215	OP_CMOVNL,
216	OP_CMOVLE,
217	OP_CMOVNLE,
218	OP_MOVMSKPS,
219	OP_SQRTPS,
220	OP_RSQRTPS,
221	OP_RCPPS,
222	OP_ANDPS,
223	OP_ANDNPS,
224	OP_ORPS,
225	OP_XORPS,
226	OP_ADDPS,
227	OP_MULPS,
228	OP_CVTPS2PD,
229	OP_CVTDQ2PS,
230	OP_SUBPS,
231	OP_MINPS,
232	OP_DIVPS,
233	OP_MAXPS,
234	OP_PUNPCKLBW,
235	OP_PUNPCKLWD,
236	OP_PUNPCKLDQ,
237	OP_PACKSSWB,
238	OP_PCMPGTB,
239	OP_PCMPGTW,
240	OP_PCMPGTD,
241	OP_PCMPGTQ,
242	OP_PACKUSWB,
243	OP_PUNPCKHBW,
244	OP_PUNPCKHWD,
245	OP_PUNPCKHDQ,
246	OP_PACKSSDW,
247	OP_MOVD,
248	OP_MOVQ,
249	OP_PSHUFW,
250	OP_3B_ESC4,
251	OP_3B_ESC5,
252	OP_PCMPEQB,
253	OP_PCMPEQW,
254	OP_PCMPEQD,
255	OP_PCMPEQQ,
256	OP_SETO,
257	OP_SETNO,
258	OP_SETC,
259	OP_SETNC,
260	OP_SETE,
261	OP_SETNE,
262	OP_SETBE,
263	OP_SETNBE,
264	OP_SETS,
265	OP_SETNS,
266	OP_SETP,
267	OP_SETNP,
268	OP_SETL,
269	OP_SETNL,
270	OP_SETLE,
271	OP_SETNLE,
272	OP_CPUID,
273	OP_BT,
274	OP_SHLD,
275	OP_RSM,
276	OP_BTS,
277	OP_SHRD,
278	OP_GRP15,
279	OP_CMPXCHG,
280	OP_LSS,
281	OP_BTR,
282	OP_LFS,
283	OP_LGS,
284	OP_MOVZX,
285	OP_GRP10_INV,
286	OP_GRP8,
287	OP_BTC,
288	OP_BSF,
289	OP_BSR,
290	OP_MOVSX,
291	OP_XADD,
292	OP_CMPPS,
293	OP_MOVNTI,
294	OP_PINSRW,
295	OP_PEXTRW,
296	OP_SHUFPS,
297	OP_GRP9,
298	OP_BSWAP,
299	OP_ADDSUBPS,
300	OP_ADDSUBPD,
301	OP_PSRLW,
302	OP_PSRLD,
303	OP_PSRLQ,
304	OP_PADDQ,
305	OP_PMULLW,
306	OP_PMOVMSKB,
307	OP_PSUBUSB,
308	OP_PSUBUSW,
309	OP_PMINUB,
310	OP_PAND,
311	OP_PADDUSB,
312	OP_PADDUSW,
313	OP_PMAXUB,
314	OP_PANDN,
315	OP_PAVGB,
316	OP_PSRAW,
317	OP_PSRAD,
318	OP_PAVGW,
319	OP_PMULHUW,
320	OP_PMULHW,
321	OP_MOVNTQ,
322	OP_PSUBSB,
323	OP_PSUBSW,
324	OP_PMINSW,
325	OP_POR,
326	OP_PADDSB,
327	OP_PADDSW,
328	OP_PMAXSW,
329	OP_PXOR,
330	OP_LDDQU,
331	OP_PSLLW,
332	OP_PSLLD,
333	OP_PSSQ,
334	OP_PMULUDQ,
335	OP_PMADDWD,
336	OP_PSADBW,
337	OP_MASKMOVQ,
338	OP_PSUBB,
339	OP_PSUBW,
340	OP_PSUBD,
341	OP_PSUBQ,
342	OP_PADDB,
343	OP_PADDW,
344	OP_PADDD,
345	OP_MOVUPD,
346	OP_MOVLPD,
347	OP_UNPCKLPD,
348	OP_UNPCKHPD,
349	OP_MOVHPD,
350	OP_MOVAPD,
351	OP_CVTPI2PD,
352	OP_MOVNTPD,
353	OP_CVTTPD2PI,
354	OP_CVTPD2PI,
355	OP_UCOMISD,
356	OP_COMISD,
357	OP_MOVMSKPD,
358	OP_SQRTPD,
359	OP_ANDPD,
360	OP_ANDNPD,
361	OP_ORPD,
362	OP_XORPD,
363	OP_ADDPD,
364	OP_MULPD,
365	OP_CVTPD2PS,
366	OP_CVTPS2DQ,
367	OP_SUBPD,
368	OP_MINPD,
369	OP_DIVPD,
370	OP_MAXPD,
371	OP_GRP12,
372	OP_GRP13,
373	OP_GRP14,
374	OP_EMMS,
375	OP_MMX_UD78,
376	OP_MMX_UD79,
377	OP_MMX_UD7A,
378	OP_MMX_UD7B,
379	OP_MMX_UD7C,
380	OP_MMX_UD7D,
381	OP_PUNPCKLQDQ,
382	OP_PUNPCKHQDQ,
383	OP_MOVDQA,
384	OP_PSHUFD,
385	OP_CMPPD,
386	OP_SHUFPD,
387	OP_CVTTPD2DQ,
388	OP_MOVNTDQ,
389	OP_MOVNTDQA,
390	OP_PACKUSDW,
391	OP_PSHUFB,
392	OP_PHADDW,
393	OP_PHADDD,
394	OP_PHADDSW,
395	OP_HADDPS,
396	OP_HADDPD,
397	OP_PMADDUBSW,
398	OP_PHSUBW,
399	OP_PHSUBD,
400	OP_PHSUBSW,
401	OP_HSUBPS,
402	OP_HSUBPD,
403	OP_PSIGNB,
404	OP_PSIGNW,
405	OP_PSIGND,
406	OP_PMULHRSW,
407	OP_PERMILPS,
408	OP_PERMILPD,
409	OP_TESTPS,
410	OP_TESTPD,
411	OP_PBLENDVB,
412	OP_CVTPH2PS,
413	OP_BLENDVPS,
414	OP_BLENDVPD,
415	OP_PERMPS,
416	OP_PERMD,
417	OP_PTEST,
418	OP_BROADCASTSS,
419	OP_BROADCASTSD,
420	OP_BROADCASTF128,
421	OP_PABSB,
422	OP_PABSW,
423	OP_PABSD,
424	OP_PMOVSX,
425	OP_PMOVZX,
426	OP_PMULDQ,
427	OP_PMINSB,
428	OP_PMINSD,
429	OP_PMINUW,
430	OP_PMINUD,
431	OP_PMAXSB,
432	OP_PMAXSD,
433	OP_PMAXUW,
434	OP_PMAXUD,
435	OP_PMULLD,
436	OP_PHMINPOSUW,
437	OP_PSRLVD,
438	OP_PSRAVD,
439	OP_PSLLVD,
440	OP_PBROADCASTD,
441	OP_PBROADCASTQ,
442	OP_PBROADCASTI128,
443	OP_PBROADCASTB,
444	OP_PBROADCASTW,
445	OP_PMASKMOVD,
446	OP_GATHER,
447	OP_FMADDSUB132PS,
448	OP_FMSUBADD132PS,
449	OP_FMADD132PS,
450	OP_FMADD132SS,
451	OP_FMSUB132PS,
452	OP_FMSUB132SS,
453	OP_FNMADD132PS,
454	OP_FNMADD132SS,
455	OP_FNMSUB132PS,
456	OP_FNMSUB132SS,
457	OP_FMADDSUB213PS,
458	OP_FMSUBADD213PS,
459	OP_FMADD213PS,
460	OP_FMADD213SS,
461	OP_FMSUB213PS,
462	OP_FMSUB213SS,
463	OP_FNMADD213PS,
464	OP_FNMADD213SS,
465	OP_FNMSUB213PS,
466	OP_FNMSUB213SS,
467	OP_FMADDSUB231PS,
468	OP_FMSUBADD231PS,
469	OP_FMADD231PS,
470	OP_FMADD231SS,
471	OP_FMSUB231PS,
472	OP_FMSUB231SS,
473	OP_FNMADD231PS,
474	OP_FNMADD231SS,
475	OP_FNMSUB231PS,
476	OP_FNMSUB231SS,
477	OP_AESIMC,
478	OP_AESENC,
479	OP_AESENCLAST,
480	OP_AESDEC,
481	OP_AESDECLAST,
482	OP_MOVBEGM,
483	OP_MOVBEMG,
484	OP_CRC32GDEB,
485	OP_CRC32GDEY,
486	OP_POPCNT,
487	OP_TZCNT,
488	OP_LZCNT,
489	OP_ADCX,
490	OP_ADOX,
491	OP_ANDN,
492	OP_BZHI,
493	OP_BEXTR,
494	OP_PEXT,
495	OP_SARX,
496	OP_PDEP,
497	OP_SHRX,
498	OP_MULX,
499	OP_MASKMOVDQU,
500	OP_MASKMOVPS,
501	OP_MASKMOVPD,
502	OP_MOVSD,
503	OP_CVTSI2SD,
504	OP_CVTTSD2SI,
505	OP_CVTSD2SI,
506	OP_SQRTSD,
507	OP_ADDSD,
508	OP_MULSD,
509	OP_CVTSD2SS,
510	OP_SUBSD,
511	OP_MINSD,
512	OP_DIVSD,
513	OP_MAXSD,
514	OP_PSHUFLW,
515	OP_CMPSD,
516	OP_MOVDQ2Q,
517	OP_CVTPD2DQ,
518	OP_MOVSS,
519	OP_MOVSLDUP,
520	OP_MOVDDUP,
521	OP_MOVSHDUP,
522	OP_CVTSI2SS,
523	OP_CVTTSS2SI,
524	OP_CVTSS2SI,
525	OP_CVTSS2SD,
526	OP_SQRTSS,
527	OP_RSQRTSS,
528	OP_RCPSS,
529	OP_ADDSS,
530	OP_MULSS,
531	OP_CVTTPS2DQ,
532	OP_SUBSS,
533	OP_MINSS,
534	OP_DIVSS,
535	OP_MAXSS,
536	OP_MOVDQU,
537	OP_PSHUFHW,
538	OP_CMPSS,
539	OP_MOVQ2DQ,
540	OP_CVTDQ2PD,
541	OP_PERMQ,
542	OP_PERMPD,
543	OP_PBLENDD,
544	OP_PERM2F128,
545	OP_ROUNDPS,
546	OP_ROUNDPD,
547	OP_ROUNDSS,
548	OP_ROUNDSD,
549	OP_BLENDPS,
550	OP_BLENDPD,
551	OP_PBLENDW,
552	OP_PALIGNR,
553	OP_PEXTRB,
554	OP_PEXTRD,
555	OP_EXTRACTPS,
556	OP_INSERTF128,
557	OP_EXTRACTF128,
558	OP_CVTPS2PH,
559	OP_PINSRB,
560	OP_PINSRD,
561	OP_INSERTPS,
562	OP_INSERTI128,
563	OP_EXTRACTI128,
564	OP_DPPS,
565	OP_DPPD,
566	OP_MPSADBW,
567	OP_PCLMULQDQ,
568	OP_PERM2I128,
569	OP_PCMPESTRM,
570	OP_PCMPESTRI,
571	OP_PCMPISTRM,
572	OP_PCMPISTRI,
573	OP_AESKEYGEN,
574	OP_RORX,
575	OP_VEX3B,
576	OP_VEX2B,
577	/** @} */
578
579	/** @name Floating point ops
580	* @{ */
581	OP_FADD,
582	OP_FMUL,
583	OP_FCOM,
584	OP_FCOMP,
585	OP_FSUB,
586	OP_FSUBR,
587	OP_FDIV,
588	OP_FDIVR,
589	OP_FLD,
590	OP_FST,
591	OP_FSTP,
592	OP_FLDENV,
593	OP_FSTENV,
594	OP_FSTCW,
595	OP_FXCH,
596	OP_FNOP,
597	OP_FCHS,
598	OP_FABS,
599	OP_FLD1,
600	OP_FLDL2T,
601	OP_FLDL2E,
602	OP_FLDPI,
603	OP_FLDLG2,
604	OP_FLDLN2,
605	OP_FLDZ,
606	OP_F2XM1,
607	OP_FYL2X,
608	OP_FPTAN,
609	OP_FPATAN,
610	OP_FXTRACT,
611	OP_FREM1,
612	OP_FDECSTP,
613	OP_FINCSTP,
614	OP_FPREM,
615	OP_FYL2XP1,
616	OP_FSQRT,
617	OP_FSINCOS,
618	OP_FRNDINT,
619	OP_FSCALE,
620	OP_FSIN,
621	OP_FCOS,
622	OP_FIADD,
623	OP_FIMUL,
624	OP_FISUB,
625	OP_FISUBR,
626	OP_FIDIV,
627	OP_FIDIVR,
628	OP_FCMOVB,
629	OP_FCMOVE,
630	OP_FCMOVBE,
631	OP_FCMOVU,
632	OP_FUCOMPP,
633	OP_FILD,
634	OP_FIST,
635	OP_FISTP,
636	OP_FCMOVNB,
637	OP_FCMOVNE,
638	OP_FCMOVNBE,
639	OP_FCMOVNU,
640	OP_FCLEX,
641	OP_FINIT,
642	OP_FUCOMI,
643	OP_FCOMI,
644	OP_FRSTOR,
645	OP_FSAVE,
646	OP_FNSTSW,
647	OP_FFREE,
648	OP_FUCOM,
649	OP_FUCOMP,
650	OP_FICOM,
651	OP_FICOMP,
652	OP_FADDP,
653	OP_FMULP,
654	OP_FCOMPP,
655	OP_FSUBRP,
656	OP_FSUBP,
657	OP_FDIVRP,
658	OP_FDIVP,
659	OP_FBLD,
660	OP_FBSTP,
661	OP_FCOMIP,
662	OP_FUCOMIP,
663	/** @} */
664
665	/** @name 3DNow!
666	* @{ */
667	OP_PI2FW,
668	OP_PI2FD,
669	OP_PF2IW,
670	OP_PF2ID,
671	OP_PFPNACC,
672	OP_PFCMPGE,
673	OP_PFMIN,
674	OP_PFRCP,
675	OP_PFRSQRT,
676	OP_PFSUB,
677	OP_PFADD,
678	OP_PFCMPGT,
679	OP_PFMAX,
680	OP_PFRCPIT1,
681	OP_PFRSQRTIT1,
682	OP_PFSUBR,
683	OP_PFACC,
684	OP_PFCMPEQ,
685	OP_PFMUL,
686	OP_PFRCPIT2,
687	OP_PFMULHRW,
688	OP_PFSWAPD,
689	OP_PAVGUSB,
690	OP_PFNACC,
691	OP_ROL,
692	OP_ROR,
693	OP_RCL,
694	OP_RCR,
695	OP_SHL,
696	OP_SHR,
697	OP_SAR,
698	OP_NOT,
699	OP_NEG,
700	OP_MUL,
701	OP_DIV,
702	OP_IDIV,
703	OP_SLDT,
704	OP_STR,
705	OP_LLDT,
706	OP_LTR,
707	OP_VERR,
708	OP_VERW,
709	OP_SGDT,
710	OP_LGDT,
711	OP_SIDT,
712	OP_LIDT,
713	OP_SMSW,
714	OP_LMSW,
715	OP_INVLPG,
716	OP_CMPXCHG8B,
717	OP_PSLLQ,
718	OP_PSRLDQ,
719	OP_PSLLDQ,
720	OP_FXSAVE,
721	OP_FXRSTOR,
722	OP_LDMXCSR,
723	OP_STMXCSR,
724	OP_LFENCE,
725	OP_MFENCE,
726	OP_SFENCE,
727	OP_PREFETCH,
728	OP_MONITOR,
729	OP_MWAIT,
730	OP_CLFLUSH,
731	OP_MOV_DR,
732	OP_MOV_TR,
733	OP_SWAPGS,
734	/** @} */
735	/** @name VT-x instructions
736	* @{ */
737	OP_VMREAD,
738	OP_VMWRITE,
739	OP_VMCALL,
740	OP_VMXON,
741	OP_VMXOFF,
742	OP_VMCLEAR,
743	OP_VMLAUNCH,
744	OP_VMRESUME,
745	OP_VMPTRLD,
746	OP_VMPTRST,
747	OP_INVEPT,
748	OP_INVVPID,
749	OP_INVPCID,
750	OP_VMFUNC,
751	/** @} */
752	/** @name AMD-V instructions
753	* @{ */
754	OP_VMMCALL,
755	OP_VMRUN,
756	OP_VMLOAD,
757	OP_VMSAVE,
758	OP_CLGI,
759	OP_STGI,
760	OP_INVLPGA,
761	OP_SKINIT,
762	/** @} */
763	/** @name 64 bits instruction
764	* @{ */
765	OP_MOVSXD
766	/** @} */
767	};
768	AssertCompile(OP_LOCK == 7);
769	/** @} */
770
771
772	/** @defgroup grp_dis_opparam Opcode parameters (DISOPCODE::fParam1,
773	* DISOPCODE::fParam2, DISOPCODE::fParam3)
774	* @ingroup grp_dis
775	* @{
776	*/
777
778	/**
779	* @remarks Register order is important for translations!!
780	*/
781	enum OP_PARM
782	{
783	OP_PARM_NONE,
784
785	OP_PARM_REG_EAX,
786	OP_PARM_REG_GEN32_START = OP_PARM_REG_EAX,
787	OP_PARM_REG_ECX,
788	OP_PARM_REG_EDX,
789	OP_PARM_REG_EBX,
790	OP_PARM_REG_ESP,
791	OP_PARM_REG_EBP,
792	OP_PARM_REG_ESI,
793	OP_PARM_REG_EDI,
794	OP_PARM_REG_GEN32_END = OP_PARM_REG_EDI,
795
796	OP_PARM_REG_ES,
797	OP_PARM_REG_SEG_START = OP_PARM_REG_ES,
798	OP_PARM_REG_CS,
799	OP_PARM_REG_SS,
800	OP_PARM_REG_DS,
801	OP_PARM_REG_FS,
802	OP_PARM_REG_GS,
803	OP_PARM_REG_SEG_END = OP_PARM_REG_GS,
804
805	OP_PARM_REG_AX,
806	OP_PARM_REG_GEN16_START = OP_PARM_REG_AX,
807	OP_PARM_REG_CX,
808	OP_PARM_REG_DX,
809	OP_PARM_REG_BX,
810	OP_PARM_REG_SP,
811	OP_PARM_REG_BP,
812	OP_PARM_REG_SI,
813	OP_PARM_REG_DI,
814	OP_PARM_REG_GEN16_END = OP_PARM_REG_DI,
815
816	OP_PARM_REG_AL,
817	OP_PARM_REG_GEN8_START = OP_PARM_REG_AL,
818	OP_PARM_REG_CL,
819	OP_PARM_REG_DL,
820	OP_PARM_REG_BL,
821	OP_PARM_REG_AH,
822	OP_PARM_REG_CH,
823	OP_PARM_REG_DH,
824	OP_PARM_REG_BH,
825	OP_PARM_REG_GEN8_END = OP_PARM_REG_BH,
826
827	OP_PARM_REGFP_0,
828	OP_PARM_REG_FP_START = OP_PARM_REGFP_0,
829	OP_PARM_REGFP_1,
830	OP_PARM_REGFP_2,
831	OP_PARM_REGFP_3,
832	OP_PARM_REGFP_4,
833	OP_PARM_REGFP_5,
834	OP_PARM_REGFP_6,
835	OP_PARM_REGFP_7,
836	OP_PARM_REG_FP_END = OP_PARM_REGFP_7,
837
838	OP_PARM_NTA,
839	OP_PARM_T0,
840	OP_PARM_T1,
841	OP_PARM_T2,
842	OP_PARM_1,
843
844	OP_PARM_REX,
845	OP_PARM_REX_START = OP_PARM_REX,
846	OP_PARM_REX_B,
847	OP_PARM_REX_X,
848	OP_PARM_REX_XB,
849	OP_PARM_REX_R,
850	OP_PARM_REX_RB,
851	OP_PARM_REX_RX,
852	OP_PARM_REX_RXB,
853	OP_PARM_REX_W,
854	OP_PARM_REX_WB,
855	OP_PARM_REX_WX,
856	OP_PARM_REX_WXB,
857	OP_PARM_REX_WR,
858	OP_PARM_REX_WRB,
859	OP_PARM_REX_WRX,
860	OP_PARM_REX_WRXB,
861
862	OP_PARM_REG_RAX,
863	OP_PARM_REG_GEN64_START = OP_PARM_REG_RAX,
864	OP_PARM_REG_RCX,
865	OP_PARM_REG_RDX,
866	OP_PARM_REG_RBX,
867	OP_PARM_REG_RSP,
868	OP_PARM_REG_RBP,
869	OP_PARM_REG_RSI,
870	OP_PARM_REG_RDI,
871	OP_PARM_REG_R8,
872	OP_PARM_REG_R9,
873	OP_PARM_REG_R10,
874	OP_PARM_REG_R11,
875	OP_PARM_REG_R12,
876	OP_PARM_REG_R13,
877	OP_PARM_REG_R14,
878	OP_PARM_REG_R15,
879	OP_PARM_REG_GEN64_END = OP_PARM_REG_R15
880	};
881
882	/*
883	* Note! We don't document anything here if we can help it, because it we love
884	* wasting other peoples time figuring out crypting crap. The new VEX
885	* stuff of course uphelds this vexing tradition. Aaaaaaaaaaaaaaaaaaarg!
886	*/
887
888	#define OP_PARM_VTYPE(a) ((unsigned)a & 0xFE0)
889	#define OP_PARM_VSUBTYPE(a) ((unsigned)a & 0x01F)
890
891	#define OP_PARM_A 0x100
892	#define OP_PARM_VARIABLE OP_PARM_A
893	#define OP_PARM_E 0x120
894	#define OP_PARM_F 0x140
895	#define OP_PARM_G 0x160
896	#define OP_PARM_I 0x180
897	#define OP_PARM_J 0x1A0
898	#define OP_PARM_M 0x1C0
899	#define OP_PARM_O 0x1E0
900	#define OP_PARM_R 0x200
901	#define OP_PARM_X 0x220
902	#define OP_PARM_Y 0x240
903
904	/* Grouped rare parameters for optimization purposes */
905	#define IS_OP_PARM_RARE(a) ((a & 0xF00) >= 0x300)
906	#define OP_PARM_C 0x300 /* control register */
907	#define OP_PARM_D 0x320 /* debug register */
908	#define OP_PARM_S 0x340 /* segment register */
909	#define OP_PARM_T 0x360 /* test register */
910	#define OP_PARM_Q 0x380
911	#define OP_PARM_P 0x3A0 /* mmx register */
912	#define OP_PARM_W 0x3C0 /* xmm register */
913	#define OP_PARM_V 0x3E0
914	#define OP_PARM_U 0x400 /* The R/M field of the ModR/M byte selects XMM/YMM register. */
915	#define OP_PARM_B 0x420 /* VEX.vvvv field select general purpose register. */
916	#define OP_PARM_H 0x440
917	#define OP_PARM_L 0x460
918
919	#define OP_PARM_NONE 0
920	#define OP_PARM_a 0x1 /*< Operand to bound instruction. /
921	#define OP_PARM_b 0x2 /*< Byte (always). /
922	#define OP_PARM_d 0x3 /*< Double word (always). /
923	#define OP_PARM_dq 0x4 /*< Double quad word (always). /
924	#define OP_PARM_p 0x5 /*< Far pointer (subject to opsize). /
925	#define OP_PARM_pd 0x6 /*< 128-bit or 256-bit double precision floating point data. /
926	#define OP_PARM_pi 0x7 /*< Quad word MMX register. /
927	#define OP_PARM_ps 0x8 /*< 128-bit or 256-bit single precision floating point data. /
928	#define OP_PARM_q 0xA /*< Quad word (always). /
929	#define OP_PARM_s 0xB /*< Descriptor table size (SIDT/LIDT/SGDT/LGDT). /
930	#define OP_PARM_sd 0xC /*< Scalar element of 128-bit double precision floating point data. /
931	#define OP_PARM_ss 0xD /*< Scalar element of 128-bit single precision floating point data. /
932	#define OP_PARM_v 0xE /*< Word, double word, or quad word depending on opsize. /
933	#define OP_PARM_w 0xF /*< Word (always). /
934	#define OP_PARM_x 0x10 /*< Double quad word (dq) or quad quad word (qq) depending on opsize. /
935	#define OP_PARM_y 0x11 /*< Double word or quad word depending on opsize. /
936	#define OP_PARM_z 0x12 /*< Word (16-bit opsize) or double word (32-bit/64-bit opsize). /
937	#define OP_PARM_qq 0x13 /*< Quad quad word. /
938
939
940	#define OP_PARM_Ap (OP_PARM_A+OP_PARM_p)
941	#define OP_PARM_By (OP_PARM_B+OP_PARM_y)
942	#define OP_PARM_Cd (OP_PARM_C+OP_PARM_d)
943	#define OP_PARM_Dd (OP_PARM_D+OP_PARM_d)
944	#define OP_PARM_Eb (OP_PARM_E+OP_PARM_b)
945	#define OP_PARM_Ed (OP_PARM_E+OP_PARM_d)
946	#define OP_PARM_Ep (OP_PARM_E+OP_PARM_p)
947	#define OP_PARM_Ev (OP_PARM_E+OP_PARM_v)
948	#define OP_PARM_Ew (OP_PARM_E+OP_PARM_w)
949	#define OP_PARM_Ey (OP_PARM_E+OP_PARM_y)
950	#define OP_PARM_Fv (OP_PARM_F+OP_PARM_v)
951	#define OP_PARM_Gb (OP_PARM_G+OP_PARM_b)
952	#define OP_PARM_Gd (OP_PARM_G+OP_PARM_d)
953	#define OP_PARM_Gv (OP_PARM_G+OP_PARM_v)
954	#define OP_PARM_Gw (OP_PARM_G+OP_PARM_w)
955	#define OP_PARM_Gy (OP_PARM_G+OP_PARM_y)
956	#define OP_PARM_Hq (OP_PARM_H+OP_PARM_q)
957	#define OP_PARM_Hps (OP_PARM_H+OP_PARM_ps)
958	#define OP_PARM_Hpd (OP_PARM_H+OP_PARM_pd)
959	#define OP_PARM_Hdq (OP_PARM_H+OP_PARM_dq)
960	#define OP_PARM_Hqq (OP_PARM_H+OP_PARM_qq)
961	#define OP_PARM_Hsd (OP_PARM_H+OP_PARM_sd)
962	#define OP_PARM_Hss (OP_PARM_H+OP_PARM_ss)
963	#define OP_PARM_Hx (OP_PARM_H+OP_PARM_x)
964	#define OP_PARM_Ib (OP_PARM_I+OP_PARM_b)
965	#define OP_PARM_Id (OP_PARM_I+OP_PARM_d)
966	#define OP_PARM_Iq (OP_PARM_I+OP_PARM_q)
967	#define OP_PARM_Iw (OP_PARM_I+OP_PARM_w)
968	#define OP_PARM_Iv (OP_PARM_I+OP_PARM_v)
969	#define OP_PARM_Iz (OP_PARM_I+OP_PARM_z)
970	#define OP_PARM_Jb (OP_PARM_J+OP_PARM_b)
971	#define OP_PARM_Jv (OP_PARM_J+OP_PARM_v)
972	#define OP_PARM_Ma (OP_PARM_M+OP_PARM_a)
973	#define OP_PARM_Mb (OP_PARM_M+OP_PARM_b)
974	#define OP_PARM_Mw (OP_PARM_M+OP_PARM_w)
975	#define OP_PARM_Md (OP_PARM_M+OP_PARM_d)
976	#define OP_PARM_Mp (OP_PARM_M+OP_PARM_p)
977	#define OP_PARM_Mq (OP_PARM_M+OP_PARM_q)
978	#define OP_PARM_Mdq (OP_PARM_M+OP_PARM_dq)
979	#define OP_PARM_Ms (OP_PARM_M+OP_PARM_s)
980	#define OP_PARM_Mx (OP_PARM_M+OP_PARM_x)
981	#define OP_PARM_My (OP_PARM_M+OP_PARM_y)
982	#define OP_PARM_Mps (OP_PARM_M+OP_PARM_ps)
983	#define OP_PARM_Mpd (OP_PARM_M+OP_PARM_pd)
984	#define OP_PARM_Ob (OP_PARM_O+OP_PARM_b)
985	#define OP_PARM_Ov (OP_PARM_O+OP_PARM_v)
986	#define OP_PARM_Pq (OP_PARM_P+OP_PARM_q)
987	#define OP_PARM_Pd (OP_PARM_P+OP_PARM_d)
988	#define OP_PARM_Qd (OP_PARM_Q+OP_PARM_d)
989	#define OP_PARM_Qq (OP_PARM_Q+OP_PARM_q)
990	#define OP_PARM_Rd (OP_PARM_R+OP_PARM_d)
991	#define OP_PARM_Rw (OP_PARM_R+OP_PARM_w)
992	#define OP_PARM_Ry (OP_PARM_R+OP_PARM_y)
993	#define OP_PARM_Sw (OP_PARM_S+OP_PARM_w)
994	#define OP_PARM_Td (OP_PARM_T+OP_PARM_d)
995	#define OP_PARM_Ux (OP_PARM_U+OP_PARM_x)
996	#define OP_PARM_Vq (OP_PARM_V+OP_PARM_q)
997	#define OP_PARM_Vx (OP_PARM_V+OP_PARM_x)
998	#define OP_PARM_Vy (OP_PARM_V+OP_PARM_y)
999	#define OP_PARM_Wq (OP_PARM_W+OP_PARM_q)
1000	//#define OP_PARM_Ws (OP_PARM_W+OP_PARM_s) - wtf? Same as lgdt (OP_PARM_Ms)?
1001	#define OP_PARM_Wx (OP_PARM_W+OP_PARM_x)
1002	#define OP_PARM_Xb (OP_PARM_X+OP_PARM_b)
1003	#define OP_PARM_Xv (OP_PARM_X+OP_PARM_v)
1004	#define OP_PARM_Yb (OP_PARM_Y+OP_PARM_b)
1005	#define OP_PARM_Yv (OP_PARM_Y+OP_PARM_v)
1006
1007	#define OP_PARM_Vps (OP_PARM_V+OP_PARM_ps)
1008	#define OP_PARM_Vss (OP_PARM_V+OP_PARM_ss)
1009	#define OP_PARM_Vpd (OP_PARM_V+OP_PARM_pd)
1010	#define OP_PARM_Vdq (OP_PARM_V+OP_PARM_dq)
1011	#define OP_PARM_Wps (OP_PARM_W+OP_PARM_ps)
1012	#define OP_PARM_Wpd (OP_PARM_W+OP_PARM_pd)
1013	#define OP_PARM_Wss (OP_PARM_W+OP_PARM_ss)
1014	#define OP_PARM_Ww (OP_PARM_W+OP_PARM_w)
1015	#define OP_PARM_Wd (OP_PARM_W+OP_PARM_d)
1016	#define OP_PARM_Wq (OP_PARM_W+OP_PARM_q)
1017	#define OP_PARM_Wdq (OP_PARM_W+OP_PARM_dq)
1018	#define OP_PARM_Wqq (OP_PARM_W+OP_PARM_qq)
1019	#define OP_PARM_Ppi (OP_PARM_P+OP_PARM_pi)
1020	#define OP_PARM_Qpi (OP_PARM_Q+OP_PARM_pi)
1021	#define OP_PARM_Qdq (OP_PARM_Q+OP_PARM_dq)
1022	#define OP_PARM_Vsd (OP_PARM_V+OP_PARM_sd)
1023	#define OP_PARM_Wsd (OP_PARM_W+OP_PARM_sd)
1024	#define OP_PARM_Vqq (OP_PARM_V+OP_PARM_qq)
1025	#define OP_PARM_Pdq (OP_PARM_P+OP_PARM_dq)
1026	#define OP_PARM_Ups (OP_PARM_U+OP_PARM_ps)
1027	#define OP_PARM_Upd (OP_PARM_U+OP_PARM_pd)
1028	#define OP_PARM_Udq (OP_PARM_U+OP_PARM_dq)
1029	#define OP_PARM_Lx (OP_PARM_L+OP_PARM_x)
1030
1031	/** @} */
1032
1033	#endif
1034

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source: vbox/trunk/include/VBox/disopcode.h@ 62855

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