| 1 | /** @file
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| 2 | * Disassembler - Opcodes
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| 3 | */
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| 4 |
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| 5 | /*
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| 6 | * Copyright (C) 2023-2024 Oracle and/or its affiliates.
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| 7 | *
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| 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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| 10 | *
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| 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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| 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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| 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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| 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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| 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 34 | */
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| 35 |
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| 36 | #ifndef VBOX_INCLUDED_disopcode_armv8_h
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| 37 | #define VBOX_INCLUDED_disopcode_armv8_h
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| 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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| 41 |
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| 42 | #include <iprt/assert.h>
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| 43 |
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| 44 | /** @defgroup grp_dis_opcodes_armv8 Opcodes (DISOPCODE::uOpCode)
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| 45 | * @ingroup grp_dis
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| 46 | * @{
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| 47 | */
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| 48 | enum OPCODESARMV8
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| 49 | {
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| 50 | /** @name Full ARMv8 AArch64 opcode list.
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| 51 | * @{ */
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| 52 | OP_ARMV8_INVALID = 0,
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| 53 | OP_ARMV8_A64_ABS,
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| 54 | OP_ARMV8_A64_ADC,
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| 55 | OP_ARMV8_A64_ADCS,
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| 56 | OP_ARMV8_A64_ADD,
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| 57 | OP_ARMV8_A64_ADDG,
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| 58 | OP_ARMV8_A64_ADDS,
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| 59 | OP_ARMV8_A64_ADR,
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| 60 | OP_ARMV8_A64_ADRP,
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| 61 | OP_ARMV8_A64_AND,
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| 62 | OP_ARMV8_A64_ANDS,
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| 63 | OP_ARMV8_A64_ASR,
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| 64 | OP_ARMV8_A64_ASRV,
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| 65 | OP_ARMV8_A64_AT,
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| 66 | OP_ARMV8_A64_AUTDA,
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| 67 | OP_ARMV8_A64_AUTDZA,
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| 68 | OP_ARMV8_A64_AUTDB,
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| 69 | OP_ARMV8_A64_AUTDZB,
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| 70 | OP_ARMV8_A64_AUTIA,
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| 71 | OP_ARMV8_A64_AUTIA1716,
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| 72 | OP_ARMV8_A64_AUTIASP,
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| 73 | OP_ARMV8_A64_AUTIAZ,
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| 74 | OP_ARMV8_A64_AUTIZA,
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| 75 | OP_ARMV8_A64_AUTIB,
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| 76 | OP_ARMV8_A64_AUTIB1716,
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| 77 | OP_ARMV8_A64_AUTIBSP,
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| 78 | OP_ARMV8_A64_AUTIBZ,
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| 79 | OP_ARMV8_A64_AUTIZB,
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| 80 | OP_ARMV8_A64_AXFLAG,
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| 81 | OP_ARMV8_A64_B,
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| 82 | OP_ARMV8_A64_BC,
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| 83 | OP_ARMV8_A64_BFC,
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| 84 | OP_ARMV8_A64_BFI,
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| 85 | OP_ARMV8_A64_BFM,
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| 86 | OP_ARMV8_A64_BFXIL,
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| 87 | OP_ARMV8_A64_BIC,
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| 88 | OP_ARMV8_A64_BICS,
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| 89 | OP_ARMV8_A64_BL,
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| 90 | OP_ARMV8_A64_BLR,
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| 91 | OP_ARMV8_A64_BLRAA,
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| 92 | OP_ARMV8_A64_BLRAAZ,
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| 93 | OP_ARMV8_A64_BLRAB,
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| 94 | OP_ARMV8_A64_BLRABZ,
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| 95 | OP_ARMV8_A64_BR,
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| 96 | OP_ARMV8_A64_BRAA,
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| 97 | OP_ARMV8_A64_BRAAZ,
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| 98 | OP_ARMV8_A64_BRAB,
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| 99 | OP_ARMV8_A64_BRABZ,
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| 100 | OP_ARMV8_A64_BRB,
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| 101 | OP_ARMV8_A64_BRK,
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| 102 | OP_ARMV8_A64_BTI,
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| 103 | OP_ARMV8_A64_BTI_C,
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| 104 | OP_ARMV8_A64_BTI_J,
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| 105 | OP_ARMV8_A64_BTI_JC,
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| 106 | OP_ARMV8_A64_CASB,
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| 107 | OP_ARMV8_A64_CASAB,
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| 108 | OP_ARMV8_A64_CASALB,
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| 109 | OP_ARMV8_A64_CASLB,
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| 110 | OP_ARMV8_A64_CASH,
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| 111 | OP_ARMV8_A64_CASAH,
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| 112 | OP_ARMV8_A64_CASALH,
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| 113 | OP_ARMV8_A64_CASLH,
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| 114 | OP_ARMV8_A64_CASP,
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| 115 | OP_ARMV8_A64_CASPA,
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| 116 | OP_ARMV8_A64_CASPAL,
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| 117 | OP_ARMV8_A64_CASPL,
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| 118 | OP_ARMV8_A64_CAS,
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| 119 | OP_ARMV8_A64_CASA,
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| 120 | OP_ARMV8_A64_CASAL,
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| 121 | OP_ARMV8_A64_CASL,
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| 122 | OP_ARMV8_A64_CBNZ,
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| 123 | OP_ARMV8_A64_CBZ,
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| 124 | OP_ARMV8_A64_CCMN,
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| 125 | OP_ARMV8_A64_CCMP,
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| 126 | OP_ARMV8_A64_CFINV,
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| 127 | OP_ARMV8_A64_CFP,
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| 128 | OP_ARMV8_A64_CHKFEAT,
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| 129 | OP_ARMV8_A64_CINC,
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| 130 | OP_ARMV8_A64_CINV,
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| 131 | OP_ARMV8_A64_CLRBHB,
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| 132 | OP_ARMV8_A64_CLREX,
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| 133 | OP_ARMV8_A64_CLS,
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| 134 | OP_ARMV8_A64_CLZ,
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| 135 | OP_ARMV8_A64_CMN,
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| 136 | OP_ARMV8_A64_CMP,
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| 137 | OP_ARMV8_A64_CMPP,
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| 138 | OP_ARMV8_A64_CNEG,
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| 139 | OP_ARMV8_A64_CNT,
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| 140 | OP_ARMV8_A64_CPP,
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| 141 | /** @todo FEAT_MOPS instructions (CPYFP and friends). */
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| 142 | OP_ARMV8_A64_CRC32B,
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| 143 | OP_ARMV8_A64_CRC32H,
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| 144 | OP_ARMV8_A64_CRC32W,
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| 145 | OP_ARMV8_A64_CRC32X,
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| 146 | OP_ARMV8_A64_CRC32CB,
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| 147 | OP_ARMV8_A64_CRC32CH,
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| 148 | OP_ARMV8_A64_CRC32CW,
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| 149 | OP_ARMV8_A64_CRC32CX,
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| 150 | OP_ARMV8_A64_CSDB,
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| 151 | OP_ARMV8_A64_CSEL,
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| 152 | OP_ARMV8_A64_CSET,
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| 153 | OP_ARMV8_A64_CSETM,
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| 154 | OP_ARMV8_A64_CSINC,
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| 155 | OP_ARMV8_A64_CSNEG,
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| 156 | OP_ARMV8_A64_CTZ,
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| 157 | OP_ARMV8_A64_DC,
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| 158 | OP_ARMV8_A64_DCPS1,
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| 159 | OP_ARMV8_A64_DCPS2,
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| 160 | OP_ARMV8_A64_DCPS3,
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| 161 | OP_ARMV8_A64_DGH,
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| 162 | OP_ARMV8_A64_DMB,
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| 163 | OP_ARMV8_A64_DRPS,
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| 164 | OP_ARMV8_A64_DSB,
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| 165 | OP_ARMV8_A64_DVP,
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| 166 | OP_ARMV8_A64_EON,
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| 167 | OP_ARMV8_A64_EOR,
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| 168 | OP_ARMV8_A64_ERET,
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| 169 | OP_ARMV8_A64_ERETAA,
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| 170 | OP_ARMV8_A64_ERETAB,
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| 171 | OP_ARMV8_A64_ESB,
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| 172 | OP_ARMV8_A64_EXTR,
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| 173 | OP_ARMV8_A64_FABS,
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| 174 | OP_ARMV8_A64_FADD,
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| 175 | OP_ARMV8_A64_FCCMP,
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| 176 | OP_ARMV8_A64_FCCMPE,
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| 177 | OP_ARMV8_A64_FCMP,
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| 178 | OP_ARMV8_A64_FCMPE,
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| 179 | OP_ARMV8_A64_FCSEL,
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| 180 | OP_ARMV8_A64_FCVT,
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| 181 | OP_ARMV8_A64_FCVTZS,
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| 182 | OP_ARMV8_A64_FCVTZU,
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| 183 | OP_ARMV8_A64_FDIV,
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| 184 | OP_ARMV8_A64_FMADD,
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| 185 | OP_ARMV8_A64_FMAX,
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| 186 | OP_ARMV8_A64_FMAXNM,
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| 187 | OP_ARMV8_A64_FMIN,
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| 188 | OP_ARMV8_A64_FMINNM,
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| 189 | OP_ARMV8_A64_FMOV,
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| 190 | OP_ARMV8_A64_FMSUB,
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| 191 | OP_ARMV8_A64_FMUL,
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| 192 | OP_ARMV8_A64_FNEG,
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| 193 | OP_ARMV8_A64_FNMADD,
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| 194 | OP_ARMV8_A64_FNMSUB,
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| 195 | OP_ARMV8_A64_FNMUL,
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| 196 | OP_ARMV8_A64_FRINT32X,
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| 197 | OP_ARMV8_A64_FRINT32Z,
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| 198 | OP_ARMV8_A64_FRINT64X,
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| 199 | OP_ARMV8_A64_FRINT64Z,
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| 200 | OP_ARMV8_A64_FRINTA,
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| 201 | OP_ARMV8_A64_FRINTI,
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| 202 | OP_ARMV8_A64_FRINTM,
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| 203 | OP_ARMV8_A64_FRINTN,
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| 204 | OP_ARMV8_A64_FRINTP,
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| 205 | OP_ARMV8_A64_FRINTX,
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| 206 | OP_ARMV8_A64_FRINTZ,
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| 207 | OP_ARMV8_A64_FSQRT,
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| 208 | OP_ARMV8_A64_FSUB,
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| 209 | OP_ARMV8_A64_GCSB,
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| 210 | OP_ARMV8_A64_GMI,
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| 211 | OP_ARMV8_A64_HINT,
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| 212 | OP_ARMV8_A64_HLT,
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| 213 | OP_ARMV8_A64_HVC,
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| 214 | OP_ARMV8_A64_IC,
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| 215 | OP_ARMV8_A64_IRG,
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| 216 | OP_ARMV8_A64_ISB,
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| 217 | OP_ARMV8_A64_LD64B,
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| 218 | OP_ARMV8_A64_LDADDB,
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| 219 | OP_ARMV8_A64_LDADDAB,
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| 220 | OP_ARMV8_A64_LDADDALB,
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| 221 | OP_ARMV8_A64_LDADDLB,
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| 222 | OP_ARMV8_A64_LDADDH,
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| 223 | OP_ARMV8_A64_LDADDAH,
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| 224 | OP_ARMV8_A64_LDADDALH,
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| 225 | OP_ARMV8_A64_LDADDLH,
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| 226 | OP_ARMV8_A64_LDADD,
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| 227 | OP_ARMV8_A64_LDADDA,
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| 228 | OP_ARMV8_A64_LDADDAL,
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| 229 | OP_ARMV8_A64_LDADDL,
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| 230 | OP_ARMV8_A64_LDAPR,
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| 231 | OP_ARMV8_A64_LDAPRB,
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| 232 | OP_ARMV8_A64_LDAPRH,
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| 233 | OP_ARMV8_A64_LDAPUR,
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| 234 | OP_ARMV8_A64_LDAPURB,
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| 235 | OP_ARMV8_A64_LDAPURH,
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| 236 | OP_ARMV8_A64_LDAPURSB,
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| 237 | OP_ARMV8_A64_LDAPURSH,
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| 238 | OP_ARMV8_A64_LDAPURSW,
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| 239 | OP_ARMV8_A64_LDAR,
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| 240 | OP_ARMV8_A64_LDARB,
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| 241 | OP_ARMV8_A64_LDARH,
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| 242 | OP_ARMV8_A64_LDAXP,
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| 243 | OP_ARMV8_A64_LDAXRB,
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| 244 | OP_ARMV8_A64_LDAXRH,
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| 245 | OP_ARMV8_A64_LDCLRB,
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| 246 | OP_ARMV8_A64_LDCLRAB,
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| 247 | OP_ARMV8_A64_LDCLRALB,
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| 248 | OP_ARMV8_A64_LDCLRLB,
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| 249 | OP_ARMV8_A64_LDCLRH,
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| 250 | OP_ARMV8_A64_LDCLRAH,
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| 251 | OP_ARMV8_A64_LDCLRALH,
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| 252 | OP_ARMV8_A64_LDCLRLH,
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| 253 | OP_ARMV8_A64_LDCLR,
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| 254 | OP_ARMV8_A64_LDCLRA,
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| 255 | OP_ARMV8_A64_LDCLRAL,
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| 256 | OP_ARMV8_A64_LDCLRL,
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| 257 | OP_ARMV8_A64_LDEORB,
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| 258 | OP_ARMV8_A64_LDEORAB,
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| 259 | OP_ARMV8_A64_LDEORALB,
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| 260 | OP_ARMV8_A64_LDEORLB,
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| 261 | OP_ARMV8_A64_LDEORH,
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| 262 | OP_ARMV8_A64_LDEORAH,
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| 263 | OP_ARMV8_A64_LDEORALH,
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| 264 | OP_ARMV8_A64_LDEORLH,
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| 265 | OP_ARMV8_A64_LDEOR,
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| 266 | OP_ARMV8_A64_LDEORA,
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| 267 | OP_ARMV8_A64_LDEORAL,
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| 268 | OP_ARMV8_A64_LDEORL,
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| 269 | OP_ARMV8_A64_LDG,
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| 270 | OP_ARMV8_A64_LDGM,
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| 271 | OP_ARMV8_A64_LDLARB,
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| 272 | OP_ARMV8_A64_LDLARH,
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| 273 | OP_ARMV8_A64_LDLAR,
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| 274 | OP_ARMV8_A64_LDNP,
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| 275 | OP_ARMV8_A64_LDP,
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| 276 | OP_ARMV8_A64_LDPSW,
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| 277 | OP_ARMV8_A64_LDR,
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| 278 | OP_ARMV8_A64_LDRAA,
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| 279 | OP_ARMV8_A64_LDRAB,
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| 280 | OP_ARMV8_A64_LDRB,
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| 281 | OP_ARMV8_A64_LDRH,
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| 282 | OP_ARMV8_A64_LDRSB,
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| 283 | OP_ARMV8_A64_LDRSH,
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| 284 | OP_ARMV8_A64_LDRSW,
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| 285 | OP_ARMV8_A64_LDSETB,
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| 286 | OP_ARMV8_A64_LDSETAB,
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| 287 | OP_ARMV8_A64_LDSETALB,
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| 288 | OP_ARMV8_A64_LDSETLB,
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| 289 | OP_ARMV8_A64_LDSETH,
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| 290 | OP_ARMV8_A64_LDSETAH,
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| 291 | OP_ARMV8_A64_LDSETALH,
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| 292 | OP_ARMV8_A64_LDSETLH,
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| 293 | OP_ARMV8_A64_LDSET,
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| 294 | OP_ARMV8_A64_LDSETA,
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| 295 | OP_ARMV8_A64_LDSETAL,
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| 296 | OP_ARMV8_A64_LDSETL,
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| 297 | OP_ARMV8_A64_LDSMAB,
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| 298 | OP_ARMV8_A64_LDSMAXAB,
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| 299 | OP_ARMV8_A64_LDSMAXALB,
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| 300 | OP_ARMV8_A64_LDSMAXLB,
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| 301 | OP_ARMV8_A64_LDSMAXH,
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| 302 | OP_ARMV8_A64_LDSMAXAH,
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| 303 | OP_ARMV8_A64_LDSMAXALH,
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| 304 | OP_ARMV8_A64_LDSMAXLH,
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| 305 | OP_ARMV8_A64_LDSMAX,
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| 306 | OP_ARMV8_A64_LDSMAXA,
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| 307 | OP_ARMV8_A64_LDSMAXAL,
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| 308 | OP_ARMV8_A64_LDSMAXL,
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| 309 | OP_ARMV8_A64_LDSMINB,
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| 310 | OP_ARMV8_A64_LDSMINAB,
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| 311 | OP_ARMV8_A64_LDSMINALB,
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| 312 | OP_ARMV8_A64_LDSMINLB,
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| 313 | OP_ARMV8_A64_LDSMINH,
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| 314 | OP_ARMV8_A64_LDSMINAH,
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| 315 | OP_ARMV8_A64_LDSMINALH,
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| 316 | OP_ARMV8_A64_LDSMINLH,
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| 317 | OP_ARMV8_A64_LDSMIN,
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| 318 | OP_ARMV8_A64_LDSMINA,
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| 319 | OP_ARMV8_A64_LDSMINAL,
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| 320 | OP_ARMV8_A64_LDSMINL,
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| 321 | OP_ARMV8_A64_LDTR,
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| 322 | OP_ARMV8_A64_LDTRB,
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| 323 | OP_ARMV8_A64_LDTRH,
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| 324 | OP_ARMV8_A64_LDTRSB,
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| 325 | OP_ARMV8_A64_LDTRSH,
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| 326 | OP_ARMV8_A64_LDTRSW,
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| 327 | OP_ARMV8_A64_LDUMAXB,
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| 328 | OP_ARMV8_A64_LDUMAXAB,
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| 329 | OP_ARMV8_A64_LDUMAXALB,
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| 330 | OP_ARMV8_A64_LDUMAXLB,
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| 331 | OP_ARMV8_A64_LDUMAXH,
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| 332 | OP_ARMV8_A64_LDUMAXAH,
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| 333 | OP_ARMV8_A64_LDUMAXALH,
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| 334 | OP_ARMV8_A64_LDUMAXLH,
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| 335 | OP_ARMV8_A64_LDUMAX,
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| 336 | OP_ARMV8_A64_LDUMAXA,
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| 337 | OP_ARMV8_A64_LDUMAXAL,
|
|---|
| 338 | OP_ARMV8_A64_LDUMAXL,
|
|---|
| 339 | OP_ARMV8_A64_LDUMINB,
|
|---|
| 340 | OP_ARMV8_A64_LDUMINAB,
|
|---|
| 341 | OP_ARMV8_A64_LDUMINALB,
|
|---|
| 342 | OP_ARMV8_A64_LDUMINLB,
|
|---|
| 343 | OP_ARMV8_A64_LDUMINH,
|
|---|
| 344 | OP_ARMV8_A64_LDUMINAH,
|
|---|
| 345 | OP_ARMV8_A64_LDUMINALH,
|
|---|
| 346 | OP_ARMV8_A64_LDUMINLH,
|
|---|
| 347 | OP_ARMV8_A64_LDUMIN,
|
|---|
| 348 | OP_ARMV8_A64_LDUMINA,
|
|---|
| 349 | OP_ARMV8_A64_LDUMINAL,
|
|---|
| 350 | OP_ARMV8_A64_LDUMINL,
|
|---|
| 351 | OP_ARMV8_A64_LDUR,
|
|---|
| 352 | OP_ARMV8_A64_LDURB,
|
|---|
| 353 | OP_ARMV8_A64_LDURH,
|
|---|
| 354 | OP_ARMV8_A64_LDURSB,
|
|---|
| 355 | OP_ARMV8_A64_LDURSH,
|
|---|
| 356 | OP_ARMV8_A64_LDURSW,
|
|---|
| 357 | OP_ARMV8_A64_LDXP,
|
|---|
| 358 | OP_ARMV8_A64_LDXR,
|
|---|
| 359 | OP_ARMV8_A64_LDXRB,
|
|---|
| 360 | OP_ARMV8_A64_LDXRH,
|
|---|
| 361 | OP_ARMV8_A64_LSL,
|
|---|
| 362 | OP_ARMV8_A64_LSLV,
|
|---|
| 363 | OP_ARMV8_A64_LSR,
|
|---|
| 364 | OP_ARMV8_A64_LSRV,
|
|---|
| 365 | OP_ARMV8_A64_MADD,
|
|---|
| 366 | OP_ARMV8_A64_MNEG,
|
|---|
| 367 | OP_ARMV8_A64_MOV,
|
|---|
| 368 | OP_ARMV8_A64_MOVK,
|
|---|
| 369 | OP_ARMV8_A64_MOVN,
|
|---|
| 370 | OP_ARMV8_A64_MOVZ,
|
|---|
| 371 | OP_ARMV8_A64_MRS,
|
|---|
| 372 | OP_ARMV8_A64_MSR,
|
|---|
| 373 | OP_ARMV8_A64_MSUB,
|
|---|
| 374 | OP_ARMV8_A64_MUL,
|
|---|
| 375 | OP_ARMV8_A64_MVN,
|
|---|
| 376 | OP_ARMV8_A64_NEG,
|
|---|
| 377 | OP_ARMV8_A64_NEGS,
|
|---|
| 378 | OP_ARMV8_A64_NGC,
|
|---|
| 379 | OP_ARMV8_A64_NGCS,
|
|---|
| 380 | OP_ARMV8_A64_NOP,
|
|---|
| 381 | OP_ARMV8_A64_ORR,
|
|---|
| 382 | OP_ARMV8_A64_ORN,
|
|---|
| 383 | OP_ARMV8_A64_PACDA,
|
|---|
| 384 | OP_ARMV8_A64_PACDZA,
|
|---|
| 385 | OP_ARMV8_A64_PACDB,
|
|---|
| 386 | OP_ARMV8_A64_PACDZB,
|
|---|
| 387 | OP_ARMV8_A64_PACGA,
|
|---|
| 388 | OP_ARMV8_A64_PACIA,
|
|---|
| 389 | OP_ARMV8_A64_PACIA1716,
|
|---|
| 390 | OP_ARMV8_A64_PACIASP,
|
|---|
| 391 | OP_ARMV8_A64_PACIAZ,
|
|---|
| 392 | OP_ARMV8_A64_PACIZA,
|
|---|
| 393 | OP_ARMV8_A64_PACIB,
|
|---|
| 394 | OP_ARMV8_A64_PACIB1716,
|
|---|
| 395 | OP_ARMV8_A64_PACIBSP,
|
|---|
| 396 | OP_ARMV8_A64_PACIBZ,
|
|---|
| 397 | OP_ARMV8_A64_PACIBZB,
|
|---|
| 398 | OP_ARMV8_A64_PRFM,
|
|---|
| 399 | OP_ARMV8_A64_PRFUM,
|
|---|
| 400 | OP_ARMV8_A64_PSB,
|
|---|
| 401 | OP_ARMV8_A64_PSBSYNC,
|
|---|
| 402 | OP_ARMV8_A64_PSSBB,
|
|---|
| 403 | OP_ARMV8_A64_RBIT,
|
|---|
| 404 | OP_ARMV8_A64_RET,
|
|---|
| 405 | OP_ARMV8_A64_RETAA,
|
|---|
| 406 | OP_ARMV8_A64_RETAB,
|
|---|
| 407 | OP_ARMV8_A64_REV,
|
|---|
| 408 | OP_ARMV8_A64_REV16,
|
|---|
| 409 | OP_ARMV8_A64_REV32,
|
|---|
| 410 | OP_ARMV8_A64_RMIF,
|
|---|
| 411 | OP_ARMV8_A64_ROR,
|
|---|
| 412 | OP_ARMV8_A64_RORV,
|
|---|
| 413 | OP_ARMV8_A64_SB,
|
|---|
| 414 | OP_ARMV8_A64_SBC,
|
|---|
| 415 | OP_ARMV8_A64_SBCS,
|
|---|
| 416 | OP_ARMV8_A64_SBFIZ,
|
|---|
| 417 | OP_ARMV8_A64_SBFM,
|
|---|
| 418 | OP_ARMV8_A64_SBFX,
|
|---|
| 419 | OP_ARMV8_A64_SCVTF,
|
|---|
| 420 | OP_ARMV8_A64_SDIV,
|
|---|
| 421 | OP_ARMV8_A64_SETF8,
|
|---|
| 422 | OP_ARMV8_A64_SETF16,
|
|---|
| 423 | OP_ARMV8_A64_SETGP,
|
|---|
| 424 | OP_ARMV8_A64_SETGM,
|
|---|
| 425 | OP_ARMV8_A64_SETGE,
|
|---|
| 426 | OP_ARMV8_A64_SETGPN,
|
|---|
| 427 | OP_ARMV8_A64_SETGMN,
|
|---|
| 428 | OP_ARMV8_A64_SETGEN,
|
|---|
| 429 | OP_ARMV8_A64_SETGPT,
|
|---|
| 430 | OP_ARMV8_A64_SETGMT,
|
|---|
| 431 | OP_ARMV8_A64_SETGET,
|
|---|
| 432 | OP_ARMV8_A64_SETGPTN,
|
|---|
| 433 | OP_ARMV8_A64_SETGMTN,
|
|---|
| 434 | OP_ARMV8_A64_SETGETN,
|
|---|
| 435 | OP_ARMV8_A64_SETP,
|
|---|
| 436 | OP_ARMV8_A64_SETM,
|
|---|
| 437 | OP_ARMV8_A64_SETE,
|
|---|
| 438 | OP_ARMV8_A64_SETPN,
|
|---|
| 439 | OP_ARMV8_A64_SETMNM,
|
|---|
| 440 | OP_ARMV8_A64_SETEN,
|
|---|
| 441 | OP_ARMV8_A64_SETPT,
|
|---|
| 442 | OP_ARMV8_A64_SETMT,
|
|---|
| 443 | OP_ARMV8_A64_SETET,
|
|---|
| 444 | OP_ARMV8_A64_SETPTN,
|
|---|
| 445 | OP_ARMV8_A64_SETMTN,
|
|---|
| 446 | OP_ARMV8_A64_SETETN,
|
|---|
| 447 | OP_ARMV8_A64_SEV,
|
|---|
| 448 | OP_ARMV8_A64_SEVL,
|
|---|
| 449 | OP_ARMV8_A64_SHL,
|
|---|
| 450 | OP_ARMV8_A64_SMADDL,
|
|---|
| 451 | OP_ARMV8_A64_SMAX,
|
|---|
| 452 | OP_ARMV8_A64_SMC,
|
|---|
| 453 | OP_ARMV8_A64_SMIN,
|
|---|
| 454 | OP_ARMV8_A64_SMNEGL,
|
|---|
| 455 | OP_ARMV8_A64_SMSTART,
|
|---|
| 456 | OP_ARMV8_A64_SMSTOP,
|
|---|
| 457 | OP_ARMV8_A64_SMSUBL,
|
|---|
| 458 | OP_ARMV8_A64_SMULH,
|
|---|
| 459 | OP_ARMV8_A64_SMULL,
|
|---|
| 460 | OP_ARMV8_A64_SQRSHRN,
|
|---|
| 461 | OP_ARMV8_A64_SQSHL,
|
|---|
| 462 | OP_ARMV8_A64_SQSHRN,
|
|---|
| 463 | OP_ARMV8_A64_SRSHR,
|
|---|
| 464 | OP_ARMV8_A64_SRSRA,
|
|---|
| 465 | OP_ARMV8_A64_SSBB,
|
|---|
| 466 | OP_ARMV8_A64_SSHR,
|
|---|
| 467 | OP_ARMV8_A64_SSRA,
|
|---|
| 468 | OP_ARMV8_A64_ST2G,
|
|---|
| 469 | OP_ARMV8_A64_ST64B,
|
|---|
| 470 | OP_ARMV8_A64_ST64BV0,
|
|---|
| 471 | OP_ARMV8_A64_STADDB,
|
|---|
| 472 | OP_ARMV8_A64_STADDLB,
|
|---|
| 473 | OP_ARMV8_A64_STADDH,
|
|---|
| 474 | OP_ARMV8_A64_STADDLH,
|
|---|
| 475 | OP_ARMV8_A64_STADD,
|
|---|
| 476 | OP_ARMV8_A64_STADDL,
|
|---|
| 477 | OP_ARMV8_A64_STCLRB,
|
|---|
| 478 | OP_ARMV8_A64_STCLRLB,
|
|---|
| 479 | OP_ARMV8_A64_STCLRH,
|
|---|
| 480 | OP_ARMV8_A64_STCLRLH,
|
|---|
| 481 | OP_ARMV8_A64_STCLR,
|
|---|
| 482 | OP_ARMV8_A64_STCLRL,
|
|---|
| 483 | OP_ARMV8_A64_STEORB,
|
|---|
| 484 | OP_ARMV8_A64_STEROLB,
|
|---|
| 485 | OP_ARMV8_A64_STEORH,
|
|---|
| 486 | OP_ARMV8_A64_STEORLH,
|
|---|
| 487 | OP_ARMV8_A64_STEOR,
|
|---|
| 488 | OP_ARMV8_A64_STEORL,
|
|---|
| 489 | OP_ARMV8_A64_STG,
|
|---|
| 490 | OP_ARMV8_A64_STGM,
|
|---|
| 491 | OP_ARMV8_A64_STGP,
|
|---|
| 492 | OP_ARMV8_A64_STLLRB,
|
|---|
| 493 | OP_ARMV8_A64_STLLRH,
|
|---|
| 494 | OP_ARMV8_A64_STLLR,
|
|---|
| 495 | OP_ARMV8_A64_STLR,
|
|---|
| 496 | OP_ARMV8_A64_STLRB,
|
|---|
| 497 | OP_ARMV8_A64_STLRH,
|
|---|
| 498 | OP_ARMV8_A64_STLUR,
|
|---|
| 499 | OP_ARMV8_A64_STLURB,
|
|---|
| 500 | OP_ARMV8_A64_STLURH,
|
|---|
| 501 | OP_ARMV8_A64_STLXP,
|
|---|
| 502 | OP_ARMV8_A64_STLXR,
|
|---|
| 503 | OP_ARMV8_A64_STLXRB,
|
|---|
| 504 | OP_ARMV8_A64_STLXRH,
|
|---|
| 505 | OP_ARMV8_A64_STNP,
|
|---|
| 506 | OP_ARMV8_A64_STP,
|
|---|
| 507 | OP_ARMV8_A64_STR,
|
|---|
| 508 | OP_ARMV8_A64_STRB,
|
|---|
| 509 | OP_ARMV8_A64_STRH,
|
|---|
| 510 | OP_ARMV8_A64_STTR,
|
|---|
| 511 | OP_ARMV8_A64_STTRB,
|
|---|
| 512 | OP_ARMV8_A64_STTRH,
|
|---|
| 513 | OP_ARMV8_A64_STUR,
|
|---|
| 514 | OP_ARMV8_A64_STURB,
|
|---|
| 515 | OP_ARMV8_A64_STURH,
|
|---|
| 516 | OP_ARMV8_A64_STXP,
|
|---|
| 517 | OP_ARMV8_A64_STXR,
|
|---|
| 518 | OP_ARMV8_A64_STXRB,
|
|---|
| 519 | OP_ARMV8_A64_STXRH,
|
|---|
| 520 | OP_ARMV8_A64_STZ2G,
|
|---|
| 521 | OP_ARMV8_A64_STZG,
|
|---|
| 522 | OP_ARMV8_A64_STZGM,
|
|---|
| 523 | OP_ARMV8_A64_SUB,
|
|---|
| 524 | OP_ARMV8_A64_SUBG,
|
|---|
| 525 | OP_ARMV8_A64_SUBPS,
|
|---|
| 526 | OP_ARMV8_A64_SUBS,
|
|---|
| 527 | OP_ARMV8_A64_SUBP,
|
|---|
| 528 | OP_ARMV8_A64_SVC,
|
|---|
| 529 | OP_ARMV8_A64_SWPB,
|
|---|
| 530 | OP_ARMV8_A64_SWPAB,
|
|---|
| 531 | OP_ARMV8_A64_SWPALB,
|
|---|
| 532 | OP_ARMV8_A64_SWPLB,
|
|---|
| 533 | OP_ARMV8_A64_SWPH,
|
|---|
| 534 | OP_ARMV8_A64_SWPAH,
|
|---|
| 535 | OP_ARMV8_A64_SWPALH,
|
|---|
| 536 | OP_ARMV8_A64_SWPLH,
|
|---|
| 537 | OP_ARMV8_A64_SWP,
|
|---|
| 538 | OP_ARMV8_A64_SWPA,
|
|---|
| 539 | OP_ARMV8_A64_SWPAL,
|
|---|
| 540 | OP_ARMV8_A64_SWPL,
|
|---|
| 541 | OP_ARMV8_A64_SXTB,
|
|---|
| 542 | OP_ARMV8_A64_SXTH,
|
|---|
| 543 | OP_ARMV8_A64_SXTW,
|
|---|
| 544 | OP_ARMV8_A64_SYS,
|
|---|
| 545 | OP_ARMV8_A64_SYSL,
|
|---|
| 546 | OP_ARMV8_A64_TBNZ,
|
|---|
| 547 | OP_ARMV8_A64_TBZ,
|
|---|
| 548 | OP_ARMV8_A64_TCANCEL,
|
|---|
| 549 | OP_ARMV8_A64_TCOMMIT,
|
|---|
| 550 | OP_ARMV8_A64_TLBI,
|
|---|
| 551 | OP_ARMV8_A64_TSB,
|
|---|
| 552 | OP_ARMV8_A64_TSBCSYNC,
|
|---|
| 553 | OP_ARMV8_A64_TST,
|
|---|
| 554 | OP_ARMV8_A64_TSTART,
|
|---|
| 555 | OP_ARMV8_A64_TTEST,
|
|---|
| 556 | OP_ARMV8_A64_UBFIZ,
|
|---|
| 557 | OP_ARMV8_A64_UBFM,
|
|---|
| 558 | OP_ARMV8_A64_UBFX,
|
|---|
| 559 | OP_ARMV8_A64_UCVTF,
|
|---|
| 560 | OP_ARMV8_A64_UDF,
|
|---|
| 561 | OP_ARMV8_A64_UDIV,
|
|---|
| 562 | OP_ARMV8_A64_UMADDL,
|
|---|
| 563 | OP_ARMV8_A64_UMAX,
|
|---|
| 564 | OP_ARMV8_A64_UMIN,
|
|---|
| 565 | OP_ARMV8_A64_UMNEGL,
|
|---|
| 566 | OP_ARMV8_A64_UMSUBL,
|
|---|
| 567 | OP_ARMV8_A64_UMULH,
|
|---|
| 568 | OP_ARMV8_A64_UMULL,
|
|---|
| 569 | OP_ARMV8_A64_UXTB,
|
|---|
| 570 | OP_ARMV8_A64_UXTH,
|
|---|
| 571 | OP_ARMV8_A64_WFE,
|
|---|
| 572 | OP_ARMV8_A64_WFET,
|
|---|
| 573 | OP_ARMV8_A64_WFI,
|
|---|
| 574 | OP_ARMV8_A64_WFIT,
|
|---|
| 575 | OP_ARMV8_A64_XAFLAG,
|
|---|
| 576 | OP_ARMV8_A64_XPACD,
|
|---|
| 577 | OP_ARMV8_A64_XPACI,
|
|---|
| 578 | OP_ARMV8_A64_XPACLRI,
|
|---|
| 579 | OP_ARMV8_A64_YIELD,
|
|---|
| 580 | /** @} */
|
|---|
| 581 |
|
|---|
| 582 | OP_ARMV8_END_OF_OPCODES
|
|---|
| 583 | };
|
|---|
| 584 |
|
|---|
| 585 |
|
|---|
| 586 | /** Armv8 Condition codes. */
|
|---|
| 587 | typedef enum DISARMV8INSTRCOND
|
|---|
| 588 | {
|
|---|
| 589 | kDisArmv8InstrCond_Eq = 0, /**< 0 - Equal - Zero set. */
|
|---|
| 590 | kDisArmv8InstrCond_Ne, /**< 1 - Not equal - Zero clear. */
|
|---|
| 591 |
|
|---|
| 592 | kDisArmv8InstrCond_Cs, /**< 2 - Carry set (also known as 'HS'). */
|
|---|
| 593 | kDisArmv8InstrCond_Hs = kDisArmv8InstrCond_Cs, /**< 2 - Unsigned higher or same. */
|
|---|
| 594 | kDisArmv8InstrCond_Cc, /**< 3 - Carry clear (also known as 'LO'). */
|
|---|
| 595 | kDisArmv8InstrCond_Lo = kDisArmv8InstrCond_Cc, /**< 3 - Unsigned lower. */
|
|---|
| 596 |
|
|---|
| 597 | kDisArmv8InstrCond_Mi, /**< 4 - Negative result (minus). */
|
|---|
| 598 | kDisArmv8InstrCond_Pl, /**< 5 - Positive or zero result (plus). */
|
|---|
| 599 |
|
|---|
| 600 | kDisArmv8InstrCond_Vs, /**< 6 - Overflow set. */
|
|---|
| 601 | kDisArmv8InstrCond_Vc, /**< 7 - Overflow clear. */
|
|---|
| 602 |
|
|---|
| 603 | kDisArmv8InstrCond_Hi, /**< 8 - Unsigned higher. */
|
|---|
| 604 | kDisArmv8InstrCond_Ls, /**< 9 - Unsigned lower or same. */
|
|---|
| 605 |
|
|---|
| 606 | kDisArmv8InstrCond_Ge, /**< a - Signed greater or equal. */
|
|---|
| 607 | kDisArmv8InstrCond_Lt, /**< b - Signed less than. */
|
|---|
| 608 |
|
|---|
| 609 | kDisArmv8InstrCond_Gt, /**< c - Signed greater than. */
|
|---|
| 610 | kDisArmv8InstrCond_Le, /**< d - Signed less or equal. */
|
|---|
| 611 |
|
|---|
| 612 | kDisArmv8InstrCond_Al, /**< e - Condition is always true. */
|
|---|
| 613 | kDisArmv8InstrCond_Al1 /**< f - Condition is always true. */
|
|---|
| 614 | } DISARMV8INSTRCOND;
|
|---|
| 615 |
|
|---|
| 616 |
|
|---|
| 617 | /** Armv8 PState fields. */
|
|---|
| 618 | typedef enum DISARMV8INSTRPSTATE
|
|---|
| 619 | {
|
|---|
| 620 | kDisArmv8InstrPState_SPSel = 0,
|
|---|
| 621 | kDisArmv8InstrPState_DAIFSet,
|
|---|
| 622 | kDisArmv8InstrPState_DAIFClr,
|
|---|
| 623 | kDisArmv8InstrPState_UAO,
|
|---|
| 624 | kDisArmv8InstrPState_PAN,
|
|---|
| 625 | kDisArmv8InstrPState_ALLINT,
|
|---|
| 626 | kDisArmv8InstrPState_PM,
|
|---|
| 627 | kDisArmv8InstrPState_SSBS,
|
|---|
| 628 | kDisArmv8InstrPState_DIT,
|
|---|
| 629 | kDisArmv8InstrPState_SVCRSM,
|
|---|
| 630 | kDisArmv8InstrPState_SVCRZA,
|
|---|
| 631 | kDisArmv8InstrPState_SVCRSMZA,
|
|---|
| 632 | kDisArmv8InstrPState_TCO
|
|---|
| 633 | } DISARMV8INSTRPSTATE;
|
|---|
| 634 |
|
|---|
| 635 |
|
|---|
| 636 | /**
|
|---|
| 637 | * Floating point types.
|
|---|
| 638 | */
|
|---|
| 639 | typedef enum DISARMV8INSTRFPTYPE
|
|---|
| 640 | {
|
|---|
| 641 | kDisArmv8InstrFpType_Invalid = 0,
|
|---|
| 642 | kDisArmv8InstrFpType_Single,
|
|---|
| 643 | kDisArmv8InstrFpType_Double,
|
|---|
| 644 | kDisArmv8InstrFpType_Half
|
|---|
| 645 | } DISARMV8INSTRFPTYPE;
|
|---|
| 646 |
|
|---|
| 647 |
|
|---|
| 648 | /** @defgroup grp_dis_opparam_armv8 Opcode parameters (DISOPCODE::fParam1,
|
|---|
| 649 | * DISOPCODE::fParam2, DISOPCODE::fParam3)
|
|---|
| 650 | * @ingroup grp_dis
|
|---|
| 651 | * @{
|
|---|
| 652 | */
|
|---|
| 653 |
|
|---|
| 654 | /**
|
|---|
| 655 | * Basic parameter type.
|
|---|
| 656 | */
|
|---|
| 657 | typedef enum DISARMV8OPPARM
|
|---|
| 658 | {
|
|---|
| 659 | /** Parameter is not used. */
|
|---|
| 660 | kDisArmv8OpParmNone = 0,
|
|---|
| 661 | /** Immediate value. */
|
|---|
| 662 | kDisArmv8OpParmImm,
|
|---|
| 663 | /** Relative address immediate. */
|
|---|
| 664 | kDisArmv8OpParmImmRel,
|
|---|
| 665 | /** Register. */
|
|---|
| 666 | kDisArmv8OpParmReg,
|
|---|
| 667 | /** System register. */
|
|---|
| 668 | kDisArmv8OpParmSysReg,
|
|---|
| 669 | /** Accessing memory from address in base register + potential offset. */
|
|---|
| 670 | kDisArmv8OpParmAddrInGpr,
|
|---|
| 671 | /** Conditional as parameter (CCMN/CCMP). */
|
|---|
| 672 | kDisArmv8OpParmCond,
|
|---|
| 673 | /** PSTATE field (specific to MSR). */
|
|---|
| 674 | kDisArmv8OpParmPState
|
|---|
| 675 | } DISARMV8OPPARM;
|
|---|
| 676 |
|
|---|
| 677 |
|
|---|
| 678 | /**
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| 679 | * Extend types.
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| 680 | */
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| 681 | typedef enum DISARMV8OPPARMEXTEND
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| 682 | {
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| 683 | /** No shift applied. */
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| 684 | kDisArmv8OpParmExtendNone = 0,
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| 685 | /** Left shift applied. */
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| 686 | kDisArmv8OpParmExtendLsl,
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| 687 | /** Right shift applied. */
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| 688 | kDisArmv8OpParmExtendLsr,
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| 689 | /** Arithmetic right shift applied. */
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| 690 | kDisArmv8OpParmExtendAsr,
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| 691 | /** Rotation applied. */
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| 692 | kDisArmv8OpParmExtendRor,
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| 693 | /** @todo Document. */
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| 694 | kDisArmv8OpParmExtendUxtB,
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| 695 | kDisArmv8OpParmExtendUxtH,
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| 696 | kDisArmv8OpParmExtendUxtW,
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| 697 | kDisArmv8OpParmExtendUxtX,
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| 698 | kDisArmv8OpParmExtendSxtB,
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| 699 | kDisArmv8OpParmExtendSxtH,
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| 700 | kDisArmv8OpParmExtendSxtW,
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| 701 | kDisArmv8OpParmExtendSxtX
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| 702 | } DISARMV8OPPARMEXTEND;
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| 703 | /** @} */
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| 704 |
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| 705 | /** @} */
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| 706 |
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| 707 | #endif /* !VBOX_INCLUDED_disopcode_armv8_h */
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| 708 |
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