1 | /** @file
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2 | * DIS - The VirtualBox Disassembler.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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7 | *
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8 | * This file is part of VirtualBox base platform packages, as
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9 | * available from https://www.virtualbox.org.
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10 | *
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11 | * This program is free software; you can redistribute it and/or
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12 | * modify it under the terms of the GNU General Public License
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13 | * as published by the Free Software Foundation, in version 3 of the
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14 | * License.
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15 | *
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16 | * This program is distributed in the hope that it will be useful, but
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17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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19 | * General Public License for more details.
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20 | *
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21 | * You should have received a copy of the GNU General Public License
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22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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23 | *
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24 | * The contents of this file may alternatively be used under the terms
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25 | * of the Common Development and Distribution License Version 1.0
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26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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27 | * in the VirtualBox distribution, in which case the provisions of the
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28 | * CDDL are applicable instead of those of the GPL.
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29 | *
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30 | * You may elect to license modified versions of this file under the
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31 | * terms and conditions of either the GPL or the CDDL or both.
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32 | *
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33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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34 | */
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35 |
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36 | #ifndef VBOX_INCLUDED_dis_h
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37 | #define VBOX_INCLUDED_dis_h
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38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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39 | # pragma once
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40 | #endif
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41 |
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42 | #include <VBox/types.h>
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43 | #include <VBox/dis-x86-amd64.h>
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44 | #if defined(VBOX_DIS_WITH_ARMV8)
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45 | # include <VBox/dis-armv8.h>
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46 | #endif
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47 | #include <iprt/assert.h>
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48 |
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49 |
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50 | RT_C_DECLS_BEGIN
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51 |
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52 | /** @defgroup grp_dis VBox Disassembler
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53 | * @{ */
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54 |
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55 | /** @name Operand type (DISOPCODEX86::fOpType).
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56 | * @{
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57 | */
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58 | #define DISOPTYPE_INVALID RT_BIT_32(0)
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59 | #define DISOPTYPE_HARMLESS RT_BIT_32(1)
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60 | #define DISOPTYPE_CONTROLFLOW RT_BIT_32(2)
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61 | #define DISOPTYPE_POTENTIALLY_DANGEROUS RT_BIT_32(3)
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62 | #define DISOPTYPE_DANGEROUS RT_BIT_32(4)
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63 | #define DISOPTYPE_PORTIO RT_BIT_32(5)
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64 | #define DISOPTYPE_PRIVILEGED RT_BIT_32(6)
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65 | #define DISOPTYPE_PRIVILEGED_NOTRAP RT_BIT_32(7)
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66 | #define DISOPTYPE_UNCOND_CONTROLFLOW RT_BIT_32(8)
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67 | #define DISOPTYPE_RELATIVE_CONTROLFLOW RT_BIT_32(9)
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68 | #define DISOPTYPE_COND_CONTROLFLOW RT_BIT_32(10)
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69 | #define DISOPTYPE_INTERRUPT RT_BIT_32(11)
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70 | #define DISOPTYPE_ILLEGAL RT_BIT_32(12)
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71 | #define DISOPTYPE_RRM_DANGEROUS RT_BIT_32(14) /**< Some additional dangerous ones when recompiling raw r0. */
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72 | #define DISOPTYPE_RRM_DANGEROUS_16 RT_BIT_32(15) /**< Some additional dangerous ones when recompiling 16-bit raw r0. */
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73 | #define DISOPTYPE_RRM_MASK (DISOPTYPE_RRM_DANGEROUS | DISOPTYPE_RRM_DANGEROUS_16)
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74 | #define DISOPTYPE_INHIBIT_IRQS RT_BIT_32(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
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75 |
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76 | #define DISOPTYPE_X86_PORTIO_READ RT_BIT_32(17)
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77 | #define DISOPTYPE_X86_PORTIO_WRITE RT_BIT_32(18)
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78 | #define DISOPTYPE_X86_INVALID_64 RT_BIT_32(19) /**< Invalid in 64 bits mode */
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79 | #define DISOPTYPE_X86_ONLY_64 RT_BIT_32(20) /**< Only valid in 64 bits mode */
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80 | #define DISOPTYPE_X86_DEFAULT_64_OP_SIZE RT_BIT_32(21) /**< Default 64 bits operand size */
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81 | #define DISOPTYPE_X86_FORCED_64_OP_SIZE RT_BIT_32(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
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82 | #define DISOPTYPE_X86_REXB_EXTENDS_OPREG RT_BIT_32(23) /**< REX.B extends the register field in the opcode byte */
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83 | #define DISOPTYPE_X86_MOD_FIXED_11 RT_BIT_32(24) /**< modrm.mod is always 11b */
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84 | #define DISOPTYPE_X86_FORCED_32_OP_SIZE_X86 RT_BIT_32(25) /**< Forced 32 bits operand size; regardless of prefix bytes (only in 16 & 32 bits mode!) */
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85 | #define DISOPTYPE_X86_AVX RT_BIT_32(28) /**< AVX,AVX2,++ instruction. Not implemented yet! */
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86 | #define DISOPTYPE_X86_SSE RT_BIT_32(29) /**< SSE,SSE2,SSE3,SSE4,++ instruction. Not implemented yet! */
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87 | #define DISOPTYPE_X86_MMX RT_BIT_32(30) /**< MMX,MMXExt,3DNow,++ instruction. Not implemented yet! */
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88 | #define DISOPTYPE_X86_FPU RT_BIT_32(31) /**< FPU instruction. Not implemented yet! */
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89 | #define DISOPTYPE_ALL UINT32_C(0xffffffff)
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90 | /** @} */
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91 |
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92 |
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93 | /**
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94 | * Opcode descriptor.
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95 | */
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96 | #if !defined(DIS_CORE_ONLY) || defined(DOXYGEN_RUNNING)
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97 | typedef struct DISOPCODE
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98 | {
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99 | # define DISOPCODE_FORMAT 0
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100 | /** Mnemonic and operand formatting. */
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101 | const char *pszOpcode;
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102 | /** Parameter \#1 parser index. */
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103 | uint8_t idxParse1;
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104 | /** Parameter \#2 parser index. */
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105 | uint8_t idxParse2;
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106 | /** Parameter \#3 parser index. */
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107 | uint8_t idxParse3;
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108 | /** Parameter \#4 parser index. */
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109 | uint8_t idxParse4;
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110 | /** The opcode identifier. This DIS specific, @see grp_dis_opcodes and
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111 | * VBox/disopcode-x86-amd64.h. */
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112 | uint16_t uOpcode;
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113 | /** Parameter \#1 info, @see grp_dis_opparam. */
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114 | uint16_t fParam1;
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115 | /** Parameter \#2 info, @see grp_dis_opparam. */
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116 | uint16_t fParam2;
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117 | /** Parameter \#3 info, @see grp_dis_opparam. */
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118 | uint16_t fParam3;
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119 | /** Parameter \#4 info, @see grp_dis_opparam. */
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120 | uint16_t fParam4;
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121 | /** padding unused */
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122 | uint16_t uPadding;
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123 | /** Operand type flags, DISOPTYPE_XXX. */
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124 | uint32_t fOpType;
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125 | } DISOPCODE;
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126 | #else
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127 | # pragma pack(1)
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128 | typedef struct DISOPCODE
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129 | {
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130 | #if 1 /*!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64) - probably not worth it for ~4K, costs 2-3% speed. */
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131 | /* 16 bytes (trick is to make sure the bitfields doesn't cross dwords): */
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132 | # define DISOPCODE_FORMAT 16
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133 | uint32_t fOpType;
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134 | uint16_t uOpcode;
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135 | uint8_t idxParse1;
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136 | uint8_t idxParse2;
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137 | uint32_t fParam1 : 12; /* 1st dword: 12+12+8 = 0x20 (32) */
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138 | uint32_t fParam2 : 12;
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139 | uint32_t idxParse3 : 8;
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140 | uint32_t fParam3 : 12; /* 2nd dword: 12+12+8 = 0x20 (32) */
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141 | uint32_t fParam4 : 12;
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142 | uint32_t idxParse4 : 8;
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143 | #else /* 15 bytes: */
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144 | # define DISOPCODE_FORMAT 15
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145 | uint64_t uOpcode : 10; /* 1st qword: 10+12+12+12+6+6+6 = 0x40 (64) */
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146 | uint64_t idxParse1 : 6;
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147 | uint64_t idxParse2 : 6;
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148 | uint64_t idxParse3 : 6;
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149 | uint64_t fParam1 : 12;
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150 | uint64_t fParam2 : 12;
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151 | uint64_t fParam3 : 12;
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152 | uint32_t fOpType;
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153 | uint16_t fParam4;
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154 | uint8_t idxParse4;
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155 | #endif
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156 | } DISOPCODE;
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157 | # pragma pack()
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158 | AssertCompile(sizeof(DISOPCODE) == DISOPCODE_FORMAT);
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159 | #endif
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160 | AssertCompile(DISOPCODE_FORMAT != 15); /* Needs fixing before use as disopcode.h now has more than 1024 opcode values. */
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161 |
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162 |
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163 | /** @name Parameter usage flags.
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164 | * @{
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165 | */
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166 | #define DISUSE_BASE RT_BIT_64(0)
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167 | #define DISUSE_INDEX RT_BIT_64(1)
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168 | #define DISUSE_SCALE RT_BIT_64(2)
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169 | #define DISUSE_REG_GEN8 RT_BIT_64(3)
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170 | #define DISUSE_REG_GEN16 RT_BIT_64(4)
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171 | #define DISUSE_REG_GEN32 RT_BIT_64(5)
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172 | #define DISUSE_REG_GEN64 RT_BIT_64(6)
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173 | #define DISUSE_REG_FP RT_BIT_64(7)
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174 | #define DISUSE_REG_MMX RT_BIT_64(8)
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175 | #define DISUSE_REG_XMM RT_BIT_64(9)
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176 | #define DISUSE_REG_YMM RT_BIT_64(10)
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177 | #define DISUSE_REG_CR RT_BIT_64(11)
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178 | #define DISUSE_REG_DBG RT_BIT_64(12)
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179 | #define DISUSE_REG_SEG RT_BIT_64(13)
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180 | #define DISUSE_REG_TEST RT_BIT_64(14)
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181 | #define DISUSE_DISPLACEMENT8 RT_BIT_64(15)
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182 | #define DISUSE_DISPLACEMENT16 RT_BIT_64(16)
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183 | #define DISUSE_DISPLACEMENT32 RT_BIT_64(17)
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184 | #define DISUSE_DISPLACEMENT64 RT_BIT_64(18)
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185 | #define DISUSE_RIPDISPLACEMENT32 RT_BIT_64(19)
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186 | #define DISUSE_IMMEDIATE8 RT_BIT_64(20)
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187 | #define DISUSE_IMMEDIATE8_REL RT_BIT_64(21)
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188 | #define DISUSE_IMMEDIATE16 RT_BIT_64(22)
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189 | #define DISUSE_IMMEDIATE16_REL RT_BIT_64(23)
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190 | #define DISUSE_IMMEDIATE32 RT_BIT_64(24)
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191 | #define DISUSE_IMMEDIATE32_REL RT_BIT_64(25)
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192 | #define DISUSE_IMMEDIATE64 RT_BIT_64(26)
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193 | #define DISUSE_IMMEDIATE64_REL RT_BIT_64(27)
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194 | #define DISUSE_IMMEDIATE_ADDR_0_32 RT_BIT_64(28)
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195 | #define DISUSE_IMMEDIATE_ADDR_16_32 RT_BIT_64(29)
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196 | #define DISUSE_IMMEDIATE_ADDR_0_16 RT_BIT_64(30)
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197 | #define DISUSE_IMMEDIATE_ADDR_16_16 RT_BIT_64(31)
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198 | /** DS:ESI */
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199 | #define DISUSE_POINTER_DS_BASED RT_BIT_64(32)
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200 | /** ES:EDI */
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201 | #define DISUSE_POINTER_ES_BASED RT_BIT_64(33)
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202 | #define DISUSE_IMMEDIATE16_SX8 RT_BIT_64(34)
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203 | #define DISUSE_IMMEDIATE32_SX8 RT_BIT_64(35)
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204 | #define DISUSE_IMMEDIATE64_SX8 RT_BIT_64(36)
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205 |
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206 | /** Mask of immediate use flags. */
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207 | #define DISUSE_IMMEDIATE ( DISUSE_IMMEDIATE8 \
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208 | | DISUSE_IMMEDIATE16 \
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209 | | DISUSE_IMMEDIATE32 \
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210 | | DISUSE_IMMEDIATE64 \
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211 | | DISUSE_IMMEDIATE8_REL \
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212 | | DISUSE_IMMEDIATE16_REL \
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213 | | DISUSE_IMMEDIATE32_REL \
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214 | | DISUSE_IMMEDIATE64_REL \
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215 | | DISUSE_IMMEDIATE_ADDR_0_32 \
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216 | | DISUSE_IMMEDIATE_ADDR_16_32 \
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217 | | DISUSE_IMMEDIATE_ADDR_0_16 \
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218 | | DISUSE_IMMEDIATE_ADDR_16_16 \
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219 | | DISUSE_IMMEDIATE16_SX8 \
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220 | | DISUSE_IMMEDIATE32_SX8 \
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221 | | DISUSE_IMMEDIATE64_SX8)
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222 | /** Check if the use flags indicates an effective address. */
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223 | #define DISUSE_IS_EFFECTIVE_ADDR(a_fUseFlags) (!!( (a_fUseFlags) \
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224 | & ( DISUSE_BASE \
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225 | | DISUSE_INDEX \
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226 | | DISUSE_DISPLACEMENT32 \
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227 | | DISUSE_DISPLACEMENT64 \
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228 | | DISUSE_DISPLACEMENT16 \
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229 | | DISUSE_DISPLACEMENT8 \
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230 | | DISUSE_RIPDISPLACEMENT32) ))
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231 | /** @} */
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232 |
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233 |
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234 | /**
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235 | * Opcode parameter (operand) details.
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236 | */
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237 | typedef struct DISOPPARAM
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238 | {
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239 | /** A combination of DISUSE_XXX. */
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240 | uint64_t fUse;
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241 | /** Immediate value or address, applicable if any of the flags included in
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242 | * DISUSE_IMMEDIATE are set in fUse. */
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243 | uint64_t uValue;
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244 |
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245 | /** Architecture specific parameter state. */
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246 | union
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247 | {
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248 | /** x86/amd64 specific state. */
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249 | DISOPPARAMX86 x86;
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250 | #if defined(VBOX_DIS_WITH_ARMV8)
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251 | /** ARMv8 specific state. */
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252 | DISOPPARAMARMV8 armv8;
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253 | #endif
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254 | } arch;
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255 |
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256 | } DISOPPARAM;
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257 | AssertCompileSize(DISOPPARAM, 32);
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258 | /** Pointer to opcode parameter. */
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259 | typedef const DISOPPARAM *PCDISOPPARAM;
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260 |
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261 |
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262 | /**
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263 | * Callback for reading instruction bytes.
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264 | *
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265 | * @returns VBox status code, bytes in DISSTATE::u::abInstr and byte count in
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266 | * DISSTATE::cbCachedInstr.
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267 | * @param pDis Pointer to the disassembler state. The user
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268 | * argument can be found in DISSTATE::pvUser if needed.
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269 | * @param offInstr The offset relative to the start of the instruction.
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270 | *
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271 | * To get the source address, add this to
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272 | * DISSTATE::uInstrAddr.
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273 | *
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274 | * To calculate the destination buffer address, use it
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275 | * as an index into DISSTATE::abInstr.
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276 | *
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277 | * @param cbMinRead The minimum number of bytes to read.
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278 | * @param cbMaxRead The maximum number of bytes that may be read.
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279 | */
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280 | typedef DECLCALLBACKTYPE(int, FNDISREADBYTES,(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead));
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281 | /** Pointer to a opcode byte reader. */
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282 | typedef FNDISREADBYTES *PFNDISREADBYTES;
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283 |
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284 |
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285 | /**
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286 | * The diassembler state and result.
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287 | */
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288 | typedef struct DISSTATE
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289 | {
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290 | /** The instruction as different views. */
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291 | union
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292 | {
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293 | /** The instruction bytes. */
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294 | uint8_t abInstr[16];
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295 | /** Single 16-bit view. */
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296 | uint16_t u16;
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297 | /** Single 32-bit view. */
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298 | uint32_t u32;
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299 | /** 16-bit view. */
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300 | uint16_t au16Instr[8];
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301 | /** 32-bit view. */
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302 | uint32_t au32Instr[4];
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303 | /** 64-bit view. */
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304 | uint64_t au64Instr[2];
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305 | } u;
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306 |
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307 | /** Pointer to the current instruction. */
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308 | PCDISOPCODE pCurInstr;
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309 | #if ARCH_BITS == 32
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310 | uint32_t uPtrPadding2;
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311 | #endif
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312 |
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313 | DISOPPARAM Param1;
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314 | DISOPPARAM Param2;
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315 | DISOPPARAM Param3;
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316 | DISOPPARAM Param4;
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317 |
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318 | /** The number of valid bytes in abInstr. */
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319 | uint8_t cbCachedInstr;
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320 | /** The CPU mode (DISCPUMODE). */
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321 | uint8_t uCpuMode;
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322 | /** The instruction size. */
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323 | uint8_t cbInstr;
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324 | /** Unused bytes. */
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325 | uint8_t abUnused[1];
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326 |
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327 | /** Return code set by a worker function like the opcode bytes readers. */
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328 | int32_t rc;
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329 | /** The address of the instruction. */
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330 | RTUINTPTR uInstrAddr;
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331 | /** Optional read function */
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332 | PFNDISREADBYTES pfnReadBytes;
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333 | #if ARCH_BITS == 32
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334 | uint32_t uPadding3;
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335 | #endif
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336 | /** User data supplied as an argument to the APIs. */
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337 | void *pvUser;
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338 | #if ARCH_BITS == 32
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339 | uint32_t uPadding4;
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340 | #endif
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341 |
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342 | /** Architecture specific state. */
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343 | union
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344 | {
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345 | /** x86/amd64 specific state. */
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346 | DISSTATEX86 x86;
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347 | #if defined(VBOX_DIS_WITH_ARMV8)
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348 | /** ARMv8 specific state. */
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349 | DISSTATEARMV8 armv8;
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350 | #endif
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351 | } arch;
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352 |
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353 | } DISSTATE;
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354 | AssertCompileMemberAlignment(DISSTATE, arch, 8);
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355 | AssertCompileSize(DISSTATE, 0xd8);
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356 |
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357 |
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358 |
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359 | DISDECL(int) DISInstrToStr(void const *pvInstr, DISCPUMODE enmCpuMode,
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360 | PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
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361 | DISDECL(int) DISInstrToStrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
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362 | PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
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363 | DISDECL(int) DISInstrToStrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode,
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364 | PFNDISREADBYTES pfnReadBytes, void *pvUser, uint32_t uFilter,
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365 | PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
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366 |
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367 | DISDECL(int) DISInstr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISSTATE pDis, uint32_t *pcbInstr);
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368 | DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
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369 | PDISSTATE pDis, uint32_t *pcbInstr);
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370 | DISDECL(int) DISInstrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter,
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371 | PFNDISREADBYTES pfnReadBytes, void *pvUser,
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372 | PDISSTATE pDis, uint32_t *pcbInstr);
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373 | DISDECL(int) DISInstrWithPrefetchedBytes(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter,
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374 | void const *pvPrefetched, size_t cbPretched,
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375 | PFNDISREADBYTES pfnReadBytes, void *pvUser,
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376 | PDISSTATE pDis, uint32_t *pcbInstr);
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377 |
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378 | DISDECL(uint8_t) DISGetParamSize(PCDISSTATE pDis, PCDISOPPARAM pParam);
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379 | #if 0 /* unused */
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380 | DISDECL(DISSELREG) DISDetectSegReg(PCDISSTATE pDis, PCDISOPPARAM pParam);
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381 | DISDECL(uint8_t) DISQuerySegPrefixByte(PCDISSTATE pDis);
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382 | #endif
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383 |
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384 | #if 0 /* Needs refactoring if we want to use this again, CPUMCTXCORE is history. */
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385 | /** @name Flags returned by DISQueryParamVal (DISQPVPARAMVAL::flags).
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386 | * @{
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387 | */
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388 | #define DISQPV_FLAG_8 UINT8_C(0x01)
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389 | #define DISQPV_FLAG_16 UINT8_C(0x02)
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390 | #define DISQPV_FLAG_32 UINT8_C(0x04)
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391 | #define DISQPV_FLAG_64 UINT8_C(0x08)
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392 | #define DISQPV_FLAG_FARPTR16 UINT8_C(0x10)
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393 | #define DISQPV_FLAG_FARPTR32 UINT8_C(0x20)
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394 | /** @} */
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395 |
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396 | /** @name Types returned by DISQueryParamVal (DISQPVPARAMVAL::flags).
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397 | * @{ */
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398 | #define DISQPV_TYPE_REGISTER UINT8_C(1)
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399 | #define DISQPV_TYPE_ADDRESS UINT8_C(2)
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400 | #define DISQPV_TYPE_IMMEDIATE UINT8_C(3)
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401 | /** @} */
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402 |
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403 | typedef struct
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404 | {
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405 | union
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406 | {
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407 | uint8_t val8;
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408 | uint16_t val16;
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409 | uint32_t val32;
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410 | uint64_t val64;
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411 |
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412 | int8_t i8;
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413 | int16_t i16;
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414 | int32_t i32;
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415 | int64_t i64;
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416 |
|
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417 | struct
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418 | {
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419 | uint16_t sel;
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420 | uint32_t offset;
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421 | } farptr;
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422 | } val;
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423 |
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424 | uint8_t type;
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425 | uint8_t size;
|
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426 | uint8_t flags;
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427 | } DISQPVPARAMVAL;
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428 | /** Pointer to opcode parameter value. */
|
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429 | typedef DISQPVPARAMVAL *PDISQPVPARAMVAL;
|
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430 |
|
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431 | /** Indicates which parameter DISQueryParamVal should operate on. */
|
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432 | typedef enum DISQPVWHICH
|
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433 | {
|
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434 | DISQPVWHICH_DST = 1,
|
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435 | DISQPVWHICH_SRC,
|
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436 | DISQPVWHAT_32_BIT_HACK = 0x7fffffff
|
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437 | } DISQPVWHICH;
|
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438 | DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PCDISSTATE pDis, PCDISOPPARAM pParam, PDISQPVPARAMVAL pParamVal, DISQPVWHICH parmtype);
|
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439 | DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PCDISSTATE pDis, PCDISOPPARAM pParam, void **ppReg, size_t *pcbSize);
|
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440 |
|
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441 | DISDECL(int) DISFetchReg8(PCCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
|
---|
442 | DISDECL(int) DISFetchReg16(PCCPUMCTXCORE pCtx, unsigned reg16, uint16_t *pVal);
|
---|
443 | DISDECL(int) DISFetchReg32(PCCPUMCTXCORE pCtx, unsigned reg32, uint32_t *pVal);
|
---|
444 | DISDECL(int) DISFetchReg64(PCCPUMCTXCORE pCtx, unsigned reg64, uint64_t *pVal);
|
---|
445 | DISDECL(int) DISFetchRegSeg(PCCPUMCTXCORE pCtx, DISSELREG sel, RTSEL *pVal);
|
---|
446 | DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, unsigned reg8, uint8_t val8);
|
---|
447 | DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, unsigned reg32, uint16_t val16);
|
---|
448 | DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, unsigned reg32, uint32_t val32);
|
---|
449 | DISDECL(int) DISWriteReg64(PCPUMCTXCORE pRegFrame, unsigned reg64, uint64_t val64);
|
---|
450 | DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, DISSELREG sel, RTSEL val);
|
---|
451 | DISDECL(int) DISPtrReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t **ppReg);
|
---|
452 | DISDECL(int) DISPtrReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t **ppReg);
|
---|
453 | DISDECL(int) DISPtrReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t **ppReg);
|
---|
454 | DISDECL(int) DISPtrReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t **ppReg);
|
---|
455 | #endif /* obsolete */
|
---|
456 |
|
---|
457 |
|
---|
458 | /**
|
---|
459 | * Try resolve an address into a symbol name.
|
---|
460 | *
|
---|
461 | * For use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
|
---|
462 | *
|
---|
463 | * @returns VBox status code.
|
---|
464 | * @retval VINF_SUCCESS on success, pszBuf contains the full symbol name.
|
---|
465 | * @retval VINF_BUFFER_OVERFLOW if pszBuf is too small the symbol name. The
|
---|
466 | * content of pszBuf is truncated and zero terminated.
|
---|
467 | * @retval VERR_SYMBOL_NOT_FOUND if no matching symbol was found for the address.
|
---|
468 | *
|
---|
469 | * @param pDis Pointer to the disassembler CPU state.
|
---|
470 | * @param u32Sel The selector value. Use DIS_FMT_SEL_IS_REG, DIS_FMT_SEL_GET_VALUE,
|
---|
471 | * DIS_FMT_SEL_GET_REG to access this.
|
---|
472 | * @param uAddress The segment address.
|
---|
473 | * @param pszBuf Where to store the symbol name
|
---|
474 | * @param cchBuf The size of the buffer.
|
---|
475 | * @param poff If not a perfect match, then this is where the offset from the return
|
---|
476 | * symbol to the specified address is returned.
|
---|
477 | * @param pvUser The user argument.
|
---|
478 | */
|
---|
479 | typedef DECLCALLBACKTYPE(int, FNDISGETSYMBOL,(PCDISSTATE pDis, uint32_t u32Sel, RTUINTPTR uAddress, char *pszBuf, size_t cchBuf,
|
---|
480 | RTINTPTR *poff, void *pvUser));
|
---|
481 | /** Pointer to a FNDISGETSYMBOL(). */
|
---|
482 | typedef FNDISGETSYMBOL *PFNDISGETSYMBOL;
|
---|
483 |
|
---|
484 | /**
|
---|
485 | * Checks if the FNDISGETSYMBOL argument u32Sel is a register or not.
|
---|
486 | */
|
---|
487 | #define DIS_FMT_SEL_IS_REG(u32Sel) ( !!((u32Sel) & RT_BIT(31)) )
|
---|
488 |
|
---|
489 | /**
|
---|
490 | * Extracts the selector value from the FNDISGETSYMBOL argument u32Sel.
|
---|
491 | * @returns Selector value.
|
---|
492 | */
|
---|
493 | #define DIS_FMT_SEL_GET_VALUE(u32Sel) ( (RTSEL)(u32Sel) )
|
---|
494 |
|
---|
495 | /**
|
---|
496 | * Extracts the register number from the FNDISGETSYMBOL argument u32Sel.
|
---|
497 | * @returns USE_REG_CS, USE_REG_SS, USE_REG_DS, USE_REG_ES, USE_REG_FS or USE_REG_FS.
|
---|
498 | */
|
---|
499 | #define DIS_FMT_SEL_GET_REG(u32Sel) ( ((u32Sel) >> 16) & 0xf )
|
---|
500 |
|
---|
501 | /** @internal */
|
---|
502 | #define DIS_FMT_SEL_FROM_REG(uReg) ( ((uReg) << 16) | RT_BIT(31) | 0xffff )
|
---|
503 | /** @internal */
|
---|
504 | #define DIS_FMT_SEL_FROM_VALUE(Sel) ( (Sel) & 0xffff )
|
---|
505 |
|
---|
506 |
|
---|
507 | /** @name Flags for use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
|
---|
508 | * @{
|
---|
509 | */
|
---|
510 | /** Put the address to the right. */
|
---|
511 | #define DIS_FMT_FLAGS_ADDR_RIGHT RT_BIT_32(0)
|
---|
512 | /** Put the address to the left. */
|
---|
513 | #define DIS_FMT_FLAGS_ADDR_LEFT RT_BIT_32(1)
|
---|
514 | /** Put the address in comments.
|
---|
515 | * For some assemblers this implies placing it to the right. */
|
---|
516 | #define DIS_FMT_FLAGS_ADDR_COMMENT RT_BIT_32(2)
|
---|
517 | /** Put the instruction bytes to the right of the disassembly. */
|
---|
518 | #define DIS_FMT_FLAGS_BYTES_RIGHT RT_BIT_32(3)
|
---|
519 | /** Put the instruction bytes to the left of the disassembly. */
|
---|
520 | #define DIS_FMT_FLAGS_BYTES_LEFT RT_BIT_32(4)
|
---|
521 | /** Put the instruction bytes in comments.
|
---|
522 | * For some assemblers this implies placing the bytes to the right. */
|
---|
523 | #define DIS_FMT_FLAGS_BYTES_COMMENT RT_BIT_32(5)
|
---|
524 | /** Put the bytes in square brackets. */
|
---|
525 | #define DIS_FMT_FLAGS_BYTES_BRACKETS RT_BIT_32(6)
|
---|
526 | /** Put spaces between the bytes. */
|
---|
527 | #define DIS_FMT_FLAGS_BYTES_SPACED RT_BIT_32(7)
|
---|
528 | /** Display the relative +/- offset of branch instructions that uses relative addresses,
|
---|
529 | * and put the target address in parenthesis. */
|
---|
530 | #define DIS_FMT_FLAGS_RELATIVE_BRANCH RT_BIT_32(8)
|
---|
531 | /** Strict assembly. The assembly should, when ever possible, make the
|
---|
532 | * assembler reproduce the exact same binary. (Refers to the yasm
|
---|
533 | * strict keyword.) */
|
---|
534 | #define DIS_FMT_FLAGS_STRICT RT_BIT_32(9)
|
---|
535 | /** Checks if the given flags are a valid combination. */
|
---|
536 | #define DIS_FMT_FLAGS_IS_VALID(fFlags) \
|
---|
537 | ( !((fFlags) & ~UINT32_C(0x000003ff)) \
|
---|
538 | && ((fFlags) & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) != (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT) \
|
---|
539 | && ( !((fFlags) & DIS_FMT_FLAGS_ADDR_COMMENT) \
|
---|
540 | || (fFlags & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) ) \
|
---|
541 | && ((fFlags) & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) != (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT) \
|
---|
542 | && ( !((fFlags) & (DIS_FMT_FLAGS_BYTES_COMMENT | DIS_FMT_FLAGS_BYTES_BRACKETS)) \
|
---|
543 | || (fFlags & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) ) \
|
---|
544 | )
|
---|
545 | /** @} */
|
---|
546 |
|
---|
547 | DISDECL(size_t) DISFormatYasm( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
|
---|
548 | DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
|
---|
549 | DISDECL(size_t) DISFormatMasm( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
|
---|
550 | DISDECL(size_t) DISFormatMasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
|
---|
551 | DISDECL(size_t) DISFormatGas( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
|
---|
552 | DISDECL(size_t) DISFormatGasEx( PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
|
---|
553 |
|
---|
554 | DISDECL(size_t) DISFormatArmV8( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
|
---|
555 | DISDECL(size_t) DISFormatArmV8Ex(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
|
---|
556 |
|
---|
557 | /** @todo DISAnnotate(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, register
|
---|
558 | * reader, memory reader); */
|
---|
559 |
|
---|
560 | /** @} */
|
---|
561 |
|
---|
562 | RT_C_DECLS_END
|
---|
563 |
|
---|
564 | #endif /* !VBOX_INCLUDED_dis_h */
|
---|
565 |
|
---|