VirtualBox

source: vbox/trunk/include/VBox/dis.h@ 7000

Last change on this file since 7000 was 7000, checked in by vboxsync, 17 years ago

Started with changes for disassembling 64 bits instructions
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File size: 19.6 KB
Line 
1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_disasm_h
27#define ___VBox_disasm_h
28
29#include <VBox/cdefs.h>
30#include <VBox/types.h>
31#include <VBox/cpum.h>
32#include <VBox/disopcode.h>
33
34#if defined(__L4ENV__)
35#include <setjmp.h>
36#endif
37
38__BEGIN_DECLS
39
40
41/** CPU mode flags (DISCPUSTATE::mode).
42 * @{
43 */
44typedef enum
45{
46 CPUMODE_16BIT = 1,
47 CPUMODE_32BIT = 2,
48 CPUMODE_64BIT = 3
49} DISCPUMODE;
50/** @} */
51
52/** Prefix byte flags
53 * @{
54 */
55#define PREFIX_NONE 0
56/** non-default address size. */
57#define PREFIX_ADDRSIZE 1
58/** non-default operand size. */
59#define PREFIX_OPSIZE 2
60/** lock prefix. */
61#define PREFIX_LOCK 4
62/** segment prefix. */
63#define PREFIX_SEG 8
64/** rep(e) prefix (not a prefix, but we'll treat is as one). */
65#define PREFIX_REP 16
66/** rep(e) prefix (not a prefix, but we'll treat is as one). */
67#define PREFIX_REPNE 32
68/** REX prefix (64 bits) */
69#define PREFIX_REX 64
70/** @} */
71
72/** 64 bits prefix byte flags
73 * @{
74 */
75#define PREFIX_REX_OP_2_FLAGS(a) (a - OP_REX)
76#define PREFIX_REX_FLAGS PREFIX_REX_OP_2_FLAGS(OP_REX)
77#define PREFIX_REX_FLAGS_B PREFIX_REX_OP_2_FLAGS(OP_REX_B)
78#define PREFIX_REX_FLAGS_X PREFIX_REX_OP_2_FLAGS(OP_REX_X)
79#define PREFIX_REX_FLAGS_XB PREFIX_REX_OP_2_FLAGS(OP_REX_XB)
80#define PREFIX_REX_FLAGS_R PREFIX_REX_OP_2_FLAGS(OP_REX_R)
81#define PREFIX_REX_FLAGS_RB PREFIX_REX_OP_2_FLAGS(OP_REX_RB)
82#define PREFIX_REX_FLAGS_RX PREFIX_REX_OP_2_FLAGS(OP_REX_RX)
83#define PREFIX_REX_FLAGS_RXB PREFIX_REX_OP_2_FLAGS(OP_REX_RXB)
84#define PREFIX_REX_FLAGS_W PREFIX_REX_OP_2_FLAGS(OP_REX_W)
85#define PREFIX_REX_FLAGS_WB PREFIX_REX_OP_2_FLAGS(OP_REX_WB)
86#define PREFIX_REX_FLAGS_WX PREFIX_REX_OP_2_FLAGS(OP_REX_WX)
87#define PREFIX_REX_FLAGS_WXB PREFIX_REX_OP_2_FLAGS(OP_REX_WXB)
88#define PREFIX_REX_FLAGS_WR PREFIX_REX_OP_2_FLAGS(OP_REX_WR)
89#define PREFIX_REX_FLAGS_WRB PREFIX_REX_OP_2_FLAGS(OP_REX_WRB)
90#define PREFIX_REX_FLAGS_WRX PREFIX_REX_OP_2_FLAGS(OP_REX_WRX)
91#define PREFIX_REX_FLAGS_WRXB PREFIX_REX_OP_2_FLAGS(OP_REX_WRXB)
92/** @} */
93
94/**
95 * Operand type.
96 */
97#define OPTYPE_INVALID RT_BIT(0)
98#define OPTYPE_HARMLESS RT_BIT(1)
99#define OPTYPE_CONTROLFLOW RT_BIT(2)
100#define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3)
101#define OPTYPE_DANGEROUS RT_BIT(4)
102#define OPTYPE_PORTIO RT_BIT(5)
103#define OPTYPE_PRIVILEGED RT_BIT(6)
104#define OPTYPE_PRIVILEGED_NOTRAP RT_BIT(7)
105#define OPTYPE_UNCOND_CONTROLFLOW RT_BIT(8)
106#define OPTYPE_RELATIVE_CONTROLFLOW RT_BIT(9)
107#define OPTYPE_COND_CONTROLFLOW RT_BIT(10)
108#define OPTYPE_INTERRUPT RT_BIT(11)
109#define OPTYPE_ILLEGAL RT_BIT(12)
110#define OPTYPE_RRM_DANGEROUS RT_BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
111#define OPTYPE_RRM_DANGEROUS_16 RT_BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
112#define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
113#define OPTYPE_INHIBIT_IRQS RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
114#define OPTYPE_PORTIO_READ RT_BIT(17)
115#define OPTYPE_PORTIO_WRITE RT_BIT(18)
116#define OPTYPE_INVALID_64 RT_BIT(19) /**< Invalid in 64 bits mode */
117#define OPTYPE_ONLY_64 RT_BIT(20) /**< Only valid in 64 bits mode */
118#define OPTYPE_DEFAULT_64_OP_SIZE RT_BIT(21) /**< Default 64 bits operand size */
119#define OPTYPE_FORCED_64_OP_SIZE RT_BIT(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
120#define OPTYPE_ALL (0xffffffff)
121
122/** Parameter usage flags.
123 * @{
124 */
125#define USE_BASE RT_BIT(0)
126#define USE_INDEX RT_BIT(1)
127#define USE_SCALE RT_BIT(2)
128#define USE_REG_GEN8 RT_BIT(3)
129#define USE_REG_GEN16 RT_BIT(4)
130#define USE_REG_GEN32 RT_BIT(5)
131#define USE_REG_FP RT_BIT(6)
132#define USE_REG_MMX RT_BIT(7)
133#define USE_REG_XMM RT_BIT(8)
134#define USE_REG_CR RT_BIT(9)
135#define USE_REG_DBG RT_BIT(10)
136#define USE_REG_SEG RT_BIT(11)
137#define USE_REG_TEST RT_BIT(12)
138#define USE_DISPLACEMENT8 RT_BIT(13)
139#define USE_DISPLACEMENT16 RT_BIT(14)
140#define USE_DISPLACEMENT32 RT_BIT(15)
141#define USE_IMMEDIATE8 RT_BIT(16)
142#define USE_IMMEDIATE8_REL RT_BIT(17)
143#define USE_IMMEDIATE16 RT_BIT(18)
144#define USE_IMMEDIATE16_REL RT_BIT(19)
145#define USE_IMMEDIATE32 RT_BIT(20)
146#define USE_IMMEDIATE32_REL RT_BIT(21)
147#define USE_IMMEDIATE64 RT_BIT(22)
148#define USE_IMMEDIATE_ADDR_0_32 RT_BIT(23)
149#define USE_IMMEDIATE_ADDR_16_32 RT_BIT(24)
150#define USE_IMMEDIATE_ADDR_0_16 RT_BIT(25)
151#define USE_IMMEDIATE_ADDR_16_16 RT_BIT(26)
152/** DS:ESI */
153#define USE_POINTER_DS_BASED RT_BIT(27)
154/** ES:EDI */
155#define USE_POINTER_ES_BASED RT_BIT(28)
156#define USE_IMMEDIATE16_SX8 RT_BIT(29)
157#define USE_IMMEDIATE32_SX8 RT_BIT(30)
158
159#define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8)
160
161/** @} */
162
163/** index in {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"}
164 * @{
165 */
166#define USE_REG_EAX 0
167#define USE_REG_ECX 1
168#define USE_REG_EDX 2
169#define USE_REG_EBX 3
170#define USE_REG_ESP 4
171#define USE_REG_EBP 5
172#define USE_REG_ESI 6
173#define USE_REG_EDI 7
174/** @} */
175/** index in {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI"}
176 * @{
177 */
178#define USE_REG_AX 0
179#define USE_REG_CX 1
180#define USE_REG_DX 2
181#define USE_REG_BX 3
182#define USE_REG_SP 4
183#define USE_REG_BP 5
184#define USE_REG_SI 6
185#define USE_REG_DI 7
186/** @} */
187
188/** index in {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH"}
189 * @{
190 */
191#define USE_REG_AL 0
192#define USE_REG_CL 1
193#define USE_REG_DL 2
194#define USE_REG_BL 3
195#define USE_REG_AH 4
196#define USE_REG_CH 5
197#define USE_REG_DH 6
198#define USE_REG_BH 7
199/** @} */
200
201/** index in {ES, CS, SS, DS, FS, GS}
202 * @{
203 */
204#define USE_REG_ES 0
205#define USE_REG_CS 1
206#define USE_REG_SS 2
207#define USE_REG_DS 3
208#define USE_REG_FS 4
209#define USE_REG_GS 5
210/** @} */
211
212#define USE_REG_FP0 0
213#define USE_REG_FP1 1
214#define USE_REG_FP2 2
215#define USE_REG_FP3 3
216#define USE_REG_FP4 4
217#define USE_REG_FP5 5
218#define USE_REG_FP6 6
219#define USE_REG_FP7 7
220
221#define USE_REG_CR0 0
222#define USE_REG_CR1 1
223#define USE_REG_CR2 2
224#define USE_REG_CR3 3
225#define USE_REG_CR4 4
226
227#define USE_REG_DR0 0
228#define USE_REG_DR1 1
229#define USE_REG_DR2 2
230#define USE_REG_DR3 3
231#define USE_REG_DR4 4
232#define USE_REG_DR5 5
233#define USE_REG_DR6 6
234#define USE_REG_DR7 7
235
236#define USE_REG_MMX0 0
237#define USE_REG_MMX1 1
238#define USE_REG_MMX2 2
239#define USE_REG_MMX3 3
240#define USE_REG_MMX4 4
241#define USE_REG_MMX5 5
242#define USE_REG_MMX6 6
243#define USE_REG_MMX7 7
244
245#define USE_REG_XMM0 0
246#define USE_REG_XMM1 1
247#define USE_REG_XMM2 2
248#define USE_REG_XMM3 3
249#define USE_REG_XMM4 4
250#define USE_REG_XMM5 5
251#define USE_REG_XMM6 6
252#define USE_REG_XMM7 7
253
254/** Used by DISQueryParamVal & EMIQueryParamVal
255 * @{
256 */
257#define PARAM_VAL8 RT_BIT(0)
258#define PARAM_VAL16 RT_BIT(1)
259#define PARAM_VAL32 RT_BIT(2)
260#define PARAM_VAL64 RT_BIT(3)
261#define PARAM_VALFARPTR16 RT_BIT(4)
262#define PARAM_VALFARPTR32 RT_BIT(5)
263
264#define PARMTYPE_REGISTER 1
265#define PARMTYPE_ADDRESS 2
266#define PARMTYPE_IMMEDIATE 3
267
268typedef struct
269{
270 uint32_t type;
271 uint32_t flags;
272 uint32_t size;
273
274 union
275 {
276 uint8_t val8;
277 uint16_t val16;
278 uint32_t val32;
279 uint64_t val64;
280
281 struct
282 {
283 uint16_t sel;
284 uint32_t offset;
285 } farptr;
286 } val;
287
288} OP_PARAMVAL;
289/** Pointer to opcode parameter value. */
290typedef OP_PARAMVAL *POP_PARAMVAL;
291
292typedef enum
293{
294 PARAM_DEST,
295 PARAM_SOURCE
296} PARAM_TYPE;
297
298/** @} */
299
300/**
301 * Operand Parameter.
302 */
303typedef struct _OP_PARAMETER
304{
305 int param;
306 uint64_t parval;
307 char szParam[32];
308
309 int32_t disp8, disp16, disp32;
310
311 uint32_t flags;
312
313 uint32_t size;
314
315 union
316 {
317 uint32_t reg_gen8;
318 uint32_t reg_gen16;
319 uint32_t reg_gen32;
320 /** ST(0) - ST(7) */
321 uint32_t reg_fp;
322 /** MMX0 - MMX7 */
323 uint32_t reg_mmx;
324 /** XMM0 - XMM7 */
325 uint32_t reg_xmm;
326 /** {ES, CS, SS, DS, FS, GS} */
327 uint32_t reg_seg;
328 /** TR0-TR7 (?) */
329 uint32_t reg_test;
330 /** CR0-CR4 */
331 uint32_t reg_ctrl;
332 /** DR0-DR7 */
333 uint32_t reg_dbg;
334 } base;
335 union
336 {
337 uint32_t reg_gen;
338 } index;
339
340 /** 2, 4 or 8. */
341 uint32_t scale;
342
343} OP_PARAMETER;
344/** Pointer to opcode parameter. */
345typedef OP_PARAMETER *POP_PARAMETER;
346/** Pointer to opcode parameter. */
347typedef const OP_PARAMETER *PCOP_PARAMETER;
348
349
350struct _OPCODE;
351/** Pointer to opcode. */
352typedef struct _OPCODE *POPCODE;
353/** Pointer to const opcode. */
354typedef const struct _OPCODE *PCOPCODE;
355
356typedef DECLCALLBACK(int) FN_DIS_READBYTES(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
357typedef FN_DIS_READBYTES *PFN_DIS_READBYTES;
358
359/* forward decl */
360struct _DISCPUSTATE;
361/** Pointer to the disassembler CPU state. */
362typedef struct _DISCPUSTATE *PDISCPUSTATE;
363
364/** Parser callback.
365 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
366typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
367typedef FNDISPARSE *PFNDISPARSE;
368
369typedef struct _DISCPUSTATE
370{
371 /* Global setting */
372 uint32_t mode;
373
374 /* Per instruction prefix settings */
375 uint32_t prefix;
376 /** segment prefix value. */
377 uint32_t prefix_seg;
378 /** rex prefix value (64 bits only */
379 uint32_t prefix_rex;
380 /** addressing mode (16 or 32 bits). (CPUMODE_*) */
381 uint32_t addrmode;
382 /** operand mode (16 or 32 bits). (CPUMODE_*) */
383 uint32_t opmode;
384
385 OP_PARAMETER param1;
386 OP_PARAMETER param2;
387 OP_PARAMETER param3;
388
389 /** ModRM byte. */
390 uint32_t ModRM;
391 /** scalar, index, base byte. */
392 uint32_t SIB;
393
394 int32_t disp;
395
396 /** First opcode byte of instruction. */
397 uint8_t opcode;
398 /** Last prefix byte (for SSE2 extension tables) */
399 uint8_t lastprefix;
400 RTUINTPTR opaddr;
401 uint32_t opsize;
402#ifndef DIS_CORE_ONLY
403 /** Opcode format string for current instruction. */
404 const char *pszOpcode;
405#endif
406
407 /** Internal: pointer to disassembly function table */
408 PFNDISPARSE *pfnDisasmFnTable;
409 /** Internal: instruction filter */
410 uint32_t uFilter;
411
412 /** Pointer to the current instruction. */
413 PCOPCODE pCurInstr;
414
415 void *apvUserData[3];
416
417 /** Optional read function */
418 PFN_DIS_READBYTES pfnReadBytes;
419#ifdef __L4ENV__
420 jmp_buf *pJumpBuffer;
421#endif /* __L4ENV__ */
422} DISCPUSTATE;
423
424/** Opcode. */
425#pragma pack(4)
426typedef struct _OPCODE
427{
428#ifndef DIS_CORE_ONLY
429 const char *pszOpcode;
430#endif
431 uint8_t idxParse1;
432 uint8_t idxParse2;
433 uint8_t idxParse3;
434 uint16_t opcode;
435 uint16_t param1;
436 uint16_t param2;
437 uint16_t param3;
438
439 uint32_t optype;
440} OPCODE;
441#pragma pack()
442
443
444/**
445 * Disassembles a code block.
446 *
447 * @returns VBox error code
448 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
449 * set correctly.
450 * @param pvCodeBlock Pointer to the strunction to disassemble.
451 * @param cbMax Maximum number of bytes to disassemble.
452 * @param pcbSize Where to store the size of the instruction.
453 * NULL is allowed.
454 *
455 *
456 * @todo Define output callback.
457 * @todo Using signed integers as sizes is a bit odd. There are still
458 * some GCC warnings about mixing signed and unsigend integers.
459 * @todo Need to extend this interface to include a code address so we
460 * can dissassemble GC code. Perhaps a new function is better...
461 * @remark cbMax isn't respected as a boundry. DISInstr() will read beyond cbMax.
462 * This means *pcbSize >= cbMax sometimes.
463 */
464DISDECL(int) DISBlock(PDISCPUSTATE pCpu, RTUINTPTR pvCodeBlock, unsigned cbMax, unsigned *pSize);
465
466/**
467 * Disassembles one instruction
468 *
469 * @returns VBox error code
470 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
471 * set correctly.
472 * @param pu8Instruction Pointer to the instrunction to disassemble.
473 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
474 * @param pcbSize Where to store the size of the instruction.
475 * NULL is allowed.
476 * @param pszOutput Storage for disassembled instruction
477 *
478 * @todo Define output callback.
479 */
480DISDECL(int) DISInstr(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, unsigned u32EipOffset, unsigned *pcbSize, char *pszOutput);
481
482/**
483 * Disassembles one instruction
484 *
485 * @returns VBox error code
486 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
487 * set correctly.
488 * @param pu8Instruction Pointer to the strunction to disassemble.
489 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
490 * @param pcbSize Where to store the size of the instruction.
491 * NULL is allowed.
492 * @param pszOutput Storage for disassembled instruction
493 * @param uFilter Instruction type filter
494 *
495 * @todo Define output callback.
496 */
497DISDECL(int) DISInstrEx(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, uint32_t u32EipOffset, uint32_t *pcbSize,
498 char *pszOutput, unsigned uFilter);
499
500/**
501 * Parses one instruction.
502 * The result is found in pCpu.
503 *
504 * @returns VBox error code
505 * @param pCpu Pointer to cpu structure which has DISCPUSTATE::mode set correctly.
506 * @param InstructionAddr Pointer to the instruction to parse.
507 * @param pcbInstruction Where to store the size of the instruction.
508 * NULL is allowed.
509 */
510DISDECL(int) DISCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction);
511
512/**
513 * Parses one guest instruction.
514 * * The result is found in pCpu and pcbInstruction.
515 *
516 * @returns VBox status code.
517 * @param InstructionAddr Address of the instruction to decode. What this means
518 * is left to the pfnReadBytes function.
519 * @param CpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
520 * @param pfnReadBytes Callback for reading instruction bytes.
521 * @param pvUser User argument for the instruction reader. (Ends up in dwUserData[0].)
522 * @param pCpu Pointer to cpu structure. Will be initialized.
523 * @param pcbInstruction Where to store the size of the instruction.
524 * NULL is allowed.
525 */
526DISDECL(int) DISCoreOneEx(RTUINTPTR InstructionAddr, unsigned CpuMode, PFN_DIS_READBYTES pfnReadBytes, void *pvUser,
527 PDISCPUSTATE pCpu, unsigned *pcbInstruction);
528
529DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
530DISDECL(int) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
531DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
532
533/**
534 * Returns the value of the parameter in pParam
535 *
536 * @returns VBox error code
537 * @param pCtx Exception structure pointer
538 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
539 * set correctly.
540 * @param pParam Pointer to the parameter to parse
541 * @param pParamVal Pointer to parameter value (OUT)
542 * @param parmtype Parameter type
543 *
544 * @note Currently doesn't handle FPU/XMM/MMX/3DNow! parameters correctly!!
545 *
546 */
547DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
548
549DISDECL(int) DISFetchReg8(PCPUMCTXCORE pCtx, uint32_t reg8, uint8_t *pVal);
550DISDECL(int) DISFetchReg16(PCPUMCTXCORE pCtx, uint32_t reg16, uint16_t *pVal);
551DISDECL(int) DISFetchReg32(PCPUMCTXCORE pCtx, uint32_t reg32, uint32_t *pVal);
552DISDECL(int) DISFetchRegSeg(PCPUMCTXCORE pCtx, uint32_t sel, RTSEL *pVal);
553DISDECL(int) DISFetchRegSegEx(PCPUMCTXCORE pCtx, uint32_t sel, RTSEL *pVal, CPUMSELREGHID **ppSelHidReg);
554DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, uint32_t reg8, uint8_t val8);
555DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, uint32_t reg32, uint16_t val16);
556DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, uint32_t reg32, uint32_t val32);
557DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, uint32_t sel, RTSEL val);
558
559__END_DECLS
560
561#endif
562
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