VirtualBox

source: vbox/trunk/include/VBox/dis.h@ 1463

Last change on this file since 1463 was 1463, checked in by vboxsync, 18 years ago

Added DISQuerySegPrefixByte
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File size: 17.0 KB
Line 
1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2006 InnoTek Systemberatung GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License as published by the Free Software Foundation,
12 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13 * distribution. VirtualBox OSE is distributed in the hope that it will
14 * be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * If you received this file as part of a commercial VirtualBox
17 * distribution, then only the terms of your commercial VirtualBox
18 * license agreement apply instead of the previous paragraph.
19 */
20
21#ifndef __VBox_disasm_h__
22#define __VBox_disasm_h__
23
24#include <VBox/cdefs.h>
25#include <VBox/types.h>
26#include <VBox/cpum.h>
27
28#if defined(__L4ENV__) || defined(IN_RING0)
29#include <setjmp.h>
30#endif
31
32__BEGIN_DECLS
33
34
35/** CPU mode flags (DISCPUSTATE::mode).
36 * @{
37 */
38#define CPUMODE_16BIT 1
39#define CPUMODE_32BIT 2
40/** @} */
41
42/** Prefix byte flags
43 * @{
44 */
45#define PREFIX_NONE 0
46/** non-default address size. */
47#define PREFIX_ADDRSIZE 1
48/** non-default operand size. */
49#define PREFIX_OPSIZE 2
50/** lock prefix. */
51#define PREFIX_LOCK 4
52/** segment prefix. */
53#define PREFIX_SEG 8
54/** rep(e) prefix (not a prefix, but we'll treat is as one). */
55#define PREFIX_REP 16
56/** rep(e) prefix (not a prefix, but we'll treat is as one). */
57#define PREFIX_REPNE 32
58/** @} */
59
60/**
61 * Operand type.
62 */
63#define OPTYPE_INVALID BIT(0)
64#define OPTYPE_HARMLESS BIT(1)
65#define OPTYPE_CONTROLFLOW BIT(2)
66#define OPTYPE_POTENTIALLY_DANGEROUS BIT(3)
67#define OPTYPE_DANGEROUS BIT(4)
68#define OPTYPE_PORTIO BIT(5)
69#define OPTYPE_PRIVILEGED BIT(6)
70#define OPTYPE_PRIVILEGED_NOTRAP BIT(7)
71#define OPTYPE_UNCOND_CONTROLFLOW BIT(8)
72#define OPTYPE_RELATIVE_CONTROLFLOW BIT(9)
73#define OPTYPE_COND_CONTROLFLOW BIT(10)
74#define OPTYPE_INTERRUPT BIT(11)
75#define OPTYPE_ILLEGAL BIT(12)
76#define OPTYPE_RRM_DANGEROUS BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
77#define OPTYPE_RRM_DANGEROUS_16 BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
78#define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
79#define OPTYPE_INHIBIT_IRQS BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
80#define OPTYPE_ALL (0xffffffff)
81
82/** Parameter usage flags.
83 * @{
84 */
85#define USE_BASE BIT(0)
86#define USE_INDEX BIT(1)
87#define USE_SCALE BIT(2)
88#define USE_REG_GEN8 BIT(3)
89#define USE_REG_GEN16 BIT(4)
90#define USE_REG_GEN32 BIT(5)
91#define USE_REG_FP BIT(6)
92#define USE_REG_MMX BIT(7)
93#define USE_REG_XMM BIT(8)
94#define USE_REG_CR BIT(9)
95#define USE_REG_DBG BIT(10)
96#define USE_REG_SEG BIT(11)
97#define USE_REG_TEST BIT(12)
98#define USE_DISPLACEMENT8 BIT(13)
99#define USE_DISPLACEMENT16 BIT(14)
100#define USE_DISPLACEMENT32 BIT(15)
101#define USE_IMMEDIATE8 BIT(16)
102#define USE_IMMEDIATE8_REL BIT(17)
103#define USE_IMMEDIATE16 BIT(18)
104#define USE_IMMEDIATE16_REL BIT(19)
105#define USE_IMMEDIATE32 BIT(20)
106#define USE_IMMEDIATE32_REL BIT(21)
107#define USE_IMMEDIATE64 BIT(22)
108#define USE_IMMEDIATE_ADDR_0_32 BIT(23)
109#define USE_IMMEDIATE_ADDR_16_32 BIT(24)
110#define USE_IMMEDIATE_ADDR_0_16 BIT(25)
111#define USE_IMMEDIATE_ADDR_16_16 BIT(26)
112/** DS:ESI */
113#define USE_POINTER_DS_BASED BIT(27)
114/** ES:EDI */
115#define USE_POINTER_ES_BASED BIT(28)
116#define USE_IMMEDIATE16_SX8 BIT(29)
117#define USE_IMMEDIATE32_SX8 BIT(30)
118
119#define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8)
120
121/** @} */
122
123/** index in {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"}
124 * @{
125 */
126#define USE_REG_EAX 0
127#define USE_REG_ECX 1
128#define USE_REG_EDX 2
129#define USE_REG_EBX 3
130#define USE_REG_ESP 4
131#define USE_REG_EBP 5
132#define USE_REG_ESI 6
133#define USE_REG_EDI 7
134/** @} */
135/** index in {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI"}
136 * @{
137 */
138#define USE_REG_AX 0
139#define USE_REG_CX 1
140#define USE_REG_DX 2
141#define USE_REG_BX 3
142#define USE_REG_SP 4
143#define USE_REG_BP 5
144#define USE_REG_SI 6
145#define USE_REG_DI 7
146/** @} */
147
148/** index in {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH"}
149 * @{
150 */
151#define USE_REG_AL 0
152#define USE_REG_CL 1
153#define USE_REG_DL 2
154#define USE_REG_BL 3
155#define USE_REG_AH 4
156#define USE_REG_CH 5
157#define USE_REG_DH 6
158#define USE_REG_BH 7
159/** @} */
160
161/** index in {ES, CS, SS, DS, FS, GS}
162 * @{
163 */
164#define USE_REG_ES 0
165#define USE_REG_CS 1
166#define USE_REG_SS 2
167#define USE_REG_DS 3
168#define USE_REG_FS 4
169#define USE_REG_GS 5
170/** @} */
171
172#define USE_REG_FP0 0
173#define USE_REG_FP1 1
174#define USE_REG_FP2 2
175#define USE_REG_FP3 3
176#define USE_REG_FP4 4
177#define USE_REG_FP5 5
178#define USE_REG_FP6 6
179#define USE_REG_FP7 7
180
181#define USE_REG_CR0 0
182#define USE_REG_CR1 1
183#define USE_REG_CR2 2
184#define USE_REG_CR3 3
185#define USE_REG_CR4 4
186
187#define USE_REG_DR0 0
188#define USE_REG_DR1 1
189#define USE_REG_DR2 2
190#define USE_REG_DR3 3
191#define USE_REG_DR4 4
192#define USE_REG_DR5 5
193#define USE_REG_DR6 6
194#define USE_REG_DR7 7
195
196#define USE_REG_MMX0 0
197#define USE_REG_MMX1 1
198#define USE_REG_MMX2 2
199#define USE_REG_MMX3 3
200#define USE_REG_MMX4 4
201#define USE_REG_MMX5 5
202#define USE_REG_MMX6 6
203#define USE_REG_MMX7 7
204
205#define USE_REG_XMM0 0
206#define USE_REG_XMM1 1
207#define USE_REG_XMM2 2
208#define USE_REG_XMM3 3
209#define USE_REG_XMM4 4
210#define USE_REG_XMM5 5
211#define USE_REG_XMM6 6
212#define USE_REG_XMM7 7
213
214/** Used by DISQueryParamVal & EMIQueryParamVal
215 * @{
216 */
217#define PARAM_VAL8 BIT(0)
218#define PARAM_VAL16 BIT(1)
219#define PARAM_VAL32 BIT(2)
220#define PARAM_VAL64 BIT(3)
221#define PARAM_VALFARPTR16 BIT(4)
222#define PARAM_VALFARPTR32 BIT(5)
223
224#define PARMTYPE_REGISTER 1
225#define PARMTYPE_ADDRESS 2
226#define PARMTYPE_IMMEDIATE 3
227
228typedef struct
229{
230 uint32_t type;
231 uint32_t flags;
232 uint32_t size;
233
234 union
235 {
236 uint8_t val8;
237 uint16_t val16;
238 uint32_t val32;
239 uint64_t val64;
240
241 struct
242 {
243 uint16_t sel;
244 uint32_t offset;
245 } farptr;
246 } val;
247
248} OP_PARAMVAL;
249/** Pointer to opcode parameter value. */
250typedef OP_PARAMVAL *POP_PARAMVAL;
251
252typedef enum
253{
254 PARAM_DEST,
255 PARAM_SOURCE
256} PARAM_TYPE;
257
258/** @} */
259
260/**
261 * Operand Parameter.
262 */
263typedef struct _OP_PARAMETER
264{
265 int param;
266 uint64_t parval;
267 char szParam[32];
268
269 int32_t disp8, disp16, disp32;
270
271 uint32_t flags;
272
273 uint32_t size;
274
275 union
276 {
277 uint32_t reg_gen8;
278 uint32_t reg_gen16;
279 uint32_t reg_gen32;
280 /** ST(0) - ST(7) */
281 uint32_t reg_fp;
282 /** MMX0 - MMX7 */
283 uint32_t reg_mmx;
284 /** XMM0 - XMM7 */
285 uint32_t reg_xmm;
286 /** {ES, CS, SS, DS, FS, GS} */
287 uint32_t reg_seg;
288 /** TR0-TR7 (?) */
289 uint32_t reg_test;
290 /** CR0-CR4 */
291 uint32_t reg_ctrl;
292 /** DR0-DR7 */
293 uint32_t reg_dbg;
294 } base;
295 union
296 {
297 uint32_t reg_gen;
298 } index;
299
300 /** 2, 4 or 8. */
301 uint32_t scale;
302
303} OP_PARAMETER;
304/** Pointer to opcode parameter. */
305typedef OP_PARAMETER *POP_PARAMETER;
306/** Pointer to opcode parameter. */
307typedef const OP_PARAMETER *PCOP_PARAMETER;
308
309
310struct _OPCODE;
311/** Pointer to opcode. */
312typedef struct _OPCODE *POPCODE;
313/** Pointer to const opcode. */
314typedef const struct _OPCODE *PCOPCODE;
315
316typedef DECLCALLBACK(int32_t) FN_DIS_READBYTES(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, RTUINTPTR dwUserdata);
317typedef FN_DIS_READBYTES *PFN_DIS_READBYTES;
318
319/* forward decl */
320struct _DISCPUSTATE;
321/** Pointer to the disassembler CPU state. */
322typedef struct _DISCPUSTATE *PDISCPUSTATE;
323
324/** Parser callback.
325 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
326typedef int FNDISPARSE(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
327typedef FNDISPARSE *PFNDISPARSE;
328
329typedef struct _DISCPUSTATE
330{
331 /* Global setting */
332 uint32_t mode;
333
334 /* Per instruction prefix settings */
335 uint32_t prefix;
336 /** segment prefix value. */
337 uint32_t prefix_seg;
338 /** addressing mode (16 or 32 bits). (CPUMODE_*) */
339 uint32_t addrmode;
340 /** operand mode (16 or 32 bits). (CPUMODE_*) */
341 uint32_t opmode;
342
343 OP_PARAMETER param1;
344 OP_PARAMETER param2;
345 OP_PARAMETER param3;
346
347 /** ModRM byte. */
348 uint32_t ModRM;
349 /** scalar, index, base byte. */
350 uint32_t SIB;
351
352 int32_t disp;
353
354 /** First opcode byte of instruction. */
355 uint8_t opcode;
356 /** Last prefix byte (for SSE2 extension tables) */
357 uint8_t lastprefix;
358 RTUINTPTR opaddr;
359 uint32_t opsize;
360#ifndef DIS_CORE_ONLY
361 /** Opcode format string for current instruction. */
362 char *pszOpcode;
363#endif
364
365 /** Internal: pointer to disassembly function table */
366 PFNDISPARSE *pfnDisasmFnTable;
367 /** Internal: instruction filter */
368 uint32_t uFilter;
369
370 /** Pointer to the current instruction. */
371 PCOPCODE pCurInstr;
372
373 RTUINTPTR dwUserData[3];
374
375 /** Optional read function */
376 PFN_DIS_READBYTES pfnReadBytes;
377#ifdef __L4ENV__
378 jmp_buf *pJumpBuffer;
379#endif /* __L4ENV__ */
380} DISCPUSTATE;
381
382/** Opcode. */
383#pragma pack(4)
384typedef struct _OPCODE
385{
386#ifndef DIS_CORE_ONLY
387 char *pszOpcode;
388#endif
389 uint8_t idxParse1;
390 uint8_t idxParse2;
391 uint8_t idxParse3;
392 uint16_t opcode;
393 uint16_t param1;
394 uint16_t param2;
395 uint16_t param3;
396
397 uint32_t optype;
398} OPCODE;
399#pragma pack()
400
401
402/**
403 * Disassembles a code block.
404 *
405 * @returns Success indicator.
406 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
407 * set correctly.
408 * @param pvCodeBlock Pointer to the strunction to disassemble.
409 * @param cbMax Maximum number of bytes to disassemble.
410 * @param pcbSize Where to store the size of the instruction.
411 * NULL is allowed.
412 *
413 *
414 * @todo Define output callback.
415 * @todo Using signed integers as sizes is a bit odd. There are still
416 * some GCC warnings about mixing signed and unsigend integers.
417 * @todo Need to extend this interface to include a code address so we
418 * can dissassemble GC code. Perhaps a new function is better...
419 * @remark cbMax isn't respected as a boundry. DISInstr() will read beyond cbMax.
420 * This means *pcbSize >= cbMax sometimes.
421 */
422DISDECL(bool) DISBlock(PDISCPUSTATE pCpu, RTUINTPTR pvCodeBlock, int32_t cbMax, uint32_t *pSize);
423
424/**
425 * Disassembles one instruction
426 *
427 * @returns Success indicator.
428 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
429 * set correctly.
430 * @param pu8Instruction Pointer to the instrunction to disassemble.
431 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
432 * @param pcbSize Where to store the size of the instruction.
433 * NULL is allowed.
434 * @param pszOutput Storage for disassembled instruction
435 *
436 * @todo Define output callback.
437 */
438DISDECL(bool) DISInstr(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, uint32_t u32EipOffset, uint32_t *pcbSize, char *pszOutput);
439
440/**
441 * Disassembles one instruction
442 *
443 * @returns Success indicator.
444 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
445 * set correctly.
446 * @param pu8Instruction Pointer to the strunction to disassemble.
447 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
448 * @param pcbSize Where to store the size of the instruction.
449 * NULL is allowed.
450 * @param pszOutput Storage for disassembled instruction
451 * @param uFilter Instruction type filter
452 *
453 * @todo Define output callback.
454 */
455DISDECL(bool) DISInstrEx(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, uint32_t u32EipOffset, uint32_t *pcbSize,
456 char *pszOutput, uint32_t uFilter);
457
458/**
459 * Parses one instruction.
460 * The result is found in pCpu.
461 *
462 * @returns Success indicator.
463 * @param pCpu Pointer to cpu structure which has DISCPUSTATE::mode set correctly.
464 * @param InstructionAddr Pointer to the instruction to parse.
465 * @param pcbInstruction Where to store the size of the instruction.
466 * NULL is allowed.
467 */
468DISDECL(bool) DISCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction);
469
470/**
471 * Parses one guest instruction.
472 * * The result is found in pCpu and pcbInstruction.
473 *
474 * @returns VBox status code.
475 * @param InstructionAddr Address of the instruction to decode. What this means
476 * is left to the pfnReadBytes function.
477 * @param CpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
478 * @param pfnReadBytes Callback for reading instruction bytes.
479 * @param pvUser User argument for the instruction reader. (Ends up in dwUserData[0].)
480 * @param pCpu Pointer to cpu structure. Will be initialized.
481 * @param pcbInstruction Where to store the size of the instruction.
482 * NULL is allowed.
483 */
484DISDECL(int) DISCoreOneEx(RTUINTPTR InstructionAddr, unsigned CpuMode, PFN_DIS_READBYTES pfnReadBytes, void *pvUser,
485 PDISCPUSTATE pCpu, unsigned *pcbInstruction);
486
487DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
488DISDECL(int) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
489DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
490
491/**
492 * Returns the value of the parameter in pParam
493 *
494 * @returns VBox error code
495 * @param pCtx Exception structure pointer
496 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
497 * set correctly.
498 * @param pParam Pointer to the parameter to parse
499 * @param pParamVal Pointer to parameter value (OUT)
500 * @param parmtype Parameter type
501 *
502 * @note Currently doesn't handle FPU/XMM/MMX/3DNow! parameters correctly!!
503 *
504 */
505DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
506
507DISDECL(int) DISFetchReg8(PCPUMCTXCORE pCtx, uint32_t reg8, uint8_t *pVal);
508DISDECL(int) DISFetchReg16(PCPUMCTXCORE pCtx, uint32_t reg16, uint16_t *pVal);
509DISDECL(int) DISFetchReg32(PCPUMCTXCORE pCtx, uint32_t reg32, uint32_t *pVal);
510DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, uint32_t reg8, uint8_t val8);
511DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, uint32_t reg32, uint16_t val16);
512DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, uint32_t reg32, uint32_t val32);
513
514__END_DECLS
515
516#endif
517
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