VirtualBox

source: vbox/trunk/include/VBox/dis-armv8.h

Last change on this file was 105850, checked in by vboxsync, 2 weeks ago

Disassembler/ARMv8: Support disassembling the load/store register offset instruction variants, bugref:10394 [build fix for ancient toolchains]

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 4.0 KB
Line 
1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef VBOX_INCLUDED_dis_armv8_h
37#define VBOX_INCLUDED_dis_armv8_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <VBox/types.h>
43#include <VBox/disopcode-armv8.h>
44#include <iprt/assert.h>
45
46
47RT_C_DECLS_BEGIN
48
49/** @addtogroup grp_dis VBox Disassembler
50 * @{ */
51/**
52 * GPR definition
53 */
54typedef struct
55{
56 /** Flag whether this is a 32-bit or 64-bit register. */
57 bool f32Bit : 1;
58 /** The register index. */
59 RT_GCC_EXTENSION uint8_t idGpr : 7;
60} DISOPPARAMARMV8REG;
61AssertCompileSize(DISOPPARAMARMV8REG, sizeof(uint8_t));
62/** Pointer to a disassembler GPR. */
63typedef DISOPPARAMARMV8REG *PDISOPPARAMARMV8REG;
64/** Pointer to a const disasssembler GPR. */
65typedef const DISOPPARAMARMV8REG *PCDISOPPARAMARMV8REG;
66
67
68/**
69 * Opcode parameter (operand) details.
70 */
71typedef struct
72{
73 /** Parameter type (Actually DISARMV8OPPARM). */
74 uint8_t enmType;
75 /** Any extension applied (DISARMV8OPPARMEXTEND). */
76 uint8_t enmExtend;
77 /** The register operand. */
78 union
79 {
80 /** General register index (DISGREG_XXX), applicable if DISUSE_REG_GEN32
81 * or DISUSE_REG_GEN64 is set in fUse. */
82 DISOPPARAMARMV8REG Gpr;
83 /** IPRT System register encoding. */
84 uint16_t idSysReg;
85 /**
86 * Conditional parameter (not a register I know but this saves us struct size and
87 * and these never occur at the same time, might get renamed if everything is done).
88 *
89 * DISARMV8INSTRCOND
90 */
91 uint8_t enmCond;
92 } Reg;
93 /** Register holding the offset. Applicable if DISUSE_INDEX is set in fUse. */
94 DISOPPARAMARMV8REG GprIndex;
95 /** Parameter size. */
96 uint8_t cb;
97 union
98 {
99 /** Offset from the base register. */
100 int16_t offBase;
101 /** Amount of bits to extend. */
102 uint8_t cExtend;
103 } u;
104} DIS_OP_PARAM_ARMV8_T;
105AssertCompile(sizeof(DIS_OP_PARAM_ARMV8_T) <= 16);
106/** Pointer to opcode parameter. */
107typedef DIS_OP_PARAM_ARMV8_T *PDIS_OP_PARAM_ARMV8_T;
108/** Pointer to opcode parameter. */
109typedef const DIS_OP_PARAM_ARMV8_T *PCDIS_OP_PARAM_ARMV8_T;
110
111
112/**
113 * The armv8 specific disassembler state and result.
114 */
115typedef struct
116{
117 /** Condition flag for the instruction - kArmv8InstrCond_Al if not conditional instruction. */
118 DISARMV8INSTRCOND enmCond;
119 /** Operand size (for loads/stores primarily). */
120 uint8_t cbOperand;
121} DIS_STATE_ARMV8_T;
122AssertCompile(sizeof(DIS_STATE_ARMV8_T) <= 32);
123
124
125/** @} */
126
127RT_C_DECLS_END
128
129#endif /* !VBOX_INCLUDED_dis_armv8_h */
130
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