1 | ;; @file
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2 | ; CPUM - CPU Monitor, Assembly header file.
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3 | ;
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4 |
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5 | ;
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6 | ; Copyright (C) 2006-2009 Oracle Corporation
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7 | ;
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8 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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9 | ; available from http://www.virtualbox.org. This file is free software;
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10 | ; you can redistribute it and/or modify it under the terms of the GNU
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11 | ; General Public License (GPL) as published by the Free Software
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12 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | ;
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16 | ; The contents of this file may alternatively be used under the terms
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17 | ; of the Common Development and Distribution License Version 1.0
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18 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | ; VirtualBox OSE distribution, in which case the provisions of the
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20 | ; CDDL are applicable instead of those of the GPL.
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21 | ;
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22 | ; You may elect to license modified versions of this file under the
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23 | ; terms and conditions of either the GPL or the CDDL or both.
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24 | ;
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25 |
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26 | %ifndef __VBox_cpum_mac__
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27 | %define __VBox_cpum_mac__
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28 |
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29 | ;;
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30 | ; Registers frame.
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31 | ; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx
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32 | ; and other places.
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33 | struc CPUMCTXCORE
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34 | .edi resq 1
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35 | .esi resq 1
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36 | .ebp resq 1
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37 | .eax resq 1
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38 | .ebx resq 1
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39 | .edx resq 1
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40 | .ecx resq 1
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41 | .esp resq 1
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42 | .lss_esp resd 1
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43 | .ss resw 1
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44 | .ssPadding resw 1
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45 | .gs resw 1
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46 | .gsPadding resw 1
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47 | .fs resw 1
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48 | .fsPadding resw 1
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49 | .es resw 1
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50 | .esPadding resw 1
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51 | .ds resw 1
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52 | .dsPadding resw 1
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53 | .cs resw 1
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54 | .csPadding resw 3
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55 | .eflags resq 1
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56 | .eip resq 1
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57 |
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58 | .r8 resq 1
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59 | .r9 resq 1
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60 | .r10 resq 1
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61 | .r11 resq 1
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62 | .r12 resq 1
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63 | .r13 resq 1
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64 | .r14 resq 1
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65 | .r15 resq 1
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66 |
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67 | .esHid.u64Base resq 1
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68 | .esHid.u32Limit resd 1
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69 | .esHid.Attr resd 1
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70 |
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71 | .csHid.u64Base resq 1
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72 | .csHid.u32Limit resd 1
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73 | .csHid.Attr resd 1
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74 |
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75 | .ssHid.u64Base resq 1
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76 | .ssHid.u32Limit resd 1
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77 | .ssHid.Attr resd 1
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78 |
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79 | .dsHid.u64Base resq 1
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80 | .dsHid.u32Limit resd 1
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81 | .dsHid.Attr resd 1
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82 |
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83 | .fsHid.u64Base resq 1
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84 | .fsHid.u32Limit resd 1
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85 | .fsHid.Attr resd 1
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86 |
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87 | .gsHid.u64Base resq 1
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88 | .gsHid.u32Limit resd 1
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89 | .gsHid.Attr resd 1
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90 |
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91 | endstruc
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92 |
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93 |
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94 | struc CPUMCTX
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95 | .fpu resb 512
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96 |
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97 | .edi resq 1
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98 | .esi resq 1
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99 | .ebp resq 1
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100 | .eax resq 1
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101 | .ebx resq 1
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102 | .edx resq 1
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103 | .ecx resq 1
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104 | .esp resq 1
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105 | .lss_esp resd 1
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106 | .ss resw 1
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107 | .ssPadding resw 1
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108 | .gs resw 1
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109 | .gsPadding resw 1
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110 | .fs resw 1
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111 | .fsPadding resw 1
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112 | .es resw 1
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113 | .esPadding resw 1
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114 | .ds resw 1
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115 | .dsPadding resw 1
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116 | .cs resw 1
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117 | .csPadding resw 3
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118 | .eflags resq 1
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119 | .eip resq 1
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120 |
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121 | .r8 resq 1
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122 | .r9 resq 1
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123 | .r10 resq 1
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124 | .r11 resq 1
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125 | .r12 resq 1
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126 | .r13 resq 1
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127 | .r14 resq 1
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128 | .r15 resq 1
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129 |
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130 | .esHid.u64Base resq 1
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131 | .esHid.u32Limit resd 1
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132 | .esHid.Attr resd 1
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133 |
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134 | .csHid.u64Base resq 1
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135 | .csHid.u32Limit resd 1
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136 | .csHid.Attr resd 1
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137 |
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138 | .ssHid.u64Base resq 1
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139 | .ssHid.u32Limit resd 1
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140 | .ssHid.Attr resd 1
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141 |
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142 | .dsHid.u64Base resq 1
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143 | .dsHid.u32Limit resd 1
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144 | .dsHid.Attr resd 1
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145 |
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146 | .fsHid.u64Base resq 1
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147 | .fsHid.u32Limit resd 1
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148 | .fsHid.Attr resd 1
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149 |
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150 | .gsHid.u64Base resq 1
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151 | .gsHid.u32Limit resd 1
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152 | .gsHid.Attr resd 1
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153 |
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154 |
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155 | .cr0 resq 1
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156 | .cr2 resq 1
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157 | .cr3 resq 1
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158 | .cr4 resq 1
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159 |
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160 | .dr resq 8
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161 |
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162 | .gdtr.cbGdt resw 1
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163 | .gdtr.pGdt resq 1
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164 | .gdtrPadding resw 1
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165 | .idtr.cbIdt resw 1
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166 | .idtr.pIdt resq 1
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167 | .idtrPadding resw 1
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168 | .ldtr resw 1
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169 | .ldtrPadding resw 1
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170 | .tr resw 1
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171 | .trPadding resw 1
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172 |
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173 | .SysEnter.cs resb 8
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174 | .SysEnter.eip resb 8
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175 | .SysEnter.esp resb 8
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176 |
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177 | .msrEFER resb 8
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178 | .msrSTAR resb 8
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179 | .msrPAT resb 8
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180 | .msrLSTAR resb 8
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181 | .msrCSTAR resb 8
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182 | .msrSFMASK resb 8
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183 | .msrKERNELGSBASE resb 8
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184 |
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185 | .ldtrHid.u64Base resq 1
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186 | .ldtrHid.u32Limit resd 1
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187 | .ldtrHid.Attr resd 1
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188 |
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189 | .trHid.u64Base resq 1
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190 | .trHid.u32Limit resd 1
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191 | .trHid.Attr resd 1
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192 |
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193 | ; padding
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194 | ;;; .padding resd 6
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195 | endstruc
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196 |
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197 |
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198 | ;;/* Guest MSR state. */
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199 | struc CPUMCTXMSR
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200 | .au64 resq 64
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201 | endstruc
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202 |
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203 | ;;
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204 | ; FPU/XMM state
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205 | ;;
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206 | struc X86FXSTATE
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207 | ;/** Control word. */
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208 | .FCW resw 1
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209 | ;/** Status word. */
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210 | .FSW resw 1
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211 | ;/** Tag word. */
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212 | .FTW resw 1
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213 | ;/** Opcode. */
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214 | .FOP resw 1
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215 | ;/** Instruction pointer. */
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216 | .FPUIP resd 1
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217 | ;/** Code selector. */
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218 | .CS resw 1
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219 | .Rsvrd1 resw 1
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220 | ;/* - offset 16 - */
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221 | ;/** Data pointer. */
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222 | .FPUDP resd 1
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223 | ;/** Data segment */
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224 | .DS resw 1
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225 | .Rsrvd2 resw 1
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226 | .MXCSR resd 1
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227 | .MXCSR_MASK resd 1
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228 | ;/* - offset 32 - */
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229 | ; FPU & MMX registers
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230 | .aRegs resq 8*2
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231 | ;/* - offset 160 - */
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232 | ;/* 8 XMM registers in 32 bits mode; 16 in long mode */
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233 | .aXMM resq 16*2
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234 | ;/* - offset 416 - */
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235 | .au32RsrvdRest resd (512 - 416) / 4
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236 | endstruc
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237 |
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238 | %endif
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