VirtualBox

source: vbox/trunk/include/VBox/VBoxVideo.h@ 33185

Last change on this file since 33185 was 33146, checked in by vboxsync, 14 years ago

wddm/3d: chromium hgsmi, host part + guest part debugging
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Line 
1/** @file
2 * VirtualBox Video interface.
3 */
4
5/*
6 * Copyright (C) 2006 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_VBoxVideo_h
27#define ___VBox_VBoxVideo_h
28
29#include <iprt/cdefs.h>
30#include <iprt/types.h>
31
32#include <VBox/VMMDev.h>
33
34/*
35 * The last 4096 bytes of the guest VRAM contains the generic info for all
36 * DualView chunks: sizes and offsets of chunks. This is filled by miniport.
37 *
38 * Last 4096 bytes of each chunk contain chunk specific data: framebuffer info,
39 * etc. This is used exclusively by the corresponding instance of a display driver.
40 *
41 * The VRAM layout:
42 * Last 4096 bytes - Adapter information area.
43 * 4096 bytes aligned miniport heap (value specified in the config rouded up).
44 * Slack - what left after dividing the VRAM.
45 * 4096 bytes aligned framebuffers:
46 * last 4096 bytes of each framebuffer is the display information area.
47 *
48 * The Virtual Graphics Adapter information in the guest VRAM is stored by the
49 * guest video driver using structures prepended by VBOXVIDEOINFOHDR.
50 *
51 * When the guest driver writes dword 0 to the VBE_DISPI_INDEX_VBOX_VIDEO
52 * the host starts to process the info. The first element at the start of
53 * the 4096 bytes region should be normally be a LINK that points to
54 * actual information chain. That way the guest driver can have some
55 * fixed layout of the information memory block and just rewrite
56 * the link to point to relevant memory chain.
57 *
58 * The processing stops at the END element.
59 *
60 * The host can access the memory only when the port IO is processed.
61 * All data that will be needed later must be copied from these 4096 bytes.
62 * But other VRAM can be used by host until the mode is disabled.
63 *
64 * The guest driver writes dword 0xffffffff to the VBE_DISPI_INDEX_VBOX_VIDEO
65 * to disable the mode.
66 *
67 * VBE_DISPI_INDEX_VBOX_VIDEO is used to read the configuration information
68 * from the host and issue commands to the host.
69 *
70 * The guest writes the VBE_DISPI_INDEX_VBOX_VIDEO index register, the the
71 * following operations with the VBE data register can be performed:
72 *
73 * Operation Result
74 * write 16 bit value NOP
75 * read 16 bit value count of monitors
76 * write 32 bit value sets the vbox command value and the command processed by the host
77 * read 32 bit value result of the last vbox command is returned
78 */
79
80#define VBOX_VIDEO_PRIMARY_SCREEN 0
81#define VBOX_VIDEO_NO_SCREEN ~0
82
83#define VBOX_VIDEO_MAX_SCREENS 64
84
85/* The size of the information. */
86/*
87 * The minimum HGSMI heap size is PAGE_SIZE (4096 bytes) and is a restriction of the
88 * runtime heapsimple API. Use minimum 2 pages here, because the info area also may
89 * contain other data (for example HGSMIHOSTFLAGS structure).
90 */
91#ifdef VBOX_WITH_WDDM
92# define VBVA_ADAPTER_INFORMATION_SIZE (64*_1K)
93#else
94#define VBVA_ADAPTER_INFORMATION_SIZE (16*_1K)
95#define VBVA_DISPLAY_INFORMATION_SIZE (64*_1K)
96#endif
97#define VBVA_MIN_BUFFER_SIZE (64*_1K)
98
99
100/* The value for port IO to let the adapter to interpret the adapter memory. */
101#define VBOX_VIDEO_DISABLE_ADAPTER_MEMORY 0xFFFFFFFF
102
103/* The value for port IO to let the adapter to interpret the adapter memory. */
104#define VBOX_VIDEO_INTERPRET_ADAPTER_MEMORY 0x00000000
105
106/* The value for port IO to let the adapter to interpret the display memory.
107 * The display number is encoded in low 16 bits.
108 */
109#define VBOX_VIDEO_INTERPRET_DISPLAY_MEMORY_BASE 0x00010000
110
111
112/* The end of the information. */
113#define VBOX_VIDEO_INFO_TYPE_END 0
114/* Instructs the host to fetch the next VBOXVIDEOINFOHDR at the given offset of VRAM. */
115#define VBOX_VIDEO_INFO_TYPE_LINK 1
116/* Information about a display memory position. */
117#define VBOX_VIDEO_INFO_TYPE_DISPLAY 2
118/* Information about a screen. */
119#define VBOX_VIDEO_INFO_TYPE_SCREEN 3
120/* Information about host notifications for the driver. */
121#define VBOX_VIDEO_INFO_TYPE_HOST_EVENTS 4
122/* Information about non-volatile guest VRAM heap. */
123#define VBOX_VIDEO_INFO_TYPE_NV_HEAP 5
124/* VBVA enable/disable. */
125#define VBOX_VIDEO_INFO_TYPE_VBVA_STATUS 6
126/* VBVA flush. */
127#define VBOX_VIDEO_INFO_TYPE_VBVA_FLUSH 7
128/* Query configuration value. */
129#define VBOX_VIDEO_INFO_TYPE_QUERY_CONF32 8
130
131
132#pragma pack(1)
133typedef struct _VBOXVIDEOINFOHDR
134{
135 uint8_t u8Type;
136 uint8_t u8Reserved;
137 uint16_t u16Length;
138} VBOXVIDEOINFOHDR;
139
140
141typedef struct _VBOXVIDEOINFOLINK
142{
143 /* Relative offset in VRAM */
144 int32_t i32Offset;
145} VBOXVIDEOINFOLINK;
146
147
148/* Resides in adapter info memory. Describes a display VRAM chunk. */
149typedef struct _VBOXVIDEOINFODISPLAY
150{
151 /* Index of the framebuffer assigned by guest. */
152 uint32_t u32Index;
153
154 /* Absolute offset in VRAM of the framebuffer to be displayed on the monitor. */
155 uint32_t u32Offset;
156
157 /* The size of the memory that can be used for the screen. */
158 uint32_t u32FramebufferSize;
159
160 /* The size of the memory that is used for the Display information.
161 * The information is at u32Offset + u32FramebufferSize
162 */
163 uint32_t u32InformationSize;
164
165} VBOXVIDEOINFODISPLAY;
166
167
168/* Resides in display info area, describes the current video mode. */
169#define VBOX_VIDEO_INFO_SCREEN_F_NONE 0x00
170#define VBOX_VIDEO_INFO_SCREEN_F_ACTIVE 0x01
171
172typedef struct _VBOXVIDEOINFOSCREEN
173{
174 /* Physical X origin relative to the primary screen. */
175 int32_t xOrigin;
176
177 /* Physical Y origin relative to the primary screen. */
178 int32_t yOrigin;
179
180 /* The scan line size in bytes. */
181 uint32_t u32LineSize;
182
183 /* Width of the screen. */
184 uint16_t u16Width;
185
186 /* Height of the screen. */
187 uint16_t u16Height;
188
189 /* Color depth. */
190 uint8_t bitsPerPixel;
191
192 /* VBOX_VIDEO_INFO_SCREEN_F_* */
193 uint8_t u8Flags;
194} VBOXVIDEOINFOSCREEN;
195
196/* The guest initializes the structure to 0. The positions of the structure in the
197 * display info area must not be changed, host will update the structure. Guest checks
198 * the events and modifies the structure as a response to host.
199 */
200#define VBOX_VIDEO_INFO_HOST_EVENTS_F_NONE 0x00000000
201#define VBOX_VIDEO_INFO_HOST_EVENTS_F_VRDP_RESET 0x00000080
202
203typedef struct _VBOXVIDEOINFOHOSTEVENTS
204{
205 /* Host events. */
206 uint32_t fu32Events;
207} VBOXVIDEOINFOHOSTEVENTS;
208
209/* Resides in adapter info memory. Describes the non-volatile VRAM heap. */
210typedef struct _VBOXVIDEOINFONVHEAP
211{
212 /* Absolute offset in VRAM of the start of the heap. */
213 uint32_t u32HeapOffset;
214
215 /* The size of the heap. */
216 uint32_t u32HeapSize;
217
218} VBOXVIDEOINFONVHEAP;
219
220/* Display information area. */
221typedef struct _VBOXVIDEOINFOVBVASTATUS
222{
223 /* Absolute offset in VRAM of the start of the VBVA QUEUE. 0 to disable VBVA. */
224 uint32_t u32QueueOffset;
225
226 /* The size of the VBVA QUEUE. 0 to disable VBVA. */
227 uint32_t u32QueueSize;
228
229} VBOXVIDEOINFOVBVASTATUS;
230
231typedef struct _VBOXVIDEOINFOVBVAFLUSH
232{
233 uint32_t u32DataStart;
234
235 uint32_t u32DataEnd;
236
237} VBOXVIDEOINFOVBVAFLUSH;
238
239#define VBOX_VIDEO_QCI32_MONITOR_COUNT 0
240#define VBOX_VIDEO_QCI32_OFFSCREEN_HEAP_SIZE 1
241
242typedef struct _VBOXVIDEOINFOQUERYCONF32
243{
244 uint32_t u32Index;
245
246 uint32_t u32Value;
247
248} VBOXVIDEOINFOQUERYCONF32;
249#pragma pack()
250
251#ifdef VBOX_WITH_VIDEOHWACCEL
252#pragma pack(1)
253
254#define VBOXVHWA_VERSION_MAJ 0
255#define VBOXVHWA_VERSION_MIN 0
256#define VBOXVHWA_VERSION_BLD 6
257#define VBOXVHWA_VERSION_RSV 0
258
259typedef enum
260{
261 VBOXVHWACMD_TYPE_SURF_CANCREATE = 1,
262 VBOXVHWACMD_TYPE_SURF_CREATE,
263 VBOXVHWACMD_TYPE_SURF_DESTROY,
264 VBOXVHWACMD_TYPE_SURF_LOCK,
265 VBOXVHWACMD_TYPE_SURF_UNLOCK,
266 VBOXVHWACMD_TYPE_SURF_BLT,
267 VBOXVHWACMD_TYPE_SURF_FLIP,
268 VBOXVHWACMD_TYPE_SURF_OVERLAY_UPDATE,
269 VBOXVHWACMD_TYPE_SURF_OVERLAY_SETPOSITION,
270 VBOXVHWACMD_TYPE_SURF_COLORKEY_SET,
271 VBOXVHWACMD_TYPE_QUERY_INFO1,
272 VBOXVHWACMD_TYPE_QUERY_INFO2,
273 VBOXVHWACMD_TYPE_ENABLE,
274 VBOXVHWACMD_TYPE_DISABLE,
275 VBOXVHWACMD_TYPE_HH_CONSTRUCT,
276 VBOXVHWACMD_TYPE_HH_RESET
277#ifdef VBOX_WITH_WDDM
278 , VBOXVHWACMD_TYPE_SURF_GETINFO
279 , VBOXVHWACMD_TYPE_SURF_COLORFILL
280#endif
281} VBOXVHWACMD_TYPE;
282
283/* the command processing was asynch, set by the host to indicate asynch command completion
284 * must not be cleared once set, the command completion is performed by issuing a host->guest completion command
285 * while keeping this flag unchanged */
286#define VBOXVHWACMD_FLAG_HG_ASYNCH 0x00010000
287/* asynch completion is performed by issuing the event */
288#define VBOXVHWACMD_FLAG_GH_ASYNCH_EVENT 0x00000001
289/* issue interrupt on asynch completion */
290#define VBOXVHWACMD_FLAG_GH_ASYNCH_IRQ 0x00000002
291/* guest does not do any op on completion of this command, the host may copy the command and indicate that it does not need the command anymore
292 * by setting the VBOXVHWACMD_FLAG_HG_ASYNCH_RETURNED flag */
293#define VBOXVHWACMD_FLAG_GH_ASYNCH_NOCOMPLETION 0x00000004
294/* the host has copied the VBOXVHWACMD_FLAG_GH_ASYNCH_NOCOMPLETION command and returned it to the guest */
295#define VBOXVHWACMD_FLAG_HG_ASYNCH_RETURNED 0x00020000
296/* this is the host->host cmd, i.e. a configuration command posted by the host to the framebuffer */
297#define VBOXVHWACMD_FLAG_HH_CMD 0x10000000
298
299typedef struct _VBOXVHWACMD
300{
301 VBOXVHWACMD_TYPE enmCmd; /* command type */
302 volatile int32_t rc; /* command result */
303 int32_t iDisplay; /* display index */
304 volatile int32_t Flags; /* ored VBOXVHWACMD_FLAG_xxx values */
305 uint64_t GuestVBVAReserved1; /* field internally used by the guest VBVA cmd handling, must NOT be modified by clients */
306 uint64_t GuestVBVAReserved2; /* field internally used by the guest VBVA cmd handling, must NOT be modified by clients */
307 volatile uint32_t cRefs;
308 int32_t Reserved;
309 union
310 {
311 struct _VBOXVHWACMD *pNext;
312 uint32_t offNext;
313 uint64_t Data; /* the body is 64-bit aligned */
314 } u;
315 char body[1];
316} VBOXVHWACMD;
317
318#define VBOXVHWACMD_HEADSIZE() (RT_OFFSETOF(VBOXVHWACMD, body))
319#define VBOXVHWACMD_SIZE_FROMBODYSIZE(_s) (VBOXVHWACMD_HEADSIZE() + (_s))
320#define VBOXVHWACMD_SIZE(_tCmd) (VBOXVHWACMD_SIZE_FROMBODYSIZE(sizeof(_tCmd)))
321typedef unsigned int VBOXVHWACMD_LENGTH;
322typedef uint64_t VBOXVHWA_SURFHANDLE;
323#define VBOXVHWA_SURFHANDLE_INVALID 0ULL
324#define VBOXVHWACMD_BODY(_p, _t) ((_t*)(_p)->body)
325#define VBOXVHWACMD_HEAD(_pb) ((VBOXVHWACMD*)((uint8_t *)(_pb) - RT_OFFSETOF(VBOXVHWACMD, body)))
326
327typedef struct _VBOXVHWA_RECTL
328{
329 int32_t left;
330 int32_t top;
331 int32_t right;
332 int32_t bottom;
333} VBOXVHWA_RECTL;
334
335typedef struct _VBOXVHWA_COLORKEY
336{
337 uint32_t low;
338 uint32_t high;
339} VBOXVHWA_COLORKEY;
340
341typedef struct _VBOXVHWA_PIXELFORMAT
342{
343 uint32_t flags;
344 uint32_t fourCC;
345 union
346 {
347 uint32_t rgbBitCount;
348 uint32_t yuvBitCount;
349 } c;
350
351 union
352 {
353 uint32_t rgbRBitMask;
354 uint32_t yuvYBitMask;
355 } m1;
356
357 union
358 {
359 uint32_t rgbGBitMask;
360 uint32_t yuvUBitMask;
361 } m2;
362
363 union
364 {
365 uint32_t rgbBBitMask;
366 uint32_t yuvVBitMask;
367 } m3;
368
369 union
370 {
371 uint32_t rgbABitMask;
372 } m4;
373
374 uint32_t Reserved;
375} VBOXVHWA_PIXELFORMAT;
376
377typedef struct _VBOXVHWA_SURFACEDESC
378{
379 uint32_t flags;
380 uint32_t height;
381 uint32_t width;
382 uint32_t pitch;
383 uint32_t sizeX;
384 uint32_t sizeY;
385 uint32_t cBackBuffers;
386 uint32_t Reserved;
387 VBOXVHWA_COLORKEY DstOverlayCK;
388 VBOXVHWA_COLORKEY DstBltCK;
389 VBOXVHWA_COLORKEY SrcOverlayCK;
390 VBOXVHWA_COLORKEY SrcBltCK;
391 VBOXVHWA_PIXELFORMAT PixelFormat;
392 uint32_t surfCaps;
393 uint32_t Reserved2;
394 VBOXVHWA_SURFHANDLE hSurf;
395 uint64_t offSurface;
396} VBOXVHWA_SURFACEDESC;
397
398typedef struct _VBOXVHWA_BLTFX
399{
400 uint32_t flags;
401 uint32_t rop;
402 uint32_t rotationOp;
403 uint32_t rotation;
404 uint32_t fillColor;
405 uint32_t Reserved;
406 VBOXVHWA_COLORKEY DstCK;
407 VBOXVHWA_COLORKEY SrcCK;
408} VBOXVHWA_BLTFX;
409
410typedef struct _VBOXVHWA_OVERLAYFX
411{
412 uint32_t flags;
413 uint32_t Reserved1;
414 uint32_t fxFlags;
415 uint32_t Reserved2;
416 VBOXVHWA_COLORKEY DstCK;
417 VBOXVHWA_COLORKEY SrcCK;
418} VBOXVHWA_OVERLAYFX;
419
420#define VBOXVHWA_CAPS_BLT 0x00000040
421#define VBOXVHWA_CAPS_BLTCOLORFILL 0x04000000
422#define VBOXVHWA_CAPS_BLTFOURCC 0x00000100
423#define VBOXVHWA_CAPS_BLTSTRETCH 0x00000200
424#define VBOXVHWA_CAPS_BLTQUEUE 0x00000080
425
426#define VBOXVHWA_CAPS_OVERLAY 0x00000800
427#define VBOXVHWA_CAPS_OVERLAYFOURCC 0x00002000
428#define VBOXVHWA_CAPS_OVERLAYSTRETCH 0x00004000
429#define VBOXVHWA_CAPS_OVERLAYCANTCLIP 0x00001000
430
431#define VBOXVHWA_CAPS_COLORKEY 0x00400000
432#define VBOXVHWA_CAPS_COLORKEYHWASSIST 0x01000000
433
434#define VBOXVHWA_SCAPS_BACKBUFFER 0x00000004
435#define VBOXVHWA_SCAPS_COMPLEX 0x00000008
436#define VBOXVHWA_SCAPS_FLIP 0x00000010
437#define VBOXVHWA_SCAPS_FRONTBUFFER 0x00000020
438#define VBOXVHWA_SCAPS_OFFSCREENPLAIN 0x00000040
439#define VBOXVHWA_SCAPS_OVERLAY 0x00000080
440#define VBOXVHWA_SCAPS_PRIMARYSURFACE 0x00000200
441#define VBOXVHWA_SCAPS_SYSTEMMEMORY 0x00000800
442#define VBOXVHWA_SCAPS_VIDEOMEMORY 0x00004000
443#define VBOXVHWA_SCAPS_VISIBLE 0x00008000
444#define VBOXVHWA_SCAPS_LOCALVIDMEM 0x10000000
445
446#define VBOXVHWA_PF_PALETTEINDEXED8 0x00000020
447#define VBOXVHWA_PF_RGB 0x00000040
448#define VBOXVHWA_PF_RGBTOYUV 0x00000100
449#define VBOXVHWA_PF_YUV 0x00000200
450#define VBOXVHWA_PF_FOURCC 0x00000004
451
452#define VBOXVHWA_LOCK_DISCARDCONTENTS 0x00002000
453
454#define VBOXVHWA_CFG_ENABLED 0x00000001
455
456#define VBOXVHWA_SD_BACKBUFFERCOUNT 0x00000020
457#define VBOXVHWA_SD_CAPS 0x00000001
458#define VBOXVHWA_SD_CKDESTBLT 0x00004000
459#define VBOXVHWA_SD_CKDESTOVERLAY 0x00002000
460#define VBOXVHWA_SD_CKSRCBLT 0x00010000
461#define VBOXVHWA_SD_CKSRCOVERLAY 0x00008000
462#define VBOXVHWA_SD_HEIGHT 0x00000002
463#define VBOXVHWA_SD_PITCH 0x00000008
464#define VBOXVHWA_SD_PIXELFORMAT 0x00001000
465/*#define VBOXVHWA_SD_REFRESHRATE 0x00040000*/
466#define VBOXVHWA_SD_WIDTH 0x00000004
467
468#define VBOXVHWA_CKEYCAPS_DESTBLT 0x00000001
469#define VBOXVHWA_CKEYCAPS_DESTBLTCLRSPACE 0x00000002
470#define VBOXVHWA_CKEYCAPS_DESTBLTCLRSPACEYUV 0x00000004
471#define VBOXVHWA_CKEYCAPS_DESTBLTYUV 0x00000008
472#define VBOXVHWA_CKEYCAPS_DESTOVERLAY 0x00000010
473#define VBOXVHWA_CKEYCAPS_DESTOVERLAYCLRSPACE 0x00000020
474#define VBOXVHWA_CKEYCAPS_DESTOVERLAYCLRSPACEYUV 0x00000040
475#define VBOXVHWA_CKEYCAPS_DESTOVERLAYONEACTIVE 0x00000080
476#define VBOXVHWA_CKEYCAPS_DESTOVERLAYYUV 0x00000100
477#define VBOXVHWA_CKEYCAPS_SRCBLT 0x00000200
478#define VBOXVHWA_CKEYCAPS_SRCBLTCLRSPACE 0x00000400
479#define VBOXVHWA_CKEYCAPS_SRCBLTCLRSPACEYUV 0x00000800
480#define VBOXVHWA_CKEYCAPS_SRCBLTYUV 0x00001000
481#define VBOXVHWA_CKEYCAPS_SRCOVERLAY 0x00002000
482#define VBOXVHWA_CKEYCAPS_SRCOVERLAYCLRSPACE 0x00004000
483#define VBOXVHWA_CKEYCAPS_SRCOVERLAYCLRSPACEYUV 0x00008000
484#define VBOXVHWA_CKEYCAPS_SRCOVERLAYONEACTIVE 0x00010000
485#define VBOXVHWA_CKEYCAPS_SRCOVERLAYYUV 0x00020000
486#define VBOXVHWA_CKEYCAPS_NOCOSTOVERLAY 0x00040000
487
488#define VBOXVHWA_BLT_COLORFILL 0x00000400
489#define VBOXVHWA_BLT_DDFX 0x00000800
490#define VBOXVHWA_BLT_EXTENDED_FLAGS 0x40000000
491#define VBOXVHWA_BLT_EXTENDED_LINEAR_CONTENT 0x00000004
492#define VBOXVHWA_BLT_EXTENDED_PRESENTATION_STRETCHFACTOR 0x00000010
493#define VBOXVHWA_BLT_KEYDESTOVERRIDE 0x00004000
494#define VBOXVHWA_BLT_KEYSRCOVERRIDE 0x00010000
495#define VBOXVHWA_BLT_LAST_PRESENTATION 0x20000000
496#define VBOXVHWA_BLT_PRESENTATION 0x10000000
497#define VBOXVHWA_BLT_ROP 0x00020000
498
499
500#define VBOXVHWA_OVER_DDFX 0x00080000
501#define VBOXVHWA_OVER_HIDE 0x00000200
502#define VBOXVHWA_OVER_KEYDEST 0x00000400
503#define VBOXVHWA_OVER_KEYDESTOVERRIDE 0x00000800
504#define VBOXVHWA_OVER_KEYSRC 0x00001000
505#define VBOXVHWA_OVER_KEYSRCOVERRIDE 0x00002000
506#define VBOXVHWA_OVER_SHOW 0x00004000
507
508#define VBOXVHWA_CKEY_COLORSPACE 0x00000001
509#define VBOXVHWA_CKEY_DESTBLT 0x00000002
510#define VBOXVHWA_CKEY_DESTOVERLAY 0x00000004
511#define VBOXVHWA_CKEY_SRCBLT 0x00000008
512#define VBOXVHWA_CKEY_SRCOVERLAY 0x00000010
513
514#define VBOXVHWA_BLT_ARITHSTRETCHY 0x00000001
515#define VBOXVHWA_BLT_MIRRORLEFTRIGHT 0x00000002
516#define VBOXVHWA_BLT_MIRRORUPDOWN 0x00000004
517
518#define VBOXVHWA_OVERFX_ARITHSTRETCHY 0x00000001
519#define VBOXVHWA_OVERFX_MIRRORLEFTRIGHT 0x00000002
520#define VBOXVHWA_OVERFX_MIRRORUPDOWN 0x00000004
521
522#define VBOXVHWA_CAPS2_CANRENDERWINDOWED 0x00080000
523#define VBOXVHWA_CAPS2_WIDESURFACES 0x00001000
524#define VBOXVHWA_CAPS2_COPYFOURCC 0x00008000
525/*#define VBOXVHWA_CAPS2_FLIPINTERVAL 0x00200000*/
526/*#define VBOXVHWA_CAPS2_FLIPNOVSYNC 0x00400000*/
527
528
529#define VBOXVHWA_OFFSET64_VOID (UINT64_MAX)
530
531typedef struct _VBOXVHWA_VERSION
532{
533 uint32_t maj;
534 uint32_t min;
535 uint32_t bld;
536 uint32_t reserved;
537} VBOXVHWA_VERSION;
538
539#define VBOXVHWA_VERSION_INIT(_pv) do { \
540 (_pv)->maj = VBOXVHWA_VERSION_MAJ; \
541 (_pv)->min = VBOXVHWA_VERSION_MIN; \
542 (_pv)->bld = VBOXVHWA_VERSION_BLD; \
543 (_pv)->reserved = VBOXVHWA_VERSION_RSV; \
544 } while(0)
545
546typedef struct _VBOXVHWACMD_QUERYINFO1
547{
548 union
549 {
550 struct
551 {
552 VBOXVHWA_VERSION guestVersion;
553 } in;
554
555 struct
556 {
557 uint32_t cfgFlags;
558 uint32_t caps;
559
560 uint32_t caps2;
561 uint32_t colorKeyCaps;
562
563 uint32_t stretchCaps;
564 uint32_t surfaceCaps;
565
566 uint32_t numOverlays;
567 uint32_t curOverlays;
568
569 uint32_t numFourCC;
570 uint32_t reserved;
571 } out;
572 } u;
573} VBOXVHWACMD_QUERYINFO1;
574
575typedef struct _VBOXVHWACMD_QUERYINFO2
576{
577 uint32_t numFourCC;
578 uint32_t FourCC[1];
579} VBOXVHWACMD_QUERYINFO2;
580
581#define VBOXVHWAINFO2_SIZE(_cFourCC) RT_OFFSETOF(VBOXVHWACMD_QUERYINFO2, FourCC[_cFourCC])
582
583typedef struct _VBOXVHWACMD_SURF_CANCREATE
584{
585 VBOXVHWA_SURFACEDESC SurfInfo;
586 union
587 {
588 struct
589 {
590 uint32_t bIsDifferentPixelFormat;
591 uint32_t Reserved;
592 } in;
593
594 struct
595 {
596 int32_t ErrInfo;
597 } out;
598 } u;
599} VBOXVHWACMD_SURF_CANCREATE;
600
601typedef struct _VBOXVHWACMD_SURF_CREATE
602{
603 VBOXVHWA_SURFACEDESC SurfInfo;
604} VBOXVHWACMD_SURF_CREATE;
605
606#ifdef VBOX_WITH_WDDM
607typedef struct _VBOXVHWACMD_SURF_GETINFO
608{
609 VBOXVHWA_SURFACEDESC SurfInfo;
610} VBOXVHWACMD_SURF_GETINFO;
611#endif
612
613typedef struct _VBOXVHWACMD_SURF_DESTROY
614{
615 union
616 {
617 struct
618 {
619 VBOXVHWA_SURFHANDLE hSurf;
620 } in;
621 } u;
622} VBOXVHWACMD_SURF_DESTROY;
623
624typedef struct _VBOXVHWACMD_SURF_LOCK
625{
626 union
627 {
628 struct
629 {
630 VBOXVHWA_SURFHANDLE hSurf;
631 uint64_t offSurface;
632 uint32_t flags;
633 uint32_t rectValid;
634 VBOXVHWA_RECTL rect;
635 } in;
636 } u;
637} VBOXVHWACMD_SURF_LOCK;
638
639typedef struct _VBOXVHWACMD_SURF_UNLOCK
640{
641 union
642 {
643 struct
644 {
645 VBOXVHWA_SURFHANDLE hSurf;
646 uint32_t xUpdatedMemValid;
647 uint32_t reserved;
648 VBOXVHWA_RECTL xUpdatedMemRect;
649 } in;
650 } u;
651} VBOXVHWACMD_SURF_UNLOCK;
652
653typedef struct _VBOXVHWACMD_SURF_BLT
654{
655 uint64_t DstGuestSurfInfo;
656 uint64_t SrcGuestSurfInfo;
657 union
658 {
659 struct
660 {
661 VBOXVHWA_SURFHANDLE hDstSurf;
662 uint64_t offDstSurface;
663 VBOXVHWA_RECTL dstRect;
664 VBOXVHWA_SURFHANDLE hSrcSurf;
665 uint64_t offSrcSurface;
666 VBOXVHWA_RECTL srcRect;
667 uint32_t flags;
668 uint32_t xUpdatedSrcMemValid;
669 VBOXVHWA_BLTFX desc;
670 VBOXVHWA_RECTL xUpdatedSrcMemRect;
671 } in;
672 } u;
673} VBOXVHWACMD_SURF_BLT;
674
675#ifdef VBOX_WITH_WDDM
676typedef struct _VBOXVHWACMD_SURF_COLORFILL
677{
678 union
679 {
680 struct
681 {
682 VBOXVHWA_SURFHANDLE hSurf;
683 uint64_t offSurface;
684 uint32_t u32Reserved;
685 uint32_t cRects;
686 VBOXVHWA_RECTL aRects[1];
687 } in;
688 } u;
689} VBOXVHWACMD_SURF_COLORFILL;
690#endif
691
692typedef struct _VBOXVHWACMD_SURF_FLIP
693{
694 uint64_t TargGuestSurfInfo;
695 uint64_t CurrGuestSurfInfo;
696 union
697 {
698 struct
699 {
700 VBOXVHWA_SURFHANDLE hTargSurf;
701 uint64_t offTargSurface;
702 VBOXVHWA_SURFHANDLE hCurrSurf;
703 uint64_t offCurrSurface;
704 uint32_t flags;
705 uint32_t xUpdatedTargMemValid;
706 VBOXVHWA_RECTL xUpdatedTargMemRect;
707 } in;
708 } u;
709} VBOXVHWACMD_SURF_FLIP;
710
711typedef struct _VBOXVHWACMD_SURF_COLORKEY_SET
712{
713 union
714 {
715 struct
716 {
717 VBOXVHWA_SURFHANDLE hSurf;
718 uint64_t offSurface;
719 VBOXVHWA_COLORKEY CKey;
720 uint32_t flags;
721 uint32_t reserved;
722 } in;
723 } u;
724} VBOXVHWACMD_SURF_COLORKEY_SET;
725
726typedef struct _VBOXVHWACMD_SURF_OVERLAY_UPDATE
727{
728 union
729 {
730 struct
731 {
732 VBOXVHWA_SURFHANDLE hDstSurf;
733 uint64_t offDstSurface;
734 VBOXVHWA_RECTL dstRect;
735 VBOXVHWA_SURFHANDLE hSrcSurf;
736 uint64_t offSrcSurface;
737 VBOXVHWA_RECTL srcRect;
738 uint32_t flags;
739 uint32_t xUpdatedSrcMemValid;
740 VBOXVHWA_OVERLAYFX desc;
741 VBOXVHWA_RECTL xUpdatedSrcMemRect;
742 } in;
743 } u;
744}VBOXVHWACMD_SURF_OVERLAY_UPDATE;
745
746typedef struct _VBOXVHWACMD_SURF_OVERLAY_SETPOSITION
747{
748 union
749 {
750 struct
751 {
752 VBOXVHWA_SURFHANDLE hDstSurf;
753 uint64_t offDstSurface;
754 VBOXVHWA_SURFHANDLE hSrcSurf;
755 uint64_t offSrcSurface;
756 uint32_t xPos;
757 uint32_t yPos;
758 uint32_t flags;
759 uint32_t reserved;
760 } in;
761 } u;
762} VBOXVHWACMD_SURF_OVERLAY_SETPOSITION;
763
764typedef struct _VBOXVHWACMD_HH_CONSTRUCT
765{
766 void *pVM;
767 /* VRAM info for the backend to be able to properly translate VRAM offsets */
768 void *pvVRAM;
769 uint32_t cbVRAM;
770} VBOXVHWACMD_HH_CONSTRUCT;
771
772typedef DECLCALLBACK(void) FNVBOXVHWA_HH_CALLBACK(void*);
773typedef FNVBOXVHWA_HH_CALLBACK *PFNVBOXVHWA_HH_CALLBACK;
774
775#define VBOXVHWA_HH_CALLBACK_SET(_pCmd, _pfn, _parg) \
776 do { \
777 (_pCmd)->GuestVBVAReserved1 = (uint64_t)(uintptr_t)(_pfn); \
778 (_pCmd)->GuestVBVAReserved2 = (uint64_t)(uintptr_t)(_parg); \
779 }while(0)
780
781#define VBOXVHWA_HH_CALLBACK_GET(_pCmd) ((PFNVBOXVHWA_HH_CALLBACK)(_pCmd)->GuestVBVAReserved1)
782#define VBOXVHWA_HH_CALLBACK_GET_ARG(_pCmd) ((void*)(_pCmd)->GuestVBVAReserved2)
783
784#pragma pack()
785#endif /* #ifdef VBOX_WITH_VIDEOHWACCEL */
786
787/* All structures are without alignment. */
788#pragma pack(1)
789
790typedef struct VBVAHOSTFLAGS
791{
792 uint32_t u32HostEvents;
793 uint32_t u32SupportedOrders;
794} VBVAHOSTFLAGS;
795
796typedef struct _VBVABUFFER
797{
798 VBVAHOSTFLAGS hostFlags;
799
800 /* The offset where the data start in the buffer. */
801 uint32_t off32Data;
802 /* The offset where next data must be placed in the buffer. */
803 uint32_t off32Free;
804
805 /* The queue of record descriptions. */
806 VBVARECORD aRecords[VBVA_MAX_RECORDS];
807 uint32_t indexRecordFirst;
808 uint32_t indexRecordFree;
809
810 /* Space to leave free in the buffer when large partial records are transferred. */
811 uint32_t cbPartialWriteThreshold;
812
813 uint32_t cbData;
814 uint8_t au8Data[1]; /* variable size for the rest of the VBVABUFFER area in VRAM. */
815} VBVABUFFER;
816
817/* guest->host commands */
818#define VBVA_QUERY_CONF32 1
819#define VBVA_SET_CONF32 2
820#define VBVA_INFO_VIEW 3
821#define VBVA_INFO_HEAP 4
822#define VBVA_FLUSH 5
823#define VBVA_INFO_SCREEN 6
824#define VBVA_ENABLE 7
825#define VBVA_MOUSE_POINTER_SHAPE 8
826#ifdef VBOX_WITH_VIDEOHWACCEL
827# define VBVA_VHWA_CMD 9
828#endif /* # ifdef VBOX_WITH_VIDEOHWACCEL */
829#ifdef VBOX_WITH_VDMA
830# define VBVA_VDMA_CTL 10 /* setup G<->H DMA channel info */
831# define VBVA_VDMA_CMD 11 /* G->H DMA command */
832#endif
833#define VBVA_INFO_CAPS 12 /* informs host about HGSMI caps. see _VBVACAPS below */
834
835/* host->guest commands */
836#define VBVAHG_EVENT 1
837#define VBVAHG_DISPLAY_CUSTOM 2
838#ifdef VBOX_WITH_VDMA
839#define VBVAHG_SHGSMI_COMPLETION 3
840#endif
841
842#ifdef VBOX_WITH_VIDEOHWACCEL
843#define VBVAHG_DCUSTOM_VHWA_CMDCOMPLETE 1
844#pragma pack(1)
845typedef struct _VBVAHOSTCMDVHWACMDCOMPLETE
846{
847 uint32_t offCmd;
848}VBVAHOSTCMDVHWACMDCOMPLETE;
849#pragma pack()
850#endif /* # ifdef VBOX_WITH_VIDEOHWACCEL */
851
852#pragma pack(1)
853typedef enum
854{
855 VBVAHOSTCMD_OP_EVENT = 1,
856 VBVAHOSTCMD_OP_CUSTOM
857}VBVAHOSTCMD_OP_TYPE;
858
859typedef struct _VBVAHOSTCMDEVENT
860{
861 uint64_t pEvent;
862}VBVAHOSTCMDEVENT;
863
864
865typedef struct _VBVAHOSTCMD
866{
867 /* destination ID if >=0 specifies display index, otherwize the command is directed to the miniport */
868 int32_t iDstID;
869 int32_t customOpCode;
870 union
871 {
872 struct _VBVAHOSTCMD *pNext;
873 uint32_t offNext;
874 uint64_t Data; /* the body is 64-bit aligned */
875 } u;
876 char body[1];
877}VBVAHOSTCMD;
878
879#define VBVAHOSTCMD_SIZE(_size) (sizeof(VBVAHOSTCMD) + (_size))
880#define VBVAHOSTCMD_BODY(_pCmd, _tBody) ((_tBody*)(_pCmd)->body)
881#define VBVAHOSTCMD_HDR(_pBody) ((VBVAHOSTCMD*)(((uint8_t*)_pBody) - RT_OFFSETOF(VBVAHOSTCMD, body)))
882#define VBVAHOSTCMD_HDRSIZE (RT_OFFSETOF(VBVAHOSTCMD, body))
883
884#pragma pack()
885
886/* VBVACONF32::u32Index */
887#define VBOX_VBVA_CONF32_MONITOR_COUNT 0
888#define VBOX_VBVA_CONF32_HOST_HEAP_SIZE 1
889
890typedef struct _VBVACONF32
891{
892 uint32_t u32Index;
893 uint32_t u32Value;
894} VBVACONF32;
895
896typedef struct VBVAINFOVIEW
897{
898 /* Index of the screen, assigned by the guest. */
899 uint32_t u32ViewIndex;
900
901 /* The screen offset in VRAM, the framebuffer starts here. */
902 uint32_t u32ViewOffset;
903
904 /* The size of the VRAM memory that can be used for the view. */
905 uint32_t u32ViewSize;
906
907 /* The recommended maximum size of the VRAM memory for the screen. */
908 uint32_t u32MaxScreenSize;
909} VBVAINFOVIEW;
910
911typedef struct _VBVAINFOHEAP
912{
913 /* Absolute offset in VRAM of the start of the heap. */
914 uint32_t u32HeapOffset;
915
916 /* The size of the heap. */
917 uint32_t u32HeapSize;
918
919} VBVAINFOHEAP;
920
921typedef struct _VBVAFLUSH
922{
923 uint32_t u32Reserved;
924
925} VBVAFLUSH;
926
927/* VBVAINFOSCREEN::u8Flags */
928#define VBVA_SCREEN_F_NONE 0x0000
929#define VBVA_SCREEN_F_ACTIVE 0x0001
930
931typedef struct VBVAINFOSCREEN
932{
933 /* Which view contains the screen. */
934 uint32_t u32ViewIndex;
935
936 /* Physical X origin relative to the primary screen. */
937 int32_t i32OriginX;
938
939 /* Physical Y origin relative to the primary screen. */
940 int32_t i32OriginY;
941
942 /* Offset of visible framebuffer relative to the framebuffer start. */
943 uint32_t u32StartOffset;
944
945 /* The scan line size in bytes. */
946 uint32_t u32LineSize;
947
948 /* Width of the screen. */
949 uint32_t u32Width;
950
951 /* Height of the screen. */
952 uint32_t u32Height;
953
954 /* Color depth. */
955 uint16_t u16BitsPerPixel;
956
957 /* VBVA_SCREEN_F_* */
958 uint16_t u16Flags;
959} VBVAINFOSCREEN;
960
961
962/* VBVAENABLE::u32Flags */
963#define VBVA_F_NONE 0x00000000
964#define VBVA_F_ENABLE 0x00000001
965#define VBVA_F_DISABLE 0x00000002
966#ifdef VBOXWDDM_WITH_VBVA
967/* extended VBVA to be used with WDDM */
968#define VBVA_F_EXTENDED 0x00000004
969/* vbva offset is absolute VRAM offset */
970#define VBVA_F_ABSOFFSET 0x00000008
971#endif
972
973typedef struct _VBVAENABLE
974{
975 uint32_t u32Flags;
976 uint32_t u32Offset;
977 int32_t i32Result;
978} VBVAENABLE;
979
980#ifdef VBOXWDDM_WITH_VBVA
981typedef struct _VBVAENABLE_EX
982{
983 VBVAENABLE Base;
984 uint32_t u32ScreenId;
985} VBVAENABLE_EX;
986#endif
987
988
989typedef struct _VBVAMOUSEPOINTERSHAPE
990{
991 /* The host result. */
992 int32_t i32Result;
993
994 /* VBOX_MOUSE_POINTER_* bit flags. */
995 uint32_t fu32Flags;
996
997 /* X coordinate of the hot spot. */
998 uint32_t u32HotX;
999
1000 /* Y coordinate of the hot spot. */
1001 uint32_t u32HotY;
1002
1003 /* Width of the pointer in pixels. */
1004 uint32_t u32Width;
1005
1006 /* Height of the pointer in scanlines. */
1007 uint32_t u32Height;
1008
1009 /* Pointer data.
1010 *
1011 ****
1012 * The data consists of 1 bpp AND mask followed by 32 bpp XOR (color) mask.
1013 *
1014 * For pointers without alpha channel the XOR mask pixels are 32 bit values: (lsb)BGR0(msb).
1015 * For pointers with alpha channel the XOR mask consists of (lsb)BGRA(msb) 32 bit values.
1016 *
1017 * Guest driver must create the AND mask for pointers with alpha channel, so if host does not
1018 * support alpha, the pointer could be displayed as a normal color pointer. The AND mask can
1019 * be constructed from alpha values. For example alpha value >= 0xf0 means bit 0 in the AND mask.
1020 *
1021 * The AND mask is 1 bpp bitmap with byte aligned scanlines. Size of AND mask,
1022 * therefore, is cbAnd = (width + 7) / 8 * height. The padding bits at the
1023 * end of any scanline are undefined.
1024 *
1025 * The XOR mask follows the AND mask on the next 4 bytes aligned offset:
1026 * uint8_t *pXor = pAnd + (cbAnd + 3) & ~3
1027 * Bytes in the gap between the AND and the XOR mask are undefined.
1028 * XOR mask scanlines have no gap between them and size of XOR mask is:
1029 * cXor = width * 4 * height.
1030 ****
1031 *
1032 * Preallocate 4 bytes for accessing actual data as p->au8Data.
1033 */
1034 uint8_t au8Data[4];
1035
1036} VBVAMOUSEPOINTERSHAPE;
1037
1038/* the guest driver can handle asynch guest cmd completion by reading the command offset from io port */
1039#define VBVACAPS_COMPLETEGCMD_BY_IOREAD 0x00000001
1040/* the guest driver can handle video adapter IRQs */
1041#define VBVACAPS_IRQ 0x00000002
1042typedef struct _VBVACAPS
1043{
1044 int32_t rc;
1045 uint32_t fCaps;
1046} VBVACAPS;
1047
1048#pragma pack()
1049
1050typedef uint64_t VBOXVIDEOOFFSET;
1051
1052#define VBOXVIDEOOFFSET_VOID ((VBOXVIDEOOFFSET)~0)
1053
1054#ifdef VBOX_WITH_WDDM
1055# pragma pack(1)
1056
1057/*
1058 * VBOXSHGSMI made on top HGSMI and allows receiving notifications
1059 * about G->H command completion
1060 */
1061/* SHGSMI command header */
1062typedef struct VBOXSHGSMIHEADER
1063{
1064 uint64_t pvNext; /*<- completion processing queue */
1065 uint32_t fFlags; /*<- see VBOXSHGSMI_FLAG_XXX Flags */
1066 uint32_t cRefs; /*<- command referece count */
1067 uint64_t u64Info1; /*<- contents depends on the fFlags value */
1068 uint64_t u64Info2; /*<- contents depends on the fFlags value */
1069} VBOXSHGSMIHEADER, *PVBOXSHGSMIHEADER;
1070
1071/* the command processing was asynch, set by the host to indicate asynch command completion
1072 * must not be cleared once set, the command completion is performed by issuing a host->guest completion command
1073 * while keeping this flag unchanged */
1074#define VBOXSHGSMI_FLAG_HG_ASYNCH 0x00010000
1075#if 0
1076/* if set - asynch completion is performed by issuing the event,
1077 * if cleared - asynch completion is performed by calling a callback */
1078#define VBOXSHGSMI_FLAG_GH_ASYNCH_EVENT 0x00000001
1079#endif
1080/* issue interrupt on asynch completion, used for critical G->H commands,
1081 * i.e. for completion of which guest is waiting. */
1082#define VBOXSHGSMI_FLAG_GH_ASYNCH_IRQ 0x00000002
1083/* guest does not do any op on completion of this command,
1084 * the host may copy the command and indicate that it does not need the command anymore
1085 * by not setting VBOXSHGSMI_FLAG_HG_ASYNCH */
1086#define VBOXSHGSMI_FLAG_GH_ASYNCH_NOCOMPLETION 0x00000004
1087/* guest requires the command to be processed asynchronously,
1088 * not setting VBOXSHGSMI_FLAG_HG_ASYNCH by the host in this case is treated as command failure */
1089#define VBOXSHGSMI_FLAG_GH_ASYNCH_FORCE 0x00000008
1090/* force IRQ on cmd completion */
1091#define VBOXSHGSMI_FLAG_GH_ASYNCH_IRQ_FORCE 0x00000010
1092/* an IRQ-level callback is associated with the command */
1093#define VBOXSHGSMI_FLAG_GH_ASYNCH_CALLBACK_IRQ 0x00000020
1094/* guest expects this command to be completed synchronously */
1095#define VBOXSHGSMI_FLAG_GH_SYNCH 0x00000040
1096
1097DECLINLINE(uint8_t *) VBoxSHGSMIBufferData (const VBOXSHGSMIHEADER* pHeader)
1098{
1099 return (uint8_t *)pHeader + sizeof (VBOXSHGSMIHEADER);
1100}
1101
1102DECLINLINE(PVBOXSHGSMIHEADER) VBoxSHGSMIBufferHeader (const void *pvData)
1103{
1104 return (PVBOXSHGSMIHEADER)((uint8_t *)pvData - sizeof (VBOXSHGSMIHEADER));
1105}
1106
1107typedef enum
1108{
1109 VBOXVDMACMD_TYPE_UNDEFINED = 0,
1110 VBOXVDMACMD_TYPE_DMA_PRESENT_BLT = 1,
1111 VBOXVDMACMD_TYPE_DMA_BPB_TRANSFER,
1112 VBOXVDMACMD_TYPE_DMA_BPB_FILL,
1113 VBOXVDMACMD_TYPE_DMA_PRESENT_SHADOW2PRIMARY,
1114 VBOXVDMACMD_TYPE_DMA_PRESENT_CLRFILL,
1115 VBOXVDMACMD_TYPE_DMA_PRESENT_FLIP,
1116 VBOXVDMACMD_TYPE_DMA_NOP,
1117 VBOXVDMACMD_TYPE_CHROMIUM_CMD
1118} VBOXVDMACMD_TYPE;
1119
1120# pragma pack()
1121#endif
1122
1123#ifdef VBOX_WITH_VDMA
1124# pragma pack(1)
1125
1126/* VDMA - Video DMA */
1127
1128/* VDMA Control API */
1129/* VBOXVDMA_CTL::u32Flags */
1130typedef enum
1131{
1132 VBOXVDMA_CTL_TYPE_NONE = 0,
1133 VBOXVDMA_CTL_TYPE_ENABLE,
1134 VBOXVDMA_CTL_TYPE_DISABLE,
1135 VBOXVDMA_CTL_TYPE_FLUSH
1136} VBOXVDMA_CTL_TYPE;
1137
1138typedef struct VBOXVDMA_CTL
1139{
1140 VBOXVDMA_CTL_TYPE enmCtl;
1141 uint32_t u32Offset;
1142 int32_t i32Result;
1143} VBOXVDMA_CTL, *PVBOXVDMA_CTL;
1144
1145typedef struct VBOXVDMA_RECTL
1146{
1147 int16_t left;
1148 int16_t top;
1149 uint16_t width;
1150 uint16_t height;
1151} VBOXVDMA_RECTL, *PVBOXVDMA_RECTL;
1152
1153typedef enum
1154{
1155 VBOXVDMA_PIXEL_FORMAT_UNKNOWN = 0,
1156 VBOXVDMA_PIXEL_FORMAT_R8G8B8 = 20,
1157 VBOXVDMA_PIXEL_FORMAT_A8R8G8B8 = 21,
1158 VBOXVDMA_PIXEL_FORMAT_X8R8G8B8 = 22,
1159 VBOXVDMA_PIXEL_FORMAT_R5G6B5 = 23,
1160 VBOXVDMA_PIXEL_FORMAT_X1R5G5B5 = 24,
1161 VBOXVDMA_PIXEL_FORMAT_A1R5G5B5 = 25,
1162 VBOXVDMA_PIXEL_FORMAT_A4R4G4B4 = 26,
1163 VBOXVDMA_PIXEL_FORMAT_R3G3B2 = 27,
1164 VBOXVDMA_PIXEL_FORMAT_A8 = 28,
1165 VBOXVDMA_PIXEL_FORMAT_A8R3G3B2 = 29,
1166 VBOXVDMA_PIXEL_FORMAT_X4R4G4B4 = 30,
1167 VBOXVDMA_PIXEL_FORMAT_A2B10G10R10 = 31,
1168 VBOXVDMA_PIXEL_FORMAT_A8B8G8R8 = 32,
1169 VBOXVDMA_PIXEL_FORMAT_X8B8G8R8 = 33,
1170 VBOXVDMA_PIXEL_FORMAT_G16R16 = 34,
1171 VBOXVDMA_PIXEL_FORMAT_A2R10G10B10 = 35,
1172 VBOXVDMA_PIXEL_FORMAT_A16B16G16R16 = 36,
1173 VBOXVDMA_PIXEL_FORMAT_A8P8 = 40,
1174 VBOXVDMA_PIXEL_FORMAT_P8 = 41,
1175 VBOXVDMA_PIXEL_FORMAT_L8 = 50,
1176 VBOXVDMA_PIXEL_FORMAT_A8L8 = 51,
1177 VBOXVDMA_PIXEL_FORMAT_A4L4 = 52,
1178 VBOXVDMA_PIXEL_FORMAT_V8U8 = 60,
1179 VBOXVDMA_PIXEL_FORMAT_L6V5U5 = 61,
1180 VBOXVDMA_PIXEL_FORMAT_X8L8V8U8 = 62,
1181 VBOXVDMA_PIXEL_FORMAT_Q8W8V8U8 = 63,
1182 VBOXVDMA_PIXEL_FORMAT_V16U16 = 64,
1183 VBOXVDMA_PIXEL_FORMAT_W11V11U10 = 65,
1184 VBOXVDMA_PIXEL_FORMAT_A2W10V10U10 = 67
1185} VBOXVDMA_PIXEL_FORMAT;
1186
1187typedef struct VBOXVDMA_SURF_DESC
1188{
1189 uint32_t width;
1190 uint32_t height;
1191 VBOXVDMA_PIXEL_FORMAT format;
1192 uint32_t bpp;
1193 uint32_t pitch;
1194 uint32_t fFlags;
1195} VBOXVDMA_SURF_DESC, *PVBOXVDMA_SURF_DESC;
1196
1197/*typedef uint64_t VBOXVDMAPHADDRESS;*/
1198typedef uint64_t VBOXVDMASURFHANDLE;
1199
1200/* region specified as a rectangle, otherwize it is a size of memory pointed to by phys address */
1201#define VBOXVDMAOPERAND_FLAGS_RECTL 0x1
1202/* Surface handle is valid */
1203#define VBOXVDMAOPERAND_FLAGS_PRIMARY 0x2
1204/* address is offset in VRAM */
1205#define VBOXVDMAOPERAND_FLAGS_VRAMOFFSET 0x4
1206
1207
1208/* VBOXVDMACBUF_DR::phBuf specifies offset in VRAM */
1209#define VBOXVDMACBUF_FLAG_BUF_VRAM_OFFSET 0x00000001
1210/* command buffer follows the VBOXVDMACBUF_DR in VRAM, VBOXVDMACBUF_DR::phBuf is ignored */
1211#define VBOXVDMACBUF_FLAG_BUF_FOLLOWS_DR 0x00000002
1212
1213/*
1214 * We can not submit the DMA command via VRAM since we do not have control over
1215 * DMA command buffer [de]allocation, i.e. we only control the buffer contents.
1216 * In other words the system may call one of our callbacks to fill a command buffer
1217 * with the necessary commands and then discard the buffer w/o any notification.
1218 *
1219 * We have only DMA command buffer physical address at submission time.
1220 *
1221 * so the only way is to */
1222typedef struct VBOXVDMACBUF_DR
1223{
1224 uint16_t fFlags;
1225 uint16_t cbBuf;
1226 /* RT_SUCCESS() - on success
1227 * VERR_INTERRUPTED - on preemption
1228 * VERR_xxx - on error */
1229 int32_t rc;
1230 union
1231 {
1232 uint64_t phBuf;
1233 VBOXVIDEOOFFSET offVramBuf;
1234 } Location;
1235 uint64_t aGuestData[7];
1236} VBOXVDMACBUF_DR, *PVBOXVDMACBUF_DR;
1237
1238#define VBOXVDMACBUF_DR_TAIL(_pCmd, _t) ( (_t*)(((uint8_t*)(_pCmd)) + sizeof (VBOXVDMACBUF_DR)) )
1239#define VBOXVDMACBUF_DR_FROM_TAIL(_pCmd) ( (VBOXVDMACBUF_DR*)(((uint8_t*)(_pCmd)) - sizeof (VBOXVDMACBUF_DR)) )
1240
1241typedef struct VBOXVDMACMD
1242{
1243 VBOXVDMACMD_TYPE enmType;
1244 uint32_t u32CmdSpecific;
1245} VBOXVDMACMD, *PVBOXVDMACMD;
1246
1247#define VBOXVDMACMD_HEADER_SIZE() sizeof (VBOXVDMACMD)
1248#define VBOXVDMACMD_SIZE_FROMBODYSIZE(_s) (VBOXVDMACMD_HEADER_SIZE() + (_s))
1249#define VBOXVDMACMD_SIZE(_t) (VBOXVDMACMD_SIZE_FROMBODYSIZE(sizeof (_t)))
1250#define VBOXVDMACMD_BODY(_pCmd, _t) ( (_t*)(((uint8_t*)(_pCmd)) + VBOXVDMACMD_HEADER_SIZE()) )
1251#define VBOXVDMACMD_FROM_BODY(_pCmd) ( (VBOXVDMACMD*)(((uint8_t*)(_pCmd)) - VBOXVDMACMD_HEADER_SIZE()) )
1252#define VBOXVDMACMD_BODY_FIELD_OFFSET(_ot, _t, _f) ( (_ot)( VBOXVDMACMD_BODY(0, uint8_t) + RT_OFFSETOF(_t, _f) ) )
1253
1254typedef struct VBOXVDMACMD_DMA_PRESENT_BLT
1255{
1256 VBOXVIDEOOFFSET offSrc;
1257 VBOXVIDEOOFFSET offDst;
1258 VBOXVDMA_SURF_DESC srcDesc;
1259 VBOXVDMA_SURF_DESC dstDesc;
1260 VBOXVDMA_RECTL srcRectl;
1261 VBOXVDMA_RECTL dstRectl;
1262 uint32_t u32Reserved;
1263 uint32_t cDstSubRects;
1264 VBOXVDMA_RECTL aDstSubRects[1];
1265} VBOXVDMACMD_DMA_PRESENT_BLT, *PVBOXVDMACMD_DMA_PRESENT_BLT;
1266
1267typedef struct VBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY
1268{
1269 VBOXVDMA_RECTL Rect;
1270} VBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY, *PVBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY;
1271
1272typedef struct VBOXVDMACMD_DMA_BPB_TRANSFER
1273{
1274 uint32_t cbTransferSize;
1275 uint32_t offTransfer; /* <- applicable for offVramBuf, which always points to the surface start*/
1276 uint32_t fFlags;
1277 uint32_t u32Reserved;
1278 union
1279 {
1280 uint64_t phBuf;
1281 VBOXVIDEOOFFSET offVramBuf;
1282 } Src;
1283 union
1284 {
1285 uint64_t phBuf;
1286 VBOXVIDEOOFFSET offVramBuf;
1287 } Dst;
1288} VBOXVDMACMD_DMA_BPB_TRANSFER, *PVBOXVDMACMD_DMA_BPB_TRANSFER;
1289
1290typedef struct VBOXVDMACMD_DMA_BPB_FILL
1291{
1292 VBOXVIDEOOFFSET offSurf;
1293 uint32_t cbFillSize;
1294 uint32_t u32FillPattern;
1295} VBOXVDMACMD_DMA_BPB_FILL, *PVBOXVDMACMD_DMA_BPB_FILL;
1296
1297# pragma pack()
1298#endif /* #ifdef VBOX_WITH_VDMA */
1299
1300#ifdef VBOX_WITH_CRHGSMI
1301# pragma pack(1)
1302typedef struct VBOXVDMACMD_CHROMIUM_BUFFER
1303{
1304 VBOXVIDEOOFFSET offBuffer;
1305 uint32_t cbBuffer;
1306 uint32_t u32GuesData;
1307 uint64_t u64GuesData;
1308} VBOXVDMACMD_CHROMIUM_BUFFER, *PVBOXVDMACMD_CHROMIUM_BUFFER;
1309
1310typedef struct VBOXVDMACMD_CHROMIUM_CMD
1311{
1312 uint32_t cBuffers;
1313 uint32_t u32Reserved;
1314 VBOXVDMACMD_CHROMIUM_BUFFER aBuffers[1];
1315} VBOXVDMACMD_CHROMIUM_CMD, *PVBOXVDMACMD_CHROMIUM_CMD;
1316
1317typedef enum
1318{
1319 VBOXVDMACMD_CHROMIUM_CTL_TYPE_UNKNOWN = 0,
1320 VBOXVDMACMD_CHROMIUM_CTL_TYPE_CRHGSMI_SETUP,
1321 VBOXVDMACMD_CHROMIUM_CTL_TYPE_SIZEHACK = 0xfffffffe
1322} VBOXVDMACMD_CHROMIUM_CTL_TYPE;
1323
1324typedef struct VBOXVDMACMD_CHROMIUM_CTL
1325{
1326 VBOXVDMACMD_CHROMIUM_CTL_TYPE enmType;
1327 uint32_t cbCmd;
1328} VBOXVDMACMD_CHROMIUM_CTL, *PVBOXVDMACMD_CHROMIUM_CTL;
1329
1330typedef struct VBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP
1331{
1332 VBOXVDMACMD_CHROMIUM_CTL Hdr;
1333 union
1334 {
1335 void *pvRamBase;
1336 uint64_t uAlignment;
1337 };
1338} VBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP, *PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP;
1339# pragma pack()
1340#endif
1341
1342#ifdef VBOXVDMA_WITH_VBVA
1343# pragma pack(1)
1344
1345typedef struct VBOXVDMAVBVACMD
1346{
1347 HGSMIOFFSET offCmd;
1348} VBOXVDMAVBVACMD;
1349
1350#pragma pack()
1351#endif
1352
1353#endif
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